1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/slab.h> 37 #include <linux/errno.h> 38 #include <linux/netdevice.h> 39 #include <linux/inetdevice.h> 40 #include <linux/rtnetlink.h> 41 #include <linux/if_vlan.h> 42 #include <net/ipv6.h> 43 #include <net/addrconf.h> 44 #include <net/devlink.h> 45 46 #include <rdma/ib_smi.h> 47 #include <rdma/ib_user_verbs.h> 48 #include <rdma/ib_addr.h> 49 #include <rdma/ib_cache.h> 50 51 #include <net/bonding.h> 52 53 #include <linux/mlx4/driver.h> 54 #include <linux/mlx4/cmd.h> 55 #include <linux/mlx4/qp.h> 56 57 #include "mlx4_ib.h" 58 #include <rdma/mlx4-abi.h> 59 60 #define DRV_NAME MLX4_IB_DRV_NAME 61 #define DRV_VERSION "2.2-1" 62 #define DRV_RELDATE "Feb 2014" 63 64 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF 65 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF 66 #define MLX4_IB_CARD_REV_A0 0xA0 67 68 MODULE_AUTHOR("Roland Dreier"); 69 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver"); 70 MODULE_LICENSE("Dual BSD/GPL"); 71 MODULE_VERSION(DRV_VERSION); 72 73 int mlx4_ib_sm_guid_assign = 0; 74 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444); 75 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)"); 76 77 static const char mlx4_ib_version[] = 78 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 79 DRV_VERSION " (" DRV_RELDATE ")\n"; 80 81 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init); 82 83 static struct workqueue_struct *wq; 84 85 static void init_query_mad(struct ib_smp *mad) 86 { 87 mad->base_version = 1; 88 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 89 mad->class_version = 1; 90 mad->method = IB_MGMT_METHOD_GET; 91 } 92 93 static int check_flow_steering_support(struct mlx4_dev *dev) 94 { 95 int eth_num_ports = 0; 96 int ib_num_ports = 0; 97 98 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; 99 100 if (dmfs) { 101 int i; 102 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 103 eth_num_ports++; 104 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 105 ib_num_ports++; 106 dmfs &= (!ib_num_ports || 107 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && 108 (!eth_num_ports || 109 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); 110 if (ib_num_ports && mlx4_is_mfunc(dev)) { 111 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n"); 112 dmfs = 0; 113 } 114 } 115 return dmfs; 116 } 117 118 static int num_ib_ports(struct mlx4_dev *dev) 119 { 120 int ib_ports = 0; 121 int i; 122 123 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 124 ib_ports++; 125 126 return ib_ports; 127 } 128 129 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num) 130 { 131 struct mlx4_ib_dev *ibdev = to_mdev(device); 132 struct net_device *dev; 133 134 rcu_read_lock(); 135 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num); 136 137 if (dev) { 138 if (mlx4_is_bonded(ibdev->dev)) { 139 struct net_device *upper = NULL; 140 141 upper = netdev_master_upper_dev_get_rcu(dev); 142 if (upper) { 143 struct net_device *active; 144 145 active = bond_option_active_slave_get_rcu(netdev_priv(upper)); 146 if (active) 147 dev = active; 148 } 149 } 150 } 151 if (dev) 152 dev_hold(dev); 153 154 rcu_read_unlock(); 155 return dev; 156 } 157 158 static int mlx4_ib_update_gids_v1(struct gid_entry *gids, 159 struct mlx4_ib_dev *ibdev, 160 u8 port_num) 161 { 162 struct mlx4_cmd_mailbox *mailbox; 163 int err; 164 struct mlx4_dev *dev = ibdev->dev; 165 int i; 166 union ib_gid *gid_tbl; 167 168 mailbox = mlx4_alloc_cmd_mailbox(dev); 169 if (IS_ERR(mailbox)) 170 return -ENOMEM; 171 172 gid_tbl = mailbox->buf; 173 174 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 175 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid)); 176 177 err = mlx4_cmd(dev, mailbox->dma, 178 MLX4_SET_PORT_GID_TABLE << 8 | port_num, 179 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 180 MLX4_CMD_WRAPPED); 181 if (mlx4_is_bonded(dev)) 182 err += mlx4_cmd(dev, mailbox->dma, 183 MLX4_SET_PORT_GID_TABLE << 8 | 2, 184 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 185 MLX4_CMD_WRAPPED); 186 187 mlx4_free_cmd_mailbox(dev, mailbox); 188 return err; 189 } 190 191 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids, 192 struct mlx4_ib_dev *ibdev, 193 u8 port_num) 194 { 195 struct mlx4_cmd_mailbox *mailbox; 196 int err; 197 struct mlx4_dev *dev = ibdev->dev; 198 int i; 199 struct { 200 union ib_gid gid; 201 __be32 rsrvd1[2]; 202 __be16 rsrvd2; 203 u8 type; 204 u8 version; 205 __be32 rsrvd3; 206 } *gid_tbl; 207 208 mailbox = mlx4_alloc_cmd_mailbox(dev); 209 if (IS_ERR(mailbox)) 210 return -ENOMEM; 211 212 gid_tbl = mailbox->buf; 213 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 214 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid)); 215 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) { 216 gid_tbl[i].version = 2; 217 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid)) 218 gid_tbl[i].type = 1; 219 else 220 memset(&gid_tbl[i].gid, 0, 12); 221 } 222 } 223 224 err = mlx4_cmd(dev, mailbox->dma, 225 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num, 226 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 227 MLX4_CMD_WRAPPED); 228 if (mlx4_is_bonded(dev)) 229 err += mlx4_cmd(dev, mailbox->dma, 230 MLX4_SET_PORT_ROCE_ADDR << 8 | 2, 231 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 232 MLX4_CMD_WRAPPED); 233 234 mlx4_free_cmd_mailbox(dev, mailbox); 235 return err; 236 } 237 238 static int mlx4_ib_update_gids(struct gid_entry *gids, 239 struct mlx4_ib_dev *ibdev, 240 u8 port_num) 241 { 242 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 243 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num); 244 245 return mlx4_ib_update_gids_v1(gids, ibdev, port_num); 246 } 247 248 static int mlx4_ib_add_gid(struct ib_device *device, 249 u8 port_num, 250 unsigned int index, 251 const union ib_gid *gid, 252 const struct ib_gid_attr *attr, 253 void **context) 254 { 255 struct mlx4_ib_dev *ibdev = to_mdev(device); 256 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 257 struct mlx4_port_gid_table *port_gid_table; 258 int free = -1, found = -1; 259 int ret = 0; 260 int hw_update = 0; 261 int i; 262 struct gid_entry *gids = NULL; 263 264 if (!rdma_cap_roce_gid_table(device, port_num)) 265 return -EINVAL; 266 267 if (port_num > MLX4_MAX_PORTS) 268 return -EINVAL; 269 270 if (!context) 271 return -EINVAL; 272 273 port_gid_table = &iboe->gids[port_num - 1]; 274 spin_lock_bh(&iboe->lock); 275 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 276 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) && 277 (port_gid_table->gids[i].gid_type == attr->gid_type)) { 278 found = i; 279 break; 280 } 281 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid))) 282 free = i; /* HW has space */ 283 } 284 285 if (found < 0) { 286 if (free < 0) { 287 ret = -ENOSPC; 288 } else { 289 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC); 290 if (!port_gid_table->gids[free].ctx) { 291 ret = -ENOMEM; 292 } else { 293 *context = port_gid_table->gids[free].ctx; 294 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid)); 295 port_gid_table->gids[free].gid_type = attr->gid_type; 296 port_gid_table->gids[free].ctx->real_index = free; 297 port_gid_table->gids[free].ctx->refcount = 1; 298 hw_update = 1; 299 } 300 } 301 } else { 302 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx; 303 *context = ctx; 304 ctx->refcount++; 305 } 306 if (!ret && hw_update) { 307 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 308 if (!gids) { 309 ret = -ENOMEM; 310 } else { 311 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 312 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 313 gids[i].gid_type = port_gid_table->gids[i].gid_type; 314 } 315 } 316 } 317 spin_unlock_bh(&iboe->lock); 318 319 if (!ret && hw_update) { 320 ret = mlx4_ib_update_gids(gids, ibdev, port_num); 321 kfree(gids); 322 } 323 324 return ret; 325 } 326 327 static int mlx4_ib_del_gid(struct ib_device *device, 328 u8 port_num, 329 unsigned int index, 330 void **context) 331 { 332 struct gid_cache_context *ctx = *context; 333 struct mlx4_ib_dev *ibdev = to_mdev(device); 334 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 335 struct mlx4_port_gid_table *port_gid_table; 336 int ret = 0; 337 int hw_update = 0; 338 struct gid_entry *gids = NULL; 339 340 if (!rdma_cap_roce_gid_table(device, port_num)) 341 return -EINVAL; 342 343 if (port_num > MLX4_MAX_PORTS) 344 return -EINVAL; 345 346 port_gid_table = &iboe->gids[port_num - 1]; 347 spin_lock_bh(&iboe->lock); 348 if (ctx) { 349 ctx->refcount--; 350 if (!ctx->refcount) { 351 unsigned int real_index = ctx->real_index; 352 353 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid)); 354 kfree(port_gid_table->gids[real_index].ctx); 355 port_gid_table->gids[real_index].ctx = NULL; 356 hw_update = 1; 357 } 358 } 359 if (!ret && hw_update) { 360 int i; 361 362 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 363 if (!gids) { 364 ret = -ENOMEM; 365 } else { 366 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) 367 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 368 } 369 } 370 spin_unlock_bh(&iboe->lock); 371 372 if (!ret && hw_update) { 373 ret = mlx4_ib_update_gids(gids, ibdev, port_num); 374 kfree(gids); 375 } 376 return ret; 377 } 378 379 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev, 380 u8 port_num, int index) 381 { 382 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 383 struct gid_cache_context *ctx = NULL; 384 union ib_gid gid; 385 struct mlx4_port_gid_table *port_gid_table; 386 int real_index = -EINVAL; 387 int i; 388 int ret; 389 unsigned long flags; 390 struct ib_gid_attr attr; 391 392 if (port_num > MLX4_MAX_PORTS) 393 return -EINVAL; 394 395 if (mlx4_is_bonded(ibdev->dev)) 396 port_num = 1; 397 398 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num)) 399 return index; 400 401 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr); 402 if (ret) 403 return ret; 404 405 if (attr.ndev) 406 dev_put(attr.ndev); 407 408 if (!memcmp(&gid, &zgid, sizeof(gid))) 409 return -EINVAL; 410 411 spin_lock_irqsave(&iboe->lock, flags); 412 port_gid_table = &iboe->gids[port_num - 1]; 413 414 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 415 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) && 416 attr.gid_type == port_gid_table->gids[i].gid_type) { 417 ctx = port_gid_table->gids[i].ctx; 418 break; 419 } 420 if (ctx) 421 real_index = ctx->real_index; 422 spin_unlock_irqrestore(&iboe->lock, flags); 423 return real_index; 424 } 425 426 static int mlx4_ib_query_device(struct ib_device *ibdev, 427 struct ib_device_attr *props, 428 struct ib_udata *uhw) 429 { 430 struct mlx4_ib_dev *dev = to_mdev(ibdev); 431 struct ib_smp *in_mad = NULL; 432 struct ib_smp *out_mad = NULL; 433 int err = -ENOMEM; 434 int have_ib_ports; 435 struct mlx4_uverbs_ex_query_device cmd; 436 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0}; 437 struct mlx4_clock_params clock_params; 438 439 if (uhw->inlen) { 440 if (uhw->inlen < sizeof(cmd)) 441 return -EINVAL; 442 443 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd)); 444 if (err) 445 return err; 446 447 if (cmd.comp_mask) 448 return -EINVAL; 449 450 if (cmd.reserved) 451 return -EINVAL; 452 } 453 454 resp.response_length = offsetof(typeof(resp), response_length) + 455 sizeof(resp.response_length); 456 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 457 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 458 if (!in_mad || !out_mad) 459 goto out; 460 461 init_query_mad(in_mad); 462 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 463 464 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS, 465 1, NULL, NULL, in_mad, out_mad); 466 if (err) 467 goto out; 468 469 memset(props, 0, sizeof *props); 470 471 have_ib_ports = num_ib_ports(dev->dev); 472 473 props->fw_ver = dev->dev->caps.fw_ver; 474 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 475 IB_DEVICE_PORT_ACTIVE_EVENT | 476 IB_DEVICE_SYS_IMAGE_GUID | 477 IB_DEVICE_RC_RNR_NAK_GEN | 478 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 479 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) 480 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 481 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) 482 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 483 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) 484 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 485 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) 486 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 487 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 488 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 489 if (dev->dev->caps.max_gso_sz && 490 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) && 491 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) 492 props->device_cap_flags |= IB_DEVICE_UD_TSO; 493 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 494 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 495 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && 496 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 497 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 498 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 499 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 500 props->device_cap_flags |= IB_DEVICE_XRC; 501 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) 502 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW; 503 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 504 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) 505 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 506 else 507 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A; 508 } 509 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 510 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 511 512 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 513 514 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 515 0xffffff; 516 props->vendor_part_id = dev->dev->persist->pdev->device; 517 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 518 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 519 520 props->max_mr_size = ~0ull; 521 props->page_size_cap = dev->dev->caps.page_size_cap; 522 props->max_qp = dev->dev->quotas.qp; 523 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; 524 props->max_sge = min(dev->dev->caps.max_sq_sg, 525 dev->dev->caps.max_rq_sg); 526 props->max_sge_rd = MLX4_MAX_SGE_RD; 527 props->max_cq = dev->dev->quotas.cq; 528 props->max_cqe = dev->dev->caps.max_cqes; 529 props->max_mr = dev->dev->quotas.mpt; 530 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; 531 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; 532 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; 533 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 534 props->max_srq = dev->dev->quotas.srq; 535 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 536 props->max_srq_sge = dev->dev->caps.max_srq_sge; 537 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 538 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 539 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 540 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 541 props->masked_atomic_cap = props->atomic_cap; 542 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; 543 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; 544 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; 545 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 546 props->max_mcast_grp; 547 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps; 548 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL; 549 props->timestamp_mask = 0xFFFFFFFFFFFFULL; 550 551 if (!mlx4_is_slave(dev->dev)) 552 err = mlx4_get_internal_clock_params(dev->dev, &clock_params); 553 554 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { 555 resp.response_length += sizeof(resp.hca_core_clock_offset); 556 if (!err && !mlx4_is_slave(dev->dev)) { 557 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP; 558 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; 559 } 560 } 561 562 if (uhw->outlen) { 563 err = ib_copy_to_udata(uhw, &resp, resp.response_length); 564 if (err) 565 goto out; 566 } 567 out: 568 kfree(in_mad); 569 kfree(out_mad); 570 571 return err; 572 } 573 574 static enum rdma_link_layer 575 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num) 576 { 577 struct mlx4_dev *dev = to_mdev(device)->dev; 578 579 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? 580 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 581 } 582 583 static int ib_link_query_port(struct ib_device *ibdev, u8 port, 584 struct ib_port_attr *props, int netw_view) 585 { 586 struct ib_smp *in_mad = NULL; 587 struct ib_smp *out_mad = NULL; 588 int ext_active_speed; 589 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 590 int err = -ENOMEM; 591 592 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 593 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 594 if (!in_mad || !out_mad) 595 goto out; 596 597 init_query_mad(in_mad); 598 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 599 in_mad->attr_mod = cpu_to_be32(port); 600 601 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 602 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 603 604 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 605 in_mad, out_mad); 606 if (err) 607 goto out; 608 609 610 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 611 props->lmc = out_mad->data[34] & 0x7; 612 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 613 props->sm_sl = out_mad->data[36] & 0xf; 614 props->state = out_mad->data[32] & 0xf; 615 props->phys_state = out_mad->data[33] >> 4; 616 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 617 if (netw_view) 618 props->gid_tbl_len = out_mad->data[50]; 619 else 620 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 621 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 622 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 623 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 624 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 625 props->active_width = out_mad->data[31] & 0xf; 626 props->active_speed = out_mad->data[35] >> 4; 627 props->max_mtu = out_mad->data[41] & 0xf; 628 props->active_mtu = out_mad->data[36] >> 4; 629 props->subnet_timeout = out_mad->data[51] & 0x1f; 630 props->max_vl_num = out_mad->data[37] >> 4; 631 props->init_type_reply = out_mad->data[41] >> 4; 632 633 /* Check if extended speeds (EDR/FDR/...) are supported */ 634 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 635 ext_active_speed = out_mad->data[62] >> 4; 636 637 switch (ext_active_speed) { 638 case 1: 639 props->active_speed = IB_SPEED_FDR; 640 break; 641 case 2: 642 props->active_speed = IB_SPEED_EDR; 643 break; 644 } 645 } 646 647 /* If reported active speed is QDR, check if is FDR-10 */ 648 if (props->active_speed == IB_SPEED_QDR) { 649 init_query_mad(in_mad); 650 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 651 in_mad->attr_mod = cpu_to_be32(port); 652 653 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, 654 NULL, NULL, in_mad, out_mad); 655 if (err) 656 goto out; 657 658 /* Checking LinkSpeedActive for FDR-10 */ 659 if (out_mad->data[15] & 0x1) 660 props->active_speed = IB_SPEED_FDR10; 661 } 662 663 /* Avoid wrong speed value returned by FW if the IB link is down. */ 664 if (props->state == IB_PORT_DOWN) 665 props->active_speed = IB_SPEED_SDR; 666 667 out: 668 kfree(in_mad); 669 kfree(out_mad); 670 return err; 671 } 672 673 static u8 state_to_phys_state(enum ib_port_state state) 674 { 675 return state == IB_PORT_ACTIVE ? 5 : 3; 676 } 677 678 static int eth_link_query_port(struct ib_device *ibdev, u8 port, 679 struct ib_port_attr *props, int netw_view) 680 { 681 682 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 683 struct mlx4_ib_iboe *iboe = &mdev->iboe; 684 struct net_device *ndev; 685 enum ib_mtu tmp; 686 struct mlx4_cmd_mailbox *mailbox; 687 int err = 0; 688 int is_bonded = mlx4_is_bonded(mdev->dev); 689 690 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 691 if (IS_ERR(mailbox)) 692 return PTR_ERR(mailbox); 693 694 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 695 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 696 MLX4_CMD_WRAPPED); 697 if (err) 698 goto out; 699 700 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ? 701 IB_WIDTH_4X : IB_WIDTH_1X; 702 props->active_speed = IB_SPEED_QDR; 703 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS; 704 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; 705 props->max_msg_sz = mdev->dev->caps.max_msg_sz; 706 props->pkey_tbl_len = 1; 707 props->max_mtu = IB_MTU_4096; 708 props->max_vl_num = 2; 709 props->state = IB_PORT_DOWN; 710 props->phys_state = state_to_phys_state(props->state); 711 props->active_mtu = IB_MTU_256; 712 spin_lock_bh(&iboe->lock); 713 ndev = iboe->netdevs[port - 1]; 714 if (ndev && is_bonded) { 715 rcu_read_lock(); /* required to get upper dev */ 716 ndev = netdev_master_upper_dev_get_rcu(ndev); 717 rcu_read_unlock(); 718 } 719 if (!ndev) 720 goto out_unlock; 721 722 tmp = iboe_get_mtu(ndev->mtu); 723 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 724 725 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? 726 IB_PORT_ACTIVE : IB_PORT_DOWN; 727 props->phys_state = state_to_phys_state(props->state); 728 out_unlock: 729 spin_unlock_bh(&iboe->lock); 730 out: 731 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 732 return err; 733 } 734 735 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 736 struct ib_port_attr *props, int netw_view) 737 { 738 int err; 739 740 memset(props, 0, sizeof *props); 741 742 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 743 ib_link_query_port(ibdev, port, props, netw_view) : 744 eth_link_query_port(ibdev, port, props, netw_view); 745 746 return err; 747 } 748 749 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 750 struct ib_port_attr *props) 751 { 752 /* returns host view */ 753 return __mlx4_ib_query_port(ibdev, port, props, 0); 754 } 755 756 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 757 union ib_gid *gid, int netw_view) 758 { 759 struct ib_smp *in_mad = NULL; 760 struct ib_smp *out_mad = NULL; 761 int err = -ENOMEM; 762 struct mlx4_ib_dev *dev = to_mdev(ibdev); 763 int clear = 0; 764 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 765 766 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 767 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 768 if (!in_mad || !out_mad) 769 goto out; 770 771 init_query_mad(in_mad); 772 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 773 in_mad->attr_mod = cpu_to_be32(port); 774 775 if (mlx4_is_mfunc(dev->dev) && netw_view) 776 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 777 778 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad); 779 if (err) 780 goto out; 781 782 memcpy(gid->raw, out_mad->data + 8, 8); 783 784 if (mlx4_is_mfunc(dev->dev) && !netw_view) { 785 if (index) { 786 /* For any index > 0, return the null guid */ 787 err = 0; 788 clear = 1; 789 goto out; 790 } 791 } 792 793 init_query_mad(in_mad); 794 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 795 in_mad->attr_mod = cpu_to_be32(index / 8); 796 797 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, 798 NULL, NULL, in_mad, out_mad); 799 if (err) 800 goto out; 801 802 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 803 804 out: 805 if (clear) 806 memset(gid->raw + 8, 0, 8); 807 kfree(in_mad); 808 kfree(out_mad); 809 return err; 810 } 811 812 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 813 union ib_gid *gid) 814 { 815 int ret; 816 817 if (rdma_protocol_ib(ibdev, port)) 818 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0); 819 820 if (!rdma_protocol_roce(ibdev, port)) 821 return -ENODEV; 822 823 if (!rdma_cap_roce_gid_table(ibdev, port)) 824 return -ENODEV; 825 826 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL); 827 if (ret == -EAGAIN) { 828 memcpy(gid, &zgid, sizeof(*gid)); 829 return 0; 830 } 831 832 return ret; 833 } 834 835 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl) 836 { 837 union sl2vl_tbl_to_u64 sl2vl64; 838 struct ib_smp *in_mad = NULL; 839 struct ib_smp *out_mad = NULL; 840 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 841 int err = -ENOMEM; 842 int jj; 843 844 if (mlx4_is_slave(to_mdev(ibdev)->dev)) { 845 *sl2vl_tbl = 0; 846 return 0; 847 } 848 849 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 850 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 851 if (!in_mad || !out_mad) 852 goto out; 853 854 init_query_mad(in_mad); 855 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE; 856 in_mad->attr_mod = 0; 857 858 if (mlx4_is_mfunc(to_mdev(ibdev)->dev)) 859 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 860 861 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 862 in_mad, out_mad); 863 if (err) 864 goto out; 865 866 for (jj = 0; jj < 8; jj++) 867 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj]; 868 *sl2vl_tbl = sl2vl64.sl64; 869 870 out: 871 kfree(in_mad); 872 kfree(out_mad); 873 return err; 874 } 875 876 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev) 877 { 878 u64 sl2vl; 879 int i; 880 int err; 881 882 for (i = 1; i <= mdev->dev->caps.num_ports; i++) { 883 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) 884 continue; 885 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl); 886 if (err) { 887 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n", 888 i, err); 889 sl2vl = 0; 890 } 891 atomic64_set(&mdev->sl2vl[i - 1], sl2vl); 892 } 893 } 894 895 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 896 u16 *pkey, int netw_view) 897 { 898 struct ib_smp *in_mad = NULL; 899 struct ib_smp *out_mad = NULL; 900 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 901 int err = -ENOMEM; 902 903 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 904 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 905 if (!in_mad || !out_mad) 906 goto out; 907 908 init_query_mad(in_mad); 909 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 910 in_mad->attr_mod = cpu_to_be32(index / 32); 911 912 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 913 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 914 915 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 916 in_mad, out_mad); 917 if (err) 918 goto out; 919 920 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 921 922 out: 923 kfree(in_mad); 924 kfree(out_mad); 925 return err; 926 } 927 928 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) 929 { 930 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0); 931 } 932 933 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 934 struct ib_device_modify *props) 935 { 936 struct mlx4_cmd_mailbox *mailbox; 937 unsigned long flags; 938 939 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 940 return -EOPNOTSUPP; 941 942 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 943 return 0; 944 945 if (mlx4_is_slave(to_mdev(ibdev)->dev)) 946 return -EOPNOTSUPP; 947 948 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags); 949 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 950 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags); 951 952 /* 953 * If possible, pass node desc to FW, so it can generate 954 * a 144 trap. If cmd fails, just ignore. 955 */ 956 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 957 if (IS_ERR(mailbox)) 958 return 0; 959 960 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 961 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 962 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 963 964 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 965 966 return 0; 967 } 968 969 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols, 970 u32 cap_mask) 971 { 972 struct mlx4_cmd_mailbox *mailbox; 973 int err; 974 975 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 976 if (IS_ERR(mailbox)) 977 return PTR_ERR(mailbox); 978 979 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 980 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 981 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 982 } else { 983 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols; 984 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 985 } 986 987 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE, 988 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 989 MLX4_CMD_WRAPPED); 990 991 mlx4_free_cmd_mailbox(dev->dev, mailbox); 992 return err; 993 } 994 995 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 996 struct ib_port_modify *props) 997 { 998 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 999 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 1000 struct ib_port_attr attr; 1001 u32 cap_mask; 1002 int err; 1003 1004 /* return OK if this is RoCE. CM calls ib_modify_port() regardless 1005 * of whether port link layer is ETH or IB. For ETH ports, qkey 1006 * violations and port capabilities are not meaningful. 1007 */ 1008 if (is_eth) 1009 return 0; 1010 1011 mutex_lock(&mdev->cap_mask_mutex); 1012 1013 err = mlx4_ib_query_port(ibdev, port, &attr); 1014 if (err) 1015 goto out; 1016 1017 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 1018 ~props->clr_port_cap_mask; 1019 1020 err = mlx4_ib_SET_PORT(mdev, port, 1021 !!(mask & IB_PORT_RESET_QKEY_CNTR), 1022 cap_mask); 1023 1024 out: 1025 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); 1026 return err; 1027 } 1028 1029 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev, 1030 struct ib_udata *udata) 1031 { 1032 struct mlx4_ib_dev *dev = to_mdev(ibdev); 1033 struct mlx4_ib_ucontext *context; 1034 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3; 1035 struct mlx4_ib_alloc_ucontext_resp resp; 1036 int err; 1037 1038 if (!dev->ib_active) 1039 return ERR_PTR(-EAGAIN); 1040 1041 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) { 1042 resp_v3.qp_tab_size = dev->dev->caps.num_qps; 1043 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; 1044 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1045 } else { 1046 resp.dev_caps = dev->dev->caps.userspace_caps; 1047 resp.qp_tab_size = dev->dev->caps.num_qps; 1048 resp.bf_reg_size = dev->dev->caps.bf_reg_size; 1049 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1050 resp.cqe_size = dev->dev->caps.cqe_size; 1051 } 1052 1053 context = kzalloc(sizeof(*context), GFP_KERNEL); 1054 if (!context) 1055 return ERR_PTR(-ENOMEM); 1056 1057 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar); 1058 if (err) { 1059 kfree(context); 1060 return ERR_PTR(err); 1061 } 1062 1063 INIT_LIST_HEAD(&context->db_page_list); 1064 mutex_init(&context->db_page_mutex); 1065 1066 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) 1067 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3)); 1068 else 1069 err = ib_copy_to_udata(udata, &resp, sizeof(resp)); 1070 1071 if (err) { 1072 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar); 1073 kfree(context); 1074 return ERR_PTR(-EFAULT); 1075 } 1076 1077 return &context->ibucontext; 1078 } 1079 1080 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1081 { 1082 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1083 1084 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar); 1085 kfree(context); 1086 1087 return 0; 1088 } 1089 1090 static void mlx4_ib_vma_open(struct vm_area_struct *area) 1091 { 1092 /* vma_open is called when a new VMA is created on top of our VMA. 1093 * This is done through either mremap flow or split_vma (usually due 1094 * to mlock, madvise, munmap, etc.). We do not support a clone of the 1095 * vma, as this VMA is strongly hardware related. Therefore we set the 1096 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from 1097 * calling us again and trying to do incorrect actions. We assume that 1098 * the original vma size is exactly a single page that there will be no 1099 * "splitting" operations on. 1100 */ 1101 area->vm_ops = NULL; 1102 } 1103 1104 static void mlx4_ib_vma_close(struct vm_area_struct *area) 1105 { 1106 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data; 1107 1108 /* It's guaranteed that all VMAs opened on a FD are closed before the 1109 * file itself is closed, therefore no sync is needed with the regular 1110 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync 1111 * with accessing the vma as part of mlx4_ib_disassociate_ucontext. 1112 * The close operation is usually called under mm->mmap_sem except when 1113 * process is exiting. The exiting case is handled explicitly as part 1114 * of mlx4_ib_disassociate_ucontext. 1115 */ 1116 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *) 1117 area->vm_private_data; 1118 1119 /* set the vma context pointer to null in the mlx4_ib driver's private 1120 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext(). 1121 */ 1122 mlx4_ib_vma_priv_data->vma = NULL; 1123 } 1124 1125 static const struct vm_operations_struct mlx4_ib_vm_ops = { 1126 .open = mlx4_ib_vma_open, 1127 .close = mlx4_ib_vma_close 1128 }; 1129 1130 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext) 1131 { 1132 int i; 1133 int ret = 0; 1134 struct vm_area_struct *vma; 1135 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1136 struct task_struct *owning_process = NULL; 1137 struct mm_struct *owning_mm = NULL; 1138 1139 owning_process = get_pid_task(ibcontext->tgid, PIDTYPE_PID); 1140 if (!owning_process) 1141 return; 1142 1143 owning_mm = get_task_mm(owning_process); 1144 if (!owning_mm) { 1145 pr_info("no mm, disassociate ucontext is pending task termination\n"); 1146 while (1) { 1147 /* make sure that task is dead before returning, it may 1148 * prevent a rare case of module down in parallel to a 1149 * call to mlx4_ib_vma_close. 1150 */ 1151 put_task_struct(owning_process); 1152 msleep(1); 1153 owning_process = get_pid_task(ibcontext->tgid, 1154 PIDTYPE_PID); 1155 if (!owning_process || 1156 owning_process->state == TASK_DEAD) { 1157 pr_info("disassociate ucontext done, task was terminated\n"); 1158 /* in case task was dead need to release the task struct */ 1159 if (owning_process) 1160 put_task_struct(owning_process); 1161 return; 1162 } 1163 } 1164 } 1165 1166 /* need to protect from a race on closing the vma as part of 1167 * mlx4_ib_vma_close(). 1168 */ 1169 down_read(&owning_mm->mmap_sem); 1170 for (i = 0; i < HW_BAR_COUNT; i++) { 1171 vma = context->hw_bar_info[i].vma; 1172 if (!vma) 1173 continue; 1174 1175 ret = zap_vma_ptes(context->hw_bar_info[i].vma, 1176 context->hw_bar_info[i].vma->vm_start, 1177 PAGE_SIZE); 1178 if (ret) { 1179 pr_err("Error: zap_vma_ptes failed for index=%d, ret=%d\n", i, ret); 1180 BUG_ON(1); 1181 } 1182 1183 /* context going to be destroyed, should not access ops any more */ 1184 context->hw_bar_info[i].vma->vm_ops = NULL; 1185 } 1186 1187 up_read(&owning_mm->mmap_sem); 1188 mmput(owning_mm); 1189 put_task_struct(owning_process); 1190 } 1191 1192 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma, 1193 struct mlx4_ib_vma_private_data *vma_private_data) 1194 { 1195 vma_private_data->vma = vma; 1196 vma->vm_private_data = vma_private_data; 1197 vma->vm_ops = &mlx4_ib_vm_ops; 1198 } 1199 1200 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 1201 { 1202 struct mlx4_ib_dev *dev = to_mdev(context->device); 1203 struct mlx4_ib_ucontext *mucontext = to_mucontext(context); 1204 1205 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 1206 return -EINVAL; 1207 1208 if (vma->vm_pgoff == 0) { 1209 /* We prevent double mmaping on same context */ 1210 if (mucontext->hw_bar_info[HW_BAR_DB].vma) 1211 return -EINVAL; 1212 1213 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1214 1215 if (io_remap_pfn_range(vma, vma->vm_start, 1216 to_mucontext(context)->uar.pfn, 1217 PAGE_SIZE, vma->vm_page_prot)) 1218 return -EAGAIN; 1219 1220 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]); 1221 1222 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) { 1223 /* We prevent double mmaping on same context */ 1224 if (mucontext->hw_bar_info[HW_BAR_BF].vma) 1225 return -EINVAL; 1226 1227 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 1228 1229 if (io_remap_pfn_range(vma, vma->vm_start, 1230 to_mucontext(context)->uar.pfn + 1231 dev->dev->caps.num_uars, 1232 PAGE_SIZE, vma->vm_page_prot)) 1233 return -EAGAIN; 1234 1235 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]); 1236 1237 } else if (vma->vm_pgoff == 3) { 1238 struct mlx4_clock_params params; 1239 int ret; 1240 1241 /* We prevent double mmaping on same context */ 1242 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma) 1243 return -EINVAL; 1244 1245 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms); 1246 1247 if (ret) 1248 return ret; 1249 1250 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1251 if (io_remap_pfn_range(vma, vma->vm_start, 1252 (pci_resource_start(dev->dev->persist->pdev, 1253 params.bar) + 1254 params.offset) 1255 >> PAGE_SHIFT, 1256 PAGE_SIZE, vma->vm_page_prot)) 1257 return -EAGAIN; 1258 1259 mlx4_ib_set_vma_data(vma, 1260 &mucontext->hw_bar_info[HW_BAR_CLOCK]); 1261 } else { 1262 return -EINVAL; 1263 } 1264 1265 return 0; 1266 } 1267 1268 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev, 1269 struct ib_ucontext *context, 1270 struct ib_udata *udata) 1271 { 1272 struct mlx4_ib_pd *pd; 1273 int err; 1274 1275 pd = kmalloc(sizeof *pd, GFP_KERNEL); 1276 if (!pd) 1277 return ERR_PTR(-ENOMEM); 1278 1279 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn); 1280 if (err) { 1281 kfree(pd); 1282 return ERR_PTR(err); 1283 } 1284 1285 if (context) 1286 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) { 1287 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn); 1288 kfree(pd); 1289 return ERR_PTR(-EFAULT); 1290 } 1291 1292 return &pd->ibpd; 1293 } 1294 1295 static int mlx4_ib_dealloc_pd(struct ib_pd *pd) 1296 { 1297 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 1298 kfree(pd); 1299 1300 return 0; 1301 } 1302 1303 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev, 1304 struct ib_ucontext *context, 1305 struct ib_udata *udata) 1306 { 1307 struct mlx4_ib_xrcd *xrcd; 1308 struct ib_cq_init_attr cq_attr = {}; 1309 int err; 1310 1311 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 1312 return ERR_PTR(-ENOSYS); 1313 1314 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL); 1315 if (!xrcd) 1316 return ERR_PTR(-ENOMEM); 1317 1318 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn); 1319 if (err) 1320 goto err1; 1321 1322 xrcd->pd = ib_alloc_pd(ibdev, 0); 1323 if (IS_ERR(xrcd->pd)) { 1324 err = PTR_ERR(xrcd->pd); 1325 goto err2; 1326 } 1327 1328 cq_attr.cqe = 1; 1329 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr); 1330 if (IS_ERR(xrcd->cq)) { 1331 err = PTR_ERR(xrcd->cq); 1332 goto err3; 1333 } 1334 1335 return &xrcd->ibxrcd; 1336 1337 err3: 1338 ib_dealloc_pd(xrcd->pd); 1339 err2: 1340 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn); 1341 err1: 1342 kfree(xrcd); 1343 return ERR_PTR(err); 1344 } 1345 1346 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 1347 { 1348 ib_destroy_cq(to_mxrcd(xrcd)->cq); 1349 ib_dealloc_pd(to_mxrcd(xrcd)->pd); 1350 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 1351 kfree(xrcd); 1352 1353 return 0; 1354 } 1355 1356 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 1357 { 1358 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1359 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1360 struct mlx4_ib_gid_entry *ge; 1361 1362 ge = kzalloc(sizeof *ge, GFP_KERNEL); 1363 if (!ge) 1364 return -ENOMEM; 1365 1366 ge->gid = *gid; 1367 if (mlx4_ib_add_mc(mdev, mqp, gid)) { 1368 ge->port = mqp->port; 1369 ge->added = 1; 1370 } 1371 1372 mutex_lock(&mqp->mutex); 1373 list_add_tail(&ge->list, &mqp->gid_list); 1374 mutex_unlock(&mqp->mutex); 1375 1376 return 0; 1377 } 1378 1379 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev, 1380 struct mlx4_ib_counters *ctr_table) 1381 { 1382 struct counter_index *counter, *tmp_count; 1383 1384 mutex_lock(&ctr_table->mutex); 1385 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list, 1386 list) { 1387 if (counter->allocated) 1388 mlx4_counter_free(ibdev->dev, counter->index); 1389 list_del(&counter->list); 1390 kfree(counter); 1391 } 1392 mutex_unlock(&ctr_table->mutex); 1393 } 1394 1395 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 1396 union ib_gid *gid) 1397 { 1398 struct net_device *ndev; 1399 int ret = 0; 1400 1401 if (!mqp->port) 1402 return 0; 1403 1404 spin_lock_bh(&mdev->iboe.lock); 1405 ndev = mdev->iboe.netdevs[mqp->port - 1]; 1406 if (ndev) 1407 dev_hold(ndev); 1408 spin_unlock_bh(&mdev->iboe.lock); 1409 1410 if (ndev) { 1411 ret = 1; 1412 dev_put(ndev); 1413 } 1414 1415 return ret; 1416 } 1417 1418 struct mlx4_ib_steering { 1419 struct list_head list; 1420 struct mlx4_flow_reg_id reg_id; 1421 union ib_gid gid; 1422 }; 1423 1424 #define LAST_ETH_FIELD vlan_tag 1425 #define LAST_IB_FIELD sl 1426 #define LAST_IPV4_FIELD dst_ip 1427 #define LAST_TCP_UDP_FIELD src_port 1428 1429 /* Field is the last supported field */ 1430 #define FIELDS_NOT_SUPPORTED(filter, field)\ 1431 memchr_inv((void *)&filter.field +\ 1432 sizeof(filter.field), 0,\ 1433 sizeof(filter) -\ 1434 offsetof(typeof(filter), field) -\ 1435 sizeof(filter.field)) 1436 1437 static int parse_flow_attr(struct mlx4_dev *dev, 1438 u32 qp_num, 1439 union ib_flow_spec *ib_spec, 1440 struct _rule_hw *mlx4_spec) 1441 { 1442 enum mlx4_net_trans_rule_id type; 1443 1444 switch (ib_spec->type) { 1445 case IB_FLOW_SPEC_ETH: 1446 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1447 return -ENOTSUPP; 1448 1449 type = MLX4_NET_TRANS_RULE_ID_ETH; 1450 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac, 1451 ETH_ALEN); 1452 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac, 1453 ETH_ALEN); 1454 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag; 1455 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag; 1456 break; 1457 case IB_FLOW_SPEC_IB: 1458 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD)) 1459 return -ENOTSUPP; 1460 1461 type = MLX4_NET_TRANS_RULE_ID_IB; 1462 mlx4_spec->ib.l3_qpn = 1463 cpu_to_be32(qp_num); 1464 mlx4_spec->ib.qpn_mask = 1465 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK); 1466 break; 1467 1468 1469 case IB_FLOW_SPEC_IPV4: 1470 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1471 return -ENOTSUPP; 1472 1473 type = MLX4_NET_TRANS_RULE_ID_IPV4; 1474 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip; 1475 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip; 1476 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip; 1477 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip; 1478 break; 1479 1480 case IB_FLOW_SPEC_TCP: 1481 case IB_FLOW_SPEC_UDP: 1482 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD)) 1483 return -ENOTSUPP; 1484 1485 type = ib_spec->type == IB_FLOW_SPEC_TCP ? 1486 MLX4_NET_TRANS_RULE_ID_TCP : 1487 MLX4_NET_TRANS_RULE_ID_UDP; 1488 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port; 1489 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port; 1490 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port; 1491 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port; 1492 break; 1493 1494 default: 1495 return -EINVAL; 1496 } 1497 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 || 1498 mlx4_hw_rule_sz(dev, type) < 0) 1499 return -EINVAL; 1500 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type)); 1501 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2; 1502 return mlx4_hw_rule_sz(dev, type); 1503 } 1504 1505 struct default_rules { 1506 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1507 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1508 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1509 __u8 link_layer; 1510 }; 1511 static const struct default_rules default_table[] = { 1512 { 1513 .mandatory_fields = {IB_FLOW_SPEC_IPV4}, 1514 .mandatory_not_fields = {IB_FLOW_SPEC_ETH}, 1515 .rules_create_list = {IB_FLOW_SPEC_IB}, 1516 .link_layer = IB_LINK_LAYER_INFINIBAND 1517 } 1518 }; 1519 1520 static int __mlx4_ib_default_rules_match(struct ib_qp *qp, 1521 struct ib_flow_attr *flow_attr) 1522 { 1523 int i, j, k; 1524 void *ib_flow; 1525 const struct default_rules *pdefault_rules = default_table; 1526 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port); 1527 1528 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) { 1529 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1530 memset(&field_types, 0, sizeof(field_types)); 1531 1532 if (link_layer != pdefault_rules->link_layer) 1533 continue; 1534 1535 ib_flow = flow_attr + 1; 1536 /* we assume the specs are sorted */ 1537 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS && 1538 j < flow_attr->num_of_specs; k++) { 1539 union ib_flow_spec *current_flow = 1540 (union ib_flow_spec *)ib_flow; 1541 1542 /* same layer but different type */ 1543 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) == 1544 (pdefault_rules->mandatory_fields[k] & 1545 IB_FLOW_SPEC_LAYER_MASK)) && 1546 (current_flow->type != 1547 pdefault_rules->mandatory_fields[k])) 1548 goto out; 1549 1550 /* same layer, try match next one */ 1551 if (current_flow->type == 1552 pdefault_rules->mandatory_fields[k]) { 1553 j++; 1554 ib_flow += 1555 ((union ib_flow_spec *)ib_flow)->size; 1556 } 1557 } 1558 1559 ib_flow = flow_attr + 1; 1560 for (j = 0; j < flow_attr->num_of_specs; 1561 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size) 1562 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++) 1563 /* same layer and same type */ 1564 if (((union ib_flow_spec *)ib_flow)->type == 1565 pdefault_rules->mandatory_not_fields[k]) 1566 goto out; 1567 1568 return i; 1569 } 1570 out: 1571 return -1; 1572 } 1573 1574 static int __mlx4_ib_create_default_rules( 1575 struct mlx4_ib_dev *mdev, 1576 struct ib_qp *qp, 1577 const struct default_rules *pdefault_rules, 1578 struct _rule_hw *mlx4_spec) { 1579 int size = 0; 1580 int i; 1581 1582 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { 1583 int ret; 1584 union ib_flow_spec ib_spec; 1585 switch (pdefault_rules->rules_create_list[i]) { 1586 case 0: 1587 /* no rule */ 1588 continue; 1589 case IB_FLOW_SPEC_IB: 1590 ib_spec.type = IB_FLOW_SPEC_IB; 1591 ib_spec.size = sizeof(struct ib_flow_spec_ib); 1592 1593 break; 1594 default: 1595 /* invalid rule */ 1596 return -EINVAL; 1597 } 1598 /* We must put empty rule, qpn is being ignored */ 1599 ret = parse_flow_attr(mdev->dev, 0, &ib_spec, 1600 mlx4_spec); 1601 if (ret < 0) { 1602 pr_info("invalid parsing\n"); 1603 return -EINVAL; 1604 } 1605 1606 mlx4_spec = (void *)mlx4_spec + ret; 1607 size += ret; 1608 } 1609 return size; 1610 } 1611 1612 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1613 int domain, 1614 enum mlx4_net_trans_promisc_mode flow_type, 1615 u64 *reg_id) 1616 { 1617 int ret, i; 1618 int size = 0; 1619 void *ib_flow; 1620 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 1621 struct mlx4_cmd_mailbox *mailbox; 1622 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 1623 int default_flow; 1624 1625 static const u16 __mlx4_domain[] = { 1626 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS, 1627 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL, 1628 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS, 1629 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC, 1630 }; 1631 1632 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) { 1633 pr_err("Invalid priority value %d\n", flow_attr->priority); 1634 return -EINVAL; 1635 } 1636 1637 if (domain >= IB_FLOW_DOMAIN_NUM) { 1638 pr_err("Invalid domain value %d\n", domain); 1639 return -EINVAL; 1640 } 1641 1642 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0) 1643 return -EINVAL; 1644 1645 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 1646 if (IS_ERR(mailbox)) 1647 return PTR_ERR(mailbox); 1648 ctrl = mailbox->buf; 1649 1650 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] | 1651 flow_attr->priority); 1652 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type); 1653 ctrl->port = flow_attr->port; 1654 ctrl->qpn = cpu_to_be32(qp->qp_num); 1655 1656 ib_flow = flow_attr + 1; 1657 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 1658 /* Add default flows */ 1659 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr); 1660 if (default_flow >= 0) { 1661 ret = __mlx4_ib_create_default_rules( 1662 mdev, qp, default_table + default_flow, 1663 mailbox->buf + size); 1664 if (ret < 0) { 1665 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1666 return -EINVAL; 1667 } 1668 size += ret; 1669 } 1670 for (i = 0; i < flow_attr->num_of_specs; i++) { 1671 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow, 1672 mailbox->buf + size); 1673 if (ret < 0) { 1674 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1675 return -EINVAL; 1676 } 1677 ib_flow += ((union ib_flow_spec *) ib_flow)->size; 1678 size += ret; 1679 } 1680 1681 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0, 1682 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, 1683 MLX4_CMD_WRAPPED); 1684 if (ret == -ENOMEM) 1685 pr_err("mcg table is full. Fail to register network rule.\n"); 1686 else if (ret == -ENXIO) 1687 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n"); 1688 else if (ret) 1689 pr_err("Invalid argument. Fail to register network rule.\n"); 1690 1691 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1692 return ret; 1693 } 1694 1695 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id) 1696 { 1697 int err; 1698 err = mlx4_cmd(dev, reg_id, 0, 0, 1699 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, 1700 MLX4_CMD_WRAPPED); 1701 if (err) 1702 pr_err("Fail to detach network rule. registration id = 0x%llx\n", 1703 reg_id); 1704 return err; 1705 } 1706 1707 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1708 u64 *reg_id) 1709 { 1710 void *ib_flow; 1711 union ib_flow_spec *ib_spec; 1712 struct mlx4_dev *dev = to_mdev(qp->device)->dev; 1713 int err = 0; 1714 1715 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 1716 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 1717 return 0; /* do nothing */ 1718 1719 ib_flow = flow_attr + 1; 1720 ib_spec = (union ib_flow_spec *)ib_flow; 1721 1722 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1) 1723 return 0; /* do nothing */ 1724 1725 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac, 1726 flow_attr->port, qp->qp_num, 1727 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff), 1728 reg_id); 1729 return err; 1730 } 1731 1732 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev, 1733 struct ib_flow_attr *flow_attr, 1734 enum mlx4_net_trans_promisc_mode *type) 1735 { 1736 int err = 0; 1737 1738 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) || 1739 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) || 1740 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) { 1741 return -EOPNOTSUPP; 1742 } 1743 1744 if (flow_attr->num_of_specs == 0) { 1745 type[0] = MLX4_FS_MC_SNIFFER; 1746 type[1] = MLX4_FS_UC_SNIFFER; 1747 } else { 1748 union ib_flow_spec *ib_spec; 1749 1750 ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1751 if (ib_spec->type != IB_FLOW_SPEC_ETH) 1752 return -EINVAL; 1753 1754 /* if all is zero than MC and UC */ 1755 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) { 1756 type[0] = MLX4_FS_MC_SNIFFER; 1757 type[1] = MLX4_FS_UC_SNIFFER; 1758 } else { 1759 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01, 1760 ib_spec->eth.mask.dst_mac[1], 1761 ib_spec->eth.mask.dst_mac[2], 1762 ib_spec->eth.mask.dst_mac[3], 1763 ib_spec->eth.mask.dst_mac[4], 1764 ib_spec->eth.mask.dst_mac[5]}; 1765 1766 /* Above xor was only on MC bit, non empty mask is valid 1767 * only if this bit is set and rest are zero. 1768 */ 1769 if (!is_zero_ether_addr(&mac[0])) 1770 return -EINVAL; 1771 1772 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac)) 1773 type[0] = MLX4_FS_MC_SNIFFER; 1774 else 1775 type[0] = MLX4_FS_UC_SNIFFER; 1776 } 1777 } 1778 1779 return err; 1780 } 1781 1782 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp, 1783 struct ib_flow_attr *flow_attr, 1784 int domain) 1785 { 1786 int err = 0, i = 0, j = 0; 1787 struct mlx4_ib_flow *mflow; 1788 enum mlx4_net_trans_promisc_mode type[2]; 1789 struct mlx4_dev *dev = (to_mdev(qp->device))->dev; 1790 int is_bonded = mlx4_is_bonded(dev); 1791 1792 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt) 1793 return ERR_PTR(-EINVAL); 1794 1795 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) && 1796 (flow_attr->type != IB_FLOW_ATTR_NORMAL)) 1797 return ERR_PTR(-EOPNOTSUPP); 1798 1799 memset(type, 0, sizeof(type)); 1800 1801 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL); 1802 if (!mflow) { 1803 err = -ENOMEM; 1804 goto err_free; 1805 } 1806 1807 switch (flow_attr->type) { 1808 case IB_FLOW_ATTR_NORMAL: 1809 /* If dont trap flag (continue match) is set, under specific 1810 * condition traffic be replicated to given qp, 1811 * without stealing it 1812 */ 1813 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) { 1814 err = mlx4_ib_add_dont_trap_rule(dev, 1815 flow_attr, 1816 type); 1817 if (err) 1818 goto err_free; 1819 } else { 1820 type[0] = MLX4_FS_REGULAR; 1821 } 1822 break; 1823 1824 case IB_FLOW_ATTR_ALL_DEFAULT: 1825 type[0] = MLX4_FS_ALL_DEFAULT; 1826 break; 1827 1828 case IB_FLOW_ATTR_MC_DEFAULT: 1829 type[0] = MLX4_FS_MC_DEFAULT; 1830 break; 1831 1832 case IB_FLOW_ATTR_SNIFFER: 1833 type[0] = MLX4_FS_MIRROR_RX_PORT; 1834 type[1] = MLX4_FS_MIRROR_SX_PORT; 1835 break; 1836 1837 default: 1838 err = -EINVAL; 1839 goto err_free; 1840 } 1841 1842 while (i < ARRAY_SIZE(type) && type[i]) { 1843 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i], 1844 &mflow->reg_id[i].id); 1845 if (err) 1846 goto err_create_flow; 1847 if (is_bonded) { 1848 /* Application always sees one port so the mirror rule 1849 * must be on port #2 1850 */ 1851 flow_attr->port = 2; 1852 err = __mlx4_ib_create_flow(qp, flow_attr, 1853 domain, type[j], 1854 &mflow->reg_id[j].mirror); 1855 flow_attr->port = 1; 1856 if (err) 1857 goto err_create_flow; 1858 j++; 1859 } 1860 1861 i++; 1862 } 1863 1864 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1865 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1866 &mflow->reg_id[i].id); 1867 if (err) 1868 goto err_create_flow; 1869 1870 if (is_bonded) { 1871 flow_attr->port = 2; 1872 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1873 &mflow->reg_id[j].mirror); 1874 flow_attr->port = 1; 1875 if (err) 1876 goto err_create_flow; 1877 j++; 1878 } 1879 /* function to create mirror rule */ 1880 i++; 1881 } 1882 1883 return &mflow->ibflow; 1884 1885 err_create_flow: 1886 while (i) { 1887 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1888 mflow->reg_id[i].id); 1889 i--; 1890 } 1891 1892 while (j) { 1893 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1894 mflow->reg_id[j].mirror); 1895 j--; 1896 } 1897 err_free: 1898 kfree(mflow); 1899 return ERR_PTR(err); 1900 } 1901 1902 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id) 1903 { 1904 int err, ret = 0; 1905 int i = 0; 1906 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device); 1907 struct mlx4_ib_flow *mflow = to_mflow(flow_id); 1908 1909 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) { 1910 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id); 1911 if (err) 1912 ret = err; 1913 if (mflow->reg_id[i].mirror) { 1914 err = __mlx4_ib_destroy_flow(mdev->dev, 1915 mflow->reg_id[i].mirror); 1916 if (err) 1917 ret = err; 1918 } 1919 i++; 1920 } 1921 1922 kfree(mflow); 1923 return ret; 1924 } 1925 1926 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1927 { 1928 int err; 1929 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1930 struct mlx4_dev *dev = mdev->dev; 1931 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1932 struct mlx4_ib_steering *ib_steering = NULL; 1933 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1934 struct mlx4_flow_reg_id reg_id; 1935 1936 if (mdev->dev->caps.steering_mode == 1937 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1938 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL); 1939 if (!ib_steering) 1940 return -ENOMEM; 1941 } 1942 1943 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port, 1944 !!(mqp->flags & 1945 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1946 prot, ®_id.id); 1947 if (err) { 1948 pr_err("multicast attach op failed, err %d\n", err); 1949 goto err_malloc; 1950 } 1951 1952 reg_id.mirror = 0; 1953 if (mlx4_is_bonded(dev)) { 1954 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 1955 (mqp->port == 1) ? 2 : 1, 1956 !!(mqp->flags & 1957 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1958 prot, ®_id.mirror); 1959 if (err) 1960 goto err_add; 1961 } 1962 1963 err = add_gid_entry(ibqp, gid); 1964 if (err) 1965 goto err_add; 1966 1967 if (ib_steering) { 1968 memcpy(ib_steering->gid.raw, gid->raw, 16); 1969 ib_steering->reg_id = reg_id; 1970 mutex_lock(&mqp->mutex); 1971 list_add(&ib_steering->list, &mqp->steering_rules); 1972 mutex_unlock(&mqp->mutex); 1973 } 1974 return 0; 1975 1976 err_add: 1977 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1978 prot, reg_id.id); 1979 if (reg_id.mirror) 1980 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1981 prot, reg_id.mirror); 1982 err_malloc: 1983 kfree(ib_steering); 1984 1985 return err; 1986 } 1987 1988 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 1989 { 1990 struct mlx4_ib_gid_entry *ge; 1991 struct mlx4_ib_gid_entry *tmp; 1992 struct mlx4_ib_gid_entry *ret = NULL; 1993 1994 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 1995 if (!memcmp(raw, ge->gid.raw, 16)) { 1996 ret = ge; 1997 break; 1998 } 1999 } 2000 2001 return ret; 2002 } 2003 2004 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 2005 { 2006 int err; 2007 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 2008 struct mlx4_dev *dev = mdev->dev; 2009 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 2010 struct net_device *ndev; 2011 struct mlx4_ib_gid_entry *ge; 2012 struct mlx4_flow_reg_id reg_id = {0, 0}; 2013 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 2014 2015 if (mdev->dev->caps.steering_mode == 2016 MLX4_STEERING_MODE_DEVICE_MANAGED) { 2017 struct mlx4_ib_steering *ib_steering; 2018 2019 mutex_lock(&mqp->mutex); 2020 list_for_each_entry(ib_steering, &mqp->steering_rules, list) { 2021 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) { 2022 list_del(&ib_steering->list); 2023 break; 2024 } 2025 } 2026 mutex_unlock(&mqp->mutex); 2027 if (&ib_steering->list == &mqp->steering_rules) { 2028 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n"); 2029 return -EINVAL; 2030 } 2031 reg_id = ib_steering->reg_id; 2032 kfree(ib_steering); 2033 } 2034 2035 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 2036 prot, reg_id.id); 2037 if (err) 2038 return err; 2039 2040 if (mlx4_is_bonded(dev)) { 2041 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 2042 prot, reg_id.mirror); 2043 if (err) 2044 return err; 2045 } 2046 2047 mutex_lock(&mqp->mutex); 2048 ge = find_gid_entry(mqp, gid->raw); 2049 if (ge) { 2050 spin_lock_bh(&mdev->iboe.lock); 2051 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 2052 if (ndev) 2053 dev_hold(ndev); 2054 spin_unlock_bh(&mdev->iboe.lock); 2055 if (ndev) 2056 dev_put(ndev); 2057 list_del(&ge->list); 2058 kfree(ge); 2059 } else 2060 pr_warn("could not find mgid entry\n"); 2061 2062 mutex_unlock(&mqp->mutex); 2063 2064 return 0; 2065 } 2066 2067 static int init_node_data(struct mlx4_ib_dev *dev) 2068 { 2069 struct ib_smp *in_mad = NULL; 2070 struct ib_smp *out_mad = NULL; 2071 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 2072 int err = -ENOMEM; 2073 2074 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 2075 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 2076 if (!in_mad || !out_mad) 2077 goto out; 2078 2079 init_query_mad(in_mad); 2080 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 2081 if (mlx4_is_master(dev->dev)) 2082 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 2083 2084 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2085 if (err) 2086 goto out; 2087 2088 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX); 2089 2090 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 2091 2092 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2093 if (err) 2094 goto out; 2095 2096 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); 2097 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 2098 2099 out: 2100 kfree(in_mad); 2101 kfree(out_mad); 2102 return err; 2103 } 2104 2105 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 2106 char *buf) 2107 { 2108 struct mlx4_ib_dev *dev = 2109 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2110 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device); 2111 } 2112 2113 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 2114 char *buf) 2115 { 2116 struct mlx4_ib_dev *dev = 2117 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2118 return sprintf(buf, "%x\n", dev->dev->rev_id); 2119 } 2120 2121 static ssize_t show_board(struct device *device, struct device_attribute *attr, 2122 char *buf) 2123 { 2124 struct mlx4_ib_dev *dev = 2125 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2126 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN, 2127 dev->dev->board_id); 2128 } 2129 2130 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 2131 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 2132 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 2133 2134 static struct device_attribute *mlx4_class_attributes[] = { 2135 &dev_attr_hw_rev, 2136 &dev_attr_hca_type, 2137 &dev_attr_board_id 2138 }; 2139 2140 struct diag_counter { 2141 const char *name; 2142 u32 offset; 2143 }; 2144 2145 #define DIAG_COUNTER(_name, _offset) \ 2146 { .name = #_name, .offset = _offset } 2147 2148 static const struct diag_counter diag_basic[] = { 2149 DIAG_COUNTER(rq_num_lle, 0x00), 2150 DIAG_COUNTER(sq_num_lle, 0x04), 2151 DIAG_COUNTER(rq_num_lqpoe, 0x08), 2152 DIAG_COUNTER(sq_num_lqpoe, 0x0C), 2153 DIAG_COUNTER(rq_num_lpe, 0x18), 2154 DIAG_COUNTER(sq_num_lpe, 0x1C), 2155 DIAG_COUNTER(rq_num_wrfe, 0x20), 2156 DIAG_COUNTER(sq_num_wrfe, 0x24), 2157 DIAG_COUNTER(sq_num_mwbe, 0x2C), 2158 DIAG_COUNTER(sq_num_bre, 0x34), 2159 DIAG_COUNTER(sq_num_rire, 0x44), 2160 DIAG_COUNTER(rq_num_rire, 0x48), 2161 DIAG_COUNTER(sq_num_rae, 0x4C), 2162 DIAG_COUNTER(rq_num_rae, 0x50), 2163 DIAG_COUNTER(sq_num_roe, 0x54), 2164 DIAG_COUNTER(sq_num_tree, 0x5C), 2165 DIAG_COUNTER(sq_num_rree, 0x64), 2166 DIAG_COUNTER(rq_num_rnr, 0x68), 2167 DIAG_COUNTER(sq_num_rnr, 0x6C), 2168 DIAG_COUNTER(rq_num_oos, 0x100), 2169 DIAG_COUNTER(sq_num_oos, 0x104), 2170 }; 2171 2172 static const struct diag_counter diag_ext[] = { 2173 DIAG_COUNTER(rq_num_dup, 0x130), 2174 DIAG_COUNTER(sq_num_to, 0x134), 2175 }; 2176 2177 static const struct diag_counter diag_device_only[] = { 2178 DIAG_COUNTER(num_cqovf, 0x1A0), 2179 DIAG_COUNTER(rq_num_udsdprd, 0x118), 2180 }; 2181 2182 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev, 2183 u8 port_num) 2184 { 2185 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2186 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2187 2188 if (!diag[!!port_num].name) 2189 return NULL; 2190 2191 return rdma_alloc_hw_stats_struct(diag[!!port_num].name, 2192 diag[!!port_num].num_counters, 2193 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2194 } 2195 2196 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev, 2197 struct rdma_hw_stats *stats, 2198 u8 port, int index) 2199 { 2200 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2201 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2202 u32 hw_value[ARRAY_SIZE(diag_device_only) + 2203 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {}; 2204 int ret; 2205 int i; 2206 2207 ret = mlx4_query_diag_counters(dev->dev, 2208 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS, 2209 diag[!!port].offset, hw_value, 2210 diag[!!port].num_counters, port); 2211 2212 if (ret) 2213 return ret; 2214 2215 for (i = 0; i < diag[!!port].num_counters; i++) 2216 stats->value[i] = hw_value[i]; 2217 2218 return diag[!!port].num_counters; 2219 } 2220 2221 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev, 2222 const char ***name, 2223 u32 **offset, 2224 u32 *num, 2225 bool port) 2226 { 2227 u32 num_counters; 2228 2229 num_counters = ARRAY_SIZE(diag_basic); 2230 2231 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) 2232 num_counters += ARRAY_SIZE(diag_ext); 2233 2234 if (!port) 2235 num_counters += ARRAY_SIZE(diag_device_only); 2236 2237 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL); 2238 if (!*name) 2239 return -ENOMEM; 2240 2241 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL); 2242 if (!*offset) 2243 goto err_name; 2244 2245 *num = num_counters; 2246 2247 return 0; 2248 2249 err_name: 2250 kfree(*name); 2251 return -ENOMEM; 2252 } 2253 2254 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev, 2255 const char **name, 2256 u32 *offset, 2257 bool port) 2258 { 2259 int i; 2260 int j; 2261 2262 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) { 2263 name[i] = diag_basic[i].name; 2264 offset[i] = diag_basic[i].offset; 2265 } 2266 2267 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) { 2268 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) { 2269 name[j] = diag_ext[i].name; 2270 offset[j] = diag_ext[i].offset; 2271 } 2272 } 2273 2274 if (!port) { 2275 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) { 2276 name[j] = diag_device_only[i].name; 2277 offset[j] = diag_device_only[i].offset; 2278 } 2279 } 2280 } 2281 2282 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev) 2283 { 2284 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters; 2285 int i; 2286 int ret; 2287 bool per_port = !!(ibdev->dev->caps.flags2 & 2288 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT); 2289 2290 if (mlx4_is_slave(ibdev->dev)) 2291 return 0; 2292 2293 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2294 /* i == 1 means we are building port counters */ 2295 if (i && !per_port) 2296 continue; 2297 2298 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name, 2299 &diag[i].offset, 2300 &diag[i].num_counters, i); 2301 if (ret) 2302 goto err_alloc; 2303 2304 mlx4_ib_fill_diag_counters(ibdev, diag[i].name, 2305 diag[i].offset, i); 2306 } 2307 2308 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats; 2309 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats; 2310 2311 return 0; 2312 2313 err_alloc: 2314 if (i) { 2315 kfree(diag[i - 1].name); 2316 kfree(diag[i - 1].offset); 2317 } 2318 2319 return ret; 2320 } 2321 2322 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev) 2323 { 2324 int i; 2325 2326 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2327 kfree(ibdev->diag_counters[i].offset); 2328 kfree(ibdev->diag_counters[i].name); 2329 } 2330 } 2331 2332 #define MLX4_IB_INVALID_MAC ((u64)-1) 2333 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, 2334 struct net_device *dev, 2335 int port) 2336 { 2337 u64 new_smac = 0; 2338 u64 release_mac = MLX4_IB_INVALID_MAC; 2339 struct mlx4_ib_qp *qp; 2340 2341 read_lock(&dev_base_lock); 2342 new_smac = mlx4_mac_to_u64(dev->dev_addr); 2343 read_unlock(&dev_base_lock); 2344 2345 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac); 2346 2347 /* no need for update QP1 and mac registration in non-SRIOV */ 2348 if (!mlx4_is_mfunc(ibdev->dev)) 2349 return; 2350 2351 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); 2352 qp = ibdev->qp1_proxy[port - 1]; 2353 if (qp) { 2354 int new_smac_index; 2355 u64 old_smac; 2356 struct mlx4_update_qp_params update_params; 2357 2358 mutex_lock(&qp->mutex); 2359 old_smac = qp->pri.smac; 2360 if (new_smac == old_smac) 2361 goto unlock; 2362 2363 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); 2364 2365 if (new_smac_index < 0) 2366 goto unlock; 2367 2368 update_params.smac_index = new_smac_index; 2369 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC, 2370 &update_params)) { 2371 release_mac = new_smac; 2372 goto unlock; 2373 } 2374 /* if old port was zero, no mac was yet registered for this QP */ 2375 if (qp->pri.smac_port) 2376 release_mac = old_smac; 2377 qp->pri.smac = new_smac; 2378 qp->pri.smac_port = port; 2379 qp->pri.smac_index = new_smac_index; 2380 } 2381 2382 unlock: 2383 if (release_mac != MLX4_IB_INVALID_MAC) 2384 mlx4_unregister_mac(ibdev->dev, port, release_mac); 2385 if (qp) 2386 mutex_unlock(&qp->mutex); 2387 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); 2388 } 2389 2390 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev, 2391 struct net_device *dev, 2392 unsigned long event) 2393 2394 { 2395 struct mlx4_ib_iboe *iboe; 2396 int update_qps_port = -1; 2397 int port; 2398 2399 ASSERT_RTNL(); 2400 2401 iboe = &ibdev->iboe; 2402 2403 spin_lock_bh(&iboe->lock); 2404 mlx4_foreach_ib_transport_port(port, ibdev->dev) { 2405 2406 iboe->netdevs[port - 1] = 2407 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port); 2408 2409 if (dev == iboe->netdevs[port - 1] && 2410 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || 2411 event == NETDEV_UP || event == NETDEV_CHANGE)) 2412 update_qps_port = port; 2413 2414 } 2415 spin_unlock_bh(&iboe->lock); 2416 2417 if (update_qps_port > 0) 2418 mlx4_ib_update_qps(ibdev, dev, update_qps_port); 2419 } 2420 2421 static int mlx4_ib_netdev_event(struct notifier_block *this, 2422 unsigned long event, void *ptr) 2423 { 2424 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2425 struct mlx4_ib_dev *ibdev; 2426 2427 if (!net_eq(dev_net(dev), &init_net)) 2428 return NOTIFY_DONE; 2429 2430 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 2431 mlx4_ib_scan_netdevs(ibdev, dev, event); 2432 2433 return NOTIFY_DONE; 2434 } 2435 2436 static void init_pkeys(struct mlx4_ib_dev *ibdev) 2437 { 2438 int port; 2439 int slave; 2440 int i; 2441 2442 if (mlx4_is_master(ibdev->dev)) { 2443 for (slave = 0; slave <= ibdev->dev->persist->num_vfs; 2444 ++slave) { 2445 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2446 for (i = 0; 2447 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2448 ++i) { 2449 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] = 2450 /* master has the identity virt2phys pkey mapping */ 2451 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i : 2452 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1; 2453 mlx4_sync_pkey_table(ibdev->dev, slave, port, i, 2454 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]); 2455 } 2456 } 2457 } 2458 /* initialize pkey cache */ 2459 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2460 for (i = 0; 2461 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2462 ++i) 2463 ibdev->pkeys.phys_pkey_cache[port-1][i] = 2464 (i) ? 0 : 0xFFFF; 2465 } 2466 } 2467 } 2468 2469 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2470 { 2471 int i, j, eq = 0, total_eqs = 0; 2472 2473 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors, 2474 sizeof(ibdev->eq_table[0]), GFP_KERNEL); 2475 if (!ibdev->eq_table) 2476 return; 2477 2478 for (i = 1; i <= dev->caps.num_ports; i++) { 2479 for (j = 0; j < mlx4_get_eqs_per_port(dev, i); 2480 j++, total_eqs++) { 2481 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs)) 2482 continue; 2483 ibdev->eq_table[eq] = total_eqs; 2484 if (!mlx4_assign_eq(dev, i, 2485 &ibdev->eq_table[eq])) 2486 eq++; 2487 else 2488 ibdev->eq_table[eq] = -1; 2489 } 2490 } 2491 2492 for (i = eq; i < dev->caps.num_comp_vectors; 2493 ibdev->eq_table[i++] = -1) 2494 ; 2495 2496 /* Advertise the new number of EQs to clients */ 2497 ibdev->ib_dev.num_comp_vectors = eq; 2498 } 2499 2500 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2501 { 2502 int i; 2503 int total_eqs = ibdev->ib_dev.num_comp_vectors; 2504 2505 /* no eqs were allocated */ 2506 if (!ibdev->eq_table) 2507 return; 2508 2509 /* Reset the advertised EQ number */ 2510 ibdev->ib_dev.num_comp_vectors = 0; 2511 2512 for (i = 0; i < total_eqs; i++) 2513 mlx4_release_eq(dev, ibdev->eq_table[i]); 2514 2515 kfree(ibdev->eq_table); 2516 ibdev->eq_table = NULL; 2517 } 2518 2519 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num, 2520 struct ib_port_immutable *immutable) 2521 { 2522 struct ib_port_attr attr; 2523 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 2524 int err; 2525 2526 err = mlx4_ib_query_port(ibdev, port_num, &attr); 2527 if (err) 2528 return err; 2529 2530 immutable->pkey_tbl_len = attr.pkey_tbl_len; 2531 immutable->gid_tbl_len = attr.gid_tbl_len; 2532 2533 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) { 2534 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 2535 } else { 2536 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) 2537 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; 2538 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 2539 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE | 2540 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2541 } 2542 2543 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2544 2545 return 0; 2546 } 2547 2548 static void get_fw_ver_str(struct ib_device *device, char *str, 2549 size_t str_len) 2550 { 2551 struct mlx4_ib_dev *dev = 2552 container_of(device, struct mlx4_ib_dev, ib_dev); 2553 snprintf(str, str_len, "%d.%d.%d", 2554 (int) (dev->dev->caps.fw_ver >> 32), 2555 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, 2556 (int) dev->dev->caps.fw_ver & 0xffff); 2557 } 2558 2559 static void *mlx4_ib_add(struct mlx4_dev *dev) 2560 { 2561 struct mlx4_ib_dev *ibdev; 2562 int num_ports = 0; 2563 int i, j; 2564 int err; 2565 struct mlx4_ib_iboe *iboe; 2566 int ib_num_ports = 0; 2567 int num_req_counters; 2568 int allocated; 2569 u32 counter_index; 2570 struct counter_index *new_counter_index = NULL; 2571 2572 pr_info_once("%s", mlx4_ib_version); 2573 2574 num_ports = 0; 2575 mlx4_foreach_ib_transport_port(i, dev) 2576 num_ports++; 2577 2578 /* No point in registering a device with no ports... */ 2579 if (num_ports == 0) 2580 return NULL; 2581 2582 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev); 2583 if (!ibdev) { 2584 dev_err(&dev->persist->pdev->dev, 2585 "Device struct alloc failed\n"); 2586 return NULL; 2587 } 2588 2589 iboe = &ibdev->iboe; 2590 2591 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) 2592 goto err_dealloc; 2593 2594 if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) 2595 goto err_pd; 2596 2597 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, 2598 PAGE_SIZE); 2599 if (!ibdev->uar_map) 2600 goto err_uar; 2601 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 2602 2603 ibdev->dev = dev; 2604 ibdev->bond_next_port = 0; 2605 2606 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX); 2607 ibdev->ib_dev.owner = THIS_MODULE; 2608 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA; 2609 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; 2610 ibdev->num_ports = num_ports; 2611 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ? 2612 1 : ibdev->num_ports; 2613 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; 2614 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev; 2615 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev; 2616 ibdev->ib_dev.add_gid = mlx4_ib_add_gid; 2617 ibdev->ib_dev.del_gid = mlx4_ib_del_gid; 2618 2619 if (dev->caps.userspace_caps) 2620 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION; 2621 else 2622 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION; 2623 2624 ibdev->ib_dev.uverbs_cmd_mask = 2625 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 2626 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 2627 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 2628 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 2629 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 2630 (1ull << IB_USER_VERBS_CMD_REG_MR) | 2631 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 2632 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 2633 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 2634 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 2635 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 2636 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 2637 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 2638 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 2639 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 2640 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 2641 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 2642 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 2643 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 2644 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 2645 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 2646 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 2647 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 2648 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 2649 2650 ibdev->ib_dev.query_device = mlx4_ib_query_device; 2651 ibdev->ib_dev.query_port = mlx4_ib_query_port; 2652 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer; 2653 ibdev->ib_dev.query_gid = mlx4_ib_query_gid; 2654 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey; 2655 ibdev->ib_dev.modify_device = mlx4_ib_modify_device; 2656 ibdev->ib_dev.modify_port = mlx4_ib_modify_port; 2657 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext; 2658 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext; 2659 ibdev->ib_dev.mmap = mlx4_ib_mmap; 2660 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd; 2661 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd; 2662 ibdev->ib_dev.create_ah = mlx4_ib_create_ah; 2663 ibdev->ib_dev.query_ah = mlx4_ib_query_ah; 2664 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah; 2665 ibdev->ib_dev.create_srq = mlx4_ib_create_srq; 2666 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq; 2667 ibdev->ib_dev.query_srq = mlx4_ib_query_srq; 2668 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq; 2669 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv; 2670 ibdev->ib_dev.create_qp = mlx4_ib_create_qp; 2671 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp; 2672 ibdev->ib_dev.query_qp = mlx4_ib_query_qp; 2673 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp; 2674 ibdev->ib_dev.post_send = mlx4_ib_post_send; 2675 ibdev->ib_dev.post_recv = mlx4_ib_post_recv; 2676 ibdev->ib_dev.create_cq = mlx4_ib_create_cq; 2677 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq; 2678 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq; 2679 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq; 2680 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq; 2681 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq; 2682 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr; 2683 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr; 2684 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr; 2685 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr; 2686 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr; 2687 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg; 2688 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach; 2689 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach; 2690 ibdev->ib_dev.process_mad = mlx4_ib_process_mad; 2691 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable; 2692 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str; 2693 ibdev->ib_dev.disassociate_ucontext = mlx4_ib_disassociate_ucontext; 2694 2695 if (!mlx4_is_slave(ibdev->dev)) { 2696 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc; 2697 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr; 2698 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr; 2699 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc; 2700 } 2701 2702 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || 2703 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 2704 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw; 2705 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw; 2706 2707 ibdev->ib_dev.uverbs_cmd_mask |= 2708 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) | 2709 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW); 2710 } 2711 2712 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 2713 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd; 2714 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd; 2715 ibdev->ib_dev.uverbs_cmd_mask |= 2716 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 2717 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 2718 } 2719 2720 if (check_flow_steering_support(dev)) { 2721 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED; 2722 ibdev->ib_dev.create_flow = mlx4_ib_create_flow; 2723 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow; 2724 2725 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2726 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) | 2727 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW); 2728 } 2729 2730 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2731 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) | 2732 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) | 2733 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP); 2734 2735 mlx4_ib_alloc_eqs(dev, ibdev); 2736 2737 spin_lock_init(&iboe->lock); 2738 2739 if (init_node_data(ibdev)) 2740 goto err_map; 2741 mlx4_init_sl2vl_tbl(ibdev); 2742 2743 for (i = 0; i < ibdev->num_ports; ++i) { 2744 mutex_init(&ibdev->counters_table[i].mutex); 2745 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list); 2746 } 2747 2748 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports; 2749 for (i = 0; i < num_req_counters; ++i) { 2750 mutex_init(&ibdev->qp1_proxy_lock[i]); 2751 allocated = 0; 2752 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == 2753 IB_LINK_LAYER_ETHERNET) { 2754 err = mlx4_counter_alloc(ibdev->dev, &counter_index); 2755 /* if failed to allocate a new counter, use default */ 2756 if (err) 2757 counter_index = 2758 mlx4_get_default_counter_index(dev, 2759 i + 1); 2760 else 2761 allocated = 1; 2762 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */ 2763 counter_index = mlx4_get_default_counter_index(dev, 2764 i + 1); 2765 } 2766 new_counter_index = kmalloc(sizeof(*new_counter_index), 2767 GFP_KERNEL); 2768 if (!new_counter_index) { 2769 if (allocated) 2770 mlx4_counter_free(ibdev->dev, counter_index); 2771 goto err_counter; 2772 } 2773 new_counter_index->index = counter_index; 2774 new_counter_index->allocated = allocated; 2775 list_add_tail(&new_counter_index->list, 2776 &ibdev->counters_table[i].counters_list); 2777 ibdev->counters_table[i].default_counter = counter_index; 2778 pr_info("counter index %d for port %d allocated %d\n", 2779 counter_index, i + 1, allocated); 2780 } 2781 if (mlx4_is_bonded(dev)) 2782 for (i = 1; i < ibdev->num_ports ; ++i) { 2783 new_counter_index = 2784 kmalloc(sizeof(struct counter_index), 2785 GFP_KERNEL); 2786 if (!new_counter_index) 2787 goto err_counter; 2788 new_counter_index->index = counter_index; 2789 new_counter_index->allocated = 0; 2790 list_add_tail(&new_counter_index->list, 2791 &ibdev->counters_table[i].counters_list); 2792 ibdev->counters_table[i].default_counter = 2793 counter_index; 2794 } 2795 2796 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2797 ib_num_ports++; 2798 2799 spin_lock_init(&ibdev->sm_lock); 2800 mutex_init(&ibdev->cap_mask_mutex); 2801 INIT_LIST_HEAD(&ibdev->qp_list); 2802 spin_lock_init(&ibdev->reset_flow_resource_lock); 2803 2804 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED && 2805 ib_num_ports) { 2806 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS; 2807 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count, 2808 MLX4_IB_UC_STEER_QPN_ALIGN, 2809 &ibdev->steer_qpn_base, 0); 2810 if (err) 2811 goto err_counter; 2812 2813 ibdev->ib_uc_qpns_bitmap = 2814 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) * 2815 sizeof(long), 2816 GFP_KERNEL); 2817 if (!ibdev->ib_uc_qpns_bitmap) { 2818 dev_err(&dev->persist->pdev->dev, 2819 "bit map alloc failed\n"); 2820 goto err_steer_qp_release; 2821 } 2822 2823 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count); 2824 2825 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE( 2826 dev, ibdev->steer_qpn_base, 2827 ibdev->steer_qpn_base + 2828 ibdev->steer_qpn_count - 1); 2829 if (err) 2830 goto err_steer_free_bitmap; 2831 } 2832 2833 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) 2834 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); 2835 2836 if (mlx4_ib_alloc_diag_counters(ibdev)) 2837 goto err_steer_free_bitmap; 2838 2839 if (ib_register_device(&ibdev->ib_dev, NULL)) 2840 goto err_diag_counters; 2841 2842 if (mlx4_ib_mad_init(ibdev)) 2843 goto err_reg; 2844 2845 if (mlx4_ib_init_sriov(ibdev)) 2846 goto err_mad; 2847 2848 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE || 2849 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2850 if (!iboe->nb.notifier_call) { 2851 iboe->nb.notifier_call = mlx4_ib_netdev_event; 2852 err = register_netdevice_notifier(&iboe->nb); 2853 if (err) { 2854 iboe->nb.notifier_call = NULL; 2855 goto err_notif; 2856 } 2857 } 2858 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2859 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT); 2860 if (err) { 2861 goto err_notif; 2862 } 2863 } 2864 } 2865 2866 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) { 2867 if (device_create_file(&ibdev->ib_dev.dev, 2868 mlx4_class_attributes[j])) 2869 goto err_notif; 2870 } 2871 2872 ibdev->ib_active = true; 2873 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2874 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i), 2875 &ibdev->ib_dev); 2876 2877 if (mlx4_is_mfunc(ibdev->dev)) 2878 init_pkeys(ibdev); 2879 2880 /* create paravirt contexts for any VFs which are active */ 2881 if (mlx4_is_master(ibdev->dev)) { 2882 for (j = 0; j < MLX4_MFUNC_MAX; j++) { 2883 if (j == mlx4_master_func_num(ibdev->dev)) 2884 continue; 2885 if (mlx4_is_slave_active(ibdev->dev, j)) 2886 do_slave_init(ibdev, j, 1); 2887 } 2888 } 2889 return ibdev; 2890 2891 err_notif: 2892 if (ibdev->iboe.nb.notifier_call) { 2893 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2894 pr_warn("failure unregistering notifier\n"); 2895 ibdev->iboe.nb.notifier_call = NULL; 2896 } 2897 flush_workqueue(wq); 2898 2899 mlx4_ib_close_sriov(ibdev); 2900 2901 err_mad: 2902 mlx4_ib_mad_cleanup(ibdev); 2903 2904 err_reg: 2905 ib_unregister_device(&ibdev->ib_dev); 2906 2907 err_diag_counters: 2908 mlx4_ib_diag_cleanup(ibdev); 2909 2910 err_steer_free_bitmap: 2911 kfree(ibdev->ib_uc_qpns_bitmap); 2912 2913 err_steer_qp_release: 2914 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 2915 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2916 ibdev->steer_qpn_count); 2917 err_counter: 2918 for (i = 0; i < ibdev->num_ports; ++i) 2919 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]); 2920 2921 err_map: 2922 iounmap(ibdev->uar_map); 2923 2924 err_uar: 2925 mlx4_uar_free(dev, &ibdev->priv_uar); 2926 2927 err_pd: 2928 mlx4_pd_free(dev, ibdev->priv_pdn); 2929 2930 err_dealloc: 2931 ib_dealloc_device(&ibdev->ib_dev); 2932 2933 return NULL; 2934 } 2935 2936 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn) 2937 { 2938 int offset; 2939 2940 WARN_ON(!dev->ib_uc_qpns_bitmap); 2941 2942 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap, 2943 dev->steer_qpn_count, 2944 get_count_order(count)); 2945 if (offset < 0) 2946 return offset; 2947 2948 *qpn = dev->steer_qpn_base + offset; 2949 return 0; 2950 } 2951 2952 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count) 2953 { 2954 if (!qpn || 2955 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED) 2956 return; 2957 2958 BUG_ON(qpn < dev->steer_qpn_base); 2959 2960 bitmap_release_region(dev->ib_uc_qpns_bitmap, 2961 qpn - dev->steer_qpn_base, 2962 get_count_order(count)); 2963 } 2964 2965 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 2966 int is_attach) 2967 { 2968 int err; 2969 size_t flow_size; 2970 struct ib_flow_attr *flow = NULL; 2971 struct ib_flow_spec_ib *ib_spec; 2972 2973 if (is_attach) { 2974 flow_size = sizeof(struct ib_flow_attr) + 2975 sizeof(struct ib_flow_spec_ib); 2976 flow = kzalloc(flow_size, GFP_KERNEL); 2977 if (!flow) 2978 return -ENOMEM; 2979 flow->port = mqp->port; 2980 flow->num_of_specs = 1; 2981 flow->size = flow_size; 2982 ib_spec = (struct ib_flow_spec_ib *)(flow + 1); 2983 ib_spec->type = IB_FLOW_SPEC_IB; 2984 ib_spec->size = sizeof(struct ib_flow_spec_ib); 2985 /* Add an empty rule for IB L2 */ 2986 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask)); 2987 2988 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, 2989 IB_FLOW_DOMAIN_NIC, 2990 MLX4_FS_REGULAR, 2991 &mqp->reg_id); 2992 } else { 2993 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id); 2994 } 2995 kfree(flow); 2996 return err; 2997 } 2998 2999 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) 3000 { 3001 struct mlx4_ib_dev *ibdev = ibdev_ptr; 3002 int p; 3003 int i; 3004 3005 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 3006 devlink_port_type_clear(mlx4_get_devlink_port(dev, i)); 3007 ibdev->ib_active = false; 3008 flush_workqueue(wq); 3009 3010 mlx4_ib_close_sriov(ibdev); 3011 mlx4_ib_mad_cleanup(ibdev); 3012 ib_unregister_device(&ibdev->ib_dev); 3013 mlx4_ib_diag_cleanup(ibdev); 3014 if (ibdev->iboe.nb.notifier_call) { 3015 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 3016 pr_warn("failure unregistering notifier\n"); 3017 ibdev->iboe.nb.notifier_call = NULL; 3018 } 3019 3020 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) { 3021 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 3022 ibdev->steer_qpn_count); 3023 kfree(ibdev->ib_uc_qpns_bitmap); 3024 } 3025 3026 iounmap(ibdev->uar_map); 3027 for (p = 0; p < ibdev->num_ports; ++p) 3028 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]); 3029 3030 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 3031 mlx4_CLOSE_PORT(dev, p); 3032 3033 mlx4_ib_free_eqs(dev, ibdev); 3034 3035 mlx4_uar_free(dev, &ibdev->priv_uar); 3036 mlx4_pd_free(dev, ibdev->priv_pdn); 3037 ib_dealloc_device(&ibdev->ib_dev); 3038 } 3039 3040 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init) 3041 { 3042 struct mlx4_ib_demux_work **dm = NULL; 3043 struct mlx4_dev *dev = ibdev->dev; 3044 int i; 3045 unsigned long flags; 3046 struct mlx4_active_ports actv_ports; 3047 unsigned int ports; 3048 unsigned int first_port; 3049 3050 if (!mlx4_is_master(dev)) 3051 return; 3052 3053 actv_ports = mlx4_get_active_ports(dev, slave); 3054 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); 3055 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); 3056 3057 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC); 3058 if (!dm) { 3059 pr_err("failed to allocate memory for tunneling qp update\n"); 3060 return; 3061 } 3062 3063 for (i = 0; i < ports; i++) { 3064 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC); 3065 if (!dm[i]) { 3066 pr_err("failed to allocate memory for tunneling qp update work struct\n"); 3067 while (--i >= 0) 3068 kfree(dm[i]); 3069 goto out; 3070 } 3071 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work); 3072 dm[i]->port = first_port + i + 1; 3073 dm[i]->slave = slave; 3074 dm[i]->do_init = do_init; 3075 dm[i]->dev = ibdev; 3076 } 3077 /* initialize or tear down tunnel QPs for the slave */ 3078 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags); 3079 if (!ibdev->sriov.is_going_down) { 3080 for (i = 0; i < ports; i++) 3081 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work); 3082 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3083 } else { 3084 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3085 for (i = 0; i < ports; i++) 3086 kfree(dm[i]); 3087 } 3088 out: 3089 kfree(dm); 3090 return; 3091 } 3092 3093 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev) 3094 { 3095 struct mlx4_ib_qp *mqp; 3096 unsigned long flags_qp; 3097 unsigned long flags_cq; 3098 struct mlx4_ib_cq *send_mcq, *recv_mcq; 3099 struct list_head cq_notify_list; 3100 struct mlx4_cq *mcq; 3101 unsigned long flags; 3102 3103 pr_warn("mlx4_ib_handle_catas_error was started\n"); 3104 INIT_LIST_HEAD(&cq_notify_list); 3105 3106 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 3107 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 3108 3109 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 3110 spin_lock_irqsave(&mqp->sq.lock, flags_qp); 3111 if (mqp->sq.tail != mqp->sq.head) { 3112 send_mcq = to_mcq(mqp->ibqp.send_cq); 3113 spin_lock_irqsave(&send_mcq->lock, flags_cq); 3114 if (send_mcq->mcq.comp && 3115 mqp->ibqp.send_cq->comp_handler) { 3116 if (!send_mcq->mcq.reset_notify_added) { 3117 send_mcq->mcq.reset_notify_added = 1; 3118 list_add_tail(&send_mcq->mcq.reset_notify, 3119 &cq_notify_list); 3120 } 3121 } 3122 spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 3123 } 3124 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 3125 /* Now, handle the QP's receive queue */ 3126 spin_lock_irqsave(&mqp->rq.lock, flags_qp); 3127 /* no handling is needed for SRQ */ 3128 if (!mqp->ibqp.srq) { 3129 if (mqp->rq.tail != mqp->rq.head) { 3130 recv_mcq = to_mcq(mqp->ibqp.recv_cq); 3131 spin_lock_irqsave(&recv_mcq->lock, flags_cq); 3132 if (recv_mcq->mcq.comp && 3133 mqp->ibqp.recv_cq->comp_handler) { 3134 if (!recv_mcq->mcq.reset_notify_added) { 3135 recv_mcq->mcq.reset_notify_added = 1; 3136 list_add_tail(&recv_mcq->mcq.reset_notify, 3137 &cq_notify_list); 3138 } 3139 } 3140 spin_unlock_irqrestore(&recv_mcq->lock, 3141 flags_cq); 3142 } 3143 } 3144 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 3145 } 3146 3147 list_for_each_entry(mcq, &cq_notify_list, reset_notify) { 3148 mcq->comp(mcq); 3149 } 3150 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 3151 pr_warn("mlx4_ib_handle_catas_error ended\n"); 3152 } 3153 3154 static void handle_bonded_port_state_event(struct work_struct *work) 3155 { 3156 struct ib_event_work *ew = 3157 container_of(work, struct ib_event_work, work); 3158 struct mlx4_ib_dev *ibdev = ew->ib_dev; 3159 enum ib_port_state bonded_port_state = IB_PORT_NOP; 3160 int i; 3161 struct ib_event ibev; 3162 3163 kfree(ew); 3164 spin_lock_bh(&ibdev->iboe.lock); 3165 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 3166 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 3167 enum ib_port_state curr_port_state; 3168 3169 if (!curr_netdev) 3170 continue; 3171 3172 curr_port_state = 3173 (netif_running(curr_netdev) && 3174 netif_carrier_ok(curr_netdev)) ? 3175 IB_PORT_ACTIVE : IB_PORT_DOWN; 3176 3177 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ? 3178 curr_port_state : IB_PORT_ACTIVE; 3179 } 3180 spin_unlock_bh(&ibdev->iboe.lock); 3181 3182 ibev.device = &ibdev->ib_dev; 3183 ibev.element.port_num = 1; 3184 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ? 3185 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3186 3187 ib_dispatch_event(&ibev); 3188 } 3189 3190 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port) 3191 { 3192 u64 sl2vl; 3193 int err; 3194 3195 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl); 3196 if (err) { 3197 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n", 3198 port, err); 3199 sl2vl = 0; 3200 } 3201 atomic64_set(&mdev->sl2vl[port - 1], sl2vl); 3202 } 3203 3204 static void ib_sl2vl_update_work(struct work_struct *work) 3205 { 3206 struct ib_event_work *ew = container_of(work, struct ib_event_work, work); 3207 struct mlx4_ib_dev *mdev = ew->ib_dev; 3208 int port = ew->port; 3209 3210 mlx4_ib_sl2vl_update(mdev, port); 3211 3212 kfree(ew); 3213 } 3214 3215 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev, 3216 int port) 3217 { 3218 struct ib_event_work *ew; 3219 3220 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3221 if (ew) { 3222 INIT_WORK(&ew->work, ib_sl2vl_update_work); 3223 ew->port = port; 3224 ew->ib_dev = ibdev; 3225 queue_work(wq, &ew->work); 3226 } else { 3227 pr_err("failed to allocate memory for sl2vl update work\n"); 3228 } 3229 } 3230 3231 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr, 3232 enum mlx4_dev_event event, unsigned long param) 3233 { 3234 struct ib_event ibev; 3235 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr); 3236 struct mlx4_eqe *eqe = NULL; 3237 struct ib_event_work *ew; 3238 int p = 0; 3239 3240 if (mlx4_is_bonded(dev) && 3241 ((event == MLX4_DEV_EVENT_PORT_UP) || 3242 (event == MLX4_DEV_EVENT_PORT_DOWN))) { 3243 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3244 if (!ew) 3245 return; 3246 INIT_WORK(&ew->work, handle_bonded_port_state_event); 3247 ew->ib_dev = ibdev; 3248 queue_work(wq, &ew->work); 3249 return; 3250 } 3251 3252 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE) 3253 eqe = (struct mlx4_eqe *)param; 3254 else 3255 p = (int) param; 3256 3257 switch (event) { 3258 case MLX4_DEV_EVENT_PORT_UP: 3259 if (p > ibdev->num_ports) 3260 return; 3261 if (!mlx4_is_slave(dev) && 3262 rdma_port_get_link_layer(&ibdev->ib_dev, p) == 3263 IB_LINK_LAYER_INFINIBAND) { 3264 if (mlx4_is_master(dev)) 3265 mlx4_ib_invalidate_all_guid_record(ibdev, p); 3266 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST && 3267 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) 3268 mlx4_sched_ib_sl2vl_update_work(ibdev, p); 3269 } 3270 ibev.event = IB_EVENT_PORT_ACTIVE; 3271 break; 3272 3273 case MLX4_DEV_EVENT_PORT_DOWN: 3274 if (p > ibdev->num_ports) 3275 return; 3276 ibev.event = IB_EVENT_PORT_ERR; 3277 break; 3278 3279 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3280 ibdev->ib_active = false; 3281 ibev.event = IB_EVENT_DEVICE_FATAL; 3282 mlx4_ib_handle_catas_error(ibdev); 3283 break; 3284 3285 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3286 ew = kmalloc(sizeof *ew, GFP_ATOMIC); 3287 if (!ew) { 3288 pr_err("failed to allocate memory for events work\n"); 3289 break; 3290 } 3291 3292 INIT_WORK(&ew->work, handle_port_mgmt_change_event); 3293 memcpy(&ew->ib_eqe, eqe, sizeof *eqe); 3294 ew->ib_dev = ibdev; 3295 /* need to queue only for port owner, which uses GEN_EQE */ 3296 if (mlx4_is_master(dev)) 3297 queue_work(wq, &ew->work); 3298 else 3299 handle_port_mgmt_change_event(&ew->work); 3300 return; 3301 3302 case MLX4_DEV_EVENT_SLAVE_INIT: 3303 /* here, p is the slave id */ 3304 do_slave_init(ibdev, p, 1); 3305 if (mlx4_is_master(dev)) { 3306 int i; 3307 3308 for (i = 1; i <= ibdev->num_ports; i++) { 3309 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3310 == IB_LINK_LAYER_INFINIBAND) 3311 mlx4_ib_slave_alias_guid_event(ibdev, 3312 p, i, 3313 1); 3314 } 3315 } 3316 return; 3317 3318 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 3319 if (mlx4_is_master(dev)) { 3320 int i; 3321 3322 for (i = 1; i <= ibdev->num_ports; i++) { 3323 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3324 == IB_LINK_LAYER_INFINIBAND) 3325 mlx4_ib_slave_alias_guid_event(ibdev, 3326 p, i, 3327 0); 3328 } 3329 } 3330 /* here, p is the slave id */ 3331 do_slave_init(ibdev, p, 0); 3332 return; 3333 3334 default: 3335 return; 3336 } 3337 3338 ibev.device = ibdev_ptr; 3339 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p; 3340 3341 ib_dispatch_event(&ibev); 3342 } 3343 3344 static struct mlx4_interface mlx4_ib_interface = { 3345 .add = mlx4_ib_add, 3346 .remove = mlx4_ib_remove, 3347 .event = mlx4_ib_event, 3348 .protocol = MLX4_PROT_IB_IPV6, 3349 .flags = MLX4_INTFF_BONDING 3350 }; 3351 3352 static int __init mlx4_ib_init(void) 3353 { 3354 int err; 3355 3356 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM); 3357 if (!wq) 3358 return -ENOMEM; 3359 3360 err = mlx4_ib_mcg_init(); 3361 if (err) 3362 goto clean_wq; 3363 3364 err = mlx4_register_interface(&mlx4_ib_interface); 3365 if (err) 3366 goto clean_mcg; 3367 3368 return 0; 3369 3370 clean_mcg: 3371 mlx4_ib_mcg_destroy(); 3372 3373 clean_wq: 3374 destroy_workqueue(wq); 3375 return err; 3376 } 3377 3378 static void __exit mlx4_ib_cleanup(void) 3379 { 3380 mlx4_unregister_interface(&mlx4_ib_interface); 3381 mlx4_ib_mcg_destroy(); 3382 destroy_workqueue(wq); 3383 } 3384 3385 module_init(mlx4_ib_init); 3386 module_exit(mlx4_ib_cleanup); 3387