1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/slab.h> 37 #include <linux/errno.h> 38 #include <linux/netdevice.h> 39 #include <linux/inetdevice.h> 40 #include <linux/rtnetlink.h> 41 #include <linux/if_vlan.h> 42 #include <net/ipv6.h> 43 #include <net/addrconf.h> 44 45 #include <rdma/ib_smi.h> 46 #include <rdma/ib_user_verbs.h> 47 #include <rdma/ib_addr.h> 48 49 #include <linux/mlx4/driver.h> 50 #include <linux/mlx4/cmd.h> 51 #include <linux/mlx4/qp.h> 52 53 #include "mlx4_ib.h" 54 #include "user.h" 55 56 #define DRV_NAME MLX4_IB_DRV_NAME 57 #define DRV_VERSION "2.2-1" 58 #define DRV_RELDATE "Feb 2014" 59 60 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF 61 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF 62 #define MLX4_IB_CARD_REV_A0 0xA0 63 64 MODULE_AUTHOR("Roland Dreier"); 65 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver"); 66 MODULE_LICENSE("Dual BSD/GPL"); 67 MODULE_VERSION(DRV_VERSION); 68 69 int mlx4_ib_sm_guid_assign = 0; 70 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444); 71 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)"); 72 73 static const char mlx4_ib_version[] = 74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 75 DRV_VERSION " (" DRV_RELDATE ")\n"; 76 77 struct update_gid_work { 78 struct work_struct work; 79 union ib_gid gids[128]; 80 struct mlx4_ib_dev *dev; 81 int port; 82 }; 83 84 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init); 85 86 static struct workqueue_struct *wq; 87 88 static void init_query_mad(struct ib_smp *mad) 89 { 90 mad->base_version = 1; 91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 92 mad->class_version = 1; 93 mad->method = IB_MGMT_METHOD_GET; 94 } 95 96 static union ib_gid zgid; 97 98 static int check_flow_steering_support(struct mlx4_dev *dev) 99 { 100 int eth_num_ports = 0; 101 int ib_num_ports = 0; 102 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; 104 105 if (dmfs) { 106 int i; 107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 108 eth_num_ports++; 109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 110 ib_num_ports++; 111 dmfs &= (!ib_num_ports || 112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && 113 (!eth_num_ports || 114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); 115 if (ib_num_ports && mlx4_is_mfunc(dev)) { 116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n"); 117 dmfs = 0; 118 } 119 } 120 return dmfs; 121 } 122 123 static int num_ib_ports(struct mlx4_dev *dev) 124 { 125 int ib_ports = 0; 126 int i; 127 128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 129 ib_ports++; 130 131 return ib_ports; 132 } 133 134 static int mlx4_ib_query_device(struct ib_device *ibdev, 135 struct ib_device_attr *props, 136 struct ib_udata *uhw) 137 { 138 struct mlx4_ib_dev *dev = to_mdev(ibdev); 139 struct ib_smp *in_mad = NULL; 140 struct ib_smp *out_mad = NULL; 141 int err = -ENOMEM; 142 int have_ib_ports; 143 struct mlx4_uverbs_ex_query_device cmd; 144 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0}; 145 struct mlx4_clock_params clock_params; 146 147 if (uhw->inlen) { 148 if (uhw->inlen < sizeof(cmd)) 149 return -EINVAL; 150 151 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd)); 152 if (err) 153 return err; 154 155 if (cmd.comp_mask) 156 return -EINVAL; 157 158 if (cmd.reserved) 159 return -EINVAL; 160 } 161 162 resp.response_length = offsetof(typeof(resp), response_length) + 163 sizeof(resp.response_length); 164 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 165 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 166 if (!in_mad || !out_mad) 167 goto out; 168 169 init_query_mad(in_mad); 170 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 171 172 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS, 173 1, NULL, NULL, in_mad, out_mad); 174 if (err) 175 goto out; 176 177 memset(props, 0, sizeof *props); 178 179 have_ib_ports = num_ib_ports(dev->dev); 180 181 props->fw_ver = dev->dev->caps.fw_ver; 182 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 183 IB_DEVICE_PORT_ACTIVE_EVENT | 184 IB_DEVICE_SYS_IMAGE_GUID | 185 IB_DEVICE_RC_RNR_NAK_GEN | 186 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 187 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) 188 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 189 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) 190 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 191 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) 192 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 193 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) 194 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 195 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 196 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 197 if (dev->dev->caps.max_gso_sz && 198 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) && 199 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) 200 props->device_cap_flags |= IB_DEVICE_UD_TSO; 201 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 202 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 203 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && 204 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 205 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 206 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 207 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 208 props->device_cap_flags |= IB_DEVICE_XRC; 209 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) 210 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW; 211 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 212 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) 213 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 214 else 215 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A; 216 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 217 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 218 } 219 220 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 221 0xffffff; 222 props->vendor_part_id = dev->dev->persist->pdev->device; 223 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 224 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 225 226 props->max_mr_size = ~0ull; 227 props->page_size_cap = dev->dev->caps.page_size_cap; 228 props->max_qp = dev->dev->quotas.qp; 229 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; 230 props->max_sge = min(dev->dev->caps.max_sq_sg, 231 dev->dev->caps.max_rq_sg); 232 props->max_cq = dev->dev->quotas.cq; 233 props->max_cqe = dev->dev->caps.max_cqes; 234 props->max_mr = dev->dev->quotas.mpt; 235 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; 236 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; 237 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; 238 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 239 props->max_srq = dev->dev->quotas.srq; 240 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 241 props->max_srq_sge = dev->dev->caps.max_srq_sge; 242 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 243 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 244 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 245 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 246 props->masked_atomic_cap = props->atomic_cap; 247 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; 248 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; 249 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; 250 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 251 props->max_mcast_grp; 252 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps; 253 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL; 254 props->timestamp_mask = 0xFFFFFFFFFFFFULL; 255 256 if (!mlx4_is_slave(dev->dev)) 257 err = mlx4_get_internal_clock_params(dev->dev, &clock_params); 258 259 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { 260 resp.response_length += sizeof(resp.hca_core_clock_offset); 261 if (!err && !mlx4_is_slave(dev->dev)) { 262 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP; 263 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; 264 } 265 } 266 267 if (uhw->outlen) { 268 err = ib_copy_to_udata(uhw, &resp, resp.response_length); 269 if (err) 270 goto out; 271 } 272 out: 273 kfree(in_mad); 274 kfree(out_mad); 275 276 return err; 277 } 278 279 static enum rdma_link_layer 280 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num) 281 { 282 struct mlx4_dev *dev = to_mdev(device)->dev; 283 284 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? 285 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 286 } 287 288 static int ib_link_query_port(struct ib_device *ibdev, u8 port, 289 struct ib_port_attr *props, int netw_view) 290 { 291 struct ib_smp *in_mad = NULL; 292 struct ib_smp *out_mad = NULL; 293 int ext_active_speed; 294 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 295 int err = -ENOMEM; 296 297 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 298 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 299 if (!in_mad || !out_mad) 300 goto out; 301 302 init_query_mad(in_mad); 303 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 304 in_mad->attr_mod = cpu_to_be32(port); 305 306 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 307 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 308 309 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 310 in_mad, out_mad); 311 if (err) 312 goto out; 313 314 315 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 316 props->lmc = out_mad->data[34] & 0x7; 317 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 318 props->sm_sl = out_mad->data[36] & 0xf; 319 props->state = out_mad->data[32] & 0xf; 320 props->phys_state = out_mad->data[33] >> 4; 321 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 322 if (netw_view) 323 props->gid_tbl_len = out_mad->data[50]; 324 else 325 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 326 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 327 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 328 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 329 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 330 props->active_width = out_mad->data[31] & 0xf; 331 props->active_speed = out_mad->data[35] >> 4; 332 props->max_mtu = out_mad->data[41] & 0xf; 333 props->active_mtu = out_mad->data[36] >> 4; 334 props->subnet_timeout = out_mad->data[51] & 0x1f; 335 props->max_vl_num = out_mad->data[37] >> 4; 336 props->init_type_reply = out_mad->data[41] >> 4; 337 338 /* Check if extended speeds (EDR/FDR/...) are supported */ 339 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 340 ext_active_speed = out_mad->data[62] >> 4; 341 342 switch (ext_active_speed) { 343 case 1: 344 props->active_speed = IB_SPEED_FDR; 345 break; 346 case 2: 347 props->active_speed = IB_SPEED_EDR; 348 break; 349 } 350 } 351 352 /* If reported active speed is QDR, check if is FDR-10 */ 353 if (props->active_speed == IB_SPEED_QDR) { 354 init_query_mad(in_mad); 355 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 356 in_mad->attr_mod = cpu_to_be32(port); 357 358 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, 359 NULL, NULL, in_mad, out_mad); 360 if (err) 361 goto out; 362 363 /* Checking LinkSpeedActive for FDR-10 */ 364 if (out_mad->data[15] & 0x1) 365 props->active_speed = IB_SPEED_FDR10; 366 } 367 368 /* Avoid wrong speed value returned by FW if the IB link is down. */ 369 if (props->state == IB_PORT_DOWN) 370 props->active_speed = IB_SPEED_SDR; 371 372 out: 373 kfree(in_mad); 374 kfree(out_mad); 375 return err; 376 } 377 378 static u8 state_to_phys_state(enum ib_port_state state) 379 { 380 return state == IB_PORT_ACTIVE ? 5 : 3; 381 } 382 383 static int eth_link_query_port(struct ib_device *ibdev, u8 port, 384 struct ib_port_attr *props, int netw_view) 385 { 386 387 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 388 struct mlx4_ib_iboe *iboe = &mdev->iboe; 389 struct net_device *ndev; 390 enum ib_mtu tmp; 391 struct mlx4_cmd_mailbox *mailbox; 392 int err = 0; 393 int is_bonded = mlx4_is_bonded(mdev->dev); 394 395 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 396 if (IS_ERR(mailbox)) 397 return PTR_ERR(mailbox); 398 399 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 400 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 401 MLX4_CMD_WRAPPED); 402 if (err) 403 goto out; 404 405 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ? 406 IB_WIDTH_4X : IB_WIDTH_1X; 407 props->active_speed = IB_SPEED_QDR; 408 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS; 409 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; 410 props->max_msg_sz = mdev->dev->caps.max_msg_sz; 411 props->pkey_tbl_len = 1; 412 props->max_mtu = IB_MTU_4096; 413 props->max_vl_num = 2; 414 props->state = IB_PORT_DOWN; 415 props->phys_state = state_to_phys_state(props->state); 416 props->active_mtu = IB_MTU_256; 417 if (is_bonded) 418 rtnl_lock(); /* required to get upper dev */ 419 spin_lock_bh(&iboe->lock); 420 ndev = iboe->netdevs[port - 1]; 421 if (ndev && is_bonded) 422 ndev = netdev_master_upper_dev_get(ndev); 423 if (!ndev) 424 goto out_unlock; 425 426 tmp = iboe_get_mtu(ndev->mtu); 427 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 428 429 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? 430 IB_PORT_ACTIVE : IB_PORT_DOWN; 431 props->phys_state = state_to_phys_state(props->state); 432 out_unlock: 433 spin_unlock_bh(&iboe->lock); 434 if (is_bonded) 435 rtnl_unlock(); 436 out: 437 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 438 return err; 439 } 440 441 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 442 struct ib_port_attr *props, int netw_view) 443 { 444 int err; 445 446 memset(props, 0, sizeof *props); 447 448 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 449 ib_link_query_port(ibdev, port, props, netw_view) : 450 eth_link_query_port(ibdev, port, props, netw_view); 451 452 return err; 453 } 454 455 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 456 struct ib_port_attr *props) 457 { 458 /* returns host view */ 459 return __mlx4_ib_query_port(ibdev, port, props, 0); 460 } 461 462 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 463 union ib_gid *gid, int netw_view) 464 { 465 struct ib_smp *in_mad = NULL; 466 struct ib_smp *out_mad = NULL; 467 int err = -ENOMEM; 468 struct mlx4_ib_dev *dev = to_mdev(ibdev); 469 int clear = 0; 470 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 471 472 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 473 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 474 if (!in_mad || !out_mad) 475 goto out; 476 477 init_query_mad(in_mad); 478 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 479 in_mad->attr_mod = cpu_to_be32(port); 480 481 if (mlx4_is_mfunc(dev->dev) && netw_view) 482 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 483 484 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad); 485 if (err) 486 goto out; 487 488 memcpy(gid->raw, out_mad->data + 8, 8); 489 490 if (mlx4_is_mfunc(dev->dev) && !netw_view) { 491 if (index) { 492 /* For any index > 0, return the null guid */ 493 err = 0; 494 clear = 1; 495 goto out; 496 } 497 } 498 499 init_query_mad(in_mad); 500 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 501 in_mad->attr_mod = cpu_to_be32(index / 8); 502 503 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, 504 NULL, NULL, in_mad, out_mad); 505 if (err) 506 goto out; 507 508 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 509 510 out: 511 if (clear) 512 memset(gid->raw + 8, 0, 8); 513 kfree(in_mad); 514 kfree(out_mad); 515 return err; 516 } 517 518 static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index, 519 union ib_gid *gid) 520 { 521 struct mlx4_ib_dev *dev = to_mdev(ibdev); 522 523 *gid = dev->iboe.gid_table[port - 1][index]; 524 525 return 0; 526 } 527 528 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 529 union ib_gid *gid) 530 { 531 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND) 532 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0); 533 else 534 return iboe_query_gid(ibdev, port, index, gid); 535 } 536 537 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 538 u16 *pkey, int netw_view) 539 { 540 struct ib_smp *in_mad = NULL; 541 struct ib_smp *out_mad = NULL; 542 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 543 int err = -ENOMEM; 544 545 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 546 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 547 if (!in_mad || !out_mad) 548 goto out; 549 550 init_query_mad(in_mad); 551 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 552 in_mad->attr_mod = cpu_to_be32(index / 32); 553 554 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 555 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 556 557 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 558 in_mad, out_mad); 559 if (err) 560 goto out; 561 562 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 563 564 out: 565 kfree(in_mad); 566 kfree(out_mad); 567 return err; 568 } 569 570 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) 571 { 572 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0); 573 } 574 575 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 576 struct ib_device_modify *props) 577 { 578 struct mlx4_cmd_mailbox *mailbox; 579 unsigned long flags; 580 581 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 582 return -EOPNOTSUPP; 583 584 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 585 return 0; 586 587 if (mlx4_is_slave(to_mdev(ibdev)->dev)) 588 return -EOPNOTSUPP; 589 590 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags); 591 memcpy(ibdev->node_desc, props->node_desc, 64); 592 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags); 593 594 /* 595 * If possible, pass node desc to FW, so it can generate 596 * a 144 trap. If cmd fails, just ignore. 597 */ 598 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 599 if (IS_ERR(mailbox)) 600 return 0; 601 602 memcpy(mailbox->buf, props->node_desc, 64); 603 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 604 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 605 606 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 607 608 return 0; 609 } 610 611 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols, 612 u32 cap_mask) 613 { 614 struct mlx4_cmd_mailbox *mailbox; 615 int err; 616 617 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 618 if (IS_ERR(mailbox)) 619 return PTR_ERR(mailbox); 620 621 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 622 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 623 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 624 } else { 625 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols; 626 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 627 } 628 629 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE, 630 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 631 MLX4_CMD_WRAPPED); 632 633 mlx4_free_cmd_mailbox(dev->dev, mailbox); 634 return err; 635 } 636 637 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 638 struct ib_port_modify *props) 639 { 640 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 641 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 642 struct ib_port_attr attr; 643 u32 cap_mask; 644 int err; 645 646 /* return OK if this is RoCE. CM calls ib_modify_port() regardless 647 * of whether port link layer is ETH or IB. For ETH ports, qkey 648 * violations and port capabilities are not meaningful. 649 */ 650 if (is_eth) 651 return 0; 652 653 mutex_lock(&mdev->cap_mask_mutex); 654 655 err = mlx4_ib_query_port(ibdev, port, &attr); 656 if (err) 657 goto out; 658 659 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 660 ~props->clr_port_cap_mask; 661 662 err = mlx4_ib_SET_PORT(mdev, port, 663 !!(mask & IB_PORT_RESET_QKEY_CNTR), 664 cap_mask); 665 666 out: 667 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); 668 return err; 669 } 670 671 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev, 672 struct ib_udata *udata) 673 { 674 struct mlx4_ib_dev *dev = to_mdev(ibdev); 675 struct mlx4_ib_ucontext *context; 676 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3; 677 struct mlx4_ib_alloc_ucontext_resp resp; 678 int err; 679 680 if (!dev->ib_active) 681 return ERR_PTR(-EAGAIN); 682 683 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) { 684 resp_v3.qp_tab_size = dev->dev->caps.num_qps; 685 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; 686 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 687 } else { 688 resp.dev_caps = dev->dev->caps.userspace_caps; 689 resp.qp_tab_size = dev->dev->caps.num_qps; 690 resp.bf_reg_size = dev->dev->caps.bf_reg_size; 691 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 692 resp.cqe_size = dev->dev->caps.cqe_size; 693 } 694 695 context = kmalloc(sizeof *context, GFP_KERNEL); 696 if (!context) 697 return ERR_PTR(-ENOMEM); 698 699 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar); 700 if (err) { 701 kfree(context); 702 return ERR_PTR(err); 703 } 704 705 INIT_LIST_HEAD(&context->db_page_list); 706 mutex_init(&context->db_page_mutex); 707 708 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) 709 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3)); 710 else 711 err = ib_copy_to_udata(udata, &resp, sizeof(resp)); 712 713 if (err) { 714 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar); 715 kfree(context); 716 return ERR_PTR(-EFAULT); 717 } 718 719 return &context->ibucontext; 720 } 721 722 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 723 { 724 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 725 726 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar); 727 kfree(context); 728 729 return 0; 730 } 731 732 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 733 { 734 struct mlx4_ib_dev *dev = to_mdev(context->device); 735 736 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 737 return -EINVAL; 738 739 if (vma->vm_pgoff == 0) { 740 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 741 742 if (io_remap_pfn_range(vma, vma->vm_start, 743 to_mucontext(context)->uar.pfn, 744 PAGE_SIZE, vma->vm_page_prot)) 745 return -EAGAIN; 746 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) { 747 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 748 749 if (io_remap_pfn_range(vma, vma->vm_start, 750 to_mucontext(context)->uar.pfn + 751 dev->dev->caps.num_uars, 752 PAGE_SIZE, vma->vm_page_prot)) 753 return -EAGAIN; 754 } else if (vma->vm_pgoff == 3) { 755 struct mlx4_clock_params params; 756 int ret = mlx4_get_internal_clock_params(dev->dev, ¶ms); 757 758 if (ret) 759 return ret; 760 761 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 762 if (io_remap_pfn_range(vma, vma->vm_start, 763 (pci_resource_start(dev->dev->persist->pdev, 764 params.bar) + 765 params.offset) 766 >> PAGE_SHIFT, 767 PAGE_SIZE, vma->vm_page_prot)) 768 return -EAGAIN; 769 } else { 770 return -EINVAL; 771 } 772 773 return 0; 774 } 775 776 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev, 777 struct ib_ucontext *context, 778 struct ib_udata *udata) 779 { 780 struct mlx4_ib_pd *pd; 781 int err; 782 783 pd = kmalloc(sizeof *pd, GFP_KERNEL); 784 if (!pd) 785 return ERR_PTR(-ENOMEM); 786 787 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn); 788 if (err) { 789 kfree(pd); 790 return ERR_PTR(err); 791 } 792 793 if (context) 794 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) { 795 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn); 796 kfree(pd); 797 return ERR_PTR(-EFAULT); 798 } 799 800 return &pd->ibpd; 801 } 802 803 static int mlx4_ib_dealloc_pd(struct ib_pd *pd) 804 { 805 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 806 kfree(pd); 807 808 return 0; 809 } 810 811 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev, 812 struct ib_ucontext *context, 813 struct ib_udata *udata) 814 { 815 struct mlx4_ib_xrcd *xrcd; 816 struct ib_cq_init_attr cq_attr = {}; 817 int err; 818 819 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 820 return ERR_PTR(-ENOSYS); 821 822 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL); 823 if (!xrcd) 824 return ERR_PTR(-ENOMEM); 825 826 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn); 827 if (err) 828 goto err1; 829 830 xrcd->pd = ib_alloc_pd(ibdev); 831 if (IS_ERR(xrcd->pd)) { 832 err = PTR_ERR(xrcd->pd); 833 goto err2; 834 } 835 836 cq_attr.cqe = 1; 837 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr); 838 if (IS_ERR(xrcd->cq)) { 839 err = PTR_ERR(xrcd->cq); 840 goto err3; 841 } 842 843 return &xrcd->ibxrcd; 844 845 err3: 846 ib_dealloc_pd(xrcd->pd); 847 err2: 848 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn); 849 err1: 850 kfree(xrcd); 851 return ERR_PTR(err); 852 } 853 854 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 855 { 856 ib_destroy_cq(to_mxrcd(xrcd)->cq); 857 ib_dealloc_pd(to_mxrcd(xrcd)->pd); 858 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 859 kfree(xrcd); 860 861 return 0; 862 } 863 864 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 865 { 866 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 867 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 868 struct mlx4_ib_gid_entry *ge; 869 870 ge = kzalloc(sizeof *ge, GFP_KERNEL); 871 if (!ge) 872 return -ENOMEM; 873 874 ge->gid = *gid; 875 if (mlx4_ib_add_mc(mdev, mqp, gid)) { 876 ge->port = mqp->port; 877 ge->added = 1; 878 } 879 880 mutex_lock(&mqp->mutex); 881 list_add_tail(&ge->list, &mqp->gid_list); 882 mutex_unlock(&mqp->mutex); 883 884 return 0; 885 } 886 887 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 888 union ib_gid *gid) 889 { 890 struct net_device *ndev; 891 int ret = 0; 892 893 if (!mqp->port) 894 return 0; 895 896 spin_lock_bh(&mdev->iboe.lock); 897 ndev = mdev->iboe.netdevs[mqp->port - 1]; 898 if (ndev) 899 dev_hold(ndev); 900 spin_unlock_bh(&mdev->iboe.lock); 901 902 if (ndev) { 903 ret = 1; 904 dev_put(ndev); 905 } 906 907 return ret; 908 } 909 910 struct mlx4_ib_steering { 911 struct list_head list; 912 struct mlx4_flow_reg_id reg_id; 913 union ib_gid gid; 914 }; 915 916 static int parse_flow_attr(struct mlx4_dev *dev, 917 u32 qp_num, 918 union ib_flow_spec *ib_spec, 919 struct _rule_hw *mlx4_spec) 920 { 921 enum mlx4_net_trans_rule_id type; 922 923 switch (ib_spec->type) { 924 case IB_FLOW_SPEC_ETH: 925 type = MLX4_NET_TRANS_RULE_ID_ETH; 926 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac, 927 ETH_ALEN); 928 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac, 929 ETH_ALEN); 930 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag; 931 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag; 932 break; 933 case IB_FLOW_SPEC_IB: 934 type = MLX4_NET_TRANS_RULE_ID_IB; 935 mlx4_spec->ib.l3_qpn = 936 cpu_to_be32(qp_num); 937 mlx4_spec->ib.qpn_mask = 938 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK); 939 break; 940 941 942 case IB_FLOW_SPEC_IPV4: 943 type = MLX4_NET_TRANS_RULE_ID_IPV4; 944 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip; 945 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip; 946 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip; 947 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip; 948 break; 949 950 case IB_FLOW_SPEC_TCP: 951 case IB_FLOW_SPEC_UDP: 952 type = ib_spec->type == IB_FLOW_SPEC_TCP ? 953 MLX4_NET_TRANS_RULE_ID_TCP : 954 MLX4_NET_TRANS_RULE_ID_UDP; 955 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port; 956 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port; 957 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port; 958 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port; 959 break; 960 961 default: 962 return -EINVAL; 963 } 964 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 || 965 mlx4_hw_rule_sz(dev, type) < 0) 966 return -EINVAL; 967 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type)); 968 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2; 969 return mlx4_hw_rule_sz(dev, type); 970 } 971 972 struct default_rules { 973 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 974 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 975 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS]; 976 __u8 link_layer; 977 }; 978 static const struct default_rules default_table[] = { 979 { 980 .mandatory_fields = {IB_FLOW_SPEC_IPV4}, 981 .mandatory_not_fields = {IB_FLOW_SPEC_ETH}, 982 .rules_create_list = {IB_FLOW_SPEC_IB}, 983 .link_layer = IB_LINK_LAYER_INFINIBAND 984 } 985 }; 986 987 static int __mlx4_ib_default_rules_match(struct ib_qp *qp, 988 struct ib_flow_attr *flow_attr) 989 { 990 int i, j, k; 991 void *ib_flow; 992 const struct default_rules *pdefault_rules = default_table; 993 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port); 994 995 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) { 996 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS]; 997 memset(&field_types, 0, sizeof(field_types)); 998 999 if (link_layer != pdefault_rules->link_layer) 1000 continue; 1001 1002 ib_flow = flow_attr + 1; 1003 /* we assume the specs are sorted */ 1004 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS && 1005 j < flow_attr->num_of_specs; k++) { 1006 union ib_flow_spec *current_flow = 1007 (union ib_flow_spec *)ib_flow; 1008 1009 /* same layer but different type */ 1010 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) == 1011 (pdefault_rules->mandatory_fields[k] & 1012 IB_FLOW_SPEC_LAYER_MASK)) && 1013 (current_flow->type != 1014 pdefault_rules->mandatory_fields[k])) 1015 goto out; 1016 1017 /* same layer, try match next one */ 1018 if (current_flow->type == 1019 pdefault_rules->mandatory_fields[k]) { 1020 j++; 1021 ib_flow += 1022 ((union ib_flow_spec *)ib_flow)->size; 1023 } 1024 } 1025 1026 ib_flow = flow_attr + 1; 1027 for (j = 0; j < flow_attr->num_of_specs; 1028 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size) 1029 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++) 1030 /* same layer and same type */ 1031 if (((union ib_flow_spec *)ib_flow)->type == 1032 pdefault_rules->mandatory_not_fields[k]) 1033 goto out; 1034 1035 return i; 1036 } 1037 out: 1038 return -1; 1039 } 1040 1041 static int __mlx4_ib_create_default_rules( 1042 struct mlx4_ib_dev *mdev, 1043 struct ib_qp *qp, 1044 const struct default_rules *pdefault_rules, 1045 struct _rule_hw *mlx4_spec) { 1046 int size = 0; 1047 int i; 1048 1049 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { 1050 int ret; 1051 union ib_flow_spec ib_spec; 1052 switch (pdefault_rules->rules_create_list[i]) { 1053 case 0: 1054 /* no rule */ 1055 continue; 1056 case IB_FLOW_SPEC_IB: 1057 ib_spec.type = IB_FLOW_SPEC_IB; 1058 ib_spec.size = sizeof(struct ib_flow_spec_ib); 1059 1060 break; 1061 default: 1062 /* invalid rule */ 1063 return -EINVAL; 1064 } 1065 /* We must put empty rule, qpn is being ignored */ 1066 ret = parse_flow_attr(mdev->dev, 0, &ib_spec, 1067 mlx4_spec); 1068 if (ret < 0) { 1069 pr_info("invalid parsing\n"); 1070 return -EINVAL; 1071 } 1072 1073 mlx4_spec = (void *)mlx4_spec + ret; 1074 size += ret; 1075 } 1076 return size; 1077 } 1078 1079 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1080 int domain, 1081 enum mlx4_net_trans_promisc_mode flow_type, 1082 u64 *reg_id) 1083 { 1084 int ret, i; 1085 int size = 0; 1086 void *ib_flow; 1087 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 1088 struct mlx4_cmd_mailbox *mailbox; 1089 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 1090 int default_flow; 1091 1092 static const u16 __mlx4_domain[] = { 1093 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS, 1094 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL, 1095 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS, 1096 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC, 1097 }; 1098 1099 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) { 1100 pr_err("Invalid priority value %d\n", flow_attr->priority); 1101 return -EINVAL; 1102 } 1103 1104 if (domain >= IB_FLOW_DOMAIN_NUM) { 1105 pr_err("Invalid domain value %d\n", domain); 1106 return -EINVAL; 1107 } 1108 1109 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0) 1110 return -EINVAL; 1111 1112 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 1113 if (IS_ERR(mailbox)) 1114 return PTR_ERR(mailbox); 1115 ctrl = mailbox->buf; 1116 1117 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] | 1118 flow_attr->priority); 1119 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type); 1120 ctrl->port = flow_attr->port; 1121 ctrl->qpn = cpu_to_be32(qp->qp_num); 1122 1123 ib_flow = flow_attr + 1; 1124 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 1125 /* Add default flows */ 1126 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr); 1127 if (default_flow >= 0) { 1128 ret = __mlx4_ib_create_default_rules( 1129 mdev, qp, default_table + default_flow, 1130 mailbox->buf + size); 1131 if (ret < 0) { 1132 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1133 return -EINVAL; 1134 } 1135 size += ret; 1136 } 1137 for (i = 0; i < flow_attr->num_of_specs; i++) { 1138 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow, 1139 mailbox->buf + size); 1140 if (ret < 0) { 1141 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1142 return -EINVAL; 1143 } 1144 ib_flow += ((union ib_flow_spec *) ib_flow)->size; 1145 size += ret; 1146 } 1147 1148 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0, 1149 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, 1150 MLX4_CMD_WRAPPED); 1151 if (ret == -ENOMEM) 1152 pr_err("mcg table is full. Fail to register network rule.\n"); 1153 else if (ret == -ENXIO) 1154 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n"); 1155 else if (ret) 1156 pr_err("Invalid argumant. Fail to register network rule.\n"); 1157 1158 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1159 return ret; 1160 } 1161 1162 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id) 1163 { 1164 int err; 1165 err = mlx4_cmd(dev, reg_id, 0, 0, 1166 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, 1167 MLX4_CMD_WRAPPED); 1168 if (err) 1169 pr_err("Fail to detach network rule. registration id = 0x%llx\n", 1170 reg_id); 1171 return err; 1172 } 1173 1174 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1175 u64 *reg_id) 1176 { 1177 void *ib_flow; 1178 union ib_flow_spec *ib_spec; 1179 struct mlx4_dev *dev = to_mdev(qp->device)->dev; 1180 int err = 0; 1181 1182 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 1183 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 1184 return 0; /* do nothing */ 1185 1186 ib_flow = flow_attr + 1; 1187 ib_spec = (union ib_flow_spec *)ib_flow; 1188 1189 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1) 1190 return 0; /* do nothing */ 1191 1192 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac, 1193 flow_attr->port, qp->qp_num, 1194 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff), 1195 reg_id); 1196 return err; 1197 } 1198 1199 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp, 1200 struct ib_flow_attr *flow_attr, 1201 int domain) 1202 { 1203 int err = 0, i = 0, j = 0; 1204 struct mlx4_ib_flow *mflow; 1205 enum mlx4_net_trans_promisc_mode type[2]; 1206 struct mlx4_dev *dev = (to_mdev(qp->device))->dev; 1207 int is_bonded = mlx4_is_bonded(dev); 1208 1209 memset(type, 0, sizeof(type)); 1210 1211 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL); 1212 if (!mflow) { 1213 err = -ENOMEM; 1214 goto err_free; 1215 } 1216 1217 switch (flow_attr->type) { 1218 case IB_FLOW_ATTR_NORMAL: 1219 type[0] = MLX4_FS_REGULAR; 1220 break; 1221 1222 case IB_FLOW_ATTR_ALL_DEFAULT: 1223 type[0] = MLX4_FS_ALL_DEFAULT; 1224 break; 1225 1226 case IB_FLOW_ATTR_MC_DEFAULT: 1227 type[0] = MLX4_FS_MC_DEFAULT; 1228 break; 1229 1230 case IB_FLOW_ATTR_SNIFFER: 1231 type[0] = MLX4_FS_UC_SNIFFER; 1232 type[1] = MLX4_FS_MC_SNIFFER; 1233 break; 1234 1235 default: 1236 err = -EINVAL; 1237 goto err_free; 1238 } 1239 1240 while (i < ARRAY_SIZE(type) && type[i]) { 1241 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i], 1242 &mflow->reg_id[i].id); 1243 if (err) 1244 goto err_create_flow; 1245 if (is_bonded) { 1246 /* Application always sees one port so the mirror rule 1247 * must be on port #2 1248 */ 1249 flow_attr->port = 2; 1250 err = __mlx4_ib_create_flow(qp, flow_attr, 1251 domain, type[j], 1252 &mflow->reg_id[j].mirror); 1253 flow_attr->port = 1; 1254 if (err) 1255 goto err_create_flow; 1256 j++; 1257 } 1258 1259 i++; 1260 } 1261 1262 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1263 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1264 &mflow->reg_id[i].id); 1265 if (err) 1266 goto err_create_flow; 1267 1268 if (is_bonded) { 1269 flow_attr->port = 2; 1270 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1271 &mflow->reg_id[j].mirror); 1272 flow_attr->port = 1; 1273 if (err) 1274 goto err_create_flow; 1275 j++; 1276 } 1277 /* function to create mirror rule */ 1278 i++; 1279 } 1280 1281 return &mflow->ibflow; 1282 1283 err_create_flow: 1284 while (i) { 1285 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1286 mflow->reg_id[i].id); 1287 i--; 1288 } 1289 1290 while (j) { 1291 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1292 mflow->reg_id[j].mirror); 1293 j--; 1294 } 1295 err_free: 1296 kfree(mflow); 1297 return ERR_PTR(err); 1298 } 1299 1300 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id) 1301 { 1302 int err, ret = 0; 1303 int i = 0; 1304 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device); 1305 struct mlx4_ib_flow *mflow = to_mflow(flow_id); 1306 1307 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) { 1308 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id); 1309 if (err) 1310 ret = err; 1311 if (mflow->reg_id[i].mirror) { 1312 err = __mlx4_ib_destroy_flow(mdev->dev, 1313 mflow->reg_id[i].mirror); 1314 if (err) 1315 ret = err; 1316 } 1317 i++; 1318 } 1319 1320 kfree(mflow); 1321 return ret; 1322 } 1323 1324 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1325 { 1326 int err; 1327 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1328 struct mlx4_dev *dev = mdev->dev; 1329 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1330 struct mlx4_ib_steering *ib_steering = NULL; 1331 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1332 struct mlx4_flow_reg_id reg_id; 1333 1334 if (mdev->dev->caps.steering_mode == 1335 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1336 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL); 1337 if (!ib_steering) 1338 return -ENOMEM; 1339 } 1340 1341 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port, 1342 !!(mqp->flags & 1343 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1344 prot, ®_id.id); 1345 if (err) { 1346 pr_err("multicast attach op failed, err %d\n", err); 1347 goto err_malloc; 1348 } 1349 1350 reg_id.mirror = 0; 1351 if (mlx4_is_bonded(dev)) { 1352 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 1353 (mqp->port == 1) ? 2 : 1, 1354 !!(mqp->flags & 1355 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1356 prot, ®_id.mirror); 1357 if (err) 1358 goto err_add; 1359 } 1360 1361 err = add_gid_entry(ibqp, gid); 1362 if (err) 1363 goto err_add; 1364 1365 if (ib_steering) { 1366 memcpy(ib_steering->gid.raw, gid->raw, 16); 1367 ib_steering->reg_id = reg_id; 1368 mutex_lock(&mqp->mutex); 1369 list_add(&ib_steering->list, &mqp->steering_rules); 1370 mutex_unlock(&mqp->mutex); 1371 } 1372 return 0; 1373 1374 err_add: 1375 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1376 prot, reg_id.id); 1377 if (reg_id.mirror) 1378 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1379 prot, reg_id.mirror); 1380 err_malloc: 1381 kfree(ib_steering); 1382 1383 return err; 1384 } 1385 1386 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 1387 { 1388 struct mlx4_ib_gid_entry *ge; 1389 struct mlx4_ib_gid_entry *tmp; 1390 struct mlx4_ib_gid_entry *ret = NULL; 1391 1392 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 1393 if (!memcmp(raw, ge->gid.raw, 16)) { 1394 ret = ge; 1395 break; 1396 } 1397 } 1398 1399 return ret; 1400 } 1401 1402 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1403 { 1404 int err; 1405 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1406 struct mlx4_dev *dev = mdev->dev; 1407 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1408 struct net_device *ndev; 1409 struct mlx4_ib_gid_entry *ge; 1410 struct mlx4_flow_reg_id reg_id = {0, 0}; 1411 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1412 1413 if (mdev->dev->caps.steering_mode == 1414 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1415 struct mlx4_ib_steering *ib_steering; 1416 1417 mutex_lock(&mqp->mutex); 1418 list_for_each_entry(ib_steering, &mqp->steering_rules, list) { 1419 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) { 1420 list_del(&ib_steering->list); 1421 break; 1422 } 1423 } 1424 mutex_unlock(&mqp->mutex); 1425 if (&ib_steering->list == &mqp->steering_rules) { 1426 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n"); 1427 return -EINVAL; 1428 } 1429 reg_id = ib_steering->reg_id; 1430 kfree(ib_steering); 1431 } 1432 1433 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1434 prot, reg_id.id); 1435 if (err) 1436 return err; 1437 1438 if (mlx4_is_bonded(dev)) { 1439 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1440 prot, reg_id.mirror); 1441 if (err) 1442 return err; 1443 } 1444 1445 mutex_lock(&mqp->mutex); 1446 ge = find_gid_entry(mqp, gid->raw); 1447 if (ge) { 1448 spin_lock_bh(&mdev->iboe.lock); 1449 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 1450 if (ndev) 1451 dev_hold(ndev); 1452 spin_unlock_bh(&mdev->iboe.lock); 1453 if (ndev) 1454 dev_put(ndev); 1455 list_del(&ge->list); 1456 kfree(ge); 1457 } else 1458 pr_warn("could not find mgid entry\n"); 1459 1460 mutex_unlock(&mqp->mutex); 1461 1462 return 0; 1463 } 1464 1465 static int init_node_data(struct mlx4_ib_dev *dev) 1466 { 1467 struct ib_smp *in_mad = NULL; 1468 struct ib_smp *out_mad = NULL; 1469 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 1470 int err = -ENOMEM; 1471 1472 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 1473 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 1474 if (!in_mad || !out_mad) 1475 goto out; 1476 1477 init_query_mad(in_mad); 1478 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 1479 if (mlx4_is_master(dev->dev)) 1480 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 1481 1482 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 1483 if (err) 1484 goto out; 1485 1486 memcpy(dev->ib_dev.node_desc, out_mad->data, 64); 1487 1488 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 1489 1490 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 1491 if (err) 1492 goto out; 1493 1494 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); 1495 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 1496 1497 out: 1498 kfree(in_mad); 1499 kfree(out_mad); 1500 return err; 1501 } 1502 1503 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 1504 char *buf) 1505 { 1506 struct mlx4_ib_dev *dev = 1507 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 1508 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device); 1509 } 1510 1511 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, 1512 char *buf) 1513 { 1514 struct mlx4_ib_dev *dev = 1515 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 1516 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32), 1517 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, 1518 (int) dev->dev->caps.fw_ver & 0xffff); 1519 } 1520 1521 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 1522 char *buf) 1523 { 1524 struct mlx4_ib_dev *dev = 1525 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 1526 return sprintf(buf, "%x\n", dev->dev->rev_id); 1527 } 1528 1529 static ssize_t show_board(struct device *device, struct device_attribute *attr, 1530 char *buf) 1531 { 1532 struct mlx4_ib_dev *dev = 1533 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 1534 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN, 1535 dev->dev->board_id); 1536 } 1537 1538 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 1539 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 1540 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 1541 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 1542 1543 static struct device_attribute *mlx4_class_attributes[] = { 1544 &dev_attr_hw_rev, 1545 &dev_attr_fw_ver, 1546 &dev_attr_hca_type, 1547 &dev_attr_board_id 1548 }; 1549 1550 static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id, 1551 struct net_device *dev) 1552 { 1553 memcpy(eui, dev->dev_addr, 3); 1554 memcpy(eui + 5, dev->dev_addr + 3, 3); 1555 if (vlan_id < 0x1000) { 1556 eui[3] = vlan_id >> 8; 1557 eui[4] = vlan_id & 0xff; 1558 } else { 1559 eui[3] = 0xff; 1560 eui[4] = 0xfe; 1561 } 1562 eui[0] ^= 2; 1563 } 1564 1565 static void update_gids_task(struct work_struct *work) 1566 { 1567 struct update_gid_work *gw = container_of(work, struct update_gid_work, work); 1568 struct mlx4_cmd_mailbox *mailbox; 1569 union ib_gid *gids; 1570 int err; 1571 struct mlx4_dev *dev = gw->dev->dev; 1572 int is_bonded = mlx4_is_bonded(dev); 1573 1574 if (!gw->dev->ib_active) 1575 return; 1576 1577 mailbox = mlx4_alloc_cmd_mailbox(dev); 1578 if (IS_ERR(mailbox)) { 1579 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox)); 1580 return; 1581 } 1582 1583 gids = mailbox->buf; 1584 memcpy(gids, gw->gids, sizeof gw->gids); 1585 1586 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port, 1587 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT, 1588 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); 1589 if (err) 1590 pr_warn("set port command failed\n"); 1591 else 1592 if ((gw->port == 1) || !is_bonded) 1593 mlx4_ib_dispatch_event(gw->dev, 1594 is_bonded ? 1 : gw->port, 1595 IB_EVENT_GID_CHANGE); 1596 1597 mlx4_free_cmd_mailbox(dev, mailbox); 1598 kfree(gw); 1599 } 1600 1601 static void reset_gids_task(struct work_struct *work) 1602 { 1603 struct update_gid_work *gw = 1604 container_of(work, struct update_gid_work, work); 1605 struct mlx4_cmd_mailbox *mailbox; 1606 union ib_gid *gids; 1607 int err; 1608 struct mlx4_dev *dev = gw->dev->dev; 1609 1610 if (!gw->dev->ib_active) 1611 return; 1612 1613 mailbox = mlx4_alloc_cmd_mailbox(dev); 1614 if (IS_ERR(mailbox)) { 1615 pr_warn("reset gid table failed\n"); 1616 goto free; 1617 } 1618 1619 gids = mailbox->buf; 1620 memcpy(gids, gw->gids, sizeof(gw->gids)); 1621 1622 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) == 1623 IB_LINK_LAYER_ETHERNET) { 1624 err = mlx4_cmd(dev, mailbox->dma, 1625 MLX4_SET_PORT_GID_TABLE << 8 | gw->port, 1626 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT, 1627 MLX4_CMD_TIME_CLASS_B, 1628 MLX4_CMD_WRAPPED); 1629 if (err) 1630 pr_warn("set port %d command failed\n", gw->port); 1631 } 1632 1633 mlx4_free_cmd_mailbox(dev, mailbox); 1634 free: 1635 kfree(gw); 1636 } 1637 1638 static int update_gid_table(struct mlx4_ib_dev *dev, int port, 1639 union ib_gid *gid, int clear, 1640 int default_gid) 1641 { 1642 struct update_gid_work *work; 1643 int i; 1644 int need_update = 0; 1645 int free = -1; 1646 int found = -1; 1647 int max_gids; 1648 1649 if (default_gid) { 1650 free = 0; 1651 } else { 1652 max_gids = dev->dev->caps.gid_table_len[port]; 1653 for (i = 1; i < max_gids; ++i) { 1654 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid, 1655 sizeof(*gid))) 1656 found = i; 1657 1658 if (clear) { 1659 if (found >= 0) { 1660 need_update = 1; 1661 dev->iboe.gid_table[port - 1][found] = 1662 zgid; 1663 break; 1664 } 1665 } else { 1666 if (found >= 0) 1667 break; 1668 1669 if (free < 0 && 1670 !memcmp(&dev->iboe.gid_table[port - 1][i], 1671 &zgid, sizeof(*gid))) 1672 free = i; 1673 } 1674 } 1675 } 1676 1677 if (found == -1 && !clear && free >= 0) { 1678 dev->iboe.gid_table[port - 1][free] = *gid; 1679 need_update = 1; 1680 } 1681 1682 if (!need_update) 1683 return 0; 1684 1685 work = kzalloc(sizeof(*work), GFP_ATOMIC); 1686 if (!work) 1687 return -ENOMEM; 1688 1689 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids)); 1690 INIT_WORK(&work->work, update_gids_task); 1691 work->port = port; 1692 work->dev = dev; 1693 queue_work(wq, &work->work); 1694 1695 return 0; 1696 } 1697 1698 static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid) 1699 { 1700 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL); 1701 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev); 1702 } 1703 1704 1705 static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port) 1706 { 1707 struct update_gid_work *work; 1708 1709 work = kzalloc(sizeof(*work), GFP_ATOMIC); 1710 if (!work) 1711 return -ENOMEM; 1712 1713 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids)); 1714 memset(work->gids, 0, sizeof(work->gids)); 1715 INIT_WORK(&work->work, reset_gids_task); 1716 work->dev = dev; 1717 work->port = port; 1718 queue_work(wq, &work->work); 1719 return 0; 1720 } 1721 1722 static int mlx4_ib_addr_event(int event, struct net_device *event_netdev, 1723 struct mlx4_ib_dev *ibdev, union ib_gid *gid) 1724 { 1725 struct mlx4_ib_iboe *iboe; 1726 int port = 0; 1727 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ? 1728 rdma_vlan_dev_real_dev(event_netdev) : 1729 event_netdev; 1730 union ib_gid default_gid; 1731 1732 mlx4_make_default_gid(real_dev, &default_gid); 1733 1734 if (!memcmp(gid, &default_gid, sizeof(*gid))) 1735 return 0; 1736 1737 if (event != NETDEV_DOWN && event != NETDEV_UP) 1738 return 0; 1739 1740 if ((real_dev != event_netdev) && 1741 (event == NETDEV_DOWN) && 1742 rdma_link_local_addr((struct in6_addr *)gid)) 1743 return 0; 1744 1745 iboe = &ibdev->iboe; 1746 spin_lock_bh(&iboe->lock); 1747 1748 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) 1749 if ((netif_is_bond_master(real_dev) && 1750 (real_dev == iboe->masters[port - 1])) || 1751 (!netif_is_bond_master(real_dev) && 1752 (real_dev == iboe->netdevs[port - 1]))) 1753 update_gid_table(ibdev, port, gid, 1754 event == NETDEV_DOWN, 0); 1755 1756 spin_unlock_bh(&iboe->lock); 1757 return 0; 1758 1759 } 1760 1761 static u8 mlx4_ib_get_dev_port(struct net_device *dev, 1762 struct mlx4_ib_dev *ibdev) 1763 { 1764 u8 port = 0; 1765 struct mlx4_ib_iboe *iboe; 1766 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ? 1767 rdma_vlan_dev_real_dev(dev) : dev; 1768 1769 iboe = &ibdev->iboe; 1770 1771 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) 1772 if ((netif_is_bond_master(real_dev) && 1773 (real_dev == iboe->masters[port - 1])) || 1774 (!netif_is_bond_master(real_dev) && 1775 (real_dev == iboe->netdevs[port - 1]))) 1776 break; 1777 1778 if ((port == 0) || (port > ibdev->dev->caps.num_ports)) 1779 return 0; 1780 else 1781 return port; 1782 } 1783 1784 static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event, 1785 void *ptr) 1786 { 1787 struct mlx4_ib_dev *ibdev; 1788 struct in_ifaddr *ifa = ptr; 1789 union ib_gid gid; 1790 struct net_device *event_netdev = ifa->ifa_dev->dev; 1791 1792 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid); 1793 1794 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet); 1795 1796 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid); 1797 return NOTIFY_DONE; 1798 } 1799 1800 #if IS_ENABLED(CONFIG_IPV6) 1801 static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event, 1802 void *ptr) 1803 { 1804 struct mlx4_ib_dev *ibdev; 1805 struct inet6_ifaddr *ifa = ptr; 1806 union ib_gid *gid = (union ib_gid *)&ifa->addr; 1807 struct net_device *event_netdev = ifa->idev->dev; 1808 1809 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6); 1810 1811 mlx4_ib_addr_event(event, event_netdev, ibdev, gid); 1812 return NOTIFY_DONE; 1813 } 1814 #endif 1815 1816 #define MLX4_IB_INVALID_MAC ((u64)-1) 1817 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, 1818 struct net_device *dev, 1819 int port) 1820 { 1821 u64 new_smac = 0; 1822 u64 release_mac = MLX4_IB_INVALID_MAC; 1823 struct mlx4_ib_qp *qp; 1824 1825 read_lock(&dev_base_lock); 1826 new_smac = mlx4_mac_to_u64(dev->dev_addr); 1827 read_unlock(&dev_base_lock); 1828 1829 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac); 1830 1831 /* no need for update QP1 and mac registration in non-SRIOV */ 1832 if (!mlx4_is_mfunc(ibdev->dev)) 1833 return; 1834 1835 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); 1836 qp = ibdev->qp1_proxy[port - 1]; 1837 if (qp) { 1838 int new_smac_index; 1839 u64 old_smac; 1840 struct mlx4_update_qp_params update_params; 1841 1842 mutex_lock(&qp->mutex); 1843 old_smac = qp->pri.smac; 1844 if (new_smac == old_smac) 1845 goto unlock; 1846 1847 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); 1848 1849 if (new_smac_index < 0) 1850 goto unlock; 1851 1852 update_params.smac_index = new_smac_index; 1853 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC, 1854 &update_params)) { 1855 release_mac = new_smac; 1856 goto unlock; 1857 } 1858 /* if old port was zero, no mac was yet registered for this QP */ 1859 if (qp->pri.smac_port) 1860 release_mac = old_smac; 1861 qp->pri.smac = new_smac; 1862 qp->pri.smac_port = port; 1863 qp->pri.smac_index = new_smac_index; 1864 } 1865 1866 unlock: 1867 if (release_mac != MLX4_IB_INVALID_MAC) 1868 mlx4_unregister_mac(ibdev->dev, port, release_mac); 1869 if (qp) 1870 mutex_unlock(&qp->mutex); 1871 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); 1872 } 1873 1874 static void mlx4_ib_get_dev_addr(struct net_device *dev, 1875 struct mlx4_ib_dev *ibdev, u8 port) 1876 { 1877 struct in_device *in_dev; 1878 #if IS_ENABLED(CONFIG_IPV6) 1879 struct inet6_dev *in6_dev; 1880 union ib_gid *pgid; 1881 struct inet6_ifaddr *ifp; 1882 union ib_gid default_gid; 1883 #endif 1884 union ib_gid gid; 1885 1886 1887 if ((port == 0) || (port > ibdev->dev->caps.num_ports)) 1888 return; 1889 1890 /* IPv4 gids */ 1891 in_dev = in_dev_get(dev); 1892 if (in_dev) { 1893 for_ifa(in_dev) { 1894 /*ifa->ifa_address;*/ 1895 ipv6_addr_set_v4mapped(ifa->ifa_address, 1896 (struct in6_addr *)&gid); 1897 update_gid_table(ibdev, port, &gid, 0, 0); 1898 } 1899 endfor_ifa(in_dev); 1900 in_dev_put(in_dev); 1901 } 1902 #if IS_ENABLED(CONFIG_IPV6) 1903 mlx4_make_default_gid(dev, &default_gid); 1904 /* IPv6 gids */ 1905 in6_dev = in6_dev_get(dev); 1906 if (in6_dev) { 1907 read_lock_bh(&in6_dev->lock); 1908 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) { 1909 pgid = (union ib_gid *)&ifp->addr; 1910 if (!memcmp(pgid, &default_gid, sizeof(*pgid))) 1911 continue; 1912 update_gid_table(ibdev, port, pgid, 0, 0); 1913 } 1914 read_unlock_bh(&in6_dev->lock); 1915 in6_dev_put(in6_dev); 1916 } 1917 #endif 1918 } 1919 1920 static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev, 1921 struct net_device *dev, u8 port) 1922 { 1923 union ib_gid gid; 1924 mlx4_make_default_gid(dev, &gid); 1925 update_gid_table(ibdev, port, &gid, 0, 1); 1926 } 1927 1928 static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev) 1929 { 1930 struct net_device *dev; 1931 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 1932 int i; 1933 int err = 0; 1934 1935 for (i = 1; i <= ibdev->num_ports; ++i) { 1936 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) == 1937 IB_LINK_LAYER_ETHERNET) { 1938 err = reset_gid_table(ibdev, i); 1939 if (err) 1940 goto out; 1941 } 1942 } 1943 1944 read_lock(&dev_base_lock); 1945 spin_lock_bh(&iboe->lock); 1946 1947 for_each_netdev(&init_net, dev) { 1948 u8 port = mlx4_ib_get_dev_port(dev, ibdev); 1949 /* port will be non-zero only for ETH ports */ 1950 if (port) { 1951 mlx4_ib_set_default_gid(ibdev, dev, port); 1952 mlx4_ib_get_dev_addr(dev, ibdev, port); 1953 } 1954 } 1955 1956 spin_unlock_bh(&iboe->lock); 1957 read_unlock(&dev_base_lock); 1958 out: 1959 return err; 1960 } 1961 1962 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev, 1963 struct net_device *dev, 1964 unsigned long event) 1965 1966 { 1967 struct mlx4_ib_iboe *iboe; 1968 int update_qps_port = -1; 1969 int port; 1970 1971 iboe = &ibdev->iboe; 1972 1973 spin_lock_bh(&iboe->lock); 1974 mlx4_foreach_ib_transport_port(port, ibdev->dev) { 1975 enum ib_port_state port_state = IB_PORT_NOP; 1976 struct net_device *old_master = iboe->masters[port - 1]; 1977 struct net_device *curr_netdev; 1978 struct net_device *curr_master; 1979 1980 iboe->netdevs[port - 1] = 1981 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port); 1982 if (iboe->netdevs[port - 1]) 1983 mlx4_ib_set_default_gid(ibdev, 1984 iboe->netdevs[port - 1], port); 1985 curr_netdev = iboe->netdevs[port - 1]; 1986 1987 if (iboe->netdevs[port - 1] && 1988 netif_is_bond_slave(iboe->netdevs[port - 1])) { 1989 iboe->masters[port - 1] = netdev_master_upper_dev_get( 1990 iboe->netdevs[port - 1]); 1991 } else { 1992 iboe->masters[port - 1] = NULL; 1993 } 1994 curr_master = iboe->masters[port - 1]; 1995 1996 if (dev == iboe->netdevs[port - 1] && 1997 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || 1998 event == NETDEV_UP || event == NETDEV_CHANGE)) 1999 update_qps_port = port; 2000 2001 if (curr_netdev) { 2002 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ? 2003 IB_PORT_ACTIVE : IB_PORT_DOWN; 2004 mlx4_ib_set_default_gid(ibdev, curr_netdev, port); 2005 if (curr_master) { 2006 /* if using bonding/team and a slave port is down, we 2007 * don't want the bond IP based gids in the table since 2008 * flows that select port by gid may get the down port. 2009 */ 2010 if (port_state == IB_PORT_DOWN && 2011 !mlx4_is_bonded(ibdev->dev)) { 2012 reset_gid_table(ibdev, port); 2013 mlx4_ib_set_default_gid(ibdev, 2014 curr_netdev, 2015 port); 2016 } else { 2017 /* gids from the upper dev (bond/team) 2018 * should appear in port's gid table 2019 */ 2020 mlx4_ib_get_dev_addr(curr_master, 2021 ibdev, port); 2022 } 2023 } 2024 /* if bonding is used it is possible that we add it to 2025 * masters only after IP address is assigned to the 2026 * net bonding interface. 2027 */ 2028 if (curr_master && (old_master != curr_master)) { 2029 reset_gid_table(ibdev, port); 2030 mlx4_ib_set_default_gid(ibdev, 2031 curr_netdev, port); 2032 mlx4_ib_get_dev_addr(curr_master, ibdev, port); 2033 } 2034 2035 if (!curr_master && (old_master != curr_master)) { 2036 reset_gid_table(ibdev, port); 2037 mlx4_ib_set_default_gid(ibdev, 2038 curr_netdev, port); 2039 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port); 2040 } 2041 } else { 2042 reset_gid_table(ibdev, port); 2043 } 2044 } 2045 2046 spin_unlock_bh(&iboe->lock); 2047 2048 if (update_qps_port > 0) 2049 mlx4_ib_update_qps(ibdev, dev, update_qps_port); 2050 } 2051 2052 static int mlx4_ib_netdev_event(struct notifier_block *this, 2053 unsigned long event, void *ptr) 2054 { 2055 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2056 struct mlx4_ib_dev *ibdev; 2057 2058 if (!net_eq(dev_net(dev), &init_net)) 2059 return NOTIFY_DONE; 2060 2061 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 2062 mlx4_ib_scan_netdevs(ibdev, dev, event); 2063 2064 return NOTIFY_DONE; 2065 } 2066 2067 static void init_pkeys(struct mlx4_ib_dev *ibdev) 2068 { 2069 int port; 2070 int slave; 2071 int i; 2072 2073 if (mlx4_is_master(ibdev->dev)) { 2074 for (slave = 0; slave <= ibdev->dev->persist->num_vfs; 2075 ++slave) { 2076 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2077 for (i = 0; 2078 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2079 ++i) { 2080 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] = 2081 /* master has the identity virt2phys pkey mapping */ 2082 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i : 2083 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1; 2084 mlx4_sync_pkey_table(ibdev->dev, slave, port, i, 2085 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]); 2086 } 2087 } 2088 } 2089 /* initialize pkey cache */ 2090 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2091 for (i = 0; 2092 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2093 ++i) 2094 ibdev->pkeys.phys_pkey_cache[port-1][i] = 2095 (i) ? 0 : 0xFFFF; 2096 } 2097 } 2098 } 2099 2100 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2101 { 2102 int i, j, eq = 0, total_eqs = 0; 2103 2104 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors, 2105 sizeof(ibdev->eq_table[0]), GFP_KERNEL); 2106 if (!ibdev->eq_table) 2107 return; 2108 2109 for (i = 1; i <= dev->caps.num_ports; i++) { 2110 for (j = 0; j < mlx4_get_eqs_per_port(dev, i); 2111 j++, total_eqs++) { 2112 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs)) 2113 continue; 2114 ibdev->eq_table[eq] = total_eqs; 2115 if (!mlx4_assign_eq(dev, i, 2116 &ibdev->eq_table[eq])) 2117 eq++; 2118 else 2119 ibdev->eq_table[eq] = -1; 2120 } 2121 } 2122 2123 for (i = eq; i < dev->caps.num_comp_vectors; 2124 ibdev->eq_table[i++] = -1) 2125 ; 2126 2127 /* Advertise the new number of EQs to clients */ 2128 ibdev->ib_dev.num_comp_vectors = eq; 2129 } 2130 2131 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2132 { 2133 int i; 2134 int total_eqs = ibdev->ib_dev.num_comp_vectors; 2135 2136 /* no eqs were allocated */ 2137 if (!ibdev->eq_table) 2138 return; 2139 2140 /* Reset the advertised EQ number */ 2141 ibdev->ib_dev.num_comp_vectors = 0; 2142 2143 for (i = 0; i < total_eqs; i++) 2144 mlx4_release_eq(dev, ibdev->eq_table[i]); 2145 2146 kfree(ibdev->eq_table); 2147 ibdev->eq_table = NULL; 2148 } 2149 2150 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num, 2151 struct ib_port_immutable *immutable) 2152 { 2153 struct ib_port_attr attr; 2154 int err; 2155 2156 err = mlx4_ib_query_port(ibdev, port_num, &attr); 2157 if (err) 2158 return err; 2159 2160 immutable->pkey_tbl_len = attr.pkey_tbl_len; 2161 immutable->gid_tbl_len = attr.gid_tbl_len; 2162 2163 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) 2164 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 2165 else 2166 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; 2167 2168 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2169 2170 return 0; 2171 } 2172 2173 static void *mlx4_ib_add(struct mlx4_dev *dev) 2174 { 2175 struct mlx4_ib_dev *ibdev; 2176 int num_ports = 0; 2177 int i, j; 2178 int err; 2179 struct mlx4_ib_iboe *iboe; 2180 int ib_num_ports = 0; 2181 int num_req_counters; 2182 int allocated; 2183 u32 counter_index; 2184 2185 pr_info_once("%s", mlx4_ib_version); 2186 2187 num_ports = 0; 2188 mlx4_foreach_ib_transport_port(i, dev) 2189 num_ports++; 2190 2191 /* No point in registering a device with no ports... */ 2192 if (num_ports == 0) 2193 return NULL; 2194 2195 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev); 2196 if (!ibdev) { 2197 dev_err(&dev->persist->pdev->dev, 2198 "Device struct alloc failed\n"); 2199 return NULL; 2200 } 2201 2202 iboe = &ibdev->iboe; 2203 2204 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) 2205 goto err_dealloc; 2206 2207 if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) 2208 goto err_pd; 2209 2210 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, 2211 PAGE_SIZE); 2212 if (!ibdev->uar_map) 2213 goto err_uar; 2214 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 2215 2216 ibdev->dev = dev; 2217 ibdev->bond_next_port = 0; 2218 2219 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX); 2220 ibdev->ib_dev.owner = THIS_MODULE; 2221 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA; 2222 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; 2223 ibdev->num_ports = num_ports; 2224 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ? 2225 1 : ibdev->num_ports; 2226 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; 2227 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev; 2228 2229 if (dev->caps.userspace_caps) 2230 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION; 2231 else 2232 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION; 2233 2234 ibdev->ib_dev.uverbs_cmd_mask = 2235 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 2236 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 2237 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 2238 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 2239 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 2240 (1ull << IB_USER_VERBS_CMD_REG_MR) | 2241 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 2242 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 2243 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 2244 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 2245 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 2246 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 2247 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 2248 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 2249 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 2250 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 2251 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 2252 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 2253 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 2254 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 2255 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 2256 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 2257 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 2258 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 2259 2260 ibdev->ib_dev.query_device = mlx4_ib_query_device; 2261 ibdev->ib_dev.query_port = mlx4_ib_query_port; 2262 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer; 2263 ibdev->ib_dev.query_gid = mlx4_ib_query_gid; 2264 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey; 2265 ibdev->ib_dev.modify_device = mlx4_ib_modify_device; 2266 ibdev->ib_dev.modify_port = mlx4_ib_modify_port; 2267 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext; 2268 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext; 2269 ibdev->ib_dev.mmap = mlx4_ib_mmap; 2270 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd; 2271 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd; 2272 ibdev->ib_dev.create_ah = mlx4_ib_create_ah; 2273 ibdev->ib_dev.query_ah = mlx4_ib_query_ah; 2274 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah; 2275 ibdev->ib_dev.create_srq = mlx4_ib_create_srq; 2276 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq; 2277 ibdev->ib_dev.query_srq = mlx4_ib_query_srq; 2278 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq; 2279 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv; 2280 ibdev->ib_dev.create_qp = mlx4_ib_create_qp; 2281 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp; 2282 ibdev->ib_dev.query_qp = mlx4_ib_query_qp; 2283 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp; 2284 ibdev->ib_dev.post_send = mlx4_ib_post_send; 2285 ibdev->ib_dev.post_recv = mlx4_ib_post_recv; 2286 ibdev->ib_dev.create_cq = mlx4_ib_create_cq; 2287 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq; 2288 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq; 2289 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq; 2290 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq; 2291 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq; 2292 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr; 2293 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr; 2294 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr; 2295 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr; 2296 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr; 2297 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list; 2298 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list; 2299 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach; 2300 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach; 2301 ibdev->ib_dev.process_mad = mlx4_ib_process_mad; 2302 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable; 2303 2304 if (!mlx4_is_slave(ibdev->dev)) { 2305 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc; 2306 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr; 2307 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr; 2308 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc; 2309 } 2310 2311 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || 2312 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 2313 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw; 2314 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw; 2315 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw; 2316 2317 ibdev->ib_dev.uverbs_cmd_mask |= 2318 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) | 2319 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW); 2320 } 2321 2322 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 2323 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd; 2324 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd; 2325 ibdev->ib_dev.uverbs_cmd_mask |= 2326 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 2327 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 2328 } 2329 2330 if (check_flow_steering_support(dev)) { 2331 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED; 2332 ibdev->ib_dev.create_flow = mlx4_ib_create_flow; 2333 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow; 2334 2335 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2336 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) | 2337 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW); 2338 } 2339 2340 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2341 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) | 2342 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ); 2343 2344 mlx4_ib_alloc_eqs(dev, ibdev); 2345 2346 spin_lock_init(&iboe->lock); 2347 2348 if (init_node_data(ibdev)) 2349 goto err_map; 2350 2351 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports; 2352 for (i = 0; i < num_req_counters; ++i) { 2353 mutex_init(&ibdev->qp1_proxy_lock[i]); 2354 allocated = 0; 2355 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == 2356 IB_LINK_LAYER_ETHERNET) { 2357 err = mlx4_counter_alloc(ibdev->dev, &counter_index); 2358 /* if failed to allocate a new counter, use default */ 2359 if (err) 2360 counter_index = 2361 mlx4_get_default_counter_index(dev, 2362 i + 1); 2363 else 2364 allocated = 1; 2365 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */ 2366 counter_index = mlx4_get_default_counter_index(dev, 2367 i + 1); 2368 } 2369 ibdev->counters[i].index = counter_index; 2370 ibdev->counters[i].allocated = allocated; 2371 pr_info("counter index %d for port %d allocated %d\n", 2372 counter_index, i + 1, allocated); 2373 } 2374 if (mlx4_is_bonded(dev)) 2375 for (i = 1; i < ibdev->num_ports ; ++i) { 2376 ibdev->counters[i].index = ibdev->counters[0].index; 2377 ibdev->counters[i].allocated = 0; 2378 } 2379 2380 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2381 ib_num_ports++; 2382 2383 spin_lock_init(&ibdev->sm_lock); 2384 mutex_init(&ibdev->cap_mask_mutex); 2385 INIT_LIST_HEAD(&ibdev->qp_list); 2386 spin_lock_init(&ibdev->reset_flow_resource_lock); 2387 2388 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED && 2389 ib_num_ports) { 2390 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS; 2391 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count, 2392 MLX4_IB_UC_STEER_QPN_ALIGN, 2393 &ibdev->steer_qpn_base, 0); 2394 if (err) 2395 goto err_counter; 2396 2397 ibdev->ib_uc_qpns_bitmap = 2398 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) * 2399 sizeof(long), 2400 GFP_KERNEL); 2401 if (!ibdev->ib_uc_qpns_bitmap) { 2402 dev_err(&dev->persist->pdev->dev, 2403 "bit map alloc failed\n"); 2404 goto err_steer_qp_release; 2405 } 2406 2407 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count); 2408 2409 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE( 2410 dev, ibdev->steer_qpn_base, 2411 ibdev->steer_qpn_base + 2412 ibdev->steer_qpn_count - 1); 2413 if (err) 2414 goto err_steer_free_bitmap; 2415 } 2416 2417 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) 2418 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); 2419 2420 if (ib_register_device(&ibdev->ib_dev, NULL)) 2421 goto err_steer_free_bitmap; 2422 2423 if (mlx4_ib_mad_init(ibdev)) 2424 goto err_reg; 2425 2426 if (mlx4_ib_init_sriov(ibdev)) 2427 goto err_mad; 2428 2429 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) { 2430 if (!iboe->nb.notifier_call) { 2431 iboe->nb.notifier_call = mlx4_ib_netdev_event; 2432 err = register_netdevice_notifier(&iboe->nb); 2433 if (err) { 2434 iboe->nb.notifier_call = NULL; 2435 goto err_notif; 2436 } 2437 } 2438 if (!iboe->nb_inet.notifier_call) { 2439 iboe->nb_inet.notifier_call = mlx4_ib_inet_event; 2440 err = register_inetaddr_notifier(&iboe->nb_inet); 2441 if (err) { 2442 iboe->nb_inet.notifier_call = NULL; 2443 goto err_notif; 2444 } 2445 } 2446 #if IS_ENABLED(CONFIG_IPV6) 2447 if (!iboe->nb_inet6.notifier_call) { 2448 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event; 2449 err = register_inet6addr_notifier(&iboe->nb_inet6); 2450 if (err) { 2451 iboe->nb_inet6.notifier_call = NULL; 2452 goto err_notif; 2453 } 2454 } 2455 #endif 2456 if (mlx4_ib_init_gid_table(ibdev)) 2457 goto err_notif; 2458 } 2459 2460 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) { 2461 if (device_create_file(&ibdev->ib_dev.dev, 2462 mlx4_class_attributes[j])) 2463 goto err_notif; 2464 } 2465 2466 ibdev->ib_active = true; 2467 2468 if (mlx4_is_mfunc(ibdev->dev)) 2469 init_pkeys(ibdev); 2470 2471 /* create paravirt contexts for any VFs which are active */ 2472 if (mlx4_is_master(ibdev->dev)) { 2473 for (j = 0; j < MLX4_MFUNC_MAX; j++) { 2474 if (j == mlx4_master_func_num(ibdev->dev)) 2475 continue; 2476 if (mlx4_is_slave_active(ibdev->dev, j)) 2477 do_slave_init(ibdev, j, 1); 2478 } 2479 } 2480 return ibdev; 2481 2482 err_notif: 2483 if (ibdev->iboe.nb.notifier_call) { 2484 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2485 pr_warn("failure unregistering notifier\n"); 2486 ibdev->iboe.nb.notifier_call = NULL; 2487 } 2488 if (ibdev->iboe.nb_inet.notifier_call) { 2489 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet)) 2490 pr_warn("failure unregistering notifier\n"); 2491 ibdev->iboe.nb_inet.notifier_call = NULL; 2492 } 2493 #if IS_ENABLED(CONFIG_IPV6) 2494 if (ibdev->iboe.nb_inet6.notifier_call) { 2495 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6)) 2496 pr_warn("failure unregistering notifier\n"); 2497 ibdev->iboe.nb_inet6.notifier_call = NULL; 2498 } 2499 #endif 2500 flush_workqueue(wq); 2501 2502 mlx4_ib_close_sriov(ibdev); 2503 2504 err_mad: 2505 mlx4_ib_mad_cleanup(ibdev); 2506 2507 err_reg: 2508 ib_unregister_device(&ibdev->ib_dev); 2509 2510 err_steer_free_bitmap: 2511 kfree(ibdev->ib_uc_qpns_bitmap); 2512 2513 err_steer_qp_release: 2514 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 2515 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2516 ibdev->steer_qpn_count); 2517 err_counter: 2518 for (i = 0; i < ibdev->num_ports; ++i) { 2519 if (ibdev->counters[i].index != -1 && 2520 ibdev->counters[i].allocated) 2521 mlx4_counter_free(ibdev->dev, 2522 ibdev->counters[i].index); 2523 } 2524 err_map: 2525 iounmap(ibdev->uar_map); 2526 2527 err_uar: 2528 mlx4_uar_free(dev, &ibdev->priv_uar); 2529 2530 err_pd: 2531 mlx4_pd_free(dev, ibdev->priv_pdn); 2532 2533 err_dealloc: 2534 ib_dealloc_device(&ibdev->ib_dev); 2535 2536 return NULL; 2537 } 2538 2539 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn) 2540 { 2541 int offset; 2542 2543 WARN_ON(!dev->ib_uc_qpns_bitmap); 2544 2545 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap, 2546 dev->steer_qpn_count, 2547 get_count_order(count)); 2548 if (offset < 0) 2549 return offset; 2550 2551 *qpn = dev->steer_qpn_base + offset; 2552 return 0; 2553 } 2554 2555 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count) 2556 { 2557 if (!qpn || 2558 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED) 2559 return; 2560 2561 BUG_ON(qpn < dev->steer_qpn_base); 2562 2563 bitmap_release_region(dev->ib_uc_qpns_bitmap, 2564 qpn - dev->steer_qpn_base, 2565 get_count_order(count)); 2566 } 2567 2568 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 2569 int is_attach) 2570 { 2571 int err; 2572 size_t flow_size; 2573 struct ib_flow_attr *flow = NULL; 2574 struct ib_flow_spec_ib *ib_spec; 2575 2576 if (is_attach) { 2577 flow_size = sizeof(struct ib_flow_attr) + 2578 sizeof(struct ib_flow_spec_ib); 2579 flow = kzalloc(flow_size, GFP_KERNEL); 2580 if (!flow) 2581 return -ENOMEM; 2582 flow->port = mqp->port; 2583 flow->num_of_specs = 1; 2584 flow->size = flow_size; 2585 ib_spec = (struct ib_flow_spec_ib *)(flow + 1); 2586 ib_spec->type = IB_FLOW_SPEC_IB; 2587 ib_spec->size = sizeof(struct ib_flow_spec_ib); 2588 /* Add an empty rule for IB L2 */ 2589 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask)); 2590 2591 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, 2592 IB_FLOW_DOMAIN_NIC, 2593 MLX4_FS_REGULAR, 2594 &mqp->reg_id); 2595 } else { 2596 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id); 2597 } 2598 kfree(flow); 2599 return err; 2600 } 2601 2602 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) 2603 { 2604 struct mlx4_ib_dev *ibdev = ibdev_ptr; 2605 int p; 2606 2607 ibdev->ib_active = false; 2608 flush_workqueue(wq); 2609 2610 mlx4_ib_close_sriov(ibdev); 2611 mlx4_ib_mad_cleanup(ibdev); 2612 ib_unregister_device(&ibdev->ib_dev); 2613 if (ibdev->iboe.nb.notifier_call) { 2614 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2615 pr_warn("failure unregistering notifier\n"); 2616 ibdev->iboe.nb.notifier_call = NULL; 2617 } 2618 2619 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) { 2620 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2621 ibdev->steer_qpn_count); 2622 kfree(ibdev->ib_uc_qpns_bitmap); 2623 } 2624 2625 if (ibdev->iboe.nb_inet.notifier_call) { 2626 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet)) 2627 pr_warn("failure unregistering notifier\n"); 2628 ibdev->iboe.nb_inet.notifier_call = NULL; 2629 } 2630 #if IS_ENABLED(CONFIG_IPV6) 2631 if (ibdev->iboe.nb_inet6.notifier_call) { 2632 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6)) 2633 pr_warn("failure unregistering notifier\n"); 2634 ibdev->iboe.nb_inet6.notifier_call = NULL; 2635 } 2636 #endif 2637 2638 iounmap(ibdev->uar_map); 2639 for (p = 0; p < ibdev->num_ports; ++p) 2640 if (ibdev->counters[p].index != -1 && 2641 ibdev->counters[p].allocated) 2642 mlx4_counter_free(ibdev->dev, ibdev->counters[p].index); 2643 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 2644 mlx4_CLOSE_PORT(dev, p); 2645 2646 mlx4_ib_free_eqs(dev, ibdev); 2647 2648 mlx4_uar_free(dev, &ibdev->priv_uar); 2649 mlx4_pd_free(dev, ibdev->priv_pdn); 2650 ib_dealloc_device(&ibdev->ib_dev); 2651 } 2652 2653 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init) 2654 { 2655 struct mlx4_ib_demux_work **dm = NULL; 2656 struct mlx4_dev *dev = ibdev->dev; 2657 int i; 2658 unsigned long flags; 2659 struct mlx4_active_ports actv_ports; 2660 unsigned int ports; 2661 unsigned int first_port; 2662 2663 if (!mlx4_is_master(dev)) 2664 return; 2665 2666 actv_ports = mlx4_get_active_ports(dev, slave); 2667 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); 2668 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); 2669 2670 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC); 2671 if (!dm) { 2672 pr_err("failed to allocate memory for tunneling qp update\n"); 2673 return; 2674 } 2675 2676 for (i = 0; i < ports; i++) { 2677 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC); 2678 if (!dm[i]) { 2679 pr_err("failed to allocate memory for tunneling qp update work struct\n"); 2680 while (--i >= 0) 2681 kfree(dm[i]); 2682 goto out; 2683 } 2684 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work); 2685 dm[i]->port = first_port + i + 1; 2686 dm[i]->slave = slave; 2687 dm[i]->do_init = do_init; 2688 dm[i]->dev = ibdev; 2689 } 2690 /* initialize or tear down tunnel QPs for the slave */ 2691 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags); 2692 if (!ibdev->sriov.is_going_down) { 2693 for (i = 0; i < ports; i++) 2694 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work); 2695 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 2696 } else { 2697 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 2698 for (i = 0; i < ports; i++) 2699 kfree(dm[i]); 2700 } 2701 out: 2702 kfree(dm); 2703 return; 2704 } 2705 2706 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev) 2707 { 2708 struct mlx4_ib_qp *mqp; 2709 unsigned long flags_qp; 2710 unsigned long flags_cq; 2711 struct mlx4_ib_cq *send_mcq, *recv_mcq; 2712 struct list_head cq_notify_list; 2713 struct mlx4_cq *mcq; 2714 unsigned long flags; 2715 2716 pr_warn("mlx4_ib_handle_catas_error was started\n"); 2717 INIT_LIST_HEAD(&cq_notify_list); 2718 2719 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 2720 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 2721 2722 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 2723 spin_lock_irqsave(&mqp->sq.lock, flags_qp); 2724 if (mqp->sq.tail != mqp->sq.head) { 2725 send_mcq = to_mcq(mqp->ibqp.send_cq); 2726 spin_lock_irqsave(&send_mcq->lock, flags_cq); 2727 if (send_mcq->mcq.comp && 2728 mqp->ibqp.send_cq->comp_handler) { 2729 if (!send_mcq->mcq.reset_notify_added) { 2730 send_mcq->mcq.reset_notify_added = 1; 2731 list_add_tail(&send_mcq->mcq.reset_notify, 2732 &cq_notify_list); 2733 } 2734 } 2735 spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 2736 } 2737 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 2738 /* Now, handle the QP's receive queue */ 2739 spin_lock_irqsave(&mqp->rq.lock, flags_qp); 2740 /* no handling is needed for SRQ */ 2741 if (!mqp->ibqp.srq) { 2742 if (mqp->rq.tail != mqp->rq.head) { 2743 recv_mcq = to_mcq(mqp->ibqp.recv_cq); 2744 spin_lock_irqsave(&recv_mcq->lock, flags_cq); 2745 if (recv_mcq->mcq.comp && 2746 mqp->ibqp.recv_cq->comp_handler) { 2747 if (!recv_mcq->mcq.reset_notify_added) { 2748 recv_mcq->mcq.reset_notify_added = 1; 2749 list_add_tail(&recv_mcq->mcq.reset_notify, 2750 &cq_notify_list); 2751 } 2752 } 2753 spin_unlock_irqrestore(&recv_mcq->lock, 2754 flags_cq); 2755 } 2756 } 2757 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 2758 } 2759 2760 list_for_each_entry(mcq, &cq_notify_list, reset_notify) { 2761 mcq->comp(mcq); 2762 } 2763 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 2764 pr_warn("mlx4_ib_handle_catas_error ended\n"); 2765 } 2766 2767 static void handle_bonded_port_state_event(struct work_struct *work) 2768 { 2769 struct ib_event_work *ew = 2770 container_of(work, struct ib_event_work, work); 2771 struct mlx4_ib_dev *ibdev = ew->ib_dev; 2772 enum ib_port_state bonded_port_state = IB_PORT_NOP; 2773 int i; 2774 struct ib_event ibev; 2775 2776 kfree(ew); 2777 spin_lock_bh(&ibdev->iboe.lock); 2778 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 2779 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 2780 enum ib_port_state curr_port_state; 2781 2782 if (!curr_netdev) 2783 continue; 2784 2785 curr_port_state = 2786 (netif_running(curr_netdev) && 2787 netif_carrier_ok(curr_netdev)) ? 2788 IB_PORT_ACTIVE : IB_PORT_DOWN; 2789 2790 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ? 2791 curr_port_state : IB_PORT_ACTIVE; 2792 } 2793 spin_unlock_bh(&ibdev->iboe.lock); 2794 2795 ibev.device = &ibdev->ib_dev; 2796 ibev.element.port_num = 1; 2797 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ? 2798 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 2799 2800 ib_dispatch_event(&ibev); 2801 } 2802 2803 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr, 2804 enum mlx4_dev_event event, unsigned long param) 2805 { 2806 struct ib_event ibev; 2807 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr); 2808 struct mlx4_eqe *eqe = NULL; 2809 struct ib_event_work *ew; 2810 int p = 0; 2811 2812 if (mlx4_is_bonded(dev) && 2813 ((event == MLX4_DEV_EVENT_PORT_UP) || 2814 (event == MLX4_DEV_EVENT_PORT_DOWN))) { 2815 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 2816 if (!ew) 2817 return; 2818 INIT_WORK(&ew->work, handle_bonded_port_state_event); 2819 ew->ib_dev = ibdev; 2820 queue_work(wq, &ew->work); 2821 return; 2822 } 2823 2824 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE) 2825 eqe = (struct mlx4_eqe *)param; 2826 else 2827 p = (int) param; 2828 2829 switch (event) { 2830 case MLX4_DEV_EVENT_PORT_UP: 2831 if (p > ibdev->num_ports) 2832 return; 2833 if (mlx4_is_master(dev) && 2834 rdma_port_get_link_layer(&ibdev->ib_dev, p) == 2835 IB_LINK_LAYER_INFINIBAND) { 2836 mlx4_ib_invalidate_all_guid_record(ibdev, p); 2837 } 2838 ibev.event = IB_EVENT_PORT_ACTIVE; 2839 break; 2840 2841 case MLX4_DEV_EVENT_PORT_DOWN: 2842 if (p > ibdev->num_ports) 2843 return; 2844 ibev.event = IB_EVENT_PORT_ERR; 2845 break; 2846 2847 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 2848 ibdev->ib_active = false; 2849 ibev.event = IB_EVENT_DEVICE_FATAL; 2850 mlx4_ib_handle_catas_error(ibdev); 2851 break; 2852 2853 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 2854 ew = kmalloc(sizeof *ew, GFP_ATOMIC); 2855 if (!ew) { 2856 pr_err("failed to allocate memory for events work\n"); 2857 break; 2858 } 2859 2860 INIT_WORK(&ew->work, handle_port_mgmt_change_event); 2861 memcpy(&ew->ib_eqe, eqe, sizeof *eqe); 2862 ew->ib_dev = ibdev; 2863 /* need to queue only for port owner, which uses GEN_EQE */ 2864 if (mlx4_is_master(dev)) 2865 queue_work(wq, &ew->work); 2866 else 2867 handle_port_mgmt_change_event(&ew->work); 2868 return; 2869 2870 case MLX4_DEV_EVENT_SLAVE_INIT: 2871 /* here, p is the slave id */ 2872 do_slave_init(ibdev, p, 1); 2873 if (mlx4_is_master(dev)) { 2874 int i; 2875 2876 for (i = 1; i <= ibdev->num_ports; i++) { 2877 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 2878 == IB_LINK_LAYER_INFINIBAND) 2879 mlx4_ib_slave_alias_guid_event(ibdev, 2880 p, i, 2881 1); 2882 } 2883 } 2884 return; 2885 2886 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 2887 if (mlx4_is_master(dev)) { 2888 int i; 2889 2890 for (i = 1; i <= ibdev->num_ports; i++) { 2891 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 2892 == IB_LINK_LAYER_INFINIBAND) 2893 mlx4_ib_slave_alias_guid_event(ibdev, 2894 p, i, 2895 0); 2896 } 2897 } 2898 /* here, p is the slave id */ 2899 do_slave_init(ibdev, p, 0); 2900 return; 2901 2902 default: 2903 return; 2904 } 2905 2906 ibev.device = ibdev_ptr; 2907 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p; 2908 2909 ib_dispatch_event(&ibev); 2910 } 2911 2912 static struct mlx4_interface mlx4_ib_interface = { 2913 .add = mlx4_ib_add, 2914 .remove = mlx4_ib_remove, 2915 .event = mlx4_ib_event, 2916 .protocol = MLX4_PROT_IB_IPV6, 2917 .flags = MLX4_INTFF_BONDING 2918 }; 2919 2920 static int __init mlx4_ib_init(void) 2921 { 2922 int err; 2923 2924 wq = create_singlethread_workqueue("mlx4_ib"); 2925 if (!wq) 2926 return -ENOMEM; 2927 2928 err = mlx4_ib_mcg_init(); 2929 if (err) 2930 goto clean_wq; 2931 2932 err = mlx4_register_interface(&mlx4_ib_interface); 2933 if (err) 2934 goto clean_mcg; 2935 2936 return 0; 2937 2938 clean_mcg: 2939 mlx4_ib_mcg_destroy(); 2940 2941 clean_wq: 2942 destroy_workqueue(wq); 2943 return err; 2944 } 2945 2946 static void __exit mlx4_ib_cleanup(void) 2947 { 2948 mlx4_unregister_interface(&mlx4_ib_interface); 2949 mlx4_ib_mcg_destroy(); 2950 destroy_workqueue(wq); 2951 } 2952 2953 module_init(mlx4_ib_init); 2954 module_exit(mlx4_ib_cleanup); 2955