1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/slab.h> 37 #include <linux/errno.h> 38 #include <linux/netdevice.h> 39 #include <linux/inetdevice.h> 40 #include <linux/rtnetlink.h> 41 #include <linux/if_vlan.h> 42 #include <linux/sched/mm.h> 43 #include <linux/sched/task.h> 44 45 #include <net/ipv6.h> 46 #include <net/addrconf.h> 47 #include <net/devlink.h> 48 49 #include <rdma/ib_smi.h> 50 #include <rdma/ib_user_verbs.h> 51 #include <rdma/ib_addr.h> 52 #include <rdma/ib_cache.h> 53 54 #include <net/bonding.h> 55 56 #include <linux/mlx4/driver.h> 57 #include <linux/mlx4/cmd.h> 58 #include <linux/mlx4/qp.h> 59 60 #include "mlx4_ib.h" 61 #include <rdma/mlx4-abi.h> 62 63 #define DRV_NAME MLX4_IB_DRV_NAME 64 #define DRV_VERSION "4.0-0" 65 66 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF 67 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF 68 #define MLX4_IB_CARD_REV_A0 0xA0 69 70 MODULE_AUTHOR("Roland Dreier"); 71 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver"); 72 MODULE_LICENSE("Dual BSD/GPL"); 73 74 int mlx4_ib_sm_guid_assign = 0; 75 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444); 76 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)"); 77 78 static const char mlx4_ib_version[] = 79 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 80 DRV_VERSION "\n"; 81 82 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init); 83 static enum rdma_link_layer mlx4_ib_port_link_layer(struct ib_device *device, 84 u32 port_num); 85 static int mlx4_ib_event(struct notifier_block *this, unsigned long event, 86 void *param); 87 88 static struct workqueue_struct *wq; 89 90 static int check_flow_steering_support(struct mlx4_dev *dev) 91 { 92 int eth_num_ports = 0; 93 int ib_num_ports = 0; 94 95 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; 96 97 if (dmfs) { 98 int i; 99 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 100 eth_num_ports++; 101 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 102 ib_num_ports++; 103 dmfs &= (!ib_num_ports || 104 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && 105 (!eth_num_ports || 106 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); 107 if (ib_num_ports && mlx4_is_mfunc(dev)) { 108 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n"); 109 dmfs = 0; 110 } 111 } 112 return dmfs; 113 } 114 115 static int num_ib_ports(struct mlx4_dev *dev) 116 { 117 int ib_ports = 0; 118 int i; 119 120 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 121 ib_ports++; 122 123 return ib_ports; 124 } 125 126 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, 127 u32 port_num) 128 { 129 struct mlx4_ib_dev *ibdev = to_mdev(device); 130 struct net_device *dev, *ret = NULL; 131 132 rcu_read_lock(); 133 for_each_netdev_rcu(&init_net, dev) { 134 if (dev->dev.parent != ibdev->ib_dev.dev.parent || 135 dev->dev_port + 1 != port_num) 136 continue; 137 138 if (mlx4_is_bonded(ibdev->dev)) { 139 struct net_device *upper = NULL; 140 141 upper = netdev_master_upper_dev_get_rcu(dev); 142 if (upper) { 143 struct net_device *active; 144 145 active = bond_option_active_slave_get_rcu(netdev_priv(upper)); 146 if (active) 147 dev = active; 148 } 149 } 150 151 dev_hold(dev); 152 ret = dev; 153 break; 154 } 155 156 rcu_read_unlock(); 157 return ret; 158 } 159 160 static int mlx4_ib_update_gids_v1(struct gid_entry *gids, 161 struct mlx4_ib_dev *ibdev, 162 u32 port_num) 163 { 164 struct mlx4_cmd_mailbox *mailbox; 165 int err; 166 struct mlx4_dev *dev = ibdev->dev; 167 int i; 168 union ib_gid *gid_tbl; 169 170 mailbox = mlx4_alloc_cmd_mailbox(dev); 171 if (IS_ERR(mailbox)) 172 return -ENOMEM; 173 174 gid_tbl = mailbox->buf; 175 176 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 177 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid)); 178 179 err = mlx4_cmd(dev, mailbox->dma, 180 MLX4_SET_PORT_GID_TABLE << 8 | port_num, 181 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 182 MLX4_CMD_WRAPPED); 183 if (mlx4_is_bonded(dev)) 184 err += mlx4_cmd(dev, mailbox->dma, 185 MLX4_SET_PORT_GID_TABLE << 8 | 2, 186 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 187 MLX4_CMD_WRAPPED); 188 189 mlx4_free_cmd_mailbox(dev, mailbox); 190 return err; 191 } 192 193 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids, 194 struct mlx4_ib_dev *ibdev, 195 u32 port_num) 196 { 197 struct mlx4_cmd_mailbox *mailbox; 198 int err; 199 struct mlx4_dev *dev = ibdev->dev; 200 int i; 201 struct { 202 union ib_gid gid; 203 __be32 rsrvd1[2]; 204 __be16 rsrvd2; 205 u8 type; 206 u8 version; 207 __be32 rsrvd3; 208 } *gid_tbl; 209 210 mailbox = mlx4_alloc_cmd_mailbox(dev); 211 if (IS_ERR(mailbox)) 212 return -ENOMEM; 213 214 gid_tbl = mailbox->buf; 215 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 216 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid)); 217 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) { 218 gid_tbl[i].version = 2; 219 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid)) 220 gid_tbl[i].type = 1; 221 } 222 } 223 224 err = mlx4_cmd(dev, mailbox->dma, 225 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num, 226 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 227 MLX4_CMD_WRAPPED); 228 if (mlx4_is_bonded(dev)) 229 err += mlx4_cmd(dev, mailbox->dma, 230 MLX4_SET_PORT_ROCE_ADDR << 8 | 2, 231 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 232 MLX4_CMD_WRAPPED); 233 234 mlx4_free_cmd_mailbox(dev, mailbox); 235 return err; 236 } 237 238 static int mlx4_ib_update_gids(struct gid_entry *gids, 239 struct mlx4_ib_dev *ibdev, 240 u32 port_num) 241 { 242 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 243 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num); 244 245 return mlx4_ib_update_gids_v1(gids, ibdev, port_num); 246 } 247 248 static void free_gid_entry(struct gid_entry *entry) 249 { 250 memset(&entry->gid, 0, sizeof(entry->gid)); 251 kfree(entry->ctx); 252 entry->ctx = NULL; 253 } 254 255 static int mlx4_ib_add_gid(const struct ib_gid_attr *attr, void **context) 256 { 257 struct mlx4_ib_dev *ibdev = to_mdev(attr->device); 258 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 259 struct mlx4_port_gid_table *port_gid_table; 260 int free = -1, found = -1; 261 int ret = 0; 262 int hw_update = 0; 263 int i; 264 struct gid_entry *gids = NULL; 265 u16 vlan_id = 0xffff; 266 u8 mac[ETH_ALEN]; 267 268 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num)) 269 return -EINVAL; 270 271 if (attr->port_num > MLX4_MAX_PORTS) 272 return -EINVAL; 273 274 if (!context) 275 return -EINVAL; 276 277 ret = rdma_read_gid_l2_fields(attr, &vlan_id, &mac[0]); 278 if (ret) 279 return ret; 280 port_gid_table = &iboe->gids[attr->port_num - 1]; 281 spin_lock_bh(&iboe->lock); 282 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 283 if (!memcmp(&port_gid_table->gids[i].gid, 284 &attr->gid, sizeof(attr->gid)) && 285 port_gid_table->gids[i].gid_type == attr->gid_type && 286 port_gid_table->gids[i].vlan_id == vlan_id) { 287 found = i; 288 break; 289 } 290 if (free < 0 && rdma_is_zero_gid(&port_gid_table->gids[i].gid)) 291 free = i; /* HW has space */ 292 } 293 294 if (found < 0) { 295 if (free < 0) { 296 ret = -ENOSPC; 297 } else { 298 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC); 299 if (!port_gid_table->gids[free].ctx) { 300 ret = -ENOMEM; 301 } else { 302 *context = port_gid_table->gids[free].ctx; 303 memcpy(&port_gid_table->gids[free].gid, 304 &attr->gid, sizeof(attr->gid)); 305 port_gid_table->gids[free].gid_type = attr->gid_type; 306 port_gid_table->gids[free].vlan_id = vlan_id; 307 port_gid_table->gids[free].ctx->real_index = free; 308 port_gid_table->gids[free].ctx->refcount = 1; 309 hw_update = 1; 310 } 311 } 312 } else { 313 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx; 314 *context = ctx; 315 ctx->refcount++; 316 } 317 if (!ret && hw_update) { 318 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids), 319 GFP_ATOMIC); 320 if (!gids) { 321 ret = -ENOMEM; 322 *context = NULL; 323 free_gid_entry(&port_gid_table->gids[free]); 324 } else { 325 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 326 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 327 gids[i].gid_type = port_gid_table->gids[i].gid_type; 328 } 329 } 330 } 331 spin_unlock_bh(&iboe->lock); 332 333 if (!ret && hw_update) { 334 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num); 335 if (ret) { 336 spin_lock_bh(&iboe->lock); 337 *context = NULL; 338 free_gid_entry(&port_gid_table->gids[free]); 339 spin_unlock_bh(&iboe->lock); 340 } 341 kfree(gids); 342 } 343 344 return ret; 345 } 346 347 static int mlx4_ib_del_gid(const struct ib_gid_attr *attr, void **context) 348 { 349 struct gid_cache_context *ctx = *context; 350 struct mlx4_ib_dev *ibdev = to_mdev(attr->device); 351 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 352 struct mlx4_port_gid_table *port_gid_table; 353 int ret = 0; 354 int hw_update = 0; 355 struct gid_entry *gids = NULL; 356 357 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num)) 358 return -EINVAL; 359 360 if (attr->port_num > MLX4_MAX_PORTS) 361 return -EINVAL; 362 363 port_gid_table = &iboe->gids[attr->port_num - 1]; 364 spin_lock_bh(&iboe->lock); 365 if (ctx) { 366 ctx->refcount--; 367 if (!ctx->refcount) { 368 unsigned int real_index = ctx->real_index; 369 370 free_gid_entry(&port_gid_table->gids[real_index]); 371 hw_update = 1; 372 } 373 } 374 if (!ret && hw_update) { 375 int i; 376 377 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids), 378 GFP_ATOMIC); 379 if (!gids) { 380 ret = -ENOMEM; 381 } else { 382 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 383 memcpy(&gids[i].gid, 384 &port_gid_table->gids[i].gid, 385 sizeof(union ib_gid)); 386 gids[i].gid_type = 387 port_gid_table->gids[i].gid_type; 388 } 389 } 390 } 391 spin_unlock_bh(&iboe->lock); 392 393 if (!ret && hw_update) { 394 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num); 395 kfree(gids); 396 } 397 return ret; 398 } 399 400 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev, 401 const struct ib_gid_attr *attr) 402 { 403 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 404 struct gid_cache_context *ctx = NULL; 405 struct mlx4_port_gid_table *port_gid_table; 406 int real_index = -EINVAL; 407 int i; 408 unsigned long flags; 409 u32 port_num = attr->port_num; 410 411 if (port_num > MLX4_MAX_PORTS) 412 return -EINVAL; 413 414 if (mlx4_is_bonded(ibdev->dev)) 415 port_num = 1; 416 417 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num)) 418 return attr->index; 419 420 spin_lock_irqsave(&iboe->lock, flags); 421 port_gid_table = &iboe->gids[port_num - 1]; 422 423 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 424 if (!memcmp(&port_gid_table->gids[i].gid, 425 &attr->gid, sizeof(attr->gid)) && 426 attr->gid_type == port_gid_table->gids[i].gid_type) { 427 ctx = port_gid_table->gids[i].ctx; 428 break; 429 } 430 if (ctx) 431 real_index = ctx->real_index; 432 spin_unlock_irqrestore(&iboe->lock, flags); 433 return real_index; 434 } 435 436 static int mlx4_ib_query_device(struct ib_device *ibdev, 437 struct ib_device_attr *props, 438 struct ib_udata *uhw) 439 { 440 struct mlx4_ib_dev *dev = to_mdev(ibdev); 441 struct ib_smp *in_mad = NULL; 442 struct ib_smp *out_mad = NULL; 443 int err; 444 int have_ib_ports; 445 struct mlx4_uverbs_ex_query_device cmd; 446 struct mlx4_uverbs_ex_query_device_resp resp = {}; 447 struct mlx4_clock_params clock_params; 448 449 if (uhw->inlen) { 450 if (uhw->inlen < sizeof(cmd)) 451 return -EINVAL; 452 453 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd)); 454 if (err) 455 return err; 456 457 if (cmd.comp_mask) 458 return -EINVAL; 459 460 if (cmd.reserved) 461 return -EINVAL; 462 } 463 464 resp.response_length = offsetof(typeof(resp), response_length) + 465 sizeof(resp.response_length); 466 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 467 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 468 err = -ENOMEM; 469 if (!in_mad || !out_mad) 470 goto out; 471 472 ib_init_query_mad(in_mad); 473 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 474 475 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS, 476 1, NULL, NULL, in_mad, out_mad); 477 if (err) 478 goto out; 479 480 memset(props, 0, sizeof *props); 481 482 have_ib_ports = num_ib_ports(dev->dev); 483 484 props->fw_ver = dev->dev->caps.fw_ver; 485 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 486 IB_DEVICE_PORT_ACTIVE_EVENT | 487 IB_DEVICE_SYS_IMAGE_GUID | 488 IB_DEVICE_RC_RNR_NAK_GEN; 489 props->kernel_cap_flags = IBK_BLOCK_MULTICAST_LOOPBACK; 490 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) 491 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 492 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) 493 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 494 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) 495 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 496 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) 497 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 498 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 499 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 500 if (dev->dev->caps.max_gso_sz && 501 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) && 502 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) 503 props->kernel_cap_flags |= IBK_UD_TSO; 504 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 505 props->kernel_cap_flags |= IBK_LOCAL_DMA_LKEY; 506 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && 507 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 508 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 509 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 510 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 511 props->device_cap_flags |= IB_DEVICE_XRC; 512 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) 513 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW; 514 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 515 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) 516 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 517 else 518 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A; 519 } 520 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 521 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 522 523 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 524 525 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 526 0xffffff; 527 props->vendor_part_id = dev->dev->persist->pdev->device; 528 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 529 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 530 531 props->max_mr_size = ~0ull; 532 props->page_size_cap = dev->dev->caps.page_size_cap; 533 props->max_qp = dev->dev->quotas.qp; 534 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; 535 props->max_send_sge = 536 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg); 537 props->max_recv_sge = 538 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg); 539 props->max_sge_rd = MLX4_MAX_SGE_RD; 540 props->max_cq = dev->dev->quotas.cq; 541 props->max_cqe = dev->dev->caps.max_cqes; 542 props->max_mr = dev->dev->quotas.mpt; 543 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; 544 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; 545 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; 546 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 547 props->max_srq = dev->dev->quotas.srq; 548 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 549 props->max_srq_sge = dev->dev->caps.max_srq_sge; 550 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 551 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 552 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 553 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 554 props->masked_atomic_cap = props->atomic_cap; 555 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; 556 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; 557 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; 558 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 559 props->max_mcast_grp; 560 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL; 561 props->timestamp_mask = 0xFFFFFFFFFFFFULL; 562 props->max_ah = INT_MAX; 563 564 if (mlx4_ib_port_link_layer(ibdev, 1) == IB_LINK_LAYER_ETHERNET || 565 mlx4_ib_port_link_layer(ibdev, 2) == IB_LINK_LAYER_ETHERNET) { 566 if (dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) { 567 props->rss_caps.max_rwq_indirection_tables = 568 props->max_qp; 569 props->rss_caps.max_rwq_indirection_table_size = 570 dev->dev->caps.max_rss_tbl_sz; 571 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET; 572 props->max_wq_type_rq = props->max_qp; 573 } 574 575 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) 576 props->raw_packet_caps |= IB_RAW_PACKET_CAP_SCATTER_FCS; 577 } 578 579 props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT; 580 props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD; 581 582 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { 583 resp.response_length += sizeof(resp.hca_core_clock_offset); 584 if (!mlx4_get_internal_clock_params(dev->dev, &clock_params)) { 585 resp.comp_mask |= MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET; 586 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; 587 } 588 } 589 590 if (uhw->outlen >= resp.response_length + 591 sizeof(resp.max_inl_recv_sz)) { 592 resp.response_length += sizeof(resp.max_inl_recv_sz); 593 resp.max_inl_recv_sz = dev->dev->caps.max_rq_sg * 594 sizeof(struct mlx4_wqe_data_seg); 595 } 596 597 if (offsetofend(typeof(resp), rss_caps) <= uhw->outlen) { 598 if (props->rss_caps.supported_qpts) { 599 resp.rss_caps.rx_hash_function = 600 MLX4_IB_RX_HASH_FUNC_TOEPLITZ; 601 602 resp.rss_caps.rx_hash_fields_mask = 603 MLX4_IB_RX_HASH_SRC_IPV4 | 604 MLX4_IB_RX_HASH_DST_IPV4 | 605 MLX4_IB_RX_HASH_SRC_IPV6 | 606 MLX4_IB_RX_HASH_DST_IPV6 | 607 MLX4_IB_RX_HASH_SRC_PORT_TCP | 608 MLX4_IB_RX_HASH_DST_PORT_TCP | 609 MLX4_IB_RX_HASH_SRC_PORT_UDP | 610 MLX4_IB_RX_HASH_DST_PORT_UDP; 611 612 if (dev->dev->caps.tunnel_offload_mode == 613 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 614 resp.rss_caps.rx_hash_fields_mask |= 615 MLX4_IB_RX_HASH_INNER; 616 } 617 resp.response_length = offsetof(typeof(resp), rss_caps) + 618 sizeof(resp.rss_caps); 619 } 620 621 if (offsetofend(typeof(resp), tso_caps) <= uhw->outlen) { 622 if (dev->dev->caps.max_gso_sz && 623 ((mlx4_ib_port_link_layer(ibdev, 1) == 624 IB_LINK_LAYER_ETHERNET) || 625 (mlx4_ib_port_link_layer(ibdev, 2) == 626 IB_LINK_LAYER_ETHERNET))) { 627 resp.tso_caps.max_tso = dev->dev->caps.max_gso_sz; 628 resp.tso_caps.supported_qpts |= 629 1 << IB_QPT_RAW_PACKET; 630 } 631 resp.response_length = offsetof(typeof(resp), tso_caps) + 632 sizeof(resp.tso_caps); 633 } 634 635 if (uhw->outlen) { 636 err = ib_copy_to_udata(uhw, &resp, resp.response_length); 637 if (err) 638 goto out; 639 } 640 out: 641 kfree(in_mad); 642 kfree(out_mad); 643 644 return err; 645 } 646 647 static enum rdma_link_layer 648 mlx4_ib_port_link_layer(struct ib_device *device, u32 port_num) 649 { 650 struct mlx4_dev *dev = to_mdev(device)->dev; 651 652 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? 653 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 654 } 655 656 static int ib_link_query_port(struct ib_device *ibdev, u32 port, 657 struct ib_port_attr *props, int netw_view) 658 { 659 struct ib_smp *in_mad = NULL; 660 struct ib_smp *out_mad = NULL; 661 int ext_active_speed; 662 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 663 int err = -ENOMEM; 664 665 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 666 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 667 if (!in_mad || !out_mad) 668 goto out; 669 670 ib_init_query_mad(in_mad); 671 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 672 in_mad->attr_mod = cpu_to_be32(port); 673 674 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 675 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 676 677 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 678 in_mad, out_mad); 679 if (err) 680 goto out; 681 682 683 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 684 props->lmc = out_mad->data[34] & 0x7; 685 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 686 props->sm_sl = out_mad->data[36] & 0xf; 687 props->state = out_mad->data[32] & 0xf; 688 props->phys_state = out_mad->data[33] >> 4; 689 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 690 if (netw_view) 691 props->gid_tbl_len = out_mad->data[50]; 692 else 693 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 694 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 695 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 696 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 697 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 698 props->active_width = out_mad->data[31] & 0xf; 699 props->active_speed = out_mad->data[35] >> 4; 700 props->max_mtu = out_mad->data[41] & 0xf; 701 props->active_mtu = out_mad->data[36] >> 4; 702 props->subnet_timeout = out_mad->data[51] & 0x1f; 703 props->max_vl_num = out_mad->data[37] >> 4; 704 props->init_type_reply = out_mad->data[41] >> 4; 705 706 /* Check if extended speeds (EDR/FDR/...) are supported */ 707 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 708 ext_active_speed = out_mad->data[62] >> 4; 709 710 switch (ext_active_speed) { 711 case 1: 712 props->active_speed = IB_SPEED_FDR; 713 break; 714 case 2: 715 props->active_speed = IB_SPEED_EDR; 716 break; 717 } 718 } 719 720 /* If reported active speed is QDR, check if is FDR-10 */ 721 if (props->active_speed == IB_SPEED_QDR) { 722 ib_init_query_mad(in_mad); 723 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 724 in_mad->attr_mod = cpu_to_be32(port); 725 726 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, 727 NULL, NULL, in_mad, out_mad); 728 if (err) 729 goto out; 730 731 /* Checking LinkSpeedActive for FDR-10 */ 732 if (out_mad->data[15] & 0x1) 733 props->active_speed = IB_SPEED_FDR10; 734 } 735 736 /* Avoid wrong speed value returned by FW if the IB link is down. */ 737 if (props->state == IB_PORT_DOWN) 738 props->active_speed = IB_SPEED_SDR; 739 740 out: 741 kfree(in_mad); 742 kfree(out_mad); 743 return err; 744 } 745 746 static u8 state_to_phys_state(enum ib_port_state state) 747 { 748 return state == IB_PORT_ACTIVE ? 749 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED; 750 } 751 752 static int eth_link_query_port(struct ib_device *ibdev, u32 port, 753 struct ib_port_attr *props) 754 { 755 756 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 757 struct mlx4_ib_iboe *iboe = &mdev->iboe; 758 struct net_device *ndev; 759 enum ib_mtu tmp; 760 struct mlx4_cmd_mailbox *mailbox; 761 int err = 0; 762 int is_bonded = mlx4_is_bonded(mdev->dev); 763 764 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 765 if (IS_ERR(mailbox)) 766 return PTR_ERR(mailbox); 767 768 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 769 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 770 MLX4_CMD_WRAPPED); 771 if (err) 772 goto out; 773 774 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) || 775 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 776 IB_WIDTH_4X : IB_WIDTH_1X; 777 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 778 IB_SPEED_FDR : IB_SPEED_QDR; 779 props->port_cap_flags = IB_PORT_CM_SUP; 780 props->ip_gids = true; 781 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; 782 props->max_msg_sz = mdev->dev->caps.max_msg_sz; 783 if (mdev->dev->caps.pkey_table_len[port]) 784 props->pkey_tbl_len = 1; 785 props->max_mtu = IB_MTU_4096; 786 props->max_vl_num = 2; 787 props->state = IB_PORT_DOWN; 788 props->phys_state = state_to_phys_state(props->state); 789 props->active_mtu = IB_MTU_256; 790 spin_lock_bh(&iboe->lock); 791 ndev = iboe->netdevs[port - 1]; 792 if (ndev && is_bonded) { 793 rcu_read_lock(); /* required to get upper dev */ 794 ndev = netdev_master_upper_dev_get_rcu(ndev); 795 rcu_read_unlock(); 796 } 797 if (!ndev) 798 goto out_unlock; 799 800 tmp = iboe_get_mtu(ndev->mtu); 801 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 802 803 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? 804 IB_PORT_ACTIVE : IB_PORT_DOWN; 805 props->phys_state = state_to_phys_state(props->state); 806 out_unlock: 807 spin_unlock_bh(&iboe->lock); 808 out: 809 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 810 return err; 811 } 812 813 int __mlx4_ib_query_port(struct ib_device *ibdev, u32 port, 814 struct ib_port_attr *props, int netw_view) 815 { 816 int err; 817 818 /* props being zeroed by the caller, avoid zeroing it here */ 819 820 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 821 ib_link_query_port(ibdev, port, props, netw_view) : 822 eth_link_query_port(ibdev, port, props); 823 824 return err; 825 } 826 827 static int mlx4_ib_query_port(struct ib_device *ibdev, u32 port, 828 struct ib_port_attr *props) 829 { 830 /* returns host view */ 831 return __mlx4_ib_query_port(ibdev, port, props, 0); 832 } 833 834 int __mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index, 835 union ib_gid *gid, int netw_view) 836 { 837 struct ib_smp *in_mad = NULL; 838 struct ib_smp *out_mad = NULL; 839 int err = -ENOMEM; 840 struct mlx4_ib_dev *dev = to_mdev(ibdev); 841 int clear = 0; 842 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 843 844 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 845 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 846 if (!in_mad || !out_mad) 847 goto out; 848 849 ib_init_query_mad(in_mad); 850 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 851 in_mad->attr_mod = cpu_to_be32(port); 852 853 if (mlx4_is_mfunc(dev->dev) && netw_view) 854 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 855 856 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad); 857 if (err) 858 goto out; 859 860 memcpy(gid->raw, out_mad->data + 8, 8); 861 862 if (mlx4_is_mfunc(dev->dev) && !netw_view) { 863 if (index) { 864 /* For any index > 0, return the null guid */ 865 err = 0; 866 clear = 1; 867 goto out; 868 } 869 } 870 871 ib_init_query_mad(in_mad); 872 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 873 in_mad->attr_mod = cpu_to_be32(index / 8); 874 875 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, 876 NULL, NULL, in_mad, out_mad); 877 if (err) 878 goto out; 879 880 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 881 882 out: 883 if (clear) 884 memset(gid->raw + 8, 0, 8); 885 kfree(in_mad); 886 kfree(out_mad); 887 return err; 888 } 889 890 static int mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index, 891 union ib_gid *gid) 892 { 893 if (rdma_protocol_ib(ibdev, port)) 894 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0); 895 return 0; 896 } 897 898 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u32 port, 899 u64 *sl2vl_tbl) 900 { 901 union sl2vl_tbl_to_u64 sl2vl64; 902 struct ib_smp *in_mad = NULL; 903 struct ib_smp *out_mad = NULL; 904 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 905 int err = -ENOMEM; 906 int jj; 907 908 if (mlx4_is_slave(to_mdev(ibdev)->dev)) { 909 *sl2vl_tbl = 0; 910 return 0; 911 } 912 913 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 914 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 915 if (!in_mad || !out_mad) 916 goto out; 917 918 ib_init_query_mad(in_mad); 919 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE; 920 in_mad->attr_mod = 0; 921 922 if (mlx4_is_mfunc(to_mdev(ibdev)->dev)) 923 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 924 925 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 926 in_mad, out_mad); 927 if (err) 928 goto out; 929 930 for (jj = 0; jj < 8; jj++) 931 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj]; 932 *sl2vl_tbl = sl2vl64.sl64; 933 934 out: 935 kfree(in_mad); 936 kfree(out_mad); 937 return err; 938 } 939 940 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev) 941 { 942 u64 sl2vl; 943 int i; 944 int err; 945 946 for (i = 1; i <= mdev->dev->caps.num_ports; i++) { 947 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) 948 continue; 949 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl); 950 if (err) { 951 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n", 952 i, err); 953 sl2vl = 0; 954 } 955 atomic64_set(&mdev->sl2vl[i - 1], sl2vl); 956 } 957 } 958 959 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index, 960 u16 *pkey, int netw_view) 961 { 962 struct ib_smp *in_mad = NULL; 963 struct ib_smp *out_mad = NULL; 964 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 965 int err = -ENOMEM; 966 967 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 968 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 969 if (!in_mad || !out_mad) 970 goto out; 971 972 ib_init_query_mad(in_mad); 973 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 974 in_mad->attr_mod = cpu_to_be32(index / 32); 975 976 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 977 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 978 979 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 980 in_mad, out_mad); 981 if (err) 982 goto out; 983 984 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 985 986 out: 987 kfree(in_mad); 988 kfree(out_mad); 989 return err; 990 } 991 992 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index, 993 u16 *pkey) 994 { 995 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0); 996 } 997 998 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 999 struct ib_device_modify *props) 1000 { 1001 struct mlx4_cmd_mailbox *mailbox; 1002 unsigned long flags; 1003 1004 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 1005 return -EOPNOTSUPP; 1006 1007 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 1008 return 0; 1009 1010 if (mlx4_is_slave(to_mdev(ibdev)->dev)) 1011 return -EOPNOTSUPP; 1012 1013 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags); 1014 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1015 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags); 1016 1017 /* 1018 * If possible, pass node desc to FW, so it can generate 1019 * a 144 trap. If cmd fails, just ignore. 1020 */ 1021 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 1022 if (IS_ERR(mailbox)) 1023 return 0; 1024 1025 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 1026 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 1027 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 1028 1029 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 1030 1031 return 0; 1032 } 1033 1034 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u32 port, 1035 int reset_qkey_viols, u32 cap_mask) 1036 { 1037 struct mlx4_cmd_mailbox *mailbox; 1038 int err; 1039 1040 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 1041 if (IS_ERR(mailbox)) 1042 return PTR_ERR(mailbox); 1043 1044 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 1045 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 1046 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 1047 } else { 1048 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols; 1049 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 1050 } 1051 1052 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE, 1053 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 1054 MLX4_CMD_WRAPPED); 1055 1056 mlx4_free_cmd_mailbox(dev->dev, mailbox); 1057 return err; 1058 } 1059 1060 static int mlx4_ib_modify_port(struct ib_device *ibdev, u32 port, int mask, 1061 struct ib_port_modify *props) 1062 { 1063 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 1064 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 1065 struct ib_port_attr attr; 1066 u32 cap_mask; 1067 int err; 1068 1069 /* return OK if this is RoCE. CM calls ib_modify_port() regardless 1070 * of whether port link layer is ETH or IB. For ETH ports, qkey 1071 * violations and port capabilities are not meaningful. 1072 */ 1073 if (is_eth) 1074 return 0; 1075 1076 mutex_lock(&mdev->cap_mask_mutex); 1077 1078 err = ib_query_port(ibdev, port, &attr); 1079 if (err) 1080 goto out; 1081 1082 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 1083 ~props->clr_port_cap_mask; 1084 1085 err = mlx4_ib_SET_PORT(mdev, port, 1086 !!(mask & IB_PORT_RESET_QKEY_CNTR), 1087 cap_mask); 1088 1089 out: 1090 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); 1091 return err; 1092 } 1093 1094 static int mlx4_ib_alloc_ucontext(struct ib_ucontext *uctx, 1095 struct ib_udata *udata) 1096 { 1097 struct ib_device *ibdev = uctx->device; 1098 struct mlx4_ib_dev *dev = to_mdev(ibdev); 1099 struct mlx4_ib_ucontext *context = to_mucontext(uctx); 1100 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3; 1101 struct mlx4_ib_alloc_ucontext_resp resp; 1102 int err; 1103 1104 if (!dev->ib_active) 1105 return -EAGAIN; 1106 1107 if (ibdev->ops.uverbs_abi_ver == 1108 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) { 1109 resp_v3.qp_tab_size = dev->dev->caps.num_qps; 1110 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; 1111 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1112 } else { 1113 resp.dev_caps = dev->dev->caps.userspace_caps; 1114 resp.qp_tab_size = dev->dev->caps.num_qps; 1115 resp.bf_reg_size = dev->dev->caps.bf_reg_size; 1116 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1117 resp.cqe_size = dev->dev->caps.cqe_size; 1118 } 1119 1120 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar); 1121 if (err) 1122 return err; 1123 1124 INIT_LIST_HEAD(&context->db_page_list); 1125 mutex_init(&context->db_page_mutex); 1126 1127 INIT_LIST_HEAD(&context->wqn_ranges_list); 1128 mutex_init(&context->wqn_ranges_mutex); 1129 1130 if (ibdev->ops.uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) 1131 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3)); 1132 else 1133 err = ib_copy_to_udata(udata, &resp, sizeof(resp)); 1134 1135 if (err) { 1136 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar); 1137 return -EFAULT; 1138 } 1139 1140 return err; 1141 } 1142 1143 static void mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1144 { 1145 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1146 1147 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar); 1148 } 1149 1150 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext) 1151 { 1152 } 1153 1154 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 1155 { 1156 struct mlx4_ib_dev *dev = to_mdev(context->device); 1157 1158 switch (vma->vm_pgoff) { 1159 case 0: 1160 return rdma_user_mmap_io(context, vma, 1161 to_mucontext(context)->uar.pfn, 1162 PAGE_SIZE, 1163 pgprot_noncached(vma->vm_page_prot), 1164 NULL); 1165 1166 case 1: 1167 if (dev->dev->caps.bf_reg_size == 0) 1168 return -EINVAL; 1169 return rdma_user_mmap_io( 1170 context, vma, 1171 to_mucontext(context)->uar.pfn + 1172 dev->dev->caps.num_uars, 1173 PAGE_SIZE, pgprot_writecombine(vma->vm_page_prot), 1174 NULL); 1175 1176 case 3: { 1177 struct mlx4_clock_params params; 1178 int ret; 1179 1180 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms); 1181 if (ret) 1182 return ret; 1183 1184 return rdma_user_mmap_io( 1185 context, vma, 1186 (pci_resource_start(dev->dev->persist->pdev, 1187 params.bar) + 1188 params.offset) >> 1189 PAGE_SHIFT, 1190 PAGE_SIZE, pgprot_noncached(vma->vm_page_prot), 1191 NULL); 1192 } 1193 1194 default: 1195 return -EINVAL; 1196 } 1197 } 1198 1199 static int mlx4_ib_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata) 1200 { 1201 struct mlx4_ib_pd *pd = to_mpd(ibpd); 1202 struct ib_device *ibdev = ibpd->device; 1203 int err; 1204 1205 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn); 1206 if (err) 1207 return err; 1208 1209 if (udata && ib_copy_to_udata(udata, &pd->pdn, sizeof(__u32))) { 1210 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn); 1211 return -EFAULT; 1212 } 1213 return 0; 1214 } 1215 1216 static int mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata) 1217 { 1218 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 1219 return 0; 1220 } 1221 1222 static int mlx4_ib_alloc_xrcd(struct ib_xrcd *ibxrcd, struct ib_udata *udata) 1223 { 1224 struct mlx4_ib_dev *dev = to_mdev(ibxrcd->device); 1225 struct mlx4_ib_xrcd *xrcd = to_mxrcd(ibxrcd); 1226 struct ib_cq_init_attr cq_attr = {}; 1227 int err; 1228 1229 if (!(dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 1230 return -EOPNOTSUPP; 1231 1232 err = mlx4_xrcd_alloc(dev->dev, &xrcd->xrcdn); 1233 if (err) 1234 return err; 1235 1236 xrcd->pd = ib_alloc_pd(ibxrcd->device, 0); 1237 if (IS_ERR(xrcd->pd)) { 1238 err = PTR_ERR(xrcd->pd); 1239 goto err2; 1240 } 1241 1242 cq_attr.cqe = 1; 1243 xrcd->cq = ib_create_cq(ibxrcd->device, NULL, NULL, xrcd, &cq_attr); 1244 if (IS_ERR(xrcd->cq)) { 1245 err = PTR_ERR(xrcd->cq); 1246 goto err3; 1247 } 1248 1249 return 0; 1250 1251 err3: 1252 ib_dealloc_pd(xrcd->pd); 1253 err2: 1254 mlx4_xrcd_free(dev->dev, xrcd->xrcdn); 1255 return err; 1256 } 1257 1258 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata) 1259 { 1260 ib_destroy_cq(to_mxrcd(xrcd)->cq); 1261 ib_dealloc_pd(to_mxrcd(xrcd)->pd); 1262 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 1263 return 0; 1264 } 1265 1266 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 1267 { 1268 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1269 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1270 struct mlx4_ib_gid_entry *ge; 1271 1272 ge = kzalloc(sizeof *ge, GFP_KERNEL); 1273 if (!ge) 1274 return -ENOMEM; 1275 1276 ge->gid = *gid; 1277 if (mlx4_ib_add_mc(mdev, mqp, gid)) { 1278 ge->port = mqp->port; 1279 ge->added = 1; 1280 } 1281 1282 mutex_lock(&mqp->mutex); 1283 list_add_tail(&ge->list, &mqp->gid_list); 1284 mutex_unlock(&mqp->mutex); 1285 1286 return 0; 1287 } 1288 1289 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev, 1290 struct mlx4_ib_counters *ctr_table) 1291 { 1292 struct counter_index *counter, *tmp_count; 1293 1294 mutex_lock(&ctr_table->mutex); 1295 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list, 1296 list) { 1297 if (counter->allocated) 1298 mlx4_counter_free(ibdev->dev, counter->index); 1299 list_del(&counter->list); 1300 kfree(counter); 1301 } 1302 mutex_unlock(&ctr_table->mutex); 1303 } 1304 1305 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 1306 union ib_gid *gid) 1307 { 1308 struct net_device *ndev; 1309 int ret = 0; 1310 1311 if (!mqp->port) 1312 return 0; 1313 1314 spin_lock_bh(&mdev->iboe.lock); 1315 ndev = mdev->iboe.netdevs[mqp->port - 1]; 1316 dev_hold(ndev); 1317 spin_unlock_bh(&mdev->iboe.lock); 1318 1319 if (ndev) { 1320 ret = 1; 1321 dev_put(ndev); 1322 } 1323 1324 return ret; 1325 } 1326 1327 struct mlx4_ib_steering { 1328 struct list_head list; 1329 struct mlx4_flow_reg_id reg_id; 1330 union ib_gid gid; 1331 }; 1332 1333 #define LAST_ETH_FIELD vlan_tag 1334 #define LAST_IB_FIELD sl 1335 #define LAST_IPV4_FIELD dst_ip 1336 #define LAST_TCP_UDP_FIELD src_port 1337 1338 /* Field is the last supported field */ 1339 #define FIELDS_NOT_SUPPORTED(filter, field)\ 1340 memchr_inv((void *)&filter.field +\ 1341 sizeof(filter.field), 0,\ 1342 sizeof(filter) -\ 1343 offsetof(typeof(filter), field) -\ 1344 sizeof(filter.field)) 1345 1346 static int parse_flow_attr(struct mlx4_dev *dev, 1347 u32 qp_num, 1348 union ib_flow_spec *ib_spec, 1349 struct _rule_hw *mlx4_spec) 1350 { 1351 enum mlx4_net_trans_rule_id type; 1352 1353 switch (ib_spec->type) { 1354 case IB_FLOW_SPEC_ETH: 1355 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1356 return -ENOTSUPP; 1357 1358 type = MLX4_NET_TRANS_RULE_ID_ETH; 1359 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac, 1360 ETH_ALEN); 1361 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac, 1362 ETH_ALEN); 1363 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag; 1364 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag; 1365 break; 1366 case IB_FLOW_SPEC_IB: 1367 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD)) 1368 return -ENOTSUPP; 1369 1370 type = MLX4_NET_TRANS_RULE_ID_IB; 1371 mlx4_spec->ib.l3_qpn = 1372 cpu_to_be32(qp_num); 1373 mlx4_spec->ib.qpn_mask = 1374 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK); 1375 break; 1376 1377 1378 case IB_FLOW_SPEC_IPV4: 1379 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1380 return -ENOTSUPP; 1381 1382 type = MLX4_NET_TRANS_RULE_ID_IPV4; 1383 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip; 1384 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip; 1385 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip; 1386 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip; 1387 break; 1388 1389 case IB_FLOW_SPEC_TCP: 1390 case IB_FLOW_SPEC_UDP: 1391 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD)) 1392 return -ENOTSUPP; 1393 1394 type = ib_spec->type == IB_FLOW_SPEC_TCP ? 1395 MLX4_NET_TRANS_RULE_ID_TCP : 1396 MLX4_NET_TRANS_RULE_ID_UDP; 1397 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port; 1398 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port; 1399 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port; 1400 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port; 1401 break; 1402 1403 default: 1404 return -EINVAL; 1405 } 1406 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 || 1407 mlx4_hw_rule_sz(dev, type) < 0) 1408 return -EINVAL; 1409 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type)); 1410 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2; 1411 return mlx4_hw_rule_sz(dev, type); 1412 } 1413 1414 struct default_rules { 1415 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1416 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1417 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1418 __u8 link_layer; 1419 }; 1420 static const struct default_rules default_table[] = { 1421 { 1422 .mandatory_fields = {IB_FLOW_SPEC_IPV4}, 1423 .mandatory_not_fields = {IB_FLOW_SPEC_ETH}, 1424 .rules_create_list = {IB_FLOW_SPEC_IB}, 1425 .link_layer = IB_LINK_LAYER_INFINIBAND 1426 } 1427 }; 1428 1429 static int __mlx4_ib_default_rules_match(struct ib_qp *qp, 1430 struct ib_flow_attr *flow_attr) 1431 { 1432 int i, j, k; 1433 void *ib_flow; 1434 const struct default_rules *pdefault_rules = default_table; 1435 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port); 1436 1437 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) { 1438 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1439 memset(&field_types, 0, sizeof(field_types)); 1440 1441 if (link_layer != pdefault_rules->link_layer) 1442 continue; 1443 1444 ib_flow = flow_attr + 1; 1445 /* we assume the specs are sorted */ 1446 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS && 1447 j < flow_attr->num_of_specs; k++) { 1448 union ib_flow_spec *current_flow = 1449 (union ib_flow_spec *)ib_flow; 1450 1451 /* same layer but different type */ 1452 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) == 1453 (pdefault_rules->mandatory_fields[k] & 1454 IB_FLOW_SPEC_LAYER_MASK)) && 1455 (current_flow->type != 1456 pdefault_rules->mandatory_fields[k])) 1457 goto out; 1458 1459 /* same layer, try match next one */ 1460 if (current_flow->type == 1461 pdefault_rules->mandatory_fields[k]) { 1462 j++; 1463 ib_flow += 1464 ((union ib_flow_spec *)ib_flow)->size; 1465 } 1466 } 1467 1468 ib_flow = flow_attr + 1; 1469 for (j = 0; j < flow_attr->num_of_specs; 1470 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size) 1471 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++) 1472 /* same layer and same type */ 1473 if (((union ib_flow_spec *)ib_flow)->type == 1474 pdefault_rules->mandatory_not_fields[k]) 1475 goto out; 1476 1477 return i; 1478 } 1479 out: 1480 return -1; 1481 } 1482 1483 static int __mlx4_ib_create_default_rules( 1484 struct mlx4_ib_dev *mdev, 1485 struct ib_qp *qp, 1486 const struct default_rules *pdefault_rules, 1487 struct _rule_hw *mlx4_spec) { 1488 int size = 0; 1489 int i; 1490 1491 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { 1492 union ib_flow_spec ib_spec = {}; 1493 int ret; 1494 1495 switch (pdefault_rules->rules_create_list[i]) { 1496 case 0: 1497 /* no rule */ 1498 continue; 1499 case IB_FLOW_SPEC_IB: 1500 ib_spec.type = IB_FLOW_SPEC_IB; 1501 ib_spec.size = sizeof(struct ib_flow_spec_ib); 1502 1503 break; 1504 default: 1505 /* invalid rule */ 1506 return -EINVAL; 1507 } 1508 /* We must put empty rule, qpn is being ignored */ 1509 ret = parse_flow_attr(mdev->dev, 0, &ib_spec, 1510 mlx4_spec); 1511 if (ret < 0) { 1512 pr_info("invalid parsing\n"); 1513 return -EINVAL; 1514 } 1515 1516 mlx4_spec = (void *)mlx4_spec + ret; 1517 size += ret; 1518 } 1519 return size; 1520 } 1521 1522 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1523 int domain, 1524 enum mlx4_net_trans_promisc_mode flow_type, 1525 u64 *reg_id) 1526 { 1527 int ret, i; 1528 int size = 0; 1529 void *ib_flow; 1530 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 1531 struct mlx4_cmd_mailbox *mailbox; 1532 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 1533 int default_flow; 1534 1535 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) { 1536 pr_err("Invalid priority value %d\n", flow_attr->priority); 1537 return -EINVAL; 1538 } 1539 1540 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0) 1541 return -EINVAL; 1542 1543 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 1544 if (IS_ERR(mailbox)) 1545 return PTR_ERR(mailbox); 1546 ctrl = mailbox->buf; 1547 1548 ctrl->prio = cpu_to_be16(domain | flow_attr->priority); 1549 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type); 1550 ctrl->port = flow_attr->port; 1551 ctrl->qpn = cpu_to_be32(qp->qp_num); 1552 1553 ib_flow = flow_attr + 1; 1554 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 1555 /* Add default flows */ 1556 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr); 1557 if (default_flow >= 0) { 1558 ret = __mlx4_ib_create_default_rules( 1559 mdev, qp, default_table + default_flow, 1560 mailbox->buf + size); 1561 if (ret < 0) { 1562 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1563 return -EINVAL; 1564 } 1565 size += ret; 1566 } 1567 for (i = 0; i < flow_attr->num_of_specs; i++) { 1568 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow, 1569 mailbox->buf + size); 1570 if (ret < 0) { 1571 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1572 return -EINVAL; 1573 } 1574 ib_flow += ((union ib_flow_spec *) ib_flow)->size; 1575 size += ret; 1576 } 1577 1578 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR && 1579 flow_attr->num_of_specs == 1) { 1580 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1); 1581 enum ib_flow_spec_type header_spec = 1582 ((union ib_flow_spec *)(flow_attr + 1))->type; 1583 1584 if (header_spec == IB_FLOW_SPEC_ETH) 1585 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header); 1586 } 1587 1588 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0, 1589 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, 1590 MLX4_CMD_NATIVE); 1591 if (ret == -ENOMEM) 1592 pr_err("mcg table is full. Fail to register network rule.\n"); 1593 else if (ret == -ENXIO) 1594 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n"); 1595 else if (ret) 1596 pr_err("Invalid argument. Fail to register network rule.\n"); 1597 1598 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1599 return ret; 1600 } 1601 1602 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id) 1603 { 1604 int err; 1605 err = mlx4_cmd(dev, reg_id, 0, 0, 1606 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, 1607 MLX4_CMD_NATIVE); 1608 if (err) 1609 pr_err("Fail to detach network rule. registration id = 0x%llx\n", 1610 reg_id); 1611 return err; 1612 } 1613 1614 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1615 u64 *reg_id) 1616 { 1617 void *ib_flow; 1618 union ib_flow_spec *ib_spec; 1619 struct mlx4_dev *dev = to_mdev(qp->device)->dev; 1620 int err = 0; 1621 1622 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 1623 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 1624 return 0; /* do nothing */ 1625 1626 ib_flow = flow_attr + 1; 1627 ib_spec = (union ib_flow_spec *)ib_flow; 1628 1629 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1) 1630 return 0; /* do nothing */ 1631 1632 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac, 1633 flow_attr->port, qp->qp_num, 1634 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff), 1635 reg_id); 1636 return err; 1637 } 1638 1639 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev, 1640 struct ib_flow_attr *flow_attr, 1641 enum mlx4_net_trans_promisc_mode *type) 1642 { 1643 int err = 0; 1644 1645 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) || 1646 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) || 1647 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) { 1648 return -EOPNOTSUPP; 1649 } 1650 1651 if (flow_attr->num_of_specs == 0) { 1652 type[0] = MLX4_FS_MC_SNIFFER; 1653 type[1] = MLX4_FS_UC_SNIFFER; 1654 } else { 1655 union ib_flow_spec *ib_spec; 1656 1657 ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1658 if (ib_spec->type != IB_FLOW_SPEC_ETH) 1659 return -EINVAL; 1660 1661 /* if all is zero than MC and UC */ 1662 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) { 1663 type[0] = MLX4_FS_MC_SNIFFER; 1664 type[1] = MLX4_FS_UC_SNIFFER; 1665 } else { 1666 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01, 1667 ib_spec->eth.mask.dst_mac[1], 1668 ib_spec->eth.mask.dst_mac[2], 1669 ib_spec->eth.mask.dst_mac[3], 1670 ib_spec->eth.mask.dst_mac[4], 1671 ib_spec->eth.mask.dst_mac[5]}; 1672 1673 /* Above xor was only on MC bit, non empty mask is valid 1674 * only if this bit is set and rest are zero. 1675 */ 1676 if (!is_zero_ether_addr(&mac[0])) 1677 return -EINVAL; 1678 1679 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac)) 1680 type[0] = MLX4_FS_MC_SNIFFER; 1681 else 1682 type[0] = MLX4_FS_UC_SNIFFER; 1683 } 1684 } 1685 1686 return err; 1687 } 1688 1689 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp, 1690 struct ib_flow_attr *flow_attr, 1691 struct ib_udata *udata) 1692 { 1693 int err = 0, i = 0, j = 0; 1694 struct mlx4_ib_flow *mflow; 1695 enum mlx4_net_trans_promisc_mode type[2]; 1696 struct mlx4_dev *dev = (to_mdev(qp->device))->dev; 1697 int is_bonded = mlx4_is_bonded(dev); 1698 1699 if (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP) 1700 return ERR_PTR(-EOPNOTSUPP); 1701 1702 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) && 1703 (flow_attr->type != IB_FLOW_ATTR_NORMAL)) 1704 return ERR_PTR(-EOPNOTSUPP); 1705 1706 if (udata && 1707 udata->inlen && !ib_is_udata_cleared(udata, 0, udata->inlen)) 1708 return ERR_PTR(-EOPNOTSUPP); 1709 1710 memset(type, 0, sizeof(type)); 1711 1712 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL); 1713 if (!mflow) { 1714 err = -ENOMEM; 1715 goto err_free; 1716 } 1717 1718 switch (flow_attr->type) { 1719 case IB_FLOW_ATTR_NORMAL: 1720 /* If dont trap flag (continue match) is set, under specific 1721 * condition traffic be replicated to given qp, 1722 * without stealing it 1723 */ 1724 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) { 1725 err = mlx4_ib_add_dont_trap_rule(dev, 1726 flow_attr, 1727 type); 1728 if (err) 1729 goto err_free; 1730 } else { 1731 type[0] = MLX4_FS_REGULAR; 1732 } 1733 break; 1734 1735 case IB_FLOW_ATTR_ALL_DEFAULT: 1736 type[0] = MLX4_FS_ALL_DEFAULT; 1737 break; 1738 1739 case IB_FLOW_ATTR_MC_DEFAULT: 1740 type[0] = MLX4_FS_MC_DEFAULT; 1741 break; 1742 1743 case IB_FLOW_ATTR_SNIFFER: 1744 type[0] = MLX4_FS_MIRROR_RX_PORT; 1745 type[1] = MLX4_FS_MIRROR_SX_PORT; 1746 break; 1747 1748 default: 1749 err = -EINVAL; 1750 goto err_free; 1751 } 1752 1753 while (i < ARRAY_SIZE(type) && type[i]) { 1754 err = __mlx4_ib_create_flow(qp, flow_attr, MLX4_DOMAIN_UVERBS, 1755 type[i], &mflow->reg_id[i].id); 1756 if (err) 1757 goto err_create_flow; 1758 if (is_bonded) { 1759 /* Application always sees one port so the mirror rule 1760 * must be on port #2 1761 */ 1762 flow_attr->port = 2; 1763 err = __mlx4_ib_create_flow(qp, flow_attr, 1764 MLX4_DOMAIN_UVERBS, type[j], 1765 &mflow->reg_id[j].mirror); 1766 flow_attr->port = 1; 1767 if (err) 1768 goto err_create_flow; 1769 j++; 1770 } 1771 1772 i++; 1773 } 1774 1775 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1776 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1777 &mflow->reg_id[i].id); 1778 if (err) 1779 goto err_create_flow; 1780 1781 if (is_bonded) { 1782 flow_attr->port = 2; 1783 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1784 &mflow->reg_id[j].mirror); 1785 flow_attr->port = 1; 1786 if (err) 1787 goto err_create_flow; 1788 j++; 1789 } 1790 /* function to create mirror rule */ 1791 i++; 1792 } 1793 1794 return &mflow->ibflow; 1795 1796 err_create_flow: 1797 while (i) { 1798 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1799 mflow->reg_id[i].id); 1800 i--; 1801 } 1802 1803 while (j) { 1804 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1805 mflow->reg_id[j].mirror); 1806 j--; 1807 } 1808 err_free: 1809 kfree(mflow); 1810 return ERR_PTR(err); 1811 } 1812 1813 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id) 1814 { 1815 int err, ret = 0; 1816 int i = 0; 1817 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device); 1818 struct mlx4_ib_flow *mflow = to_mflow(flow_id); 1819 1820 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) { 1821 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id); 1822 if (err) 1823 ret = err; 1824 if (mflow->reg_id[i].mirror) { 1825 err = __mlx4_ib_destroy_flow(mdev->dev, 1826 mflow->reg_id[i].mirror); 1827 if (err) 1828 ret = err; 1829 } 1830 i++; 1831 } 1832 1833 kfree(mflow); 1834 return ret; 1835 } 1836 1837 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1838 { 1839 int err; 1840 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1841 struct mlx4_dev *dev = mdev->dev; 1842 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1843 struct mlx4_ib_steering *ib_steering = NULL; 1844 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1845 struct mlx4_flow_reg_id reg_id; 1846 1847 if (mdev->dev->caps.steering_mode == 1848 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1849 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL); 1850 if (!ib_steering) 1851 return -ENOMEM; 1852 } 1853 1854 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port, 1855 !!(mqp->flags & 1856 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1857 prot, ®_id.id); 1858 if (err) { 1859 pr_err("multicast attach op failed, err %d\n", err); 1860 goto err_malloc; 1861 } 1862 1863 reg_id.mirror = 0; 1864 if (mlx4_is_bonded(dev)) { 1865 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 1866 (mqp->port == 1) ? 2 : 1, 1867 !!(mqp->flags & 1868 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1869 prot, ®_id.mirror); 1870 if (err) 1871 goto err_add; 1872 } 1873 1874 err = add_gid_entry(ibqp, gid); 1875 if (err) 1876 goto err_add; 1877 1878 if (ib_steering) { 1879 memcpy(ib_steering->gid.raw, gid->raw, 16); 1880 ib_steering->reg_id = reg_id; 1881 mutex_lock(&mqp->mutex); 1882 list_add(&ib_steering->list, &mqp->steering_rules); 1883 mutex_unlock(&mqp->mutex); 1884 } 1885 return 0; 1886 1887 err_add: 1888 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1889 prot, reg_id.id); 1890 if (reg_id.mirror) 1891 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1892 prot, reg_id.mirror); 1893 err_malloc: 1894 kfree(ib_steering); 1895 1896 return err; 1897 } 1898 1899 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 1900 { 1901 struct mlx4_ib_gid_entry *ge; 1902 struct mlx4_ib_gid_entry *tmp; 1903 struct mlx4_ib_gid_entry *ret = NULL; 1904 1905 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 1906 if (!memcmp(raw, ge->gid.raw, 16)) { 1907 ret = ge; 1908 break; 1909 } 1910 } 1911 1912 return ret; 1913 } 1914 1915 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1916 { 1917 int err; 1918 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1919 struct mlx4_dev *dev = mdev->dev; 1920 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1921 struct net_device *ndev; 1922 struct mlx4_ib_gid_entry *ge; 1923 struct mlx4_flow_reg_id reg_id = {0, 0}; 1924 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1925 1926 if (mdev->dev->caps.steering_mode == 1927 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1928 struct mlx4_ib_steering *ib_steering; 1929 1930 mutex_lock(&mqp->mutex); 1931 list_for_each_entry(ib_steering, &mqp->steering_rules, list) { 1932 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) { 1933 list_del(&ib_steering->list); 1934 break; 1935 } 1936 } 1937 mutex_unlock(&mqp->mutex); 1938 if (&ib_steering->list == &mqp->steering_rules) { 1939 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n"); 1940 return -EINVAL; 1941 } 1942 reg_id = ib_steering->reg_id; 1943 kfree(ib_steering); 1944 } 1945 1946 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1947 prot, reg_id.id); 1948 if (err) 1949 return err; 1950 1951 if (mlx4_is_bonded(dev)) { 1952 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1953 prot, reg_id.mirror); 1954 if (err) 1955 return err; 1956 } 1957 1958 mutex_lock(&mqp->mutex); 1959 ge = find_gid_entry(mqp, gid->raw); 1960 if (ge) { 1961 spin_lock_bh(&mdev->iboe.lock); 1962 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 1963 dev_hold(ndev); 1964 spin_unlock_bh(&mdev->iboe.lock); 1965 dev_put(ndev); 1966 list_del(&ge->list); 1967 kfree(ge); 1968 } else 1969 pr_warn("could not find mgid entry\n"); 1970 1971 mutex_unlock(&mqp->mutex); 1972 1973 return 0; 1974 } 1975 1976 static int init_node_data(struct mlx4_ib_dev *dev) 1977 { 1978 struct ib_smp *in_mad = NULL; 1979 struct ib_smp *out_mad = NULL; 1980 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 1981 int err = -ENOMEM; 1982 1983 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 1984 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 1985 if (!in_mad || !out_mad) 1986 goto out; 1987 1988 ib_init_query_mad(in_mad); 1989 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 1990 if (mlx4_is_master(dev->dev)) 1991 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 1992 1993 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 1994 if (err) 1995 goto out; 1996 1997 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX); 1998 1999 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 2000 2001 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2002 if (err) 2003 goto out; 2004 2005 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); 2006 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 2007 2008 out: 2009 kfree(in_mad); 2010 kfree(out_mad); 2011 return err; 2012 } 2013 2014 static ssize_t hca_type_show(struct device *device, 2015 struct device_attribute *attr, char *buf) 2016 { 2017 struct mlx4_ib_dev *dev = 2018 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2019 2020 return sysfs_emit(buf, "MT%d\n", dev->dev->persist->pdev->device); 2021 } 2022 static DEVICE_ATTR_RO(hca_type); 2023 2024 static ssize_t hw_rev_show(struct device *device, 2025 struct device_attribute *attr, char *buf) 2026 { 2027 struct mlx4_ib_dev *dev = 2028 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2029 2030 return sysfs_emit(buf, "%x\n", dev->dev->rev_id); 2031 } 2032 static DEVICE_ATTR_RO(hw_rev); 2033 2034 static ssize_t board_id_show(struct device *device, 2035 struct device_attribute *attr, char *buf) 2036 { 2037 struct mlx4_ib_dev *dev = 2038 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev); 2039 2040 return sysfs_emit(buf, "%.*s\n", MLX4_BOARD_ID_LEN, dev->dev->board_id); 2041 } 2042 static DEVICE_ATTR_RO(board_id); 2043 2044 static struct attribute *mlx4_class_attributes[] = { 2045 &dev_attr_hw_rev.attr, 2046 &dev_attr_hca_type.attr, 2047 &dev_attr_board_id.attr, 2048 NULL 2049 }; 2050 2051 static const struct attribute_group mlx4_attr_group = { 2052 .attrs = mlx4_class_attributes, 2053 }; 2054 2055 struct diag_counter { 2056 const char *name; 2057 u32 offset; 2058 }; 2059 2060 #define DIAG_COUNTER(_name, _offset) \ 2061 { .name = #_name, .offset = _offset } 2062 2063 static const struct diag_counter diag_basic[] = { 2064 DIAG_COUNTER(rq_num_lle, 0x00), 2065 DIAG_COUNTER(sq_num_lle, 0x04), 2066 DIAG_COUNTER(rq_num_lqpoe, 0x08), 2067 DIAG_COUNTER(sq_num_lqpoe, 0x0C), 2068 DIAG_COUNTER(rq_num_lpe, 0x18), 2069 DIAG_COUNTER(sq_num_lpe, 0x1C), 2070 DIAG_COUNTER(rq_num_wrfe, 0x20), 2071 DIAG_COUNTER(sq_num_wrfe, 0x24), 2072 DIAG_COUNTER(sq_num_mwbe, 0x2C), 2073 DIAG_COUNTER(sq_num_bre, 0x34), 2074 DIAG_COUNTER(sq_num_rire, 0x44), 2075 DIAG_COUNTER(rq_num_rire, 0x48), 2076 DIAG_COUNTER(sq_num_rae, 0x4C), 2077 DIAG_COUNTER(rq_num_rae, 0x50), 2078 DIAG_COUNTER(sq_num_roe, 0x54), 2079 DIAG_COUNTER(sq_num_tree, 0x5C), 2080 DIAG_COUNTER(sq_num_rree, 0x64), 2081 DIAG_COUNTER(rq_num_rnr, 0x68), 2082 DIAG_COUNTER(sq_num_rnr, 0x6C), 2083 DIAG_COUNTER(rq_num_oos, 0x100), 2084 DIAG_COUNTER(sq_num_oos, 0x104), 2085 }; 2086 2087 static const struct diag_counter diag_ext[] = { 2088 DIAG_COUNTER(rq_num_dup, 0x130), 2089 DIAG_COUNTER(sq_num_to, 0x134), 2090 }; 2091 2092 static const struct diag_counter diag_device_only[] = { 2093 DIAG_COUNTER(num_cqovf, 0x1A0), 2094 DIAG_COUNTER(rq_num_udsdprd, 0x118), 2095 }; 2096 2097 static struct rdma_hw_stats * 2098 mlx4_ib_alloc_hw_device_stats(struct ib_device *ibdev) 2099 { 2100 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2101 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2102 2103 if (!diag[0].descs) 2104 return NULL; 2105 2106 return rdma_alloc_hw_stats_struct(diag[0].descs, diag[0].num_counters, 2107 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2108 } 2109 2110 static struct rdma_hw_stats * 2111 mlx4_ib_alloc_hw_port_stats(struct ib_device *ibdev, u32 port_num) 2112 { 2113 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2114 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2115 2116 if (!diag[1].descs) 2117 return NULL; 2118 2119 return rdma_alloc_hw_stats_struct(diag[1].descs, diag[1].num_counters, 2120 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2121 } 2122 2123 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev, 2124 struct rdma_hw_stats *stats, 2125 u32 port, int index) 2126 { 2127 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2128 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2129 u32 hw_value[ARRAY_SIZE(diag_device_only) + 2130 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {}; 2131 int ret; 2132 int i; 2133 2134 ret = mlx4_query_diag_counters(dev->dev, 2135 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS, 2136 diag[!!port].offset, hw_value, 2137 diag[!!port].num_counters, port); 2138 2139 if (ret) 2140 return ret; 2141 2142 for (i = 0; i < diag[!!port].num_counters; i++) 2143 stats->value[i] = hw_value[i]; 2144 2145 return diag[!!port].num_counters; 2146 } 2147 2148 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev, 2149 struct rdma_stat_desc **pdescs, 2150 u32 **offset, u32 *num, bool port) 2151 { 2152 u32 num_counters; 2153 2154 num_counters = ARRAY_SIZE(diag_basic); 2155 2156 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) 2157 num_counters += ARRAY_SIZE(diag_ext); 2158 2159 if (!port) 2160 num_counters += ARRAY_SIZE(diag_device_only); 2161 2162 *pdescs = kcalloc(num_counters, sizeof(struct rdma_stat_desc), 2163 GFP_KERNEL); 2164 if (!*pdescs) 2165 return -ENOMEM; 2166 2167 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL); 2168 if (!*offset) 2169 goto err; 2170 2171 *num = num_counters; 2172 2173 return 0; 2174 2175 err: 2176 kfree(*pdescs); 2177 return -ENOMEM; 2178 } 2179 2180 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev, 2181 struct rdma_stat_desc *descs, 2182 u32 *offset, bool port) 2183 { 2184 int i; 2185 int j; 2186 2187 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) { 2188 descs[i].name = diag_basic[i].name; 2189 offset[i] = diag_basic[i].offset; 2190 } 2191 2192 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) { 2193 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) { 2194 descs[j].name = diag_ext[i].name; 2195 offset[j] = diag_ext[i].offset; 2196 } 2197 } 2198 2199 if (!port) { 2200 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) { 2201 descs[j].name = diag_device_only[i].name; 2202 offset[j] = diag_device_only[i].offset; 2203 } 2204 } 2205 } 2206 2207 static const struct ib_device_ops mlx4_ib_hw_stats_ops = { 2208 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats, 2209 .alloc_hw_port_stats = mlx4_ib_alloc_hw_port_stats, 2210 .get_hw_stats = mlx4_ib_get_hw_stats, 2211 }; 2212 2213 static const struct ib_device_ops mlx4_ib_hw_stats_ops1 = { 2214 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats, 2215 .get_hw_stats = mlx4_ib_get_hw_stats, 2216 }; 2217 2218 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev) 2219 { 2220 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters; 2221 int i; 2222 int ret; 2223 bool per_port = !!(ibdev->dev->caps.flags2 & 2224 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT); 2225 2226 if (mlx4_is_slave(ibdev->dev)) 2227 return 0; 2228 2229 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2230 /* 2231 * i == 1 means we are building port counters, set a different 2232 * stats ops without port stats callback. 2233 */ 2234 if (i && !per_port) { 2235 ib_set_device_ops(&ibdev->ib_dev, 2236 &mlx4_ib_hw_stats_ops1); 2237 2238 return 0; 2239 } 2240 2241 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].descs, 2242 &diag[i].offset, 2243 &diag[i].num_counters, i); 2244 if (ret) 2245 goto err_alloc; 2246 2247 mlx4_ib_fill_diag_counters(ibdev, diag[i].descs, 2248 diag[i].offset, i); 2249 } 2250 2251 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_hw_stats_ops); 2252 2253 return 0; 2254 2255 err_alloc: 2256 if (i) { 2257 kfree(diag[i - 1].descs); 2258 kfree(diag[i - 1].offset); 2259 } 2260 2261 return ret; 2262 } 2263 2264 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev) 2265 { 2266 int i; 2267 2268 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2269 kfree(ibdev->diag_counters[i].offset); 2270 kfree(ibdev->diag_counters[i].descs); 2271 } 2272 } 2273 2274 #define MLX4_IB_INVALID_MAC ((u64)-1) 2275 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, 2276 struct net_device *dev, 2277 int port) 2278 { 2279 u64 new_smac = 0; 2280 u64 release_mac = MLX4_IB_INVALID_MAC; 2281 struct mlx4_ib_qp *qp; 2282 2283 new_smac = ether_addr_to_u64(dev->dev_addr); 2284 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac); 2285 2286 /* no need for update QP1 and mac registration in non-SRIOV */ 2287 if (!mlx4_is_mfunc(ibdev->dev)) 2288 return; 2289 2290 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); 2291 qp = ibdev->qp1_proxy[port - 1]; 2292 if (qp) { 2293 int new_smac_index; 2294 u64 old_smac; 2295 struct mlx4_update_qp_params update_params; 2296 2297 mutex_lock(&qp->mutex); 2298 old_smac = qp->pri.smac; 2299 if (new_smac == old_smac) 2300 goto unlock; 2301 2302 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); 2303 2304 if (new_smac_index < 0) 2305 goto unlock; 2306 2307 update_params.smac_index = new_smac_index; 2308 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC, 2309 &update_params)) { 2310 release_mac = new_smac; 2311 goto unlock; 2312 } 2313 /* if old port was zero, no mac was yet registered for this QP */ 2314 if (qp->pri.smac_port) 2315 release_mac = old_smac; 2316 qp->pri.smac = new_smac; 2317 qp->pri.smac_port = port; 2318 qp->pri.smac_index = new_smac_index; 2319 } 2320 2321 unlock: 2322 if (release_mac != MLX4_IB_INVALID_MAC) 2323 mlx4_unregister_mac(ibdev->dev, port, release_mac); 2324 if (qp) 2325 mutex_unlock(&qp->mutex); 2326 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); 2327 } 2328 2329 static void mlx4_ib_scan_netdev(struct mlx4_ib_dev *ibdev, 2330 struct net_device *dev, 2331 unsigned long event) 2332 2333 { 2334 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 2335 2336 ASSERT_RTNL(); 2337 2338 if (dev->dev.parent != ibdev->ib_dev.dev.parent) 2339 return; 2340 2341 spin_lock_bh(&iboe->lock); 2342 2343 iboe->netdevs[dev->dev_port] = event != NETDEV_UNREGISTER ? dev : NULL; 2344 2345 if (event == NETDEV_UP || event == NETDEV_DOWN) { 2346 enum ib_port_state port_state; 2347 struct ib_event ibev = { }; 2348 2349 if (ib_get_cached_port_state(&ibdev->ib_dev, dev->dev_port + 1, 2350 &port_state)) 2351 goto iboe_out; 2352 2353 if (event == NETDEV_UP && 2354 (port_state != IB_PORT_ACTIVE || 2355 iboe->last_port_state[dev->dev_port] != IB_PORT_DOWN)) 2356 goto iboe_out; 2357 if (event == NETDEV_DOWN && 2358 (port_state != IB_PORT_DOWN || 2359 iboe->last_port_state[dev->dev_port] != IB_PORT_ACTIVE)) 2360 goto iboe_out; 2361 iboe->last_port_state[dev->dev_port] = port_state; 2362 2363 ibev.device = &ibdev->ib_dev; 2364 ibev.element.port_num = dev->dev_port + 1; 2365 ibev.event = event == NETDEV_UP ? IB_EVENT_PORT_ACTIVE : 2366 IB_EVENT_PORT_ERR; 2367 ib_dispatch_event(&ibev); 2368 } 2369 2370 iboe_out: 2371 spin_unlock_bh(&iboe->lock); 2372 2373 if (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || 2374 event == NETDEV_UP || event == NETDEV_CHANGE) 2375 mlx4_ib_update_qps(ibdev, dev, dev->dev_port + 1); 2376 } 2377 2378 static int mlx4_ib_netdev_event(struct notifier_block *this, 2379 unsigned long event, void *ptr) 2380 { 2381 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2382 struct mlx4_ib_dev *ibdev; 2383 2384 if (!net_eq(dev_net(dev), &init_net)) 2385 return NOTIFY_DONE; 2386 2387 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 2388 mlx4_ib_scan_netdev(ibdev, dev, event); 2389 2390 return NOTIFY_DONE; 2391 } 2392 2393 static void init_pkeys(struct mlx4_ib_dev *ibdev) 2394 { 2395 int port; 2396 int slave; 2397 int i; 2398 2399 if (mlx4_is_master(ibdev->dev)) { 2400 for (slave = 0; slave <= ibdev->dev->persist->num_vfs; 2401 ++slave) { 2402 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2403 for (i = 0; 2404 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2405 ++i) { 2406 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] = 2407 /* master has the identity virt2phys pkey mapping */ 2408 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i : 2409 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1; 2410 mlx4_sync_pkey_table(ibdev->dev, slave, port, i, 2411 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]); 2412 } 2413 } 2414 } 2415 /* initialize pkey cache */ 2416 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2417 for (i = 0; 2418 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2419 ++i) 2420 ibdev->pkeys.phys_pkey_cache[port-1][i] = 2421 (i) ? 0 : 0xFFFF; 2422 } 2423 } 2424 } 2425 2426 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2427 { 2428 int i, j, eq = 0, total_eqs = 0; 2429 2430 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors, 2431 sizeof(ibdev->eq_table[0]), GFP_KERNEL); 2432 if (!ibdev->eq_table) 2433 return; 2434 2435 for (i = 1; i <= dev->caps.num_ports; i++) { 2436 for (j = 0; j < mlx4_get_eqs_per_port(dev, i); 2437 j++, total_eqs++) { 2438 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs)) 2439 continue; 2440 ibdev->eq_table[eq] = total_eqs; 2441 if (!mlx4_assign_eq(dev, i, 2442 &ibdev->eq_table[eq])) 2443 eq++; 2444 else 2445 ibdev->eq_table[eq] = -1; 2446 } 2447 } 2448 2449 for (i = eq; i < dev->caps.num_comp_vectors; 2450 ibdev->eq_table[i++] = -1) 2451 ; 2452 2453 /* Advertise the new number of EQs to clients */ 2454 ibdev->ib_dev.num_comp_vectors = eq; 2455 } 2456 2457 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2458 { 2459 int i; 2460 int total_eqs = ibdev->ib_dev.num_comp_vectors; 2461 2462 /* no eqs were allocated */ 2463 if (!ibdev->eq_table) 2464 return; 2465 2466 /* Reset the advertised EQ number */ 2467 ibdev->ib_dev.num_comp_vectors = 0; 2468 2469 for (i = 0; i < total_eqs; i++) 2470 mlx4_release_eq(dev, ibdev->eq_table[i]); 2471 2472 kfree(ibdev->eq_table); 2473 ibdev->eq_table = NULL; 2474 } 2475 2476 static int mlx4_port_immutable(struct ib_device *ibdev, u32 port_num, 2477 struct ib_port_immutable *immutable) 2478 { 2479 struct ib_port_attr attr; 2480 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 2481 int err; 2482 2483 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) { 2484 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 2485 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2486 } else { 2487 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) 2488 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; 2489 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 2490 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE | 2491 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2492 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET; 2493 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE | 2494 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP)) 2495 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2496 } 2497 2498 err = ib_query_port(ibdev, port_num, &attr); 2499 if (err) 2500 return err; 2501 2502 immutable->pkey_tbl_len = attr.pkey_tbl_len; 2503 immutable->gid_tbl_len = attr.gid_tbl_len; 2504 2505 return 0; 2506 } 2507 2508 static void get_fw_ver_str(struct ib_device *device, char *str) 2509 { 2510 struct mlx4_ib_dev *dev = 2511 container_of(device, struct mlx4_ib_dev, ib_dev); 2512 snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d", 2513 (int) (dev->dev->caps.fw_ver >> 32), 2514 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, 2515 (int) dev->dev->caps.fw_ver & 0xffff); 2516 } 2517 2518 static const struct ib_device_ops mlx4_ib_dev_ops = { 2519 .owner = THIS_MODULE, 2520 .driver_id = RDMA_DRIVER_MLX4, 2521 .uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION, 2522 2523 .add_gid = mlx4_ib_add_gid, 2524 .alloc_mr = mlx4_ib_alloc_mr, 2525 .alloc_pd = mlx4_ib_alloc_pd, 2526 .alloc_ucontext = mlx4_ib_alloc_ucontext, 2527 .attach_mcast = mlx4_ib_mcg_attach, 2528 .create_ah = mlx4_ib_create_ah, 2529 .create_cq = mlx4_ib_create_cq, 2530 .create_qp = mlx4_ib_create_qp, 2531 .create_srq = mlx4_ib_create_srq, 2532 .dealloc_pd = mlx4_ib_dealloc_pd, 2533 .dealloc_ucontext = mlx4_ib_dealloc_ucontext, 2534 .del_gid = mlx4_ib_del_gid, 2535 .dereg_mr = mlx4_ib_dereg_mr, 2536 .destroy_ah = mlx4_ib_destroy_ah, 2537 .destroy_cq = mlx4_ib_destroy_cq, 2538 .destroy_qp = mlx4_ib_destroy_qp, 2539 .destroy_srq = mlx4_ib_destroy_srq, 2540 .detach_mcast = mlx4_ib_mcg_detach, 2541 .device_group = &mlx4_attr_group, 2542 .disassociate_ucontext = mlx4_ib_disassociate_ucontext, 2543 .drain_rq = mlx4_ib_drain_rq, 2544 .drain_sq = mlx4_ib_drain_sq, 2545 .get_dev_fw_str = get_fw_ver_str, 2546 .get_dma_mr = mlx4_ib_get_dma_mr, 2547 .get_link_layer = mlx4_ib_port_link_layer, 2548 .get_netdev = mlx4_ib_get_netdev, 2549 .get_port_immutable = mlx4_port_immutable, 2550 .map_mr_sg = mlx4_ib_map_mr_sg, 2551 .mmap = mlx4_ib_mmap, 2552 .modify_cq = mlx4_ib_modify_cq, 2553 .modify_device = mlx4_ib_modify_device, 2554 .modify_port = mlx4_ib_modify_port, 2555 .modify_qp = mlx4_ib_modify_qp, 2556 .modify_srq = mlx4_ib_modify_srq, 2557 .poll_cq = mlx4_ib_poll_cq, 2558 .post_recv = mlx4_ib_post_recv, 2559 .post_send = mlx4_ib_post_send, 2560 .post_srq_recv = mlx4_ib_post_srq_recv, 2561 .process_mad = mlx4_ib_process_mad, 2562 .query_ah = mlx4_ib_query_ah, 2563 .query_device = mlx4_ib_query_device, 2564 .query_gid = mlx4_ib_query_gid, 2565 .query_pkey = mlx4_ib_query_pkey, 2566 .query_port = mlx4_ib_query_port, 2567 .query_qp = mlx4_ib_query_qp, 2568 .query_srq = mlx4_ib_query_srq, 2569 .reg_user_mr = mlx4_ib_reg_user_mr, 2570 .req_notify_cq = mlx4_ib_arm_cq, 2571 .rereg_user_mr = mlx4_ib_rereg_user_mr, 2572 .resize_cq = mlx4_ib_resize_cq, 2573 2574 INIT_RDMA_OBJ_SIZE(ib_ah, mlx4_ib_ah, ibah), 2575 INIT_RDMA_OBJ_SIZE(ib_cq, mlx4_ib_cq, ibcq), 2576 INIT_RDMA_OBJ_SIZE(ib_pd, mlx4_ib_pd, ibpd), 2577 INIT_RDMA_OBJ_SIZE(ib_qp, mlx4_ib_qp, ibqp), 2578 INIT_RDMA_OBJ_SIZE(ib_srq, mlx4_ib_srq, ibsrq), 2579 INIT_RDMA_OBJ_SIZE(ib_ucontext, mlx4_ib_ucontext, ibucontext), 2580 }; 2581 2582 static const struct ib_device_ops mlx4_ib_dev_wq_ops = { 2583 .create_rwq_ind_table = mlx4_ib_create_rwq_ind_table, 2584 .create_wq = mlx4_ib_create_wq, 2585 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table, 2586 .destroy_wq = mlx4_ib_destroy_wq, 2587 .modify_wq = mlx4_ib_modify_wq, 2588 2589 INIT_RDMA_OBJ_SIZE(ib_rwq_ind_table, mlx4_ib_rwq_ind_table, 2590 ib_rwq_ind_tbl), 2591 }; 2592 2593 static const struct ib_device_ops mlx4_ib_dev_mw_ops = { 2594 .alloc_mw = mlx4_ib_alloc_mw, 2595 .dealloc_mw = mlx4_ib_dealloc_mw, 2596 2597 INIT_RDMA_OBJ_SIZE(ib_mw, mlx4_ib_mw, ibmw), 2598 }; 2599 2600 static const struct ib_device_ops mlx4_ib_dev_xrc_ops = { 2601 .alloc_xrcd = mlx4_ib_alloc_xrcd, 2602 .dealloc_xrcd = mlx4_ib_dealloc_xrcd, 2603 2604 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx4_ib_xrcd, ibxrcd), 2605 }; 2606 2607 static const struct ib_device_ops mlx4_ib_dev_fs_ops = { 2608 .create_flow = mlx4_ib_create_flow, 2609 .destroy_flow = mlx4_ib_destroy_flow, 2610 }; 2611 2612 static int mlx4_ib_probe(struct auxiliary_device *adev, 2613 const struct auxiliary_device_id *id) 2614 { 2615 struct mlx4_adev *madev = container_of(adev, struct mlx4_adev, adev); 2616 struct mlx4_dev *dev = madev->mdev; 2617 struct mlx4_ib_dev *ibdev; 2618 int num_ports = 0; 2619 int i, j; 2620 int err; 2621 struct mlx4_ib_iboe *iboe; 2622 int ib_num_ports = 0; 2623 int num_req_counters; 2624 int allocated; 2625 u32 counter_index; 2626 struct counter_index *new_counter_index = NULL; 2627 2628 pr_info_once("%s", mlx4_ib_version); 2629 2630 num_ports = 0; 2631 mlx4_foreach_ib_transport_port(i, dev) 2632 num_ports++; 2633 2634 /* No point in registering a device with no ports... */ 2635 if (num_ports == 0) 2636 return -ENODEV; 2637 2638 ibdev = ib_alloc_device(mlx4_ib_dev, ib_dev); 2639 if (!ibdev) { 2640 dev_err(&dev->persist->pdev->dev, 2641 "Device struct alloc failed\n"); 2642 return -ENOMEM; 2643 } 2644 2645 iboe = &ibdev->iboe; 2646 2647 err = mlx4_pd_alloc(dev, &ibdev->priv_pdn); 2648 if (err) 2649 goto err_dealloc; 2650 2651 err = mlx4_uar_alloc(dev, &ibdev->priv_uar); 2652 if (err) 2653 goto err_pd; 2654 2655 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, 2656 PAGE_SIZE); 2657 if (!ibdev->uar_map) { 2658 err = -ENOMEM; 2659 goto err_uar; 2660 } 2661 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 2662 2663 ibdev->dev = dev; 2664 ibdev->bond_next_port = 0; 2665 2666 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA; 2667 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; 2668 ibdev->num_ports = num_ports; 2669 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ? 2670 1 : ibdev->num_ports; 2671 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; 2672 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev; 2673 2674 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops); 2675 2676 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) && 2677 ((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) == 2678 IB_LINK_LAYER_ETHERNET) || 2679 (mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) == 2680 IB_LINK_LAYER_ETHERNET))) 2681 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops); 2682 2683 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || 2684 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) 2685 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops); 2686 2687 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 2688 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops); 2689 } 2690 2691 if (check_flow_steering_support(dev)) { 2692 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED; 2693 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops); 2694 } 2695 2696 if (!dev->caps.userspace_caps) 2697 ibdev->ib_dev.ops.uverbs_abi_ver = 2698 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION; 2699 2700 mlx4_ib_alloc_eqs(dev, ibdev); 2701 2702 spin_lock_init(&iboe->lock); 2703 2704 err = init_node_data(ibdev); 2705 if (err) 2706 goto err_map; 2707 mlx4_init_sl2vl_tbl(ibdev); 2708 2709 for (i = 0; i < ibdev->num_ports; ++i) { 2710 mutex_init(&ibdev->counters_table[i].mutex); 2711 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list); 2712 iboe->last_port_state[i] = IB_PORT_DOWN; 2713 } 2714 2715 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports; 2716 for (i = 0; i < num_req_counters; ++i) { 2717 mutex_init(&ibdev->qp1_proxy_lock[i]); 2718 allocated = 0; 2719 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == 2720 IB_LINK_LAYER_ETHERNET) { 2721 err = mlx4_counter_alloc(ibdev->dev, &counter_index, 2722 MLX4_RES_USAGE_DRIVER); 2723 /* if failed to allocate a new counter, use default */ 2724 if (err) 2725 counter_index = 2726 mlx4_get_default_counter_index(dev, 2727 i + 1); 2728 else 2729 allocated = 1; 2730 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */ 2731 counter_index = mlx4_get_default_counter_index(dev, 2732 i + 1); 2733 } 2734 new_counter_index = kmalloc(sizeof(*new_counter_index), 2735 GFP_KERNEL); 2736 if (!new_counter_index) { 2737 err = -ENOMEM; 2738 if (allocated) 2739 mlx4_counter_free(ibdev->dev, counter_index); 2740 goto err_counter; 2741 } 2742 new_counter_index->index = counter_index; 2743 new_counter_index->allocated = allocated; 2744 list_add_tail(&new_counter_index->list, 2745 &ibdev->counters_table[i].counters_list); 2746 ibdev->counters_table[i].default_counter = counter_index; 2747 pr_info("counter index %d for port %d allocated %d\n", 2748 counter_index, i + 1, allocated); 2749 } 2750 if (mlx4_is_bonded(dev)) 2751 for (i = 1; i < ibdev->num_ports ; ++i) { 2752 new_counter_index = 2753 kmalloc(sizeof(struct counter_index), 2754 GFP_KERNEL); 2755 if (!new_counter_index) { 2756 err = -ENOMEM; 2757 goto err_counter; 2758 } 2759 new_counter_index->index = counter_index; 2760 new_counter_index->allocated = 0; 2761 list_add_tail(&new_counter_index->list, 2762 &ibdev->counters_table[i].counters_list); 2763 ibdev->counters_table[i].default_counter = 2764 counter_index; 2765 } 2766 2767 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2768 ib_num_ports++; 2769 2770 spin_lock_init(&ibdev->sm_lock); 2771 mutex_init(&ibdev->cap_mask_mutex); 2772 INIT_LIST_HEAD(&ibdev->qp_list); 2773 spin_lock_init(&ibdev->reset_flow_resource_lock); 2774 2775 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED && 2776 ib_num_ports) { 2777 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS; 2778 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count, 2779 MLX4_IB_UC_STEER_QPN_ALIGN, 2780 &ibdev->steer_qpn_base, 0, 2781 MLX4_RES_USAGE_DRIVER); 2782 if (err) 2783 goto err_counter; 2784 2785 ibdev->ib_uc_qpns_bitmap = bitmap_alloc(ibdev->steer_qpn_count, 2786 GFP_KERNEL); 2787 if (!ibdev->ib_uc_qpns_bitmap) { 2788 err = -ENOMEM; 2789 goto err_steer_qp_release; 2790 } 2791 2792 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) { 2793 bitmap_zero(ibdev->ib_uc_qpns_bitmap, 2794 ibdev->steer_qpn_count); 2795 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE( 2796 dev, ibdev->steer_qpn_base, 2797 ibdev->steer_qpn_base + 2798 ibdev->steer_qpn_count - 1); 2799 if (err) 2800 goto err_steer_free_bitmap; 2801 } else { 2802 bitmap_fill(ibdev->ib_uc_qpns_bitmap, 2803 ibdev->steer_qpn_count); 2804 } 2805 } 2806 2807 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) 2808 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); 2809 2810 err = mlx4_ib_alloc_diag_counters(ibdev); 2811 if (err) 2812 goto err_steer_free_bitmap; 2813 2814 err = ib_register_device(&ibdev->ib_dev, "mlx4_%d", 2815 &dev->persist->pdev->dev); 2816 if (err) 2817 goto err_diag_counters; 2818 2819 err = mlx4_ib_mad_init(ibdev); 2820 if (err) 2821 goto err_reg; 2822 2823 err = mlx4_ib_init_sriov(ibdev); 2824 if (err) 2825 goto err_mad; 2826 2827 if (!iboe->nb.notifier_call) { 2828 iboe->nb.notifier_call = mlx4_ib_netdev_event; 2829 err = register_netdevice_notifier(&iboe->nb); 2830 if (err) { 2831 iboe->nb.notifier_call = NULL; 2832 goto err_notif; 2833 } 2834 } 2835 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2836 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT); 2837 if (err) 2838 goto err_notif; 2839 } 2840 2841 ibdev->ib_active = true; 2842 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2843 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i), 2844 &ibdev->ib_dev); 2845 2846 if (mlx4_is_mfunc(ibdev->dev)) 2847 init_pkeys(ibdev); 2848 2849 /* create paravirt contexts for any VFs which are active */ 2850 if (mlx4_is_master(ibdev->dev)) { 2851 for (j = 0; j < MLX4_MFUNC_MAX; j++) { 2852 if (j == mlx4_master_func_num(ibdev->dev)) 2853 continue; 2854 if (mlx4_is_slave_active(ibdev->dev, j)) 2855 do_slave_init(ibdev, j, 1); 2856 } 2857 } 2858 2859 /* register mlx4 core notifier */ 2860 ibdev->mlx_nb.notifier_call = mlx4_ib_event; 2861 err = mlx4_register_event_notifier(dev, &ibdev->mlx_nb); 2862 WARN(err, "failed to register mlx4 event notifier (%d)", err); 2863 2864 auxiliary_set_drvdata(adev, ibdev); 2865 return 0; 2866 2867 err_notif: 2868 if (ibdev->iboe.nb.notifier_call) { 2869 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2870 pr_warn("failure unregistering notifier\n"); 2871 ibdev->iboe.nb.notifier_call = NULL; 2872 } 2873 flush_workqueue(wq); 2874 2875 mlx4_ib_close_sriov(ibdev); 2876 2877 err_mad: 2878 mlx4_ib_mad_cleanup(ibdev); 2879 2880 err_reg: 2881 ib_unregister_device(&ibdev->ib_dev); 2882 2883 err_diag_counters: 2884 mlx4_ib_diag_cleanup(ibdev); 2885 2886 err_steer_free_bitmap: 2887 bitmap_free(ibdev->ib_uc_qpns_bitmap); 2888 2889 err_steer_qp_release: 2890 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2891 ibdev->steer_qpn_count); 2892 err_counter: 2893 for (i = 0; i < ibdev->num_ports; ++i) 2894 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]); 2895 2896 err_map: 2897 mlx4_ib_free_eqs(dev, ibdev); 2898 iounmap(ibdev->uar_map); 2899 2900 err_uar: 2901 mlx4_uar_free(dev, &ibdev->priv_uar); 2902 2903 err_pd: 2904 mlx4_pd_free(dev, ibdev->priv_pdn); 2905 2906 err_dealloc: 2907 ib_dealloc_device(&ibdev->ib_dev); 2908 2909 return err; 2910 } 2911 2912 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn) 2913 { 2914 int offset; 2915 2916 WARN_ON(!dev->ib_uc_qpns_bitmap); 2917 2918 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap, 2919 dev->steer_qpn_count, 2920 get_count_order(count)); 2921 if (offset < 0) 2922 return offset; 2923 2924 *qpn = dev->steer_qpn_base + offset; 2925 return 0; 2926 } 2927 2928 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count) 2929 { 2930 if (!qpn || 2931 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED) 2932 return; 2933 2934 if (WARN(qpn < dev->steer_qpn_base, "qpn = %u, steer_qpn_base = %u\n", 2935 qpn, dev->steer_qpn_base)) 2936 /* not supposed to be here */ 2937 return; 2938 2939 bitmap_release_region(dev->ib_uc_qpns_bitmap, 2940 qpn - dev->steer_qpn_base, 2941 get_count_order(count)); 2942 } 2943 2944 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 2945 int is_attach) 2946 { 2947 int err; 2948 size_t flow_size; 2949 struct ib_flow_attr *flow = NULL; 2950 struct ib_flow_spec_ib *ib_spec; 2951 2952 if (is_attach) { 2953 flow_size = sizeof(struct ib_flow_attr) + 2954 sizeof(struct ib_flow_spec_ib); 2955 flow = kzalloc(flow_size, GFP_KERNEL); 2956 if (!flow) 2957 return -ENOMEM; 2958 flow->port = mqp->port; 2959 flow->num_of_specs = 1; 2960 flow->size = flow_size; 2961 ib_spec = (struct ib_flow_spec_ib *)(flow + 1); 2962 ib_spec->type = IB_FLOW_SPEC_IB; 2963 ib_spec->size = sizeof(struct ib_flow_spec_ib); 2964 /* Add an empty rule for IB L2 */ 2965 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask)); 2966 2967 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, MLX4_DOMAIN_NIC, 2968 MLX4_FS_REGULAR, &mqp->reg_id); 2969 } else { 2970 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id); 2971 } 2972 kfree(flow); 2973 return err; 2974 } 2975 2976 static void mlx4_ib_remove(struct auxiliary_device *adev) 2977 { 2978 struct mlx4_adev *madev = container_of(adev, struct mlx4_adev, adev); 2979 struct mlx4_dev *dev = madev->mdev; 2980 struct mlx4_ib_dev *ibdev = auxiliary_get_drvdata(adev); 2981 int p; 2982 int i; 2983 2984 mlx4_unregister_event_notifier(dev, &ibdev->mlx_nb); 2985 2986 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2987 devlink_port_type_clear(mlx4_get_devlink_port(dev, i)); 2988 ibdev->ib_active = false; 2989 flush_workqueue(wq); 2990 2991 if (ibdev->iboe.nb.notifier_call) { 2992 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2993 pr_warn("failure unregistering notifier\n"); 2994 ibdev->iboe.nb.notifier_call = NULL; 2995 } 2996 2997 mlx4_ib_close_sriov(ibdev); 2998 mlx4_ib_mad_cleanup(ibdev); 2999 ib_unregister_device(&ibdev->ib_dev); 3000 mlx4_ib_diag_cleanup(ibdev); 3001 3002 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 3003 ibdev->steer_qpn_count); 3004 bitmap_free(ibdev->ib_uc_qpns_bitmap); 3005 3006 iounmap(ibdev->uar_map); 3007 for (p = 0; p < ibdev->num_ports; ++p) 3008 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]); 3009 3010 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 3011 mlx4_CLOSE_PORT(dev, p); 3012 3013 mlx4_ib_free_eqs(dev, ibdev); 3014 3015 mlx4_uar_free(dev, &ibdev->priv_uar); 3016 mlx4_pd_free(dev, ibdev->priv_pdn); 3017 ib_dealloc_device(&ibdev->ib_dev); 3018 } 3019 3020 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init) 3021 { 3022 struct mlx4_ib_demux_work **dm = NULL; 3023 struct mlx4_dev *dev = ibdev->dev; 3024 int i; 3025 unsigned long flags; 3026 struct mlx4_active_ports actv_ports; 3027 unsigned int ports; 3028 unsigned int first_port; 3029 3030 if (!mlx4_is_master(dev)) 3031 return; 3032 3033 actv_ports = mlx4_get_active_ports(dev, slave); 3034 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); 3035 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); 3036 3037 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC); 3038 if (!dm) 3039 return; 3040 3041 for (i = 0; i < ports; i++) { 3042 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC); 3043 if (!dm[i]) { 3044 while (--i >= 0) 3045 kfree(dm[i]); 3046 goto out; 3047 } 3048 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work); 3049 dm[i]->port = first_port + i + 1; 3050 dm[i]->slave = slave; 3051 dm[i]->do_init = do_init; 3052 dm[i]->dev = ibdev; 3053 } 3054 /* initialize or tear down tunnel QPs for the slave */ 3055 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags); 3056 if (!ibdev->sriov.is_going_down) { 3057 for (i = 0; i < ports; i++) 3058 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work); 3059 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3060 } else { 3061 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3062 for (i = 0; i < ports; i++) 3063 kfree(dm[i]); 3064 } 3065 out: 3066 kfree(dm); 3067 return; 3068 } 3069 3070 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev) 3071 { 3072 struct mlx4_ib_qp *mqp; 3073 unsigned long flags_qp; 3074 unsigned long flags_cq; 3075 struct mlx4_ib_cq *send_mcq, *recv_mcq; 3076 struct list_head cq_notify_list; 3077 struct mlx4_cq *mcq; 3078 unsigned long flags; 3079 3080 pr_warn("mlx4_ib_handle_catas_error was started\n"); 3081 INIT_LIST_HEAD(&cq_notify_list); 3082 3083 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 3084 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 3085 3086 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 3087 spin_lock_irqsave(&mqp->sq.lock, flags_qp); 3088 if (mqp->sq.tail != mqp->sq.head) { 3089 send_mcq = to_mcq(mqp->ibqp.send_cq); 3090 spin_lock_irqsave(&send_mcq->lock, flags_cq); 3091 if (send_mcq->mcq.comp && 3092 mqp->ibqp.send_cq->comp_handler) { 3093 if (!send_mcq->mcq.reset_notify_added) { 3094 send_mcq->mcq.reset_notify_added = 1; 3095 list_add_tail(&send_mcq->mcq.reset_notify, 3096 &cq_notify_list); 3097 } 3098 } 3099 spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 3100 } 3101 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 3102 /* Now, handle the QP's receive queue */ 3103 spin_lock_irqsave(&mqp->rq.lock, flags_qp); 3104 /* no handling is needed for SRQ */ 3105 if (!mqp->ibqp.srq) { 3106 if (mqp->rq.tail != mqp->rq.head) { 3107 recv_mcq = to_mcq(mqp->ibqp.recv_cq); 3108 spin_lock_irqsave(&recv_mcq->lock, flags_cq); 3109 if (recv_mcq->mcq.comp && 3110 mqp->ibqp.recv_cq->comp_handler) { 3111 if (!recv_mcq->mcq.reset_notify_added) { 3112 recv_mcq->mcq.reset_notify_added = 1; 3113 list_add_tail(&recv_mcq->mcq.reset_notify, 3114 &cq_notify_list); 3115 } 3116 } 3117 spin_unlock_irqrestore(&recv_mcq->lock, 3118 flags_cq); 3119 } 3120 } 3121 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 3122 } 3123 3124 list_for_each_entry(mcq, &cq_notify_list, reset_notify) { 3125 mcq->comp(mcq); 3126 } 3127 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 3128 pr_warn("mlx4_ib_handle_catas_error ended\n"); 3129 } 3130 3131 static void handle_bonded_port_state_event(struct work_struct *work) 3132 { 3133 struct ib_event_work *ew = 3134 container_of(work, struct ib_event_work, work); 3135 struct mlx4_ib_dev *ibdev = ew->ib_dev; 3136 enum ib_port_state bonded_port_state = IB_PORT_NOP; 3137 int i; 3138 struct ib_event ibev; 3139 3140 kfree(ew); 3141 spin_lock_bh(&ibdev->iboe.lock); 3142 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 3143 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 3144 enum ib_port_state curr_port_state; 3145 3146 if (!curr_netdev) 3147 continue; 3148 3149 curr_port_state = 3150 (netif_running(curr_netdev) && 3151 netif_carrier_ok(curr_netdev)) ? 3152 IB_PORT_ACTIVE : IB_PORT_DOWN; 3153 3154 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ? 3155 curr_port_state : IB_PORT_ACTIVE; 3156 } 3157 spin_unlock_bh(&ibdev->iboe.lock); 3158 3159 ibev.device = &ibdev->ib_dev; 3160 ibev.element.port_num = 1; 3161 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ? 3162 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3163 3164 ib_dispatch_event(&ibev); 3165 } 3166 3167 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port) 3168 { 3169 u64 sl2vl; 3170 int err; 3171 3172 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl); 3173 if (err) { 3174 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n", 3175 port, err); 3176 sl2vl = 0; 3177 } 3178 atomic64_set(&mdev->sl2vl[port - 1], sl2vl); 3179 } 3180 3181 static void ib_sl2vl_update_work(struct work_struct *work) 3182 { 3183 struct ib_event_work *ew = container_of(work, struct ib_event_work, work); 3184 struct mlx4_ib_dev *mdev = ew->ib_dev; 3185 int port = ew->port; 3186 3187 mlx4_ib_sl2vl_update(mdev, port); 3188 3189 kfree(ew); 3190 } 3191 3192 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev, 3193 int port) 3194 { 3195 struct ib_event_work *ew; 3196 3197 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3198 if (ew) { 3199 INIT_WORK(&ew->work, ib_sl2vl_update_work); 3200 ew->port = port; 3201 ew->ib_dev = ibdev; 3202 queue_work(wq, &ew->work); 3203 } 3204 } 3205 3206 static int mlx4_ib_event(struct notifier_block *this, unsigned long event, 3207 void *param) 3208 { 3209 struct mlx4_ib_dev *ibdev = 3210 container_of(this, struct mlx4_ib_dev, mlx_nb); 3211 struct mlx4_dev *dev = ibdev->dev; 3212 struct ib_event ibev; 3213 struct mlx4_eqe *eqe = NULL; 3214 struct ib_event_work *ew; 3215 int p = 0; 3216 3217 if (mlx4_is_bonded(dev) && 3218 ((event == MLX4_DEV_EVENT_PORT_UP) || 3219 (event == MLX4_DEV_EVENT_PORT_DOWN))) { 3220 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3221 if (!ew) 3222 return NOTIFY_DONE; 3223 INIT_WORK(&ew->work, handle_bonded_port_state_event); 3224 ew->ib_dev = ibdev; 3225 queue_work(wq, &ew->work); 3226 return NOTIFY_DONE; 3227 } 3228 3229 switch (event) { 3230 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3231 break; 3232 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3233 eqe = (struct mlx4_eqe *)param; 3234 break; 3235 default: 3236 p = *(int *)param; 3237 break; 3238 } 3239 3240 switch (event) { 3241 case MLX4_DEV_EVENT_PORT_UP: 3242 if (p > ibdev->num_ports) 3243 return NOTIFY_DONE; 3244 if (!mlx4_is_slave(dev) && 3245 rdma_port_get_link_layer(&ibdev->ib_dev, p) == 3246 IB_LINK_LAYER_INFINIBAND) { 3247 if (mlx4_is_master(dev)) 3248 mlx4_ib_invalidate_all_guid_record(ibdev, p); 3249 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST && 3250 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) 3251 mlx4_sched_ib_sl2vl_update_work(ibdev, p); 3252 } 3253 ibev.event = IB_EVENT_PORT_ACTIVE; 3254 break; 3255 3256 case MLX4_DEV_EVENT_PORT_DOWN: 3257 if (p > ibdev->num_ports) 3258 return NOTIFY_DONE; 3259 ibev.event = IB_EVENT_PORT_ERR; 3260 break; 3261 3262 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3263 ibdev->ib_active = false; 3264 ibev.event = IB_EVENT_DEVICE_FATAL; 3265 mlx4_ib_handle_catas_error(ibdev); 3266 break; 3267 3268 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3269 ew = kmalloc(sizeof *ew, GFP_ATOMIC); 3270 if (!ew) 3271 return NOTIFY_DONE; 3272 3273 INIT_WORK(&ew->work, handle_port_mgmt_change_event); 3274 memcpy(&ew->ib_eqe, eqe, sizeof *eqe); 3275 ew->ib_dev = ibdev; 3276 /* need to queue only for port owner, which uses GEN_EQE */ 3277 if (mlx4_is_master(dev)) 3278 queue_work(wq, &ew->work); 3279 else 3280 handle_port_mgmt_change_event(&ew->work); 3281 return NOTIFY_DONE; 3282 3283 case MLX4_DEV_EVENT_SLAVE_INIT: 3284 /* here, p is the slave id */ 3285 do_slave_init(ibdev, p, 1); 3286 if (mlx4_is_master(dev)) { 3287 int i; 3288 3289 for (i = 1; i <= ibdev->num_ports; i++) { 3290 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3291 == IB_LINK_LAYER_INFINIBAND) 3292 mlx4_ib_slave_alias_guid_event(ibdev, 3293 p, i, 3294 1); 3295 } 3296 } 3297 return NOTIFY_DONE; 3298 3299 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 3300 if (mlx4_is_master(dev)) { 3301 int i; 3302 3303 for (i = 1; i <= ibdev->num_ports; i++) { 3304 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3305 == IB_LINK_LAYER_INFINIBAND) 3306 mlx4_ib_slave_alias_guid_event(ibdev, 3307 p, i, 3308 0); 3309 } 3310 } 3311 /* here, p is the slave id */ 3312 do_slave_init(ibdev, p, 0); 3313 return NOTIFY_DONE; 3314 3315 default: 3316 return NOTIFY_DONE; 3317 } 3318 3319 ibev.device = &ibdev->ib_dev; 3320 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p; 3321 3322 ib_dispatch_event(&ibev); 3323 return NOTIFY_DONE; 3324 } 3325 3326 static const struct auxiliary_device_id mlx4_ib_id_table[] = { 3327 { .name = MLX4_ADEV_NAME ".ib" }, 3328 {}, 3329 }; 3330 3331 MODULE_DEVICE_TABLE(auxiliary, mlx4_ib_id_table); 3332 3333 static struct mlx4_adrv mlx4_ib_adrv = { 3334 .adrv = { 3335 .name = "ib", 3336 .probe = mlx4_ib_probe, 3337 .remove = mlx4_ib_remove, 3338 .id_table = mlx4_ib_id_table, 3339 }, 3340 .protocol = MLX4_PROT_IB_IPV6, 3341 .flags = MLX4_INTFF_BONDING 3342 }; 3343 3344 static int __init mlx4_ib_init(void) 3345 { 3346 int err; 3347 3348 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM); 3349 if (!wq) 3350 return -ENOMEM; 3351 3352 err = mlx4_ib_qp_event_init(); 3353 if (err) 3354 goto clean_qp_event; 3355 3356 err = mlx4_ib_cm_init(); 3357 if (err) 3358 goto clean_wq; 3359 3360 err = mlx4_ib_mcg_init(); 3361 if (err) 3362 goto clean_cm; 3363 3364 err = mlx4_register_auxiliary_driver(&mlx4_ib_adrv); 3365 if (err) 3366 goto clean_mcg; 3367 3368 return 0; 3369 3370 clean_mcg: 3371 mlx4_ib_mcg_destroy(); 3372 3373 clean_cm: 3374 mlx4_ib_cm_destroy(); 3375 3376 clean_wq: 3377 mlx4_ib_qp_event_cleanup(); 3378 3379 clean_qp_event: 3380 destroy_workqueue(wq); 3381 return err; 3382 } 3383 3384 static void __exit mlx4_ib_cleanup(void) 3385 { 3386 mlx4_unregister_auxiliary_driver(&mlx4_ib_adrv); 3387 mlx4_ib_mcg_destroy(); 3388 mlx4_ib_cm_destroy(); 3389 mlx4_ib_qp_event_cleanup(); 3390 destroy_workqueue(wq); 3391 } 3392 3393 module_init(mlx4_ib_init); 3394 module_exit(mlx4_ib_cleanup); 3395