1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/slab.h> 37 #include <linux/errno.h> 38 #include <linux/netdevice.h> 39 #include <linux/inetdevice.h> 40 #include <linux/rtnetlink.h> 41 #include <linux/if_vlan.h> 42 #include <net/ipv6.h> 43 #include <net/addrconf.h> 44 #include <net/devlink.h> 45 46 #include <rdma/ib_smi.h> 47 #include <rdma/ib_user_verbs.h> 48 #include <rdma/ib_addr.h> 49 #include <rdma/ib_cache.h> 50 51 #include <net/bonding.h> 52 53 #include <linux/mlx4/driver.h> 54 #include <linux/mlx4/cmd.h> 55 #include <linux/mlx4/qp.h> 56 57 #include "mlx4_ib.h" 58 #include <rdma/mlx4-abi.h> 59 60 #define DRV_NAME MLX4_IB_DRV_NAME 61 #define DRV_VERSION "2.2-1" 62 #define DRV_RELDATE "Feb 2014" 63 64 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF 65 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF 66 #define MLX4_IB_CARD_REV_A0 0xA0 67 68 MODULE_AUTHOR("Roland Dreier"); 69 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver"); 70 MODULE_LICENSE("Dual BSD/GPL"); 71 MODULE_VERSION(DRV_VERSION); 72 73 int mlx4_ib_sm_guid_assign = 0; 74 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444); 75 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)"); 76 77 static const char mlx4_ib_version[] = 78 DRV_NAME ": Mellanox ConnectX InfiniBand driver v" 79 DRV_VERSION " (" DRV_RELDATE ")\n"; 80 81 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init); 82 83 static struct workqueue_struct *wq; 84 85 static void init_query_mad(struct ib_smp *mad) 86 { 87 mad->base_version = 1; 88 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 89 mad->class_version = 1; 90 mad->method = IB_MGMT_METHOD_GET; 91 } 92 93 static int check_flow_steering_support(struct mlx4_dev *dev) 94 { 95 int eth_num_ports = 0; 96 int ib_num_ports = 0; 97 98 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED; 99 100 if (dmfs) { 101 int i; 102 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) 103 eth_num_ports++; 104 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 105 ib_num_ports++; 106 dmfs &= (!ib_num_ports || 107 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) && 108 (!eth_num_ports || 109 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN)); 110 if (ib_num_ports && mlx4_is_mfunc(dev)) { 111 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n"); 112 dmfs = 0; 113 } 114 } 115 return dmfs; 116 } 117 118 static int num_ib_ports(struct mlx4_dev *dev) 119 { 120 int ib_ports = 0; 121 int i; 122 123 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 124 ib_ports++; 125 126 return ib_ports; 127 } 128 129 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num) 130 { 131 struct mlx4_ib_dev *ibdev = to_mdev(device); 132 struct net_device *dev; 133 134 rcu_read_lock(); 135 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num); 136 137 if (dev) { 138 if (mlx4_is_bonded(ibdev->dev)) { 139 struct net_device *upper = NULL; 140 141 upper = netdev_master_upper_dev_get_rcu(dev); 142 if (upper) { 143 struct net_device *active; 144 145 active = bond_option_active_slave_get_rcu(netdev_priv(upper)); 146 if (active) 147 dev = active; 148 } 149 } 150 } 151 if (dev) 152 dev_hold(dev); 153 154 rcu_read_unlock(); 155 return dev; 156 } 157 158 static int mlx4_ib_update_gids_v1(struct gid_entry *gids, 159 struct mlx4_ib_dev *ibdev, 160 u8 port_num) 161 { 162 struct mlx4_cmd_mailbox *mailbox; 163 int err; 164 struct mlx4_dev *dev = ibdev->dev; 165 int i; 166 union ib_gid *gid_tbl; 167 168 mailbox = mlx4_alloc_cmd_mailbox(dev); 169 if (IS_ERR(mailbox)) 170 return -ENOMEM; 171 172 gid_tbl = mailbox->buf; 173 174 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 175 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid)); 176 177 err = mlx4_cmd(dev, mailbox->dma, 178 MLX4_SET_PORT_GID_TABLE << 8 | port_num, 179 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 180 MLX4_CMD_WRAPPED); 181 if (mlx4_is_bonded(dev)) 182 err += mlx4_cmd(dev, mailbox->dma, 183 MLX4_SET_PORT_GID_TABLE << 8 | 2, 184 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 185 MLX4_CMD_WRAPPED); 186 187 mlx4_free_cmd_mailbox(dev, mailbox); 188 return err; 189 } 190 191 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids, 192 struct mlx4_ib_dev *ibdev, 193 u8 port_num) 194 { 195 struct mlx4_cmd_mailbox *mailbox; 196 int err; 197 struct mlx4_dev *dev = ibdev->dev; 198 int i; 199 struct { 200 union ib_gid gid; 201 __be32 rsrvd1[2]; 202 __be16 rsrvd2; 203 u8 type; 204 u8 version; 205 __be32 rsrvd3; 206 } *gid_tbl; 207 208 mailbox = mlx4_alloc_cmd_mailbox(dev); 209 if (IS_ERR(mailbox)) 210 return -ENOMEM; 211 212 gid_tbl = mailbox->buf; 213 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 214 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid)); 215 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) { 216 gid_tbl[i].version = 2; 217 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid)) 218 gid_tbl[i].type = 1; 219 else 220 memset(&gid_tbl[i].gid, 0, 12); 221 } 222 } 223 224 err = mlx4_cmd(dev, mailbox->dma, 225 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num, 226 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 227 MLX4_CMD_WRAPPED); 228 if (mlx4_is_bonded(dev)) 229 err += mlx4_cmd(dev, mailbox->dma, 230 MLX4_SET_PORT_ROCE_ADDR << 8 | 2, 231 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 232 MLX4_CMD_WRAPPED); 233 234 mlx4_free_cmd_mailbox(dev, mailbox); 235 return err; 236 } 237 238 static int mlx4_ib_update_gids(struct gid_entry *gids, 239 struct mlx4_ib_dev *ibdev, 240 u8 port_num) 241 { 242 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 243 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num); 244 245 return mlx4_ib_update_gids_v1(gids, ibdev, port_num); 246 } 247 248 static int mlx4_ib_add_gid(struct ib_device *device, 249 u8 port_num, 250 unsigned int index, 251 const union ib_gid *gid, 252 const struct ib_gid_attr *attr, 253 void **context) 254 { 255 struct mlx4_ib_dev *ibdev = to_mdev(device); 256 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 257 struct mlx4_port_gid_table *port_gid_table; 258 int free = -1, found = -1; 259 int ret = 0; 260 int hw_update = 0; 261 int i; 262 struct gid_entry *gids = NULL; 263 264 if (!rdma_cap_roce_gid_table(device, port_num)) 265 return -EINVAL; 266 267 if (port_num > MLX4_MAX_PORTS) 268 return -EINVAL; 269 270 if (!context) 271 return -EINVAL; 272 273 port_gid_table = &iboe->gids[port_num - 1]; 274 spin_lock_bh(&iboe->lock); 275 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) { 276 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) && 277 (port_gid_table->gids[i].gid_type == attr->gid_type)) { 278 found = i; 279 break; 280 } 281 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid))) 282 free = i; /* HW has space */ 283 } 284 285 if (found < 0) { 286 if (free < 0) { 287 ret = -ENOSPC; 288 } else { 289 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC); 290 if (!port_gid_table->gids[free].ctx) { 291 ret = -ENOMEM; 292 } else { 293 *context = port_gid_table->gids[free].ctx; 294 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid)); 295 port_gid_table->gids[free].gid_type = attr->gid_type; 296 port_gid_table->gids[free].ctx->real_index = free; 297 port_gid_table->gids[free].ctx->refcount = 1; 298 hw_update = 1; 299 } 300 } 301 } else { 302 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx; 303 *context = ctx; 304 ctx->refcount++; 305 } 306 if (!ret && hw_update) { 307 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 308 if (!gids) { 309 ret = -ENOMEM; 310 } else { 311 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) { 312 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 313 gids[i].gid_type = port_gid_table->gids[i].gid_type; 314 } 315 } 316 } 317 spin_unlock_bh(&iboe->lock); 318 319 if (!ret && hw_update) { 320 ret = mlx4_ib_update_gids(gids, ibdev, port_num); 321 kfree(gids); 322 } 323 324 return ret; 325 } 326 327 static int mlx4_ib_del_gid(struct ib_device *device, 328 u8 port_num, 329 unsigned int index, 330 void **context) 331 { 332 struct gid_cache_context *ctx = *context; 333 struct mlx4_ib_dev *ibdev = to_mdev(device); 334 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 335 struct mlx4_port_gid_table *port_gid_table; 336 int ret = 0; 337 int hw_update = 0; 338 struct gid_entry *gids = NULL; 339 340 if (!rdma_cap_roce_gid_table(device, port_num)) 341 return -EINVAL; 342 343 if (port_num > MLX4_MAX_PORTS) 344 return -EINVAL; 345 346 port_gid_table = &iboe->gids[port_num - 1]; 347 spin_lock_bh(&iboe->lock); 348 if (ctx) { 349 ctx->refcount--; 350 if (!ctx->refcount) { 351 unsigned int real_index = ctx->real_index; 352 353 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid)); 354 kfree(port_gid_table->gids[real_index].ctx); 355 port_gid_table->gids[real_index].ctx = NULL; 356 hw_update = 1; 357 } 358 } 359 if (!ret && hw_update) { 360 int i; 361 362 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC); 363 if (!gids) { 364 ret = -ENOMEM; 365 } else { 366 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) 367 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid)); 368 } 369 } 370 spin_unlock_bh(&iboe->lock); 371 372 if (!ret && hw_update) { 373 ret = mlx4_ib_update_gids(gids, ibdev, port_num); 374 kfree(gids); 375 } 376 return ret; 377 } 378 379 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev, 380 u8 port_num, int index) 381 { 382 struct mlx4_ib_iboe *iboe = &ibdev->iboe; 383 struct gid_cache_context *ctx = NULL; 384 union ib_gid gid; 385 struct mlx4_port_gid_table *port_gid_table; 386 int real_index = -EINVAL; 387 int i; 388 int ret; 389 unsigned long flags; 390 struct ib_gid_attr attr; 391 392 if (port_num > MLX4_MAX_PORTS) 393 return -EINVAL; 394 395 if (mlx4_is_bonded(ibdev->dev)) 396 port_num = 1; 397 398 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num)) 399 return index; 400 401 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr); 402 if (ret) 403 return ret; 404 405 if (attr.ndev) 406 dev_put(attr.ndev); 407 408 if (!memcmp(&gid, &zgid, sizeof(gid))) 409 return -EINVAL; 410 411 spin_lock_irqsave(&iboe->lock, flags); 412 port_gid_table = &iboe->gids[port_num - 1]; 413 414 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) 415 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) && 416 attr.gid_type == port_gid_table->gids[i].gid_type) { 417 ctx = port_gid_table->gids[i].ctx; 418 break; 419 } 420 if (ctx) 421 real_index = ctx->real_index; 422 spin_unlock_irqrestore(&iboe->lock, flags); 423 return real_index; 424 } 425 426 static int mlx4_ib_query_device(struct ib_device *ibdev, 427 struct ib_device_attr *props, 428 struct ib_udata *uhw) 429 { 430 struct mlx4_ib_dev *dev = to_mdev(ibdev); 431 struct ib_smp *in_mad = NULL; 432 struct ib_smp *out_mad = NULL; 433 int err; 434 int have_ib_ports; 435 struct mlx4_uverbs_ex_query_device cmd; 436 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0}; 437 struct mlx4_clock_params clock_params; 438 439 if (uhw->inlen) { 440 if (uhw->inlen < sizeof(cmd)) 441 return -EINVAL; 442 443 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd)); 444 if (err) 445 return err; 446 447 if (cmd.comp_mask) 448 return -EINVAL; 449 450 if (cmd.reserved) 451 return -EINVAL; 452 } 453 454 resp.response_length = offsetof(typeof(resp), response_length) + 455 sizeof(resp.response_length); 456 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 457 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 458 err = -ENOMEM; 459 if (!in_mad || !out_mad) 460 goto out; 461 462 init_query_mad(in_mad); 463 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 464 465 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS, 466 1, NULL, NULL, in_mad, out_mad); 467 if (err) 468 goto out; 469 470 memset(props, 0, sizeof *props); 471 472 have_ib_ports = num_ib_ports(dev->dev); 473 474 props->fw_ver = dev->dev->caps.fw_ver; 475 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 476 IB_DEVICE_PORT_ACTIVE_EVENT | 477 IB_DEVICE_SYS_IMAGE_GUID | 478 IB_DEVICE_RC_RNR_NAK_GEN | 479 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 480 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR) 481 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 482 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR) 483 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 484 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports) 485 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 486 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT) 487 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 488 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 489 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 490 if (dev->dev->caps.max_gso_sz && 491 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) && 492 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)) 493 props->device_cap_flags |= IB_DEVICE_UD_TSO; 494 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 495 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 496 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) && 497 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 498 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 499 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 500 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 501 props->device_cap_flags |= IB_DEVICE_XRC; 502 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW) 503 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW; 504 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 505 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B) 506 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B; 507 else 508 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A; 509 } 510 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 511 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING; 512 513 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM; 514 515 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 516 0xffffff; 517 props->vendor_part_id = dev->dev->persist->pdev->device; 518 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 519 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 520 521 props->max_mr_size = ~0ull; 522 props->page_size_cap = dev->dev->caps.page_size_cap; 523 props->max_qp = dev->dev->quotas.qp; 524 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE; 525 props->max_sge = min(dev->dev->caps.max_sq_sg, 526 dev->dev->caps.max_rq_sg); 527 props->max_sge_rd = MLX4_MAX_SGE_RD; 528 props->max_cq = dev->dev->quotas.cq; 529 props->max_cqe = dev->dev->caps.max_cqes; 530 props->max_mr = dev->dev->quotas.mpt; 531 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds; 532 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma; 533 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma; 534 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 535 props->max_srq = dev->dev->quotas.srq; 536 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1; 537 props->max_srq_sge = dev->dev->caps.max_srq_sge; 538 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES; 539 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay; 540 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ? 541 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 542 props->masked_atomic_cap = props->atomic_cap; 543 props->max_pkeys = dev->dev->caps.pkey_table_len[1]; 544 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms; 545 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm; 546 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 547 props->max_mcast_grp; 548 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps; 549 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL; 550 props->timestamp_mask = 0xFFFFFFFFFFFFULL; 551 props->max_ah = INT_MAX; 552 553 if (!mlx4_is_slave(dev->dev)) 554 err = mlx4_get_internal_clock_params(dev->dev, &clock_params); 555 556 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { 557 resp.response_length += sizeof(resp.hca_core_clock_offset); 558 if (!err && !mlx4_is_slave(dev->dev)) { 559 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP; 560 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; 561 } 562 } 563 564 if (uhw->outlen) { 565 err = ib_copy_to_udata(uhw, &resp, resp.response_length); 566 if (err) 567 goto out; 568 } 569 out: 570 kfree(in_mad); 571 kfree(out_mad); 572 573 return err; 574 } 575 576 static enum rdma_link_layer 577 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num) 578 { 579 struct mlx4_dev *dev = to_mdev(device)->dev; 580 581 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ? 582 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET; 583 } 584 585 static int ib_link_query_port(struct ib_device *ibdev, u8 port, 586 struct ib_port_attr *props, int netw_view) 587 { 588 struct ib_smp *in_mad = NULL; 589 struct ib_smp *out_mad = NULL; 590 int ext_active_speed; 591 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 592 int err = -ENOMEM; 593 594 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 595 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 596 if (!in_mad || !out_mad) 597 goto out; 598 599 init_query_mad(in_mad); 600 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 601 in_mad->attr_mod = cpu_to_be32(port); 602 603 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 604 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 605 606 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 607 in_mad, out_mad); 608 if (err) 609 goto out; 610 611 612 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 613 props->lmc = out_mad->data[34] & 0x7; 614 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 615 props->sm_sl = out_mad->data[36] & 0xf; 616 props->state = out_mad->data[32] & 0xf; 617 props->phys_state = out_mad->data[33] >> 4; 618 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 619 if (netw_view) 620 props->gid_tbl_len = out_mad->data[50]; 621 else 622 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port]; 623 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz; 624 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port]; 625 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 626 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 627 props->active_width = out_mad->data[31] & 0xf; 628 props->active_speed = out_mad->data[35] >> 4; 629 props->max_mtu = out_mad->data[41] & 0xf; 630 props->active_mtu = out_mad->data[36] >> 4; 631 props->subnet_timeout = out_mad->data[51] & 0x1f; 632 props->max_vl_num = out_mad->data[37] >> 4; 633 props->init_type_reply = out_mad->data[41] >> 4; 634 635 /* Check if extended speeds (EDR/FDR/...) are supported */ 636 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 637 ext_active_speed = out_mad->data[62] >> 4; 638 639 switch (ext_active_speed) { 640 case 1: 641 props->active_speed = IB_SPEED_FDR; 642 break; 643 case 2: 644 props->active_speed = IB_SPEED_EDR; 645 break; 646 } 647 } 648 649 /* If reported active speed is QDR, check if is FDR-10 */ 650 if (props->active_speed == IB_SPEED_QDR) { 651 init_query_mad(in_mad); 652 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 653 in_mad->attr_mod = cpu_to_be32(port); 654 655 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, 656 NULL, NULL, in_mad, out_mad); 657 if (err) 658 goto out; 659 660 /* Checking LinkSpeedActive for FDR-10 */ 661 if (out_mad->data[15] & 0x1) 662 props->active_speed = IB_SPEED_FDR10; 663 } 664 665 /* Avoid wrong speed value returned by FW if the IB link is down. */ 666 if (props->state == IB_PORT_DOWN) 667 props->active_speed = IB_SPEED_SDR; 668 669 out: 670 kfree(in_mad); 671 kfree(out_mad); 672 return err; 673 } 674 675 static u8 state_to_phys_state(enum ib_port_state state) 676 { 677 return state == IB_PORT_ACTIVE ? 5 : 3; 678 } 679 680 static int eth_link_query_port(struct ib_device *ibdev, u8 port, 681 struct ib_port_attr *props, int netw_view) 682 { 683 684 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 685 struct mlx4_ib_iboe *iboe = &mdev->iboe; 686 struct net_device *ndev; 687 enum ib_mtu tmp; 688 struct mlx4_cmd_mailbox *mailbox; 689 int err = 0; 690 int is_bonded = mlx4_is_bonded(mdev->dev); 691 692 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 693 if (IS_ERR(mailbox)) 694 return PTR_ERR(mailbox); 695 696 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0, 697 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B, 698 MLX4_CMD_WRAPPED); 699 if (err) 700 goto out; 701 702 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) || 703 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 704 IB_WIDTH_4X : IB_WIDTH_1X; 705 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ? 706 IB_SPEED_FDR : IB_SPEED_QDR; 707 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS; 708 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port]; 709 props->max_msg_sz = mdev->dev->caps.max_msg_sz; 710 props->pkey_tbl_len = 1; 711 props->max_mtu = IB_MTU_4096; 712 props->max_vl_num = 2; 713 props->state = IB_PORT_DOWN; 714 props->phys_state = state_to_phys_state(props->state); 715 props->active_mtu = IB_MTU_256; 716 spin_lock_bh(&iboe->lock); 717 ndev = iboe->netdevs[port - 1]; 718 if (ndev && is_bonded) { 719 rcu_read_lock(); /* required to get upper dev */ 720 ndev = netdev_master_upper_dev_get_rcu(ndev); 721 rcu_read_unlock(); 722 } 723 if (!ndev) 724 goto out_unlock; 725 726 tmp = iboe_get_mtu(ndev->mtu); 727 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256; 728 729 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ? 730 IB_PORT_ACTIVE : IB_PORT_DOWN; 731 props->phys_state = state_to_phys_state(props->state); 732 out_unlock: 733 spin_unlock_bh(&iboe->lock); 734 out: 735 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 736 return err; 737 } 738 739 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 740 struct ib_port_attr *props, int netw_view) 741 { 742 int err; 743 744 memset(props, 0, sizeof *props); 745 746 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 747 ib_link_query_port(ibdev, port, props, netw_view) : 748 eth_link_query_port(ibdev, port, props, netw_view); 749 750 return err; 751 } 752 753 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port, 754 struct ib_port_attr *props) 755 { 756 /* returns host view */ 757 return __mlx4_ib_query_port(ibdev, port, props, 0); 758 } 759 760 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 761 union ib_gid *gid, int netw_view) 762 { 763 struct ib_smp *in_mad = NULL; 764 struct ib_smp *out_mad = NULL; 765 int err = -ENOMEM; 766 struct mlx4_ib_dev *dev = to_mdev(ibdev); 767 int clear = 0; 768 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 769 770 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 771 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 772 if (!in_mad || !out_mad) 773 goto out; 774 775 init_query_mad(in_mad); 776 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 777 in_mad->attr_mod = cpu_to_be32(port); 778 779 if (mlx4_is_mfunc(dev->dev) && netw_view) 780 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 781 782 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad); 783 if (err) 784 goto out; 785 786 memcpy(gid->raw, out_mad->data + 8, 8); 787 788 if (mlx4_is_mfunc(dev->dev) && !netw_view) { 789 if (index) { 790 /* For any index > 0, return the null guid */ 791 err = 0; 792 clear = 1; 793 goto out; 794 } 795 } 796 797 init_query_mad(in_mad); 798 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 799 in_mad->attr_mod = cpu_to_be32(index / 8); 800 801 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, 802 NULL, NULL, in_mad, out_mad); 803 if (err) 804 goto out; 805 806 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 807 808 out: 809 if (clear) 810 memset(gid->raw + 8, 0, 8); 811 kfree(in_mad); 812 kfree(out_mad); 813 return err; 814 } 815 816 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 817 union ib_gid *gid) 818 { 819 int ret; 820 821 if (rdma_protocol_ib(ibdev, port)) 822 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0); 823 824 if (!rdma_protocol_roce(ibdev, port)) 825 return -ENODEV; 826 827 if (!rdma_cap_roce_gid_table(ibdev, port)) 828 return -ENODEV; 829 830 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL); 831 if (ret == -EAGAIN) { 832 memcpy(gid, &zgid, sizeof(*gid)); 833 return 0; 834 } 835 836 return ret; 837 } 838 839 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl) 840 { 841 union sl2vl_tbl_to_u64 sl2vl64; 842 struct ib_smp *in_mad = NULL; 843 struct ib_smp *out_mad = NULL; 844 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 845 int err = -ENOMEM; 846 int jj; 847 848 if (mlx4_is_slave(to_mdev(ibdev)->dev)) { 849 *sl2vl_tbl = 0; 850 return 0; 851 } 852 853 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 854 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 855 if (!in_mad || !out_mad) 856 goto out; 857 858 init_query_mad(in_mad); 859 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE; 860 in_mad->attr_mod = 0; 861 862 if (mlx4_is_mfunc(to_mdev(ibdev)->dev)) 863 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 864 865 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 866 in_mad, out_mad); 867 if (err) 868 goto out; 869 870 for (jj = 0; jj < 8; jj++) 871 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj]; 872 *sl2vl_tbl = sl2vl64.sl64; 873 874 out: 875 kfree(in_mad); 876 kfree(out_mad); 877 return err; 878 } 879 880 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev) 881 { 882 u64 sl2vl; 883 int i; 884 int err; 885 886 for (i = 1; i <= mdev->dev->caps.num_ports; i++) { 887 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) 888 continue; 889 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl); 890 if (err) { 891 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n", 892 i, err); 893 sl2vl = 0; 894 } 895 atomic64_set(&mdev->sl2vl[i - 1], sl2vl); 896 } 897 } 898 899 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 900 u16 *pkey, int netw_view) 901 { 902 struct ib_smp *in_mad = NULL; 903 struct ib_smp *out_mad = NULL; 904 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 905 int err = -ENOMEM; 906 907 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 908 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 909 if (!in_mad || !out_mad) 910 goto out; 911 912 init_query_mad(in_mad); 913 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 914 in_mad->attr_mod = cpu_to_be32(index / 32); 915 916 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view) 917 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 918 919 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL, 920 in_mad, out_mad); 921 if (err) 922 goto out; 923 924 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 925 926 out: 927 kfree(in_mad); 928 kfree(out_mad); 929 return err; 930 } 931 932 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) 933 { 934 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0); 935 } 936 937 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask, 938 struct ib_device_modify *props) 939 { 940 struct mlx4_cmd_mailbox *mailbox; 941 unsigned long flags; 942 943 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 944 return -EOPNOTSUPP; 945 946 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 947 return 0; 948 949 if (mlx4_is_slave(to_mdev(ibdev)->dev)) 950 return -EOPNOTSUPP; 951 952 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags); 953 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 954 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags); 955 956 /* 957 * If possible, pass node desc to FW, so it can generate 958 * a 144 trap. If cmd fails, just ignore. 959 */ 960 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev); 961 if (IS_ERR(mailbox)) 962 return 0; 963 964 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX); 965 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0, 966 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 967 968 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox); 969 970 return 0; 971 } 972 973 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols, 974 u32 cap_mask) 975 { 976 struct mlx4_cmd_mailbox *mailbox; 977 int err; 978 979 mailbox = mlx4_alloc_cmd_mailbox(dev->dev); 980 if (IS_ERR(mailbox)) 981 return PTR_ERR(mailbox); 982 983 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { 984 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6; 985 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask); 986 } else { 987 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols; 988 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask); 989 } 990 991 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE, 992 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, 993 MLX4_CMD_WRAPPED); 994 995 mlx4_free_cmd_mailbox(dev->dev, mailbox); 996 return err; 997 } 998 999 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 1000 struct ib_port_modify *props) 1001 { 1002 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 1003 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH; 1004 struct ib_port_attr attr; 1005 u32 cap_mask; 1006 int err; 1007 1008 /* return OK if this is RoCE. CM calls ib_modify_port() regardless 1009 * of whether port link layer is ETH or IB. For ETH ports, qkey 1010 * violations and port capabilities are not meaningful. 1011 */ 1012 if (is_eth) 1013 return 0; 1014 1015 mutex_lock(&mdev->cap_mask_mutex); 1016 1017 err = mlx4_ib_query_port(ibdev, port, &attr); 1018 if (err) 1019 goto out; 1020 1021 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 1022 ~props->clr_port_cap_mask; 1023 1024 err = mlx4_ib_SET_PORT(mdev, port, 1025 !!(mask & IB_PORT_RESET_QKEY_CNTR), 1026 cap_mask); 1027 1028 out: 1029 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex); 1030 return err; 1031 } 1032 1033 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev, 1034 struct ib_udata *udata) 1035 { 1036 struct mlx4_ib_dev *dev = to_mdev(ibdev); 1037 struct mlx4_ib_ucontext *context; 1038 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3; 1039 struct mlx4_ib_alloc_ucontext_resp resp; 1040 int err; 1041 1042 if (!dev->ib_active) 1043 return ERR_PTR(-EAGAIN); 1044 1045 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) { 1046 resp_v3.qp_tab_size = dev->dev->caps.num_qps; 1047 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size; 1048 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1049 } else { 1050 resp.dev_caps = dev->dev->caps.userspace_caps; 1051 resp.qp_tab_size = dev->dev->caps.num_qps; 1052 resp.bf_reg_size = dev->dev->caps.bf_reg_size; 1053 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page; 1054 resp.cqe_size = dev->dev->caps.cqe_size; 1055 } 1056 1057 context = kzalloc(sizeof(*context), GFP_KERNEL); 1058 if (!context) 1059 return ERR_PTR(-ENOMEM); 1060 1061 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar); 1062 if (err) { 1063 kfree(context); 1064 return ERR_PTR(err); 1065 } 1066 1067 INIT_LIST_HEAD(&context->db_page_list); 1068 mutex_init(&context->db_page_mutex); 1069 1070 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) 1071 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3)); 1072 else 1073 err = ib_copy_to_udata(udata, &resp, sizeof(resp)); 1074 1075 if (err) { 1076 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar); 1077 kfree(context); 1078 return ERR_PTR(-EFAULT); 1079 } 1080 1081 return &context->ibucontext; 1082 } 1083 1084 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 1085 { 1086 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1087 1088 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar); 1089 kfree(context); 1090 1091 return 0; 1092 } 1093 1094 static void mlx4_ib_vma_open(struct vm_area_struct *area) 1095 { 1096 /* vma_open is called when a new VMA is created on top of our VMA. 1097 * This is done through either mremap flow or split_vma (usually due 1098 * to mlock, madvise, munmap, etc.). We do not support a clone of the 1099 * vma, as this VMA is strongly hardware related. Therefore we set the 1100 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from 1101 * calling us again and trying to do incorrect actions. We assume that 1102 * the original vma size is exactly a single page that there will be no 1103 * "splitting" operations on. 1104 */ 1105 area->vm_ops = NULL; 1106 } 1107 1108 static void mlx4_ib_vma_close(struct vm_area_struct *area) 1109 { 1110 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data; 1111 1112 /* It's guaranteed that all VMAs opened on a FD are closed before the 1113 * file itself is closed, therefore no sync is needed with the regular 1114 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync 1115 * with accessing the vma as part of mlx4_ib_disassociate_ucontext. 1116 * The close operation is usually called under mm->mmap_sem except when 1117 * process is exiting. The exiting case is handled explicitly as part 1118 * of mlx4_ib_disassociate_ucontext. 1119 */ 1120 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *) 1121 area->vm_private_data; 1122 1123 /* set the vma context pointer to null in the mlx4_ib driver's private 1124 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext(). 1125 */ 1126 mlx4_ib_vma_priv_data->vma = NULL; 1127 } 1128 1129 static const struct vm_operations_struct mlx4_ib_vm_ops = { 1130 .open = mlx4_ib_vma_open, 1131 .close = mlx4_ib_vma_close 1132 }; 1133 1134 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext) 1135 { 1136 int i; 1137 int ret = 0; 1138 struct vm_area_struct *vma; 1139 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext); 1140 struct task_struct *owning_process = NULL; 1141 struct mm_struct *owning_mm = NULL; 1142 1143 owning_process = get_pid_task(ibcontext->tgid, PIDTYPE_PID); 1144 if (!owning_process) 1145 return; 1146 1147 owning_mm = get_task_mm(owning_process); 1148 if (!owning_mm) { 1149 pr_info("no mm, disassociate ucontext is pending task termination\n"); 1150 while (1) { 1151 /* make sure that task is dead before returning, it may 1152 * prevent a rare case of module down in parallel to a 1153 * call to mlx4_ib_vma_close. 1154 */ 1155 put_task_struct(owning_process); 1156 msleep(1); 1157 owning_process = get_pid_task(ibcontext->tgid, 1158 PIDTYPE_PID); 1159 if (!owning_process || 1160 owning_process->state == TASK_DEAD) { 1161 pr_info("disassociate ucontext done, task was terminated\n"); 1162 /* in case task was dead need to release the task struct */ 1163 if (owning_process) 1164 put_task_struct(owning_process); 1165 return; 1166 } 1167 } 1168 } 1169 1170 /* need to protect from a race on closing the vma as part of 1171 * mlx4_ib_vma_close(). 1172 */ 1173 down_read(&owning_mm->mmap_sem); 1174 for (i = 0; i < HW_BAR_COUNT; i++) { 1175 vma = context->hw_bar_info[i].vma; 1176 if (!vma) 1177 continue; 1178 1179 ret = zap_vma_ptes(context->hw_bar_info[i].vma, 1180 context->hw_bar_info[i].vma->vm_start, 1181 PAGE_SIZE); 1182 if (ret) { 1183 pr_err("Error: zap_vma_ptes failed for index=%d, ret=%d\n", i, ret); 1184 BUG_ON(1); 1185 } 1186 1187 /* context going to be destroyed, should not access ops any more */ 1188 context->hw_bar_info[i].vma->vm_ops = NULL; 1189 } 1190 1191 up_read(&owning_mm->mmap_sem); 1192 mmput(owning_mm); 1193 put_task_struct(owning_process); 1194 } 1195 1196 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma, 1197 struct mlx4_ib_vma_private_data *vma_private_data) 1198 { 1199 vma_private_data->vma = vma; 1200 vma->vm_private_data = vma_private_data; 1201 vma->vm_ops = &mlx4_ib_vm_ops; 1202 } 1203 1204 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 1205 { 1206 struct mlx4_ib_dev *dev = to_mdev(context->device); 1207 struct mlx4_ib_ucontext *mucontext = to_mucontext(context); 1208 1209 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 1210 return -EINVAL; 1211 1212 if (vma->vm_pgoff == 0) { 1213 /* We prevent double mmaping on same context */ 1214 if (mucontext->hw_bar_info[HW_BAR_DB].vma) 1215 return -EINVAL; 1216 1217 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1218 1219 if (io_remap_pfn_range(vma, vma->vm_start, 1220 to_mucontext(context)->uar.pfn, 1221 PAGE_SIZE, vma->vm_page_prot)) 1222 return -EAGAIN; 1223 1224 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]); 1225 1226 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) { 1227 /* We prevent double mmaping on same context */ 1228 if (mucontext->hw_bar_info[HW_BAR_BF].vma) 1229 return -EINVAL; 1230 1231 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 1232 1233 if (io_remap_pfn_range(vma, vma->vm_start, 1234 to_mucontext(context)->uar.pfn + 1235 dev->dev->caps.num_uars, 1236 PAGE_SIZE, vma->vm_page_prot)) 1237 return -EAGAIN; 1238 1239 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]); 1240 1241 } else if (vma->vm_pgoff == 3) { 1242 struct mlx4_clock_params params; 1243 int ret; 1244 1245 /* We prevent double mmaping on same context */ 1246 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma) 1247 return -EINVAL; 1248 1249 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms); 1250 1251 if (ret) 1252 return ret; 1253 1254 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 1255 if (io_remap_pfn_range(vma, vma->vm_start, 1256 (pci_resource_start(dev->dev->persist->pdev, 1257 params.bar) + 1258 params.offset) 1259 >> PAGE_SHIFT, 1260 PAGE_SIZE, vma->vm_page_prot)) 1261 return -EAGAIN; 1262 1263 mlx4_ib_set_vma_data(vma, 1264 &mucontext->hw_bar_info[HW_BAR_CLOCK]); 1265 } else { 1266 return -EINVAL; 1267 } 1268 1269 return 0; 1270 } 1271 1272 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev, 1273 struct ib_ucontext *context, 1274 struct ib_udata *udata) 1275 { 1276 struct mlx4_ib_pd *pd; 1277 int err; 1278 1279 pd = kmalloc(sizeof *pd, GFP_KERNEL); 1280 if (!pd) 1281 return ERR_PTR(-ENOMEM); 1282 1283 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn); 1284 if (err) { 1285 kfree(pd); 1286 return ERR_PTR(err); 1287 } 1288 1289 if (context) 1290 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) { 1291 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn); 1292 kfree(pd); 1293 return ERR_PTR(-EFAULT); 1294 } 1295 1296 return &pd->ibpd; 1297 } 1298 1299 static int mlx4_ib_dealloc_pd(struct ib_pd *pd) 1300 { 1301 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 1302 kfree(pd); 1303 1304 return 0; 1305 } 1306 1307 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev, 1308 struct ib_ucontext *context, 1309 struct ib_udata *udata) 1310 { 1311 struct mlx4_ib_xrcd *xrcd; 1312 struct ib_cq_init_attr cq_attr = {}; 1313 int err; 1314 1315 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 1316 return ERR_PTR(-ENOSYS); 1317 1318 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL); 1319 if (!xrcd) 1320 return ERR_PTR(-ENOMEM); 1321 1322 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn); 1323 if (err) 1324 goto err1; 1325 1326 xrcd->pd = ib_alloc_pd(ibdev, 0); 1327 if (IS_ERR(xrcd->pd)) { 1328 err = PTR_ERR(xrcd->pd); 1329 goto err2; 1330 } 1331 1332 cq_attr.cqe = 1; 1333 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr); 1334 if (IS_ERR(xrcd->cq)) { 1335 err = PTR_ERR(xrcd->cq); 1336 goto err3; 1337 } 1338 1339 return &xrcd->ibxrcd; 1340 1341 err3: 1342 ib_dealloc_pd(xrcd->pd); 1343 err2: 1344 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn); 1345 err1: 1346 kfree(xrcd); 1347 return ERR_PTR(err); 1348 } 1349 1350 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 1351 { 1352 ib_destroy_cq(to_mxrcd(xrcd)->cq); 1353 ib_dealloc_pd(to_mxrcd(xrcd)->pd); 1354 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 1355 kfree(xrcd); 1356 1357 return 0; 1358 } 1359 1360 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid) 1361 { 1362 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1363 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1364 struct mlx4_ib_gid_entry *ge; 1365 1366 ge = kzalloc(sizeof *ge, GFP_KERNEL); 1367 if (!ge) 1368 return -ENOMEM; 1369 1370 ge->gid = *gid; 1371 if (mlx4_ib_add_mc(mdev, mqp, gid)) { 1372 ge->port = mqp->port; 1373 ge->added = 1; 1374 } 1375 1376 mutex_lock(&mqp->mutex); 1377 list_add_tail(&ge->list, &mqp->gid_list); 1378 mutex_unlock(&mqp->mutex); 1379 1380 return 0; 1381 } 1382 1383 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev, 1384 struct mlx4_ib_counters *ctr_table) 1385 { 1386 struct counter_index *counter, *tmp_count; 1387 1388 mutex_lock(&ctr_table->mutex); 1389 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list, 1390 list) { 1391 if (counter->allocated) 1392 mlx4_counter_free(ibdev->dev, counter->index); 1393 list_del(&counter->list); 1394 kfree(counter); 1395 } 1396 mutex_unlock(&ctr_table->mutex); 1397 } 1398 1399 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 1400 union ib_gid *gid) 1401 { 1402 struct net_device *ndev; 1403 int ret = 0; 1404 1405 if (!mqp->port) 1406 return 0; 1407 1408 spin_lock_bh(&mdev->iboe.lock); 1409 ndev = mdev->iboe.netdevs[mqp->port - 1]; 1410 if (ndev) 1411 dev_hold(ndev); 1412 spin_unlock_bh(&mdev->iboe.lock); 1413 1414 if (ndev) { 1415 ret = 1; 1416 dev_put(ndev); 1417 } 1418 1419 return ret; 1420 } 1421 1422 struct mlx4_ib_steering { 1423 struct list_head list; 1424 struct mlx4_flow_reg_id reg_id; 1425 union ib_gid gid; 1426 }; 1427 1428 #define LAST_ETH_FIELD vlan_tag 1429 #define LAST_IB_FIELD sl 1430 #define LAST_IPV4_FIELD dst_ip 1431 #define LAST_TCP_UDP_FIELD src_port 1432 1433 /* Field is the last supported field */ 1434 #define FIELDS_NOT_SUPPORTED(filter, field)\ 1435 memchr_inv((void *)&filter.field +\ 1436 sizeof(filter.field), 0,\ 1437 sizeof(filter) -\ 1438 offsetof(typeof(filter), field) -\ 1439 sizeof(filter.field)) 1440 1441 static int parse_flow_attr(struct mlx4_dev *dev, 1442 u32 qp_num, 1443 union ib_flow_spec *ib_spec, 1444 struct _rule_hw *mlx4_spec) 1445 { 1446 enum mlx4_net_trans_rule_id type; 1447 1448 switch (ib_spec->type) { 1449 case IB_FLOW_SPEC_ETH: 1450 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD)) 1451 return -ENOTSUPP; 1452 1453 type = MLX4_NET_TRANS_RULE_ID_ETH; 1454 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac, 1455 ETH_ALEN); 1456 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac, 1457 ETH_ALEN); 1458 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag; 1459 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag; 1460 break; 1461 case IB_FLOW_SPEC_IB: 1462 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD)) 1463 return -ENOTSUPP; 1464 1465 type = MLX4_NET_TRANS_RULE_ID_IB; 1466 mlx4_spec->ib.l3_qpn = 1467 cpu_to_be32(qp_num); 1468 mlx4_spec->ib.qpn_mask = 1469 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK); 1470 break; 1471 1472 1473 case IB_FLOW_SPEC_IPV4: 1474 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD)) 1475 return -ENOTSUPP; 1476 1477 type = MLX4_NET_TRANS_RULE_ID_IPV4; 1478 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip; 1479 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip; 1480 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip; 1481 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip; 1482 break; 1483 1484 case IB_FLOW_SPEC_TCP: 1485 case IB_FLOW_SPEC_UDP: 1486 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD)) 1487 return -ENOTSUPP; 1488 1489 type = ib_spec->type == IB_FLOW_SPEC_TCP ? 1490 MLX4_NET_TRANS_RULE_ID_TCP : 1491 MLX4_NET_TRANS_RULE_ID_UDP; 1492 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port; 1493 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port; 1494 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port; 1495 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port; 1496 break; 1497 1498 default: 1499 return -EINVAL; 1500 } 1501 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 || 1502 mlx4_hw_rule_sz(dev, type) < 0) 1503 return -EINVAL; 1504 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type)); 1505 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2; 1506 return mlx4_hw_rule_sz(dev, type); 1507 } 1508 1509 struct default_rules { 1510 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1511 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1512 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1513 __u8 link_layer; 1514 }; 1515 static const struct default_rules default_table[] = { 1516 { 1517 .mandatory_fields = {IB_FLOW_SPEC_IPV4}, 1518 .mandatory_not_fields = {IB_FLOW_SPEC_ETH}, 1519 .rules_create_list = {IB_FLOW_SPEC_IB}, 1520 .link_layer = IB_LINK_LAYER_INFINIBAND 1521 } 1522 }; 1523 1524 static int __mlx4_ib_default_rules_match(struct ib_qp *qp, 1525 struct ib_flow_attr *flow_attr) 1526 { 1527 int i, j, k; 1528 void *ib_flow; 1529 const struct default_rules *pdefault_rules = default_table; 1530 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port); 1531 1532 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) { 1533 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS]; 1534 memset(&field_types, 0, sizeof(field_types)); 1535 1536 if (link_layer != pdefault_rules->link_layer) 1537 continue; 1538 1539 ib_flow = flow_attr + 1; 1540 /* we assume the specs are sorted */ 1541 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS && 1542 j < flow_attr->num_of_specs; k++) { 1543 union ib_flow_spec *current_flow = 1544 (union ib_flow_spec *)ib_flow; 1545 1546 /* same layer but different type */ 1547 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) == 1548 (pdefault_rules->mandatory_fields[k] & 1549 IB_FLOW_SPEC_LAYER_MASK)) && 1550 (current_flow->type != 1551 pdefault_rules->mandatory_fields[k])) 1552 goto out; 1553 1554 /* same layer, try match next one */ 1555 if (current_flow->type == 1556 pdefault_rules->mandatory_fields[k]) { 1557 j++; 1558 ib_flow += 1559 ((union ib_flow_spec *)ib_flow)->size; 1560 } 1561 } 1562 1563 ib_flow = flow_attr + 1; 1564 for (j = 0; j < flow_attr->num_of_specs; 1565 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size) 1566 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++) 1567 /* same layer and same type */ 1568 if (((union ib_flow_spec *)ib_flow)->type == 1569 pdefault_rules->mandatory_not_fields[k]) 1570 goto out; 1571 1572 return i; 1573 } 1574 out: 1575 return -1; 1576 } 1577 1578 static int __mlx4_ib_create_default_rules( 1579 struct mlx4_ib_dev *mdev, 1580 struct ib_qp *qp, 1581 const struct default_rules *pdefault_rules, 1582 struct _rule_hw *mlx4_spec) { 1583 int size = 0; 1584 int i; 1585 1586 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) { 1587 int ret; 1588 union ib_flow_spec ib_spec; 1589 switch (pdefault_rules->rules_create_list[i]) { 1590 case 0: 1591 /* no rule */ 1592 continue; 1593 case IB_FLOW_SPEC_IB: 1594 ib_spec.type = IB_FLOW_SPEC_IB; 1595 ib_spec.size = sizeof(struct ib_flow_spec_ib); 1596 1597 break; 1598 default: 1599 /* invalid rule */ 1600 return -EINVAL; 1601 } 1602 /* We must put empty rule, qpn is being ignored */ 1603 ret = parse_flow_attr(mdev->dev, 0, &ib_spec, 1604 mlx4_spec); 1605 if (ret < 0) { 1606 pr_info("invalid parsing\n"); 1607 return -EINVAL; 1608 } 1609 1610 mlx4_spec = (void *)mlx4_spec + ret; 1611 size += ret; 1612 } 1613 return size; 1614 } 1615 1616 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1617 int domain, 1618 enum mlx4_net_trans_promisc_mode flow_type, 1619 u64 *reg_id) 1620 { 1621 int ret, i; 1622 int size = 0; 1623 void *ib_flow; 1624 struct mlx4_ib_dev *mdev = to_mdev(qp->device); 1625 struct mlx4_cmd_mailbox *mailbox; 1626 struct mlx4_net_trans_rule_hw_ctrl *ctrl; 1627 int default_flow; 1628 1629 static const u16 __mlx4_domain[] = { 1630 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS, 1631 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL, 1632 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS, 1633 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC, 1634 }; 1635 1636 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) { 1637 pr_err("Invalid priority value %d\n", flow_attr->priority); 1638 return -EINVAL; 1639 } 1640 1641 if (domain >= IB_FLOW_DOMAIN_NUM) { 1642 pr_err("Invalid domain value %d\n", domain); 1643 return -EINVAL; 1644 } 1645 1646 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0) 1647 return -EINVAL; 1648 1649 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); 1650 if (IS_ERR(mailbox)) 1651 return PTR_ERR(mailbox); 1652 ctrl = mailbox->buf; 1653 1654 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] | 1655 flow_attr->priority); 1656 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type); 1657 ctrl->port = flow_attr->port; 1658 ctrl->qpn = cpu_to_be32(qp->qp_num); 1659 1660 ib_flow = flow_attr + 1; 1661 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); 1662 /* Add default flows */ 1663 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr); 1664 if (default_flow >= 0) { 1665 ret = __mlx4_ib_create_default_rules( 1666 mdev, qp, default_table + default_flow, 1667 mailbox->buf + size); 1668 if (ret < 0) { 1669 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1670 return -EINVAL; 1671 } 1672 size += ret; 1673 } 1674 for (i = 0; i < flow_attr->num_of_specs; i++) { 1675 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow, 1676 mailbox->buf + size); 1677 if (ret < 0) { 1678 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1679 return -EINVAL; 1680 } 1681 ib_flow += ((union ib_flow_spec *) ib_flow)->size; 1682 size += ret; 1683 } 1684 1685 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0, 1686 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A, 1687 MLX4_CMD_WRAPPED); 1688 if (ret == -ENOMEM) 1689 pr_err("mcg table is full. Fail to register network rule.\n"); 1690 else if (ret == -ENXIO) 1691 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n"); 1692 else if (ret) 1693 pr_err("Invalid argument. Fail to register network rule.\n"); 1694 1695 mlx4_free_cmd_mailbox(mdev->dev, mailbox); 1696 return ret; 1697 } 1698 1699 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id) 1700 { 1701 int err; 1702 err = mlx4_cmd(dev, reg_id, 0, 0, 1703 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, 1704 MLX4_CMD_WRAPPED); 1705 if (err) 1706 pr_err("Fail to detach network rule. registration id = 0x%llx\n", 1707 reg_id); 1708 return err; 1709 } 1710 1711 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr, 1712 u64 *reg_id) 1713 { 1714 void *ib_flow; 1715 union ib_flow_spec *ib_spec; 1716 struct mlx4_dev *dev = to_mdev(qp->device)->dev; 1717 int err = 0; 1718 1719 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN || 1720 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) 1721 return 0; /* do nothing */ 1722 1723 ib_flow = flow_attr + 1; 1724 ib_spec = (union ib_flow_spec *)ib_flow; 1725 1726 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1) 1727 return 0; /* do nothing */ 1728 1729 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac, 1730 flow_attr->port, qp->qp_num, 1731 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff), 1732 reg_id); 1733 return err; 1734 } 1735 1736 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev, 1737 struct ib_flow_attr *flow_attr, 1738 enum mlx4_net_trans_promisc_mode *type) 1739 { 1740 int err = 0; 1741 1742 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) || 1743 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) || 1744 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) { 1745 return -EOPNOTSUPP; 1746 } 1747 1748 if (flow_attr->num_of_specs == 0) { 1749 type[0] = MLX4_FS_MC_SNIFFER; 1750 type[1] = MLX4_FS_UC_SNIFFER; 1751 } else { 1752 union ib_flow_spec *ib_spec; 1753 1754 ib_spec = (union ib_flow_spec *)(flow_attr + 1); 1755 if (ib_spec->type != IB_FLOW_SPEC_ETH) 1756 return -EINVAL; 1757 1758 /* if all is zero than MC and UC */ 1759 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) { 1760 type[0] = MLX4_FS_MC_SNIFFER; 1761 type[1] = MLX4_FS_UC_SNIFFER; 1762 } else { 1763 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01, 1764 ib_spec->eth.mask.dst_mac[1], 1765 ib_spec->eth.mask.dst_mac[2], 1766 ib_spec->eth.mask.dst_mac[3], 1767 ib_spec->eth.mask.dst_mac[4], 1768 ib_spec->eth.mask.dst_mac[5]}; 1769 1770 /* Above xor was only on MC bit, non empty mask is valid 1771 * only if this bit is set and rest are zero. 1772 */ 1773 if (!is_zero_ether_addr(&mac[0])) 1774 return -EINVAL; 1775 1776 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac)) 1777 type[0] = MLX4_FS_MC_SNIFFER; 1778 else 1779 type[0] = MLX4_FS_UC_SNIFFER; 1780 } 1781 } 1782 1783 return err; 1784 } 1785 1786 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp, 1787 struct ib_flow_attr *flow_attr, 1788 int domain) 1789 { 1790 int err = 0, i = 0, j = 0; 1791 struct mlx4_ib_flow *mflow; 1792 enum mlx4_net_trans_promisc_mode type[2]; 1793 struct mlx4_dev *dev = (to_mdev(qp->device))->dev; 1794 int is_bonded = mlx4_is_bonded(dev); 1795 1796 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt) 1797 return ERR_PTR(-EINVAL); 1798 1799 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) && 1800 (flow_attr->type != IB_FLOW_ATTR_NORMAL)) 1801 return ERR_PTR(-EOPNOTSUPP); 1802 1803 memset(type, 0, sizeof(type)); 1804 1805 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL); 1806 if (!mflow) { 1807 err = -ENOMEM; 1808 goto err_free; 1809 } 1810 1811 switch (flow_attr->type) { 1812 case IB_FLOW_ATTR_NORMAL: 1813 /* If dont trap flag (continue match) is set, under specific 1814 * condition traffic be replicated to given qp, 1815 * without stealing it 1816 */ 1817 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) { 1818 err = mlx4_ib_add_dont_trap_rule(dev, 1819 flow_attr, 1820 type); 1821 if (err) 1822 goto err_free; 1823 } else { 1824 type[0] = MLX4_FS_REGULAR; 1825 } 1826 break; 1827 1828 case IB_FLOW_ATTR_ALL_DEFAULT: 1829 type[0] = MLX4_FS_ALL_DEFAULT; 1830 break; 1831 1832 case IB_FLOW_ATTR_MC_DEFAULT: 1833 type[0] = MLX4_FS_MC_DEFAULT; 1834 break; 1835 1836 case IB_FLOW_ATTR_SNIFFER: 1837 type[0] = MLX4_FS_MIRROR_RX_PORT; 1838 type[1] = MLX4_FS_MIRROR_SX_PORT; 1839 break; 1840 1841 default: 1842 err = -EINVAL; 1843 goto err_free; 1844 } 1845 1846 while (i < ARRAY_SIZE(type) && type[i]) { 1847 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i], 1848 &mflow->reg_id[i].id); 1849 if (err) 1850 goto err_create_flow; 1851 if (is_bonded) { 1852 /* Application always sees one port so the mirror rule 1853 * must be on port #2 1854 */ 1855 flow_attr->port = 2; 1856 err = __mlx4_ib_create_flow(qp, flow_attr, 1857 domain, type[j], 1858 &mflow->reg_id[j].mirror); 1859 flow_attr->port = 1; 1860 if (err) 1861 goto err_create_flow; 1862 j++; 1863 } 1864 1865 i++; 1866 } 1867 1868 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) { 1869 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1870 &mflow->reg_id[i].id); 1871 if (err) 1872 goto err_create_flow; 1873 1874 if (is_bonded) { 1875 flow_attr->port = 2; 1876 err = mlx4_ib_tunnel_steer_add(qp, flow_attr, 1877 &mflow->reg_id[j].mirror); 1878 flow_attr->port = 1; 1879 if (err) 1880 goto err_create_flow; 1881 j++; 1882 } 1883 /* function to create mirror rule */ 1884 i++; 1885 } 1886 1887 return &mflow->ibflow; 1888 1889 err_create_flow: 1890 while (i) { 1891 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1892 mflow->reg_id[i].id); 1893 i--; 1894 } 1895 1896 while (j) { 1897 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev, 1898 mflow->reg_id[j].mirror); 1899 j--; 1900 } 1901 err_free: 1902 kfree(mflow); 1903 return ERR_PTR(err); 1904 } 1905 1906 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id) 1907 { 1908 int err, ret = 0; 1909 int i = 0; 1910 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device); 1911 struct mlx4_ib_flow *mflow = to_mflow(flow_id); 1912 1913 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) { 1914 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id); 1915 if (err) 1916 ret = err; 1917 if (mflow->reg_id[i].mirror) { 1918 err = __mlx4_ib_destroy_flow(mdev->dev, 1919 mflow->reg_id[i].mirror); 1920 if (err) 1921 ret = err; 1922 } 1923 i++; 1924 } 1925 1926 kfree(mflow); 1927 return ret; 1928 } 1929 1930 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 1931 { 1932 int err; 1933 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 1934 struct mlx4_dev *dev = mdev->dev; 1935 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1936 struct mlx4_ib_steering *ib_steering = NULL; 1937 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 1938 struct mlx4_flow_reg_id reg_id; 1939 1940 if (mdev->dev->caps.steering_mode == 1941 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1942 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL); 1943 if (!ib_steering) 1944 return -ENOMEM; 1945 } 1946 1947 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port, 1948 !!(mqp->flags & 1949 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1950 prot, ®_id.id); 1951 if (err) { 1952 pr_err("multicast attach op failed, err %d\n", err); 1953 goto err_malloc; 1954 } 1955 1956 reg_id.mirror = 0; 1957 if (mlx4_is_bonded(dev)) { 1958 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, 1959 (mqp->port == 1) ? 2 : 1, 1960 !!(mqp->flags & 1961 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1962 prot, ®_id.mirror); 1963 if (err) 1964 goto err_add; 1965 } 1966 1967 err = add_gid_entry(ibqp, gid); 1968 if (err) 1969 goto err_add; 1970 1971 if (ib_steering) { 1972 memcpy(ib_steering->gid.raw, gid->raw, 16); 1973 ib_steering->reg_id = reg_id; 1974 mutex_lock(&mqp->mutex); 1975 list_add(&ib_steering->list, &mqp->steering_rules); 1976 mutex_unlock(&mqp->mutex); 1977 } 1978 return 0; 1979 1980 err_add: 1981 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1982 prot, reg_id.id); 1983 if (reg_id.mirror) 1984 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 1985 prot, reg_id.mirror); 1986 err_malloc: 1987 kfree(ib_steering); 1988 1989 return err; 1990 } 1991 1992 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw) 1993 { 1994 struct mlx4_ib_gid_entry *ge; 1995 struct mlx4_ib_gid_entry *tmp; 1996 struct mlx4_ib_gid_entry *ret = NULL; 1997 1998 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) { 1999 if (!memcmp(raw, ge->gid.raw, 16)) { 2000 ret = ge; 2001 break; 2002 } 2003 } 2004 2005 return ret; 2006 } 2007 2008 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 2009 { 2010 int err; 2011 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); 2012 struct mlx4_dev *dev = mdev->dev; 2013 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 2014 struct net_device *ndev; 2015 struct mlx4_ib_gid_entry *ge; 2016 struct mlx4_flow_reg_id reg_id = {0, 0}; 2017 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6; 2018 2019 if (mdev->dev->caps.steering_mode == 2020 MLX4_STEERING_MODE_DEVICE_MANAGED) { 2021 struct mlx4_ib_steering *ib_steering; 2022 2023 mutex_lock(&mqp->mutex); 2024 list_for_each_entry(ib_steering, &mqp->steering_rules, list) { 2025 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) { 2026 list_del(&ib_steering->list); 2027 break; 2028 } 2029 } 2030 mutex_unlock(&mqp->mutex); 2031 if (&ib_steering->list == &mqp->steering_rules) { 2032 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n"); 2033 return -EINVAL; 2034 } 2035 reg_id = ib_steering->reg_id; 2036 kfree(ib_steering); 2037 } 2038 2039 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 2040 prot, reg_id.id); 2041 if (err) 2042 return err; 2043 2044 if (mlx4_is_bonded(dev)) { 2045 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, 2046 prot, reg_id.mirror); 2047 if (err) 2048 return err; 2049 } 2050 2051 mutex_lock(&mqp->mutex); 2052 ge = find_gid_entry(mqp, gid->raw); 2053 if (ge) { 2054 spin_lock_bh(&mdev->iboe.lock); 2055 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL; 2056 if (ndev) 2057 dev_hold(ndev); 2058 spin_unlock_bh(&mdev->iboe.lock); 2059 if (ndev) 2060 dev_put(ndev); 2061 list_del(&ge->list); 2062 kfree(ge); 2063 } else 2064 pr_warn("could not find mgid entry\n"); 2065 2066 mutex_unlock(&mqp->mutex); 2067 2068 return 0; 2069 } 2070 2071 static int init_node_data(struct mlx4_ib_dev *dev) 2072 { 2073 struct ib_smp *in_mad = NULL; 2074 struct ib_smp *out_mad = NULL; 2075 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS; 2076 int err = -ENOMEM; 2077 2078 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL); 2079 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 2080 if (!in_mad || !out_mad) 2081 goto out; 2082 2083 init_query_mad(in_mad); 2084 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 2085 if (mlx4_is_master(dev->dev)) 2086 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW; 2087 2088 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2089 if (err) 2090 goto out; 2091 2092 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX); 2093 2094 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 2095 2096 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad); 2097 if (err) 2098 goto out; 2099 2100 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32)); 2101 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 2102 2103 out: 2104 kfree(in_mad); 2105 kfree(out_mad); 2106 return err; 2107 } 2108 2109 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 2110 char *buf) 2111 { 2112 struct mlx4_ib_dev *dev = 2113 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2114 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device); 2115 } 2116 2117 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 2118 char *buf) 2119 { 2120 struct mlx4_ib_dev *dev = 2121 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2122 return sprintf(buf, "%x\n", dev->dev->rev_id); 2123 } 2124 2125 static ssize_t show_board(struct device *device, struct device_attribute *attr, 2126 char *buf) 2127 { 2128 struct mlx4_ib_dev *dev = 2129 container_of(device, struct mlx4_ib_dev, ib_dev.dev); 2130 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN, 2131 dev->dev->board_id); 2132 } 2133 2134 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 2135 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 2136 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 2137 2138 static struct device_attribute *mlx4_class_attributes[] = { 2139 &dev_attr_hw_rev, 2140 &dev_attr_hca_type, 2141 &dev_attr_board_id 2142 }; 2143 2144 struct diag_counter { 2145 const char *name; 2146 u32 offset; 2147 }; 2148 2149 #define DIAG_COUNTER(_name, _offset) \ 2150 { .name = #_name, .offset = _offset } 2151 2152 static const struct diag_counter diag_basic[] = { 2153 DIAG_COUNTER(rq_num_lle, 0x00), 2154 DIAG_COUNTER(sq_num_lle, 0x04), 2155 DIAG_COUNTER(rq_num_lqpoe, 0x08), 2156 DIAG_COUNTER(sq_num_lqpoe, 0x0C), 2157 DIAG_COUNTER(rq_num_lpe, 0x18), 2158 DIAG_COUNTER(sq_num_lpe, 0x1C), 2159 DIAG_COUNTER(rq_num_wrfe, 0x20), 2160 DIAG_COUNTER(sq_num_wrfe, 0x24), 2161 DIAG_COUNTER(sq_num_mwbe, 0x2C), 2162 DIAG_COUNTER(sq_num_bre, 0x34), 2163 DIAG_COUNTER(sq_num_rire, 0x44), 2164 DIAG_COUNTER(rq_num_rire, 0x48), 2165 DIAG_COUNTER(sq_num_rae, 0x4C), 2166 DIAG_COUNTER(rq_num_rae, 0x50), 2167 DIAG_COUNTER(sq_num_roe, 0x54), 2168 DIAG_COUNTER(sq_num_tree, 0x5C), 2169 DIAG_COUNTER(sq_num_rree, 0x64), 2170 DIAG_COUNTER(rq_num_rnr, 0x68), 2171 DIAG_COUNTER(sq_num_rnr, 0x6C), 2172 DIAG_COUNTER(rq_num_oos, 0x100), 2173 DIAG_COUNTER(sq_num_oos, 0x104), 2174 }; 2175 2176 static const struct diag_counter diag_ext[] = { 2177 DIAG_COUNTER(rq_num_dup, 0x130), 2178 DIAG_COUNTER(sq_num_to, 0x134), 2179 }; 2180 2181 static const struct diag_counter diag_device_only[] = { 2182 DIAG_COUNTER(num_cqovf, 0x1A0), 2183 DIAG_COUNTER(rq_num_udsdprd, 0x118), 2184 }; 2185 2186 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev, 2187 u8 port_num) 2188 { 2189 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2190 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2191 2192 if (!diag[!!port_num].name) 2193 return NULL; 2194 2195 return rdma_alloc_hw_stats_struct(diag[!!port_num].name, 2196 diag[!!port_num].num_counters, 2197 RDMA_HW_STATS_DEFAULT_LIFESPAN); 2198 } 2199 2200 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev, 2201 struct rdma_hw_stats *stats, 2202 u8 port, int index) 2203 { 2204 struct mlx4_ib_dev *dev = to_mdev(ibdev); 2205 struct mlx4_ib_diag_counters *diag = dev->diag_counters; 2206 u32 hw_value[ARRAY_SIZE(diag_device_only) + 2207 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {}; 2208 int ret; 2209 int i; 2210 2211 ret = mlx4_query_diag_counters(dev->dev, 2212 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS, 2213 diag[!!port].offset, hw_value, 2214 diag[!!port].num_counters, port); 2215 2216 if (ret) 2217 return ret; 2218 2219 for (i = 0; i < diag[!!port].num_counters; i++) 2220 stats->value[i] = hw_value[i]; 2221 2222 return diag[!!port].num_counters; 2223 } 2224 2225 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev, 2226 const char ***name, 2227 u32 **offset, 2228 u32 *num, 2229 bool port) 2230 { 2231 u32 num_counters; 2232 2233 num_counters = ARRAY_SIZE(diag_basic); 2234 2235 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) 2236 num_counters += ARRAY_SIZE(diag_ext); 2237 2238 if (!port) 2239 num_counters += ARRAY_SIZE(diag_device_only); 2240 2241 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL); 2242 if (!*name) 2243 return -ENOMEM; 2244 2245 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL); 2246 if (!*offset) 2247 goto err_name; 2248 2249 *num = num_counters; 2250 2251 return 0; 2252 2253 err_name: 2254 kfree(*name); 2255 return -ENOMEM; 2256 } 2257 2258 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev, 2259 const char **name, 2260 u32 *offset, 2261 bool port) 2262 { 2263 int i; 2264 int j; 2265 2266 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) { 2267 name[i] = diag_basic[i].name; 2268 offset[i] = diag_basic[i].offset; 2269 } 2270 2271 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) { 2272 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) { 2273 name[j] = diag_ext[i].name; 2274 offset[j] = diag_ext[i].offset; 2275 } 2276 } 2277 2278 if (!port) { 2279 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) { 2280 name[j] = diag_device_only[i].name; 2281 offset[j] = diag_device_only[i].offset; 2282 } 2283 } 2284 } 2285 2286 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev) 2287 { 2288 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters; 2289 int i; 2290 int ret; 2291 bool per_port = !!(ibdev->dev->caps.flags2 & 2292 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT); 2293 2294 if (mlx4_is_slave(ibdev->dev)) 2295 return 0; 2296 2297 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2298 /* i == 1 means we are building port counters */ 2299 if (i && !per_port) 2300 continue; 2301 2302 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name, 2303 &diag[i].offset, 2304 &diag[i].num_counters, i); 2305 if (ret) 2306 goto err_alloc; 2307 2308 mlx4_ib_fill_diag_counters(ibdev, diag[i].name, 2309 diag[i].offset, i); 2310 } 2311 2312 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats; 2313 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats; 2314 2315 return 0; 2316 2317 err_alloc: 2318 if (i) { 2319 kfree(diag[i - 1].name); 2320 kfree(diag[i - 1].offset); 2321 } 2322 2323 return ret; 2324 } 2325 2326 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev) 2327 { 2328 int i; 2329 2330 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) { 2331 kfree(ibdev->diag_counters[i].offset); 2332 kfree(ibdev->diag_counters[i].name); 2333 } 2334 } 2335 2336 #define MLX4_IB_INVALID_MAC ((u64)-1) 2337 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, 2338 struct net_device *dev, 2339 int port) 2340 { 2341 u64 new_smac = 0; 2342 u64 release_mac = MLX4_IB_INVALID_MAC; 2343 struct mlx4_ib_qp *qp; 2344 2345 read_lock(&dev_base_lock); 2346 new_smac = mlx4_mac_to_u64(dev->dev_addr); 2347 read_unlock(&dev_base_lock); 2348 2349 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac); 2350 2351 /* no need for update QP1 and mac registration in non-SRIOV */ 2352 if (!mlx4_is_mfunc(ibdev->dev)) 2353 return; 2354 2355 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); 2356 qp = ibdev->qp1_proxy[port - 1]; 2357 if (qp) { 2358 int new_smac_index; 2359 u64 old_smac; 2360 struct mlx4_update_qp_params update_params; 2361 2362 mutex_lock(&qp->mutex); 2363 old_smac = qp->pri.smac; 2364 if (new_smac == old_smac) 2365 goto unlock; 2366 2367 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); 2368 2369 if (new_smac_index < 0) 2370 goto unlock; 2371 2372 update_params.smac_index = new_smac_index; 2373 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC, 2374 &update_params)) { 2375 release_mac = new_smac; 2376 goto unlock; 2377 } 2378 /* if old port was zero, no mac was yet registered for this QP */ 2379 if (qp->pri.smac_port) 2380 release_mac = old_smac; 2381 qp->pri.smac = new_smac; 2382 qp->pri.smac_port = port; 2383 qp->pri.smac_index = new_smac_index; 2384 } 2385 2386 unlock: 2387 if (release_mac != MLX4_IB_INVALID_MAC) 2388 mlx4_unregister_mac(ibdev->dev, port, release_mac); 2389 if (qp) 2390 mutex_unlock(&qp->mutex); 2391 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); 2392 } 2393 2394 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev, 2395 struct net_device *dev, 2396 unsigned long event) 2397 2398 { 2399 struct mlx4_ib_iboe *iboe; 2400 int update_qps_port = -1; 2401 int port; 2402 2403 ASSERT_RTNL(); 2404 2405 iboe = &ibdev->iboe; 2406 2407 spin_lock_bh(&iboe->lock); 2408 mlx4_foreach_ib_transport_port(port, ibdev->dev) { 2409 2410 iboe->netdevs[port - 1] = 2411 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port); 2412 2413 if (dev == iboe->netdevs[port - 1] && 2414 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || 2415 event == NETDEV_UP || event == NETDEV_CHANGE)) 2416 update_qps_port = port; 2417 2418 } 2419 spin_unlock_bh(&iboe->lock); 2420 2421 if (update_qps_port > 0) 2422 mlx4_ib_update_qps(ibdev, dev, update_qps_port); 2423 } 2424 2425 static int mlx4_ib_netdev_event(struct notifier_block *this, 2426 unsigned long event, void *ptr) 2427 { 2428 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 2429 struct mlx4_ib_dev *ibdev; 2430 2431 if (!net_eq(dev_net(dev), &init_net)) 2432 return NOTIFY_DONE; 2433 2434 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); 2435 mlx4_ib_scan_netdevs(ibdev, dev, event); 2436 2437 return NOTIFY_DONE; 2438 } 2439 2440 static void init_pkeys(struct mlx4_ib_dev *ibdev) 2441 { 2442 int port; 2443 int slave; 2444 int i; 2445 2446 if (mlx4_is_master(ibdev->dev)) { 2447 for (slave = 0; slave <= ibdev->dev->persist->num_vfs; 2448 ++slave) { 2449 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2450 for (i = 0; 2451 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2452 ++i) { 2453 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] = 2454 /* master has the identity virt2phys pkey mapping */ 2455 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i : 2456 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1; 2457 mlx4_sync_pkey_table(ibdev->dev, slave, port, i, 2458 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]); 2459 } 2460 } 2461 } 2462 /* initialize pkey cache */ 2463 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) { 2464 for (i = 0; 2465 i < ibdev->dev->phys_caps.pkey_phys_table_len[port]; 2466 ++i) 2467 ibdev->pkeys.phys_pkey_cache[port-1][i] = 2468 (i) ? 0 : 0xFFFF; 2469 } 2470 } 2471 } 2472 2473 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2474 { 2475 int i, j, eq = 0, total_eqs = 0; 2476 2477 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors, 2478 sizeof(ibdev->eq_table[0]), GFP_KERNEL); 2479 if (!ibdev->eq_table) 2480 return; 2481 2482 for (i = 1; i <= dev->caps.num_ports; i++) { 2483 for (j = 0; j < mlx4_get_eqs_per_port(dev, i); 2484 j++, total_eqs++) { 2485 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs)) 2486 continue; 2487 ibdev->eq_table[eq] = total_eqs; 2488 if (!mlx4_assign_eq(dev, i, 2489 &ibdev->eq_table[eq])) 2490 eq++; 2491 else 2492 ibdev->eq_table[eq] = -1; 2493 } 2494 } 2495 2496 for (i = eq; i < dev->caps.num_comp_vectors; 2497 ibdev->eq_table[i++] = -1) 2498 ; 2499 2500 /* Advertise the new number of EQs to clients */ 2501 ibdev->ib_dev.num_comp_vectors = eq; 2502 } 2503 2504 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev) 2505 { 2506 int i; 2507 int total_eqs = ibdev->ib_dev.num_comp_vectors; 2508 2509 /* no eqs were allocated */ 2510 if (!ibdev->eq_table) 2511 return; 2512 2513 /* Reset the advertised EQ number */ 2514 ibdev->ib_dev.num_comp_vectors = 0; 2515 2516 for (i = 0; i < total_eqs; i++) 2517 mlx4_release_eq(dev, ibdev->eq_table[i]); 2518 2519 kfree(ibdev->eq_table); 2520 ibdev->eq_table = NULL; 2521 } 2522 2523 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num, 2524 struct ib_port_immutable *immutable) 2525 { 2526 struct ib_port_attr attr; 2527 struct mlx4_ib_dev *mdev = to_mdev(ibdev); 2528 int err; 2529 2530 err = mlx4_ib_query_port(ibdev, port_num, &attr); 2531 if (err) 2532 return err; 2533 2534 immutable->pkey_tbl_len = attr.pkey_tbl_len; 2535 immutable->gid_tbl_len = attr.gid_tbl_len; 2536 2537 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) { 2538 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB; 2539 } else { 2540 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) 2541 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; 2542 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) 2543 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE | 2544 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; 2545 } 2546 2547 immutable->max_mad_size = IB_MGMT_MAD_SIZE; 2548 2549 return 0; 2550 } 2551 2552 static void get_fw_ver_str(struct ib_device *device, char *str, 2553 size_t str_len) 2554 { 2555 struct mlx4_ib_dev *dev = 2556 container_of(device, struct mlx4_ib_dev, ib_dev); 2557 snprintf(str, str_len, "%d.%d.%d", 2558 (int) (dev->dev->caps.fw_ver >> 32), 2559 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff, 2560 (int) dev->dev->caps.fw_ver & 0xffff); 2561 } 2562 2563 static void *mlx4_ib_add(struct mlx4_dev *dev) 2564 { 2565 struct mlx4_ib_dev *ibdev; 2566 int num_ports = 0; 2567 int i, j; 2568 int err; 2569 struct mlx4_ib_iboe *iboe; 2570 int ib_num_ports = 0; 2571 int num_req_counters; 2572 int allocated; 2573 u32 counter_index; 2574 struct counter_index *new_counter_index = NULL; 2575 2576 pr_info_once("%s", mlx4_ib_version); 2577 2578 num_ports = 0; 2579 mlx4_foreach_ib_transport_port(i, dev) 2580 num_ports++; 2581 2582 /* No point in registering a device with no ports... */ 2583 if (num_ports == 0) 2584 return NULL; 2585 2586 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev); 2587 if (!ibdev) { 2588 dev_err(&dev->persist->pdev->dev, 2589 "Device struct alloc failed\n"); 2590 return NULL; 2591 } 2592 2593 iboe = &ibdev->iboe; 2594 2595 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn)) 2596 goto err_dealloc; 2597 2598 if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) 2599 goto err_pd; 2600 2601 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, 2602 PAGE_SIZE); 2603 if (!ibdev->uar_map) 2604 goto err_uar; 2605 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); 2606 2607 ibdev->dev = dev; 2608 ibdev->bond_next_port = 0; 2609 2610 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX); 2611 ibdev->ib_dev.owner = THIS_MODULE; 2612 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA; 2613 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey; 2614 ibdev->num_ports = num_ports; 2615 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ? 2616 1 : ibdev->num_ports; 2617 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors; 2618 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev; 2619 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev; 2620 ibdev->ib_dev.add_gid = mlx4_ib_add_gid; 2621 ibdev->ib_dev.del_gid = mlx4_ib_del_gid; 2622 2623 if (dev->caps.userspace_caps) 2624 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION; 2625 else 2626 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION; 2627 2628 ibdev->ib_dev.uverbs_cmd_mask = 2629 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 2630 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 2631 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 2632 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 2633 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 2634 (1ull << IB_USER_VERBS_CMD_REG_MR) | 2635 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 2636 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 2637 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 2638 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 2639 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 2640 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 2641 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 2642 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 2643 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 2644 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 2645 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 2646 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 2647 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 2648 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 2649 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 2650 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 2651 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 2652 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 2653 2654 ibdev->ib_dev.query_device = mlx4_ib_query_device; 2655 ibdev->ib_dev.query_port = mlx4_ib_query_port; 2656 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer; 2657 ibdev->ib_dev.query_gid = mlx4_ib_query_gid; 2658 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey; 2659 ibdev->ib_dev.modify_device = mlx4_ib_modify_device; 2660 ibdev->ib_dev.modify_port = mlx4_ib_modify_port; 2661 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext; 2662 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext; 2663 ibdev->ib_dev.mmap = mlx4_ib_mmap; 2664 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd; 2665 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd; 2666 ibdev->ib_dev.create_ah = mlx4_ib_create_ah; 2667 ibdev->ib_dev.query_ah = mlx4_ib_query_ah; 2668 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah; 2669 ibdev->ib_dev.create_srq = mlx4_ib_create_srq; 2670 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq; 2671 ibdev->ib_dev.query_srq = mlx4_ib_query_srq; 2672 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq; 2673 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv; 2674 ibdev->ib_dev.create_qp = mlx4_ib_create_qp; 2675 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp; 2676 ibdev->ib_dev.query_qp = mlx4_ib_query_qp; 2677 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp; 2678 ibdev->ib_dev.post_send = mlx4_ib_post_send; 2679 ibdev->ib_dev.post_recv = mlx4_ib_post_recv; 2680 ibdev->ib_dev.create_cq = mlx4_ib_create_cq; 2681 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq; 2682 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq; 2683 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq; 2684 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq; 2685 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq; 2686 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr; 2687 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr; 2688 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr; 2689 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr; 2690 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr; 2691 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg; 2692 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach; 2693 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach; 2694 ibdev->ib_dev.process_mad = mlx4_ib_process_mad; 2695 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable; 2696 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str; 2697 ibdev->ib_dev.disassociate_ucontext = mlx4_ib_disassociate_ucontext; 2698 2699 if (!mlx4_is_slave(ibdev->dev)) { 2700 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc; 2701 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr; 2702 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr; 2703 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc; 2704 } 2705 2706 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || 2707 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) { 2708 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw; 2709 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw; 2710 2711 ibdev->ib_dev.uverbs_cmd_mask |= 2712 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) | 2713 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW); 2714 } 2715 2716 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 2717 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd; 2718 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd; 2719 ibdev->ib_dev.uverbs_cmd_mask |= 2720 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 2721 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 2722 } 2723 2724 if (check_flow_steering_support(dev)) { 2725 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED; 2726 ibdev->ib_dev.create_flow = mlx4_ib_create_flow; 2727 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow; 2728 2729 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2730 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) | 2731 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW); 2732 } 2733 2734 ibdev->ib_dev.uverbs_ex_cmd_mask |= 2735 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) | 2736 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) | 2737 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP); 2738 2739 mlx4_ib_alloc_eqs(dev, ibdev); 2740 2741 spin_lock_init(&iboe->lock); 2742 2743 if (init_node_data(ibdev)) 2744 goto err_map; 2745 mlx4_init_sl2vl_tbl(ibdev); 2746 2747 for (i = 0; i < ibdev->num_ports; ++i) { 2748 mutex_init(&ibdev->counters_table[i].mutex); 2749 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list); 2750 } 2751 2752 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports; 2753 for (i = 0; i < num_req_counters; ++i) { 2754 mutex_init(&ibdev->qp1_proxy_lock[i]); 2755 allocated = 0; 2756 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == 2757 IB_LINK_LAYER_ETHERNET) { 2758 err = mlx4_counter_alloc(ibdev->dev, &counter_index); 2759 /* if failed to allocate a new counter, use default */ 2760 if (err) 2761 counter_index = 2762 mlx4_get_default_counter_index(dev, 2763 i + 1); 2764 else 2765 allocated = 1; 2766 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */ 2767 counter_index = mlx4_get_default_counter_index(dev, 2768 i + 1); 2769 } 2770 new_counter_index = kmalloc(sizeof(*new_counter_index), 2771 GFP_KERNEL); 2772 if (!new_counter_index) { 2773 if (allocated) 2774 mlx4_counter_free(ibdev->dev, counter_index); 2775 goto err_counter; 2776 } 2777 new_counter_index->index = counter_index; 2778 new_counter_index->allocated = allocated; 2779 list_add_tail(&new_counter_index->list, 2780 &ibdev->counters_table[i].counters_list); 2781 ibdev->counters_table[i].default_counter = counter_index; 2782 pr_info("counter index %d for port %d allocated %d\n", 2783 counter_index, i + 1, allocated); 2784 } 2785 if (mlx4_is_bonded(dev)) 2786 for (i = 1; i < ibdev->num_ports ; ++i) { 2787 new_counter_index = 2788 kmalloc(sizeof(struct counter_index), 2789 GFP_KERNEL); 2790 if (!new_counter_index) 2791 goto err_counter; 2792 new_counter_index->index = counter_index; 2793 new_counter_index->allocated = 0; 2794 list_add_tail(&new_counter_index->list, 2795 &ibdev->counters_table[i].counters_list); 2796 ibdev->counters_table[i].default_counter = 2797 counter_index; 2798 } 2799 2800 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2801 ib_num_ports++; 2802 2803 spin_lock_init(&ibdev->sm_lock); 2804 mutex_init(&ibdev->cap_mask_mutex); 2805 INIT_LIST_HEAD(&ibdev->qp_list); 2806 spin_lock_init(&ibdev->reset_flow_resource_lock); 2807 2808 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED && 2809 ib_num_ports) { 2810 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS; 2811 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count, 2812 MLX4_IB_UC_STEER_QPN_ALIGN, 2813 &ibdev->steer_qpn_base, 0); 2814 if (err) 2815 goto err_counter; 2816 2817 ibdev->ib_uc_qpns_bitmap = 2818 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) * 2819 sizeof(long), 2820 GFP_KERNEL); 2821 if (!ibdev->ib_uc_qpns_bitmap) 2822 goto err_steer_qp_release; 2823 2824 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) { 2825 bitmap_zero(ibdev->ib_uc_qpns_bitmap, 2826 ibdev->steer_qpn_count); 2827 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE( 2828 dev, ibdev->steer_qpn_base, 2829 ibdev->steer_qpn_base + 2830 ibdev->steer_qpn_count - 1); 2831 if (err) 2832 goto err_steer_free_bitmap; 2833 } else { 2834 bitmap_fill(ibdev->ib_uc_qpns_bitmap, 2835 ibdev->steer_qpn_count); 2836 } 2837 } 2838 2839 for (j = 1; j <= ibdev->dev->caps.num_ports; j++) 2840 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]); 2841 2842 if (mlx4_ib_alloc_diag_counters(ibdev)) 2843 goto err_steer_free_bitmap; 2844 2845 if (ib_register_device(&ibdev->ib_dev, NULL)) 2846 goto err_diag_counters; 2847 2848 if (mlx4_ib_mad_init(ibdev)) 2849 goto err_reg; 2850 2851 if (mlx4_ib_init_sriov(ibdev)) 2852 goto err_mad; 2853 2854 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE || 2855 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2856 if (!iboe->nb.notifier_call) { 2857 iboe->nb.notifier_call = mlx4_ib_netdev_event; 2858 err = register_netdevice_notifier(&iboe->nb); 2859 if (err) { 2860 iboe->nb.notifier_call = NULL; 2861 goto err_notif; 2862 } 2863 } 2864 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { 2865 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT); 2866 if (err) { 2867 goto err_notif; 2868 } 2869 } 2870 } 2871 2872 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) { 2873 if (device_create_file(&ibdev->ib_dev.dev, 2874 mlx4_class_attributes[j])) 2875 goto err_notif; 2876 } 2877 2878 ibdev->ib_active = true; 2879 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 2880 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i), 2881 &ibdev->ib_dev); 2882 2883 if (mlx4_is_mfunc(ibdev->dev)) 2884 init_pkeys(ibdev); 2885 2886 /* create paravirt contexts for any VFs which are active */ 2887 if (mlx4_is_master(ibdev->dev)) { 2888 for (j = 0; j < MLX4_MFUNC_MAX; j++) { 2889 if (j == mlx4_master_func_num(ibdev->dev)) 2890 continue; 2891 if (mlx4_is_slave_active(ibdev->dev, j)) 2892 do_slave_init(ibdev, j, 1); 2893 } 2894 } 2895 return ibdev; 2896 2897 err_notif: 2898 if (ibdev->iboe.nb.notifier_call) { 2899 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 2900 pr_warn("failure unregistering notifier\n"); 2901 ibdev->iboe.nb.notifier_call = NULL; 2902 } 2903 flush_workqueue(wq); 2904 2905 mlx4_ib_close_sriov(ibdev); 2906 2907 err_mad: 2908 mlx4_ib_mad_cleanup(ibdev); 2909 2910 err_reg: 2911 ib_unregister_device(&ibdev->ib_dev); 2912 2913 err_diag_counters: 2914 mlx4_ib_diag_cleanup(ibdev); 2915 2916 err_steer_free_bitmap: 2917 kfree(ibdev->ib_uc_qpns_bitmap); 2918 2919 err_steer_qp_release: 2920 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) 2921 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 2922 ibdev->steer_qpn_count); 2923 err_counter: 2924 for (i = 0; i < ibdev->num_ports; ++i) 2925 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]); 2926 2927 err_map: 2928 iounmap(ibdev->uar_map); 2929 2930 err_uar: 2931 mlx4_uar_free(dev, &ibdev->priv_uar); 2932 2933 err_pd: 2934 mlx4_pd_free(dev, ibdev->priv_pdn); 2935 2936 err_dealloc: 2937 ib_dealloc_device(&ibdev->ib_dev); 2938 2939 return NULL; 2940 } 2941 2942 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn) 2943 { 2944 int offset; 2945 2946 WARN_ON(!dev->ib_uc_qpns_bitmap); 2947 2948 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap, 2949 dev->steer_qpn_count, 2950 get_count_order(count)); 2951 if (offset < 0) 2952 return offset; 2953 2954 *qpn = dev->steer_qpn_base + offset; 2955 return 0; 2956 } 2957 2958 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count) 2959 { 2960 if (!qpn || 2961 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED) 2962 return; 2963 2964 BUG_ON(qpn < dev->steer_qpn_base); 2965 2966 bitmap_release_region(dev->ib_uc_qpns_bitmap, 2967 qpn - dev->steer_qpn_base, 2968 get_count_order(count)); 2969 } 2970 2971 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 2972 int is_attach) 2973 { 2974 int err; 2975 size_t flow_size; 2976 struct ib_flow_attr *flow = NULL; 2977 struct ib_flow_spec_ib *ib_spec; 2978 2979 if (is_attach) { 2980 flow_size = sizeof(struct ib_flow_attr) + 2981 sizeof(struct ib_flow_spec_ib); 2982 flow = kzalloc(flow_size, GFP_KERNEL); 2983 if (!flow) 2984 return -ENOMEM; 2985 flow->port = mqp->port; 2986 flow->num_of_specs = 1; 2987 flow->size = flow_size; 2988 ib_spec = (struct ib_flow_spec_ib *)(flow + 1); 2989 ib_spec->type = IB_FLOW_SPEC_IB; 2990 ib_spec->size = sizeof(struct ib_flow_spec_ib); 2991 /* Add an empty rule for IB L2 */ 2992 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask)); 2993 2994 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, 2995 IB_FLOW_DOMAIN_NIC, 2996 MLX4_FS_REGULAR, 2997 &mqp->reg_id); 2998 } else { 2999 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id); 3000 } 3001 kfree(flow); 3002 return err; 3003 } 3004 3005 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr) 3006 { 3007 struct mlx4_ib_dev *ibdev = ibdev_ptr; 3008 int p; 3009 int i; 3010 3011 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) 3012 devlink_port_type_clear(mlx4_get_devlink_port(dev, i)); 3013 ibdev->ib_active = false; 3014 flush_workqueue(wq); 3015 3016 mlx4_ib_close_sriov(ibdev); 3017 mlx4_ib_mad_cleanup(ibdev); 3018 ib_unregister_device(&ibdev->ib_dev); 3019 mlx4_ib_diag_cleanup(ibdev); 3020 if (ibdev->iboe.nb.notifier_call) { 3021 if (unregister_netdevice_notifier(&ibdev->iboe.nb)) 3022 pr_warn("failure unregistering notifier\n"); 3023 ibdev->iboe.nb.notifier_call = NULL; 3024 } 3025 3026 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) { 3027 mlx4_qp_release_range(dev, ibdev->steer_qpn_base, 3028 ibdev->steer_qpn_count); 3029 kfree(ibdev->ib_uc_qpns_bitmap); 3030 } 3031 3032 iounmap(ibdev->uar_map); 3033 for (p = 0; p < ibdev->num_ports; ++p) 3034 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]); 3035 3036 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB) 3037 mlx4_CLOSE_PORT(dev, p); 3038 3039 mlx4_ib_free_eqs(dev, ibdev); 3040 3041 mlx4_uar_free(dev, &ibdev->priv_uar); 3042 mlx4_pd_free(dev, ibdev->priv_pdn); 3043 ib_dealloc_device(&ibdev->ib_dev); 3044 } 3045 3046 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init) 3047 { 3048 struct mlx4_ib_demux_work **dm = NULL; 3049 struct mlx4_dev *dev = ibdev->dev; 3050 int i; 3051 unsigned long flags; 3052 struct mlx4_active_ports actv_ports; 3053 unsigned int ports; 3054 unsigned int first_port; 3055 3056 if (!mlx4_is_master(dev)) 3057 return; 3058 3059 actv_ports = mlx4_get_active_ports(dev, slave); 3060 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports); 3061 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports); 3062 3063 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC); 3064 if (!dm) 3065 return; 3066 3067 for (i = 0; i < ports; i++) { 3068 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC); 3069 if (!dm[i]) { 3070 while (--i >= 0) 3071 kfree(dm[i]); 3072 goto out; 3073 } 3074 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work); 3075 dm[i]->port = first_port + i + 1; 3076 dm[i]->slave = slave; 3077 dm[i]->do_init = do_init; 3078 dm[i]->dev = ibdev; 3079 } 3080 /* initialize or tear down tunnel QPs for the slave */ 3081 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags); 3082 if (!ibdev->sriov.is_going_down) { 3083 for (i = 0; i < ports; i++) 3084 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work); 3085 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3086 } else { 3087 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags); 3088 for (i = 0; i < ports; i++) 3089 kfree(dm[i]); 3090 } 3091 out: 3092 kfree(dm); 3093 return; 3094 } 3095 3096 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev) 3097 { 3098 struct mlx4_ib_qp *mqp; 3099 unsigned long flags_qp; 3100 unsigned long flags_cq; 3101 struct mlx4_ib_cq *send_mcq, *recv_mcq; 3102 struct list_head cq_notify_list; 3103 struct mlx4_cq *mcq; 3104 unsigned long flags; 3105 3106 pr_warn("mlx4_ib_handle_catas_error was started\n"); 3107 INIT_LIST_HEAD(&cq_notify_list); 3108 3109 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/ 3110 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags); 3111 3112 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) { 3113 spin_lock_irqsave(&mqp->sq.lock, flags_qp); 3114 if (mqp->sq.tail != mqp->sq.head) { 3115 send_mcq = to_mcq(mqp->ibqp.send_cq); 3116 spin_lock_irqsave(&send_mcq->lock, flags_cq); 3117 if (send_mcq->mcq.comp && 3118 mqp->ibqp.send_cq->comp_handler) { 3119 if (!send_mcq->mcq.reset_notify_added) { 3120 send_mcq->mcq.reset_notify_added = 1; 3121 list_add_tail(&send_mcq->mcq.reset_notify, 3122 &cq_notify_list); 3123 } 3124 } 3125 spin_unlock_irqrestore(&send_mcq->lock, flags_cq); 3126 } 3127 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp); 3128 /* Now, handle the QP's receive queue */ 3129 spin_lock_irqsave(&mqp->rq.lock, flags_qp); 3130 /* no handling is needed for SRQ */ 3131 if (!mqp->ibqp.srq) { 3132 if (mqp->rq.tail != mqp->rq.head) { 3133 recv_mcq = to_mcq(mqp->ibqp.recv_cq); 3134 spin_lock_irqsave(&recv_mcq->lock, flags_cq); 3135 if (recv_mcq->mcq.comp && 3136 mqp->ibqp.recv_cq->comp_handler) { 3137 if (!recv_mcq->mcq.reset_notify_added) { 3138 recv_mcq->mcq.reset_notify_added = 1; 3139 list_add_tail(&recv_mcq->mcq.reset_notify, 3140 &cq_notify_list); 3141 } 3142 } 3143 spin_unlock_irqrestore(&recv_mcq->lock, 3144 flags_cq); 3145 } 3146 } 3147 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp); 3148 } 3149 3150 list_for_each_entry(mcq, &cq_notify_list, reset_notify) { 3151 mcq->comp(mcq); 3152 } 3153 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags); 3154 pr_warn("mlx4_ib_handle_catas_error ended\n"); 3155 } 3156 3157 static void handle_bonded_port_state_event(struct work_struct *work) 3158 { 3159 struct ib_event_work *ew = 3160 container_of(work, struct ib_event_work, work); 3161 struct mlx4_ib_dev *ibdev = ew->ib_dev; 3162 enum ib_port_state bonded_port_state = IB_PORT_NOP; 3163 int i; 3164 struct ib_event ibev; 3165 3166 kfree(ew); 3167 spin_lock_bh(&ibdev->iboe.lock); 3168 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 3169 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 3170 enum ib_port_state curr_port_state; 3171 3172 if (!curr_netdev) 3173 continue; 3174 3175 curr_port_state = 3176 (netif_running(curr_netdev) && 3177 netif_carrier_ok(curr_netdev)) ? 3178 IB_PORT_ACTIVE : IB_PORT_DOWN; 3179 3180 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ? 3181 curr_port_state : IB_PORT_ACTIVE; 3182 } 3183 spin_unlock_bh(&ibdev->iboe.lock); 3184 3185 ibev.device = &ibdev->ib_dev; 3186 ibev.element.port_num = 1; 3187 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ? 3188 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 3189 3190 ib_dispatch_event(&ibev); 3191 } 3192 3193 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port) 3194 { 3195 u64 sl2vl; 3196 int err; 3197 3198 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl); 3199 if (err) { 3200 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n", 3201 port, err); 3202 sl2vl = 0; 3203 } 3204 atomic64_set(&mdev->sl2vl[port - 1], sl2vl); 3205 } 3206 3207 static void ib_sl2vl_update_work(struct work_struct *work) 3208 { 3209 struct ib_event_work *ew = container_of(work, struct ib_event_work, work); 3210 struct mlx4_ib_dev *mdev = ew->ib_dev; 3211 int port = ew->port; 3212 3213 mlx4_ib_sl2vl_update(mdev, port); 3214 3215 kfree(ew); 3216 } 3217 3218 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev, 3219 int port) 3220 { 3221 struct ib_event_work *ew; 3222 3223 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3224 if (ew) { 3225 INIT_WORK(&ew->work, ib_sl2vl_update_work); 3226 ew->port = port; 3227 ew->ib_dev = ibdev; 3228 queue_work(wq, &ew->work); 3229 } 3230 } 3231 3232 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr, 3233 enum mlx4_dev_event event, unsigned long param) 3234 { 3235 struct ib_event ibev; 3236 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr); 3237 struct mlx4_eqe *eqe = NULL; 3238 struct ib_event_work *ew; 3239 int p = 0; 3240 3241 if (mlx4_is_bonded(dev) && 3242 ((event == MLX4_DEV_EVENT_PORT_UP) || 3243 (event == MLX4_DEV_EVENT_PORT_DOWN))) { 3244 ew = kmalloc(sizeof(*ew), GFP_ATOMIC); 3245 if (!ew) 3246 return; 3247 INIT_WORK(&ew->work, handle_bonded_port_state_event); 3248 ew->ib_dev = ibdev; 3249 queue_work(wq, &ew->work); 3250 return; 3251 } 3252 3253 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE) 3254 eqe = (struct mlx4_eqe *)param; 3255 else 3256 p = (int) param; 3257 3258 switch (event) { 3259 case MLX4_DEV_EVENT_PORT_UP: 3260 if (p > ibdev->num_ports) 3261 return; 3262 if (!mlx4_is_slave(dev) && 3263 rdma_port_get_link_layer(&ibdev->ib_dev, p) == 3264 IB_LINK_LAYER_INFINIBAND) { 3265 if (mlx4_is_master(dev)) 3266 mlx4_ib_invalidate_all_guid_record(ibdev, p); 3267 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST && 3268 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) 3269 mlx4_sched_ib_sl2vl_update_work(ibdev, p); 3270 } 3271 ibev.event = IB_EVENT_PORT_ACTIVE; 3272 break; 3273 3274 case MLX4_DEV_EVENT_PORT_DOWN: 3275 if (p > ibdev->num_ports) 3276 return; 3277 ibev.event = IB_EVENT_PORT_ERR; 3278 break; 3279 3280 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: 3281 ibdev->ib_active = false; 3282 ibev.event = IB_EVENT_DEVICE_FATAL; 3283 mlx4_ib_handle_catas_error(ibdev); 3284 break; 3285 3286 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE: 3287 ew = kmalloc(sizeof *ew, GFP_ATOMIC); 3288 if (!ew) 3289 break; 3290 3291 INIT_WORK(&ew->work, handle_port_mgmt_change_event); 3292 memcpy(&ew->ib_eqe, eqe, sizeof *eqe); 3293 ew->ib_dev = ibdev; 3294 /* need to queue only for port owner, which uses GEN_EQE */ 3295 if (mlx4_is_master(dev)) 3296 queue_work(wq, &ew->work); 3297 else 3298 handle_port_mgmt_change_event(&ew->work); 3299 return; 3300 3301 case MLX4_DEV_EVENT_SLAVE_INIT: 3302 /* here, p is the slave id */ 3303 do_slave_init(ibdev, p, 1); 3304 if (mlx4_is_master(dev)) { 3305 int i; 3306 3307 for (i = 1; i <= ibdev->num_ports; i++) { 3308 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3309 == IB_LINK_LAYER_INFINIBAND) 3310 mlx4_ib_slave_alias_guid_event(ibdev, 3311 p, i, 3312 1); 3313 } 3314 } 3315 return; 3316 3317 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: 3318 if (mlx4_is_master(dev)) { 3319 int i; 3320 3321 for (i = 1; i <= ibdev->num_ports; i++) { 3322 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) 3323 == IB_LINK_LAYER_INFINIBAND) 3324 mlx4_ib_slave_alias_guid_event(ibdev, 3325 p, i, 3326 0); 3327 } 3328 } 3329 /* here, p is the slave id */ 3330 do_slave_init(ibdev, p, 0); 3331 return; 3332 3333 default: 3334 return; 3335 } 3336 3337 ibev.device = ibdev_ptr; 3338 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p; 3339 3340 ib_dispatch_event(&ibev); 3341 } 3342 3343 static struct mlx4_interface mlx4_ib_interface = { 3344 .add = mlx4_ib_add, 3345 .remove = mlx4_ib_remove, 3346 .event = mlx4_ib_event, 3347 .protocol = MLX4_PROT_IB_IPV6, 3348 .flags = MLX4_INTFF_BONDING 3349 }; 3350 3351 static int __init mlx4_ib_init(void) 3352 { 3353 int err; 3354 3355 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM); 3356 if (!wq) 3357 return -ENOMEM; 3358 3359 err = mlx4_ib_mcg_init(); 3360 if (err) 3361 goto clean_wq; 3362 3363 err = mlx4_register_interface(&mlx4_ib_interface); 3364 if (err) 3365 goto clean_mcg; 3366 3367 return 0; 3368 3369 clean_mcg: 3370 mlx4_ib_mcg_destroy(); 3371 3372 clean_wq: 3373 destroy_workqueue(wq); 3374 return err; 3375 } 3376 3377 static void __exit mlx4_ib_cleanup(void) 3378 { 3379 mlx4_unregister_interface(&mlx4_ib_interface); 3380 mlx4_ib_mcg_destroy(); 3381 destroy_workqueue(wq); 3382 } 3383 3384 module_init(mlx4_ib_init); 3385 module_exit(mlx4_ib_cleanup); 3386