1 /* 2 piix4.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and 5 Philip Edelbrock <phil@netroedge.com> 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22 /* 23 Supports: 24 Intel PIIX4, 440MX 25 Serverworks OSB4, CSB5, CSB6 26 SMSC Victory66 27 28 Note: we assume there can only be one device, with one SMBus interface. 29 */ 30 31 #include <linux/module.h> 32 #include <linux/moduleparam.h> 33 #include <linux/pci.h> 34 #include <linux/kernel.h> 35 #include <linux/delay.h> 36 #include <linux/stddef.h> 37 #include <linux/sched.h> 38 #include <linux/ioport.h> 39 #include <linux/i2c.h> 40 #include <linux/init.h> 41 #include <linux/apm_bios.h> 42 #include <linux/dmi.h> 43 #include <asm/io.h> 44 45 46 struct sd { 47 const unsigned short mfr; 48 const unsigned short dev; 49 const unsigned char fn; 50 const char *name; 51 }; 52 53 /* PIIX4 SMBus address offsets */ 54 #define SMBHSTSTS (0 + piix4_smba) 55 #define SMBHSLVSTS (1 + piix4_smba) 56 #define SMBHSTCNT (2 + piix4_smba) 57 #define SMBHSTCMD (3 + piix4_smba) 58 #define SMBHSTADD (4 + piix4_smba) 59 #define SMBHSTDAT0 (5 + piix4_smba) 60 #define SMBHSTDAT1 (6 + piix4_smba) 61 #define SMBBLKDAT (7 + piix4_smba) 62 #define SMBSLVCNT (8 + piix4_smba) 63 #define SMBSHDWCMD (9 + piix4_smba) 64 #define SMBSLVEVT (0xA + piix4_smba) 65 #define SMBSLVDAT (0xC + piix4_smba) 66 67 /* count for request_region */ 68 #define SMBIOSIZE 8 69 70 /* PCI Address Constants */ 71 #define SMBBA 0x090 72 #define SMBHSTCFG 0x0D2 73 #define SMBSLVC 0x0D3 74 #define SMBSHDW1 0x0D4 75 #define SMBSHDW2 0x0D5 76 #define SMBREV 0x0D6 77 78 /* Other settings */ 79 #define MAX_TIMEOUT 500 80 #define ENABLE_INT9 0 81 82 /* PIIX4 constants */ 83 #define PIIX4_QUICK 0x00 84 #define PIIX4_BYTE 0x04 85 #define PIIX4_BYTE_DATA 0x08 86 #define PIIX4_WORD_DATA 0x0C 87 #define PIIX4_BLOCK_DATA 0x14 88 89 /* insmod parameters */ 90 91 /* If force is set to anything different from 0, we forcibly enable the 92 PIIX4. DANGEROUS! */ 93 static int force = 0; 94 module_param (force, int, 0); 95 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!"); 96 97 /* If force_addr is set to anything different from 0, we forcibly enable 98 the PIIX4 at the given address. VERY DANGEROUS! */ 99 static int force_addr = 0; 100 module_param (force_addr, int, 0); 101 MODULE_PARM_DESC(force_addr, 102 "Forcibly enable the PIIX4 at the given address. " 103 "EXTREMELY DANGEROUS!"); 104 105 /* If fix_hstcfg is set to anything different from 0, we reset one of the 106 registers to be a valid value. */ 107 static int fix_hstcfg = 0; 108 module_param (fix_hstcfg, int, 0); 109 MODULE_PARM_DESC(fix_hstcfg, 110 "Fix config register. Needed on some boards (Force CPCI735)."); 111 112 static int piix4_transaction(void); 113 114 static unsigned short piix4_smba = 0; 115 static struct i2c_adapter piix4_adapter; 116 117 static struct dmi_system_id __devinitdata piix4_dmi_table[] = { 118 { 119 .ident = "IBM", 120 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), }, 121 }, 122 { }, 123 }; 124 125 static int __devinit piix4_setup(struct pci_dev *PIIX4_dev, 126 const struct pci_device_id *id) 127 { 128 unsigned char temp; 129 130 /* match up the function */ 131 if (PCI_FUNC(PIIX4_dev->devfn) != id->driver_data) 132 return -ENODEV; 133 134 dev_info(&PIIX4_dev->dev, "Found %s device\n", pci_name(PIIX4_dev)); 135 136 /* Don't access SMBus on IBM systems which get corrupted eeproms */ 137 if (dmi_check_system(piix4_dmi_table) && 138 PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) { 139 dev_err(&PIIX4_dev->dev, "IBM Laptop detected; this module " 140 "may corrupt your serial eeprom! Refusing to load " 141 "module!\n"); 142 return -EPERM; 143 } 144 145 /* Determine the address of the SMBus areas */ 146 if (force_addr) { 147 piix4_smba = force_addr & 0xfff0; 148 force = 0; 149 } else { 150 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba); 151 piix4_smba &= 0xfff0; 152 if(piix4_smba == 0) { 153 dev_err(&PIIX4_dev->dev, "SMB base address " 154 "uninitialized - upgrade BIOS or use " 155 "force_addr=0xaddr\n"); 156 return -ENODEV; 157 } 158 } 159 160 if (!request_region(piix4_smba, SMBIOSIZE, "piix4-smbus")) { 161 dev_err(&PIIX4_dev->dev, "SMB region 0x%x already in use!\n", 162 piix4_smba); 163 return -ENODEV; 164 } 165 166 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp); 167 168 /* Some BIOS will set up the chipset incorrectly and leave a register 169 in an undefined state (causing I2C to act very strangely). */ 170 if (temp & 0x02) { 171 if (fix_hstcfg) { 172 dev_info(&PIIX4_dev->dev, "Working around buggy BIOS " 173 "(I2C)\n"); 174 temp &= 0xfd; 175 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp); 176 } else { 177 dev_info(&PIIX4_dev->dev, "Unusual config register " 178 "value\n"); 179 dev_info(&PIIX4_dev->dev, "Try using fix_hstcfg=1 if " 180 "you experience problems\n"); 181 } 182 } 183 184 /* If force_addr is set, we program the new address here. Just to make 185 sure, we disable the PIIX4 first. */ 186 if (force_addr) { 187 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe); 188 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba); 189 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01); 190 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to " 191 "new address %04x!\n", piix4_smba); 192 } else if ((temp & 1) == 0) { 193 if (force) { 194 /* This should never need to be done, but has been 195 * noted that many Dell machines have the SMBus 196 * interface on the PIIX4 disabled!? NOTE: This assumes 197 * I/O space and other allocations WERE done by the 198 * Bios! Don't complain if your hardware does weird 199 * things after enabling this. :') Check for Bios 200 * updates before resorting to this. 201 */ 202 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, 203 temp | 1); 204 dev_printk(KERN_NOTICE, &PIIX4_dev->dev, 205 "WARNING: SMBus interface has been " 206 "FORCEFULLY ENABLED!\n"); 207 } else { 208 dev_err(&PIIX4_dev->dev, 209 "Host SMBus controller not enabled!\n"); 210 release_region(piix4_smba, SMBIOSIZE); 211 piix4_smba = 0; 212 return -ENODEV; 213 } 214 } 215 216 if ((temp & 0x0E) == 8) 217 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n"); 218 else if ((temp & 0x0E) == 0) 219 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n"); 220 else 221 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration " 222 "(or code out of date)!\n"); 223 224 pci_read_config_byte(PIIX4_dev, SMBREV, &temp); 225 dev_dbg(&PIIX4_dev->dev, "SMBREV = 0x%X\n", temp); 226 dev_dbg(&PIIX4_dev->dev, "SMBA = 0x%X\n", piix4_smba); 227 228 return 0; 229 } 230 231 /* Another internally used function */ 232 static int piix4_transaction(void) 233 { 234 int temp; 235 int result = 0; 236 int timeout = 0; 237 238 dev_dbg(&piix4_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, " 239 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), 240 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 241 inb_p(SMBHSTDAT1)); 242 243 /* Make sure the SMBus host is ready to start transmitting */ 244 if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 245 dev_dbg(&piix4_adapter.dev, "SMBus busy (%02x). " 246 "Resetting... \n", temp); 247 outb_p(temp, SMBHSTSTS); 248 if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 249 dev_err(&piix4_adapter.dev, "Failed! (%02x)\n", temp); 250 return -1; 251 } else { 252 dev_dbg(&piix4_adapter.dev, "Successfull!\n"); 253 } 254 } 255 256 /* start the transaction by setting bit 6 */ 257 outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT); 258 259 /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */ 260 do { 261 msleep(1); 262 temp = inb_p(SMBHSTSTS); 263 } while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT)); 264 265 /* If the SMBus is still busy, we give up */ 266 if (timeout >= MAX_TIMEOUT) { 267 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n"); 268 result = -1; 269 } 270 271 if (temp & 0x10) { 272 result = -1; 273 dev_err(&piix4_adapter.dev, "Error: Failed bus transaction\n"); 274 } 275 276 if (temp & 0x08) { 277 result = -1; 278 dev_dbg(&piix4_adapter.dev, "Bus collision! SMBus may be " 279 "locked until next hard reset. (sorry!)\n"); 280 /* Clock stops and slave is stuck in mid-transmission */ 281 } 282 283 if (temp & 0x04) { 284 result = -1; 285 dev_dbg(&piix4_adapter.dev, "Error: no response!\n"); 286 } 287 288 if (inb_p(SMBHSTSTS) != 0x00) 289 outb_p(inb(SMBHSTSTS), SMBHSTSTS); 290 291 if ((temp = inb_p(SMBHSTSTS)) != 0x00) { 292 dev_err(&piix4_adapter.dev, "Failed reset at end of " 293 "transaction (%02x)\n", temp); 294 } 295 dev_dbg(&piix4_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, " 296 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT), 297 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0), 298 inb_p(SMBHSTDAT1)); 299 return result; 300 } 301 302 /* Return -1 on error. */ 303 static s32 piix4_access(struct i2c_adapter * adap, u16 addr, 304 unsigned short flags, char read_write, 305 u8 command, int size, union i2c_smbus_data * data) 306 { 307 int i, len; 308 309 switch (size) { 310 case I2C_SMBUS_PROC_CALL: 311 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n"); 312 return -1; 313 case I2C_SMBUS_QUICK: 314 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 315 SMBHSTADD); 316 size = PIIX4_QUICK; 317 break; 318 case I2C_SMBUS_BYTE: 319 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 320 SMBHSTADD); 321 if (read_write == I2C_SMBUS_WRITE) 322 outb_p(command, SMBHSTCMD); 323 size = PIIX4_BYTE; 324 break; 325 case I2C_SMBUS_BYTE_DATA: 326 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 327 SMBHSTADD); 328 outb_p(command, SMBHSTCMD); 329 if (read_write == I2C_SMBUS_WRITE) 330 outb_p(data->byte, SMBHSTDAT0); 331 size = PIIX4_BYTE_DATA; 332 break; 333 case I2C_SMBUS_WORD_DATA: 334 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 335 SMBHSTADD); 336 outb_p(command, SMBHSTCMD); 337 if (read_write == I2C_SMBUS_WRITE) { 338 outb_p(data->word & 0xff, SMBHSTDAT0); 339 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1); 340 } 341 size = PIIX4_WORD_DATA; 342 break; 343 case I2C_SMBUS_BLOCK_DATA: 344 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 345 SMBHSTADD); 346 outb_p(command, SMBHSTCMD); 347 if (read_write == I2C_SMBUS_WRITE) { 348 len = data->block[0]; 349 if (len < 0) 350 len = 0; 351 if (len > 32) 352 len = 32; 353 outb_p(len, SMBHSTDAT0); 354 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ 355 for (i = 1; i <= len; i++) 356 outb_p(data->block[i], SMBBLKDAT); 357 } 358 size = PIIX4_BLOCK_DATA; 359 break; 360 } 361 362 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT); 363 364 if (piix4_transaction()) /* Error in transaction */ 365 return -1; 366 367 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK)) 368 return 0; 369 370 371 switch (size) { 372 case PIIX4_BYTE: /* Where is the result put? I assume here it is in 373 SMBHSTDAT0 but it might just as well be in the 374 SMBHSTCMD. No clue in the docs */ 375 376 data->byte = inb_p(SMBHSTDAT0); 377 break; 378 case PIIX4_BYTE_DATA: 379 data->byte = inb_p(SMBHSTDAT0); 380 break; 381 case PIIX4_WORD_DATA: 382 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); 383 break; 384 case PIIX4_BLOCK_DATA: 385 data->block[0] = inb_p(SMBHSTDAT0); 386 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */ 387 for (i = 1; i <= data->block[0]; i++) 388 data->block[i] = inb_p(SMBBLKDAT); 389 break; 390 } 391 return 0; 392 } 393 394 static u32 piix4_func(struct i2c_adapter *adapter) 395 { 396 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 397 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 398 I2C_FUNC_SMBUS_BLOCK_DATA; 399 } 400 401 static struct i2c_algorithm smbus_algorithm = { 402 .name = "Non-I2C SMBus adapter", 403 .id = I2C_ALGO_SMBUS, 404 .smbus_xfer = piix4_access, 405 .functionality = piix4_func, 406 }; 407 408 static struct i2c_adapter piix4_adapter = { 409 .owner = THIS_MODULE, 410 .class = I2C_CLASS_HWMON, 411 .algo = &smbus_algorithm, 412 .name = "unset", 413 }; 414 415 static struct pci_device_id piix4_ids[] = { 416 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3), 417 .driver_data = 3 }, 418 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4), 419 .driver_data = 0 }, 420 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5), 421 .driver_data = 0 }, 422 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6), 423 .driver_data = 0 }, 424 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3), 425 .driver_data = 3 }, 426 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3), 427 .driver_data = 0 }, 428 { 0, } 429 }; 430 431 MODULE_DEVICE_TABLE (pci, piix4_ids); 432 433 static int __devinit piix4_probe(struct pci_dev *dev, 434 const struct pci_device_id *id) 435 { 436 int retval; 437 438 retval = piix4_setup(dev, id); 439 if (retval) 440 return retval; 441 442 /* set up the driverfs linkage to our parent device */ 443 piix4_adapter.dev.parent = &dev->dev; 444 445 snprintf(piix4_adapter.name, I2C_NAME_SIZE, 446 "SMBus PIIX4 adapter at %04x", piix4_smba); 447 448 if ((retval = i2c_add_adapter(&piix4_adapter))) { 449 dev_err(&dev->dev, "Couldn't register adapter!\n"); 450 release_region(piix4_smba, SMBIOSIZE); 451 piix4_smba = 0; 452 } 453 454 return retval; 455 } 456 457 static void __devexit piix4_remove(struct pci_dev *dev) 458 { 459 if (piix4_smba) { 460 i2c_del_adapter(&piix4_adapter); 461 release_region(piix4_smba, SMBIOSIZE); 462 piix4_smba = 0; 463 } 464 } 465 466 static struct pci_driver piix4_driver = { 467 .name = "piix4_smbus", 468 .id_table = piix4_ids, 469 .probe = piix4_probe, 470 .remove = __devexit_p(piix4_remove), 471 }; 472 473 static int __init i2c_piix4_init(void) 474 { 475 return pci_register_driver(&piix4_driver); 476 } 477 478 static void __exit i2c_piix4_exit(void) 479 { 480 pci_unregister_driver(&piix4_driver); 481 } 482 483 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and " 484 "Philip Edelbrock <phil@netroedge.com>"); 485 MODULE_DESCRIPTION("PIIX4 SMBus driver"); 486 MODULE_LICENSE("GPL"); 487 488 module_init(i2c_piix4_init); 489 module_exit(i2c_piix4_exit); 490