xref: /linux/drivers/gpu/nova-core/regs.rs (revision 25489a4f556414445d342951615178368ee45cde)
1 // SPDX-License-Identifier: GPL-2.0
2 
3 // Required to retain the original register names used by OpenRM, which are all capital snake case
4 // but are mapped to types.
5 #![allow(non_camel_case_types)]
6 
7 #[macro_use]
8 mod macros;
9 
10 use crate::gpu::{Architecture, Chipset};
11 use kernel::prelude::*;
12 
13 /* PMC */
14 
15 register!(NV_PMC_BOOT_0 @ 0x00000000, "Basic revision information about the GPU" {
16     3:0     minor_revision as u8, "Minor revision of the chip";
17     7:4     major_revision as u8, "Major revision of the chip";
18     8:8     architecture_1 as u8, "MSB of the architecture";
19     23:20   implementation as u8, "Implementation version of the architecture";
20     28:24   architecture_0 as u8, "Lower bits of the architecture";
21 });
22 
23 impl NV_PMC_BOOT_0 {
24     /// Combines `architecture_0` and `architecture_1` to obtain the architecture of the chip.
25     pub(crate) fn architecture(self) -> Result<Architecture> {
26         Architecture::try_from(
27             self.architecture_0() | (self.architecture_1() << Self::ARCHITECTURE_0.len()),
28         )
29     }
30 
31     /// Combines `architecture` and `implementation` to obtain a code unique to the chipset.
32     pub(crate) fn chipset(self) -> Result<Chipset> {
33         self.architecture()
34             .map(|arch| {
35                 ((arch as u32) << Self::IMPLEMENTATION.len()) | self.implementation() as u32
36             })
37             .and_then(Chipset::try_from)
38     }
39 }
40