xref: /linux/drivers/gpu/drm/xe/abi/guc_scheduler_abi.h (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2025 Intel Corporation
4  */
5 
6 #ifndef _ABI_GUC_SCHEDULER_ABI_H
7 #define _ABI_GUC_SCHEDULER_ABI_H
8 
9 #include <linux/types.h>
10 
11 /*
12  * Generic defines required for registration with and submissions to the GuC
13  * scheduler. Includes engine class/instance defines and context attributes
14  * (id, priority, etc)
15  */
16 
17 /* Engine classes/instances */
18 #define GUC_RENDER_CLASS		0
19 #define GUC_VIDEO_CLASS			1
20 #define GUC_VIDEOENHANCE_CLASS		2
21 #define GUC_BLITTER_CLASS		3
22 #define GUC_COMPUTE_CLASS		4
23 #define GUC_GSC_OTHER_CLASS		5
24 #define GUC_LAST_ENGINE_CLASS		GUC_GSC_OTHER_CLASS
25 #define GUC_MAX_ENGINE_CLASSES		16
26 #define GUC_MAX_INSTANCES_PER_CLASS	32
27 
28 /* context priority values */
29 #define GUC_CLIENT_PRIORITY_KMD_HIGH	0
30 #define GUC_CLIENT_PRIORITY_HIGH	1
31 #define GUC_CLIENT_PRIORITY_KMD_NORMAL	2
32 #define GUC_CLIENT_PRIORITY_NORMAL	3
33 #define GUC_CLIENT_PRIORITY_NUM		4
34 
35 /* Context registration */
36 #define GUC_ID_MAX			65535
37 #define GUC_ID_UNKNOWN			0xffffffff
38 
39 #define CONTEXT_REGISTRATION_FLAG_KMD	        BIT(0)
40 #define CONTEXT_REGISTRATION_FLAG_TYPE	        GENMASK(2, 1)
41 #define   GUC_CONTEXT_NORMAL			0
42 #define   GUC_CONTEXT_COMPRESSION_SAVE		1
43 #define   GUC_CONTEXT_COMPRESSION_RESTORE	2
44 #define   GUC_CONTEXT_COUNT			(GUC_CONTEXT_COMPRESSION_RESTORE + 1)
45 
46 /* context enable/disable */
47 #define GUC_CONTEXT_DISABLE		0
48 #define GUC_CONTEXT_ENABLE		1
49 
50 /* scheduler groups */
51 #define GUC_MAX_SCHED_GROUPS		8
52 
53 struct guc_sched_group {
54 	u32 engines[GUC_MAX_ENGINE_CLASSES];
55 } __packed;
56 
57 #endif
58