1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright 2019 Collabora ltd. */ 3 4 #include <linux/clk.h> 5 #include <linux/devfreq.h> 6 #include <linux/devfreq_cooling.h> 7 #include <linux/platform_device.h> 8 #include <linux/pm_opp.h> 9 10 #include "panfrost_device.h" 11 #include "panfrost_devfreq.h" 12 13 static void panfrost_devfreq_update_utilization(struct panfrost_devfreq *pfdevfreq) 14 { 15 ktime_t now, last; 16 17 now = ktime_get(); 18 last = pfdevfreq->time_last_update; 19 20 if (pfdevfreq->busy_count > 0) 21 pfdevfreq->busy_time += ktime_sub(now, last); 22 else 23 pfdevfreq->idle_time += ktime_sub(now, last); 24 25 pfdevfreq->time_last_update = now; 26 } 27 28 static int panfrost_devfreq_target(struct device *dev, unsigned long *freq, 29 u32 flags) 30 { 31 struct dev_pm_opp *opp; 32 33 opp = devfreq_recommended_opp(dev, freq, flags); 34 if (IS_ERR(opp)) 35 return PTR_ERR(opp); 36 dev_pm_opp_put(opp); 37 38 return dev_pm_opp_set_rate(dev, *freq); 39 } 40 41 static void panfrost_devfreq_reset(struct panfrost_devfreq *pfdevfreq) 42 { 43 pfdevfreq->busy_time = 0; 44 pfdevfreq->idle_time = 0; 45 pfdevfreq->time_last_update = ktime_get(); 46 } 47 48 static int panfrost_devfreq_get_dev_status(struct device *dev, 49 struct devfreq_dev_status *status) 50 { 51 struct panfrost_device *pfdev = dev_get_drvdata(dev); 52 struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; 53 unsigned long irqflags; 54 55 status->current_frequency = clk_get_rate(pfdev->clock); 56 57 spin_lock_irqsave(&pfdevfreq->lock, irqflags); 58 59 panfrost_devfreq_update_utilization(pfdevfreq); 60 61 status->total_time = ktime_to_ns(ktime_add(pfdevfreq->busy_time, 62 pfdevfreq->idle_time)); 63 64 status->busy_time = ktime_to_ns(pfdevfreq->busy_time); 65 66 panfrost_devfreq_reset(pfdevfreq); 67 68 spin_unlock_irqrestore(&pfdevfreq->lock, irqflags); 69 70 dev_dbg(pfdev->dev, "busy %lu total %lu %lu %% freq %lu MHz\n", 71 status->busy_time, status->total_time, 72 status->busy_time / (status->total_time / 100), 73 status->current_frequency / 1000 / 1000); 74 75 return 0; 76 } 77 78 static struct devfreq_dev_profile panfrost_devfreq_profile = { 79 .timer = DEVFREQ_TIMER_DELAYED, 80 .polling_ms = 50, /* ~3 frames */ 81 .target = panfrost_devfreq_target, 82 .get_dev_status = panfrost_devfreq_get_dev_status, 83 }; 84 85 int panfrost_devfreq_init(struct panfrost_device *pfdev) 86 { 87 int ret; 88 struct dev_pm_opp *opp; 89 unsigned long cur_freq; 90 struct device *dev = &pfdev->pdev->dev; 91 struct devfreq *devfreq; 92 struct thermal_cooling_device *cooling; 93 struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; 94 95 if (pfdev->comp->num_supplies > 1) { 96 /* 97 * GPUs with more than 1 supply require platform-specific handling: 98 * continue without devfreq 99 */ 100 DRM_DEV_INFO(dev, "More than 1 supply is not supported yet\n"); 101 return 0; 102 } 103 104 ret = devm_pm_opp_set_regulators(dev, pfdev->comp->supply_names); 105 if (ret) { 106 /* Continue if the optional regulator is missing */ 107 if (ret != -ENODEV) { 108 if (ret != -EPROBE_DEFER) 109 DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n"); 110 return ret; 111 } 112 } 113 114 ret = devm_pm_opp_of_add_table(dev); 115 if (ret) { 116 /* Optional, continue without devfreq */ 117 if (ret == -ENODEV) 118 ret = 0; 119 return ret; 120 } 121 pfdevfreq->opp_of_table_added = true; 122 123 spin_lock_init(&pfdevfreq->lock); 124 125 panfrost_devfreq_reset(pfdevfreq); 126 127 cur_freq = clk_get_rate(pfdev->clock); 128 129 opp = devfreq_recommended_opp(dev, &cur_freq, 0); 130 if (IS_ERR(opp)) 131 return PTR_ERR(opp); 132 133 panfrost_devfreq_profile.initial_freq = cur_freq; 134 dev_pm_opp_put(opp); 135 136 /* 137 * Setup default thresholds for the simple_ondemand governor. 138 * The values are chosen based on experiments. 139 */ 140 pfdevfreq->gov_data.upthreshold = 45; 141 pfdevfreq->gov_data.downdifferential = 5; 142 143 devfreq = devm_devfreq_add_device(dev, &panfrost_devfreq_profile, 144 DEVFREQ_GOV_SIMPLE_ONDEMAND, 145 &pfdevfreq->gov_data); 146 if (IS_ERR(devfreq)) { 147 DRM_DEV_ERROR(dev, "Couldn't initialize GPU devfreq\n"); 148 return PTR_ERR(devfreq); 149 } 150 pfdevfreq->devfreq = devfreq; 151 152 cooling = devfreq_cooling_em_register(devfreq, NULL); 153 if (IS_ERR(cooling)) 154 DRM_DEV_INFO(dev, "Failed to register cooling device\n"); 155 else 156 pfdevfreq->cooling = cooling; 157 158 return 0; 159 } 160 161 void panfrost_devfreq_fini(struct panfrost_device *pfdev) 162 { 163 struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; 164 165 if (pfdevfreq->cooling) { 166 devfreq_cooling_unregister(pfdevfreq->cooling); 167 pfdevfreq->cooling = NULL; 168 } 169 } 170 171 void panfrost_devfreq_resume(struct panfrost_device *pfdev) 172 { 173 struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; 174 175 if (!pfdevfreq->devfreq) 176 return; 177 178 panfrost_devfreq_reset(pfdevfreq); 179 180 devfreq_resume_device(pfdevfreq->devfreq); 181 } 182 183 void panfrost_devfreq_suspend(struct panfrost_device *pfdev) 184 { 185 struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; 186 187 if (!pfdevfreq->devfreq) 188 return; 189 190 devfreq_suspend_device(pfdevfreq->devfreq); 191 } 192 193 void panfrost_devfreq_record_busy(struct panfrost_devfreq *pfdevfreq) 194 { 195 unsigned long irqflags; 196 197 if (!pfdevfreq->devfreq) 198 return; 199 200 spin_lock_irqsave(&pfdevfreq->lock, irqflags); 201 202 panfrost_devfreq_update_utilization(pfdevfreq); 203 204 pfdevfreq->busy_count++; 205 206 spin_unlock_irqrestore(&pfdevfreq->lock, irqflags); 207 } 208 209 void panfrost_devfreq_record_idle(struct panfrost_devfreq *pfdevfreq) 210 { 211 unsigned long irqflags; 212 213 if (!pfdevfreq->devfreq) 214 return; 215 216 spin_lock_irqsave(&pfdevfreq->lock, irqflags); 217 218 panfrost_devfreq_update_utilization(pfdevfreq); 219 220 WARN_ON(--pfdevfreq->busy_count < 0); 221 222 spin_unlock_irqrestore(&pfdevfreq->lock, irqflags); 223 } 224