1 /* SPDX-License-Identifier: MIT 2 * 3 * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. 4 */ 5 #include "priv.h" 6 7 #include <nvhw/drf.h> 8 #include <nvhw/ref/gb202/dev_therm.h> 9 10 static int 11 gb202_fsp_wait_secure_boot(struct nvkm_fsp *fsp) 12 { 13 struct nvkm_device *device = fsp->subdev.device; 14 unsigned timeout_ms = 4000; 15 16 do { 17 u32 status = NVKM_RD32(device, NV_THERM, I2CS_SCRATCH, FSP_BOOT_COMPLETE_STATUS); 18 19 if (status == NV_THERM_I2CS_SCRATCH_FSP_BOOT_COMPLETE_STATUS_SUCCESS) 20 return 0; 21 22 usleep_range(1000, 2000); 23 } while (timeout_ms--); 24 25 return -ETIMEDOUT; 26 } 27 28 static const struct nvkm_fsp_func 29 gb202_fsp = { 30 .wait_secure_boot = gb202_fsp_wait_secure_boot, 31 .cot = { 32 .version = 2, 33 .size_hash = 48, 34 .size_pkey = 97, 35 .size_sig = 96, 36 .boot_gsp_fmc = gh100_fsp_boot_gsp_fmc, 37 }, 38 }; 39 40 int 41 gb202_fsp_new(struct nvkm_device *device, 42 enum nvkm_subdev_type type, int inst, struct nvkm_fsp **pfsp) 43 { 44 return nvkm_fsp_new_(&gb202_fsp, device, type, inst, pfsp); 45 } 46