1<?xml version="1.0" encoding="UTF-8"?> 2<database xmlns="http://nouveau.freedesktop.org/" 3xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" 4xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd"> 5<import file="freedreno_copyright.xml"/> 6<import file="adreno/adreno_common.xml"/> 7<import file="adreno/adreno_pm4.xml"/> 8 9<enum name="a8xx_cp_perfcounter_select"> 10 <value value="0" name="A8XX_PERF_CP_NEVER_COUNT"/> 11 <value value="1" name="A8XX_PERF_CP_ALWAYS_COUNT"/> 12 <value value="2" name="A8XX_PERF_CP_BUSY_GFX_CORE_IDLE"/> 13 <value value="3" name="A8XX_PERF_CP_BUSY_CYCLES"/> 14 <value value="4" name="A8XX_PERF_CP_NUM_PREEMPTIONS"/> 15 <value value="5" name="A8XX_PERF_CP_PREEMPTION_REACTION_DELAY"/> 16 <value value="6" name="A8XX_PERF_CP_PREEMPTION_SWITCH_OUT_TIME"/> 17 <value value="7" name="A8XX_PERF_CP_PREEMPTION_SWITCH_IN_TIME"/> 18 <value value="8" name="A8XX_PERF_CP_DEAD_DRAWS_IN_BIN_RENDER"/> 19 <value value="9" name="A8XX_PERF_CP_PREDICATED_DRAWS_KILLED"/> 20 <value value="10" name="A8XX_PERF_CP_MODE_SWITCH"/> 21 <value value="11" name="A8XX_PERF_CP_ZPASS_DONE"/> 22 <value value="12" name="A8XX_PERF_CP_CONTEXT_DONE"/> 23 <value value="13" name="A8XX_PERF_CP_CACHE_FLUSH"/> 24 <value value="14" name="A8XX_PERF_CP_LONG_PREEMPTIONS"/> 25 <value value="15" name="A8XX_PERF_CP_SQE_I_CACHE_STARVE"/> 26 <value value="16" name="A8XX_PERF_CP_SQE_IDLE"/> 27 <value value="17" name="A8XX_PERF_CP_SQE_PM4_STARVE_RB"/> 28 <value value="18" name="A8XX_PERF_CP_SQE_PM4_STARVE_IB1"/> 29 <value value="19" name="A8XX_PERF_CP_SQE_PM4_STARVE_IB2"/> 30 <value value="20" name="A8XX_PERF_CP_SQE_PM4_STARVE_IB3"/> 31 <value value="21" name="A8XX_PERF_CP_SQE_PM4_STARVE_FSDT"/> 32 <value value="22" name="A8XX_PERF_CP_SQE_PM4_STARVE_SDS"/> 33 <value value="23" name="A8XX_PERF_CP_SQE_MRB_STARVE"/> 34 <value value="24" name="A8XX_PERF_CP_SQE_RRB_STARVE"/> 35 <value value="25" name="A8XX_PERF_CP_SQE_VSD_STARVE"/> 36 <value value="26" name="A8XX_PERF_CP_VSD_DECODE_STARVE"/> 37 <value value="27" name="A8XX_PERF_CP_SQE_PIPE_OUT_STALL"/> 38 <value value="28" name="A8XX_PERF_CP_SQE_SYNC_STALL"/> 39 <value value="29" name="A8XX_PERF_CP_SQE_PM4_WFI_STALL"/> 40 <value value="30" name="A8XX_PERF_CP_SQE_SYS_WFI_STALL"/> 41 <value value="31" name="A8XX_PERF_CP_WAIT_ON_OTHER_PIPE"/> 42 <value value="32" name="A8XX_PERF_CP_OUTPUT_BLOCKED"/> 43 <value value="33" name="A8XX_PERF_CP_SQE_T4_EXEC"/> 44 <value value="34" name="A8XX_PERF_CP_SQE_LOAD_STATE_EXEC"/> 45 <value value="35" name="A8XX_PERF_CP_SQE_SAVE_SDS_STATE"/> 46 <value value="36" name="A8XX_PERF_CP_SQE_DRAW_EXEC"/> 47 <value value="37" name="A8XX_PERF_CP_SQE_CTXT_REG_BUNCH_EXEC"/> 48 <value value="38" name="A8XX_PERF_CP_SQE_EXEC_PROFILED"/> 49 <value value="39" name="A8XX_PERF_CP_MEMORY_POOL_EMPTY"/> 50 <value value="40" name="A8XX_PERF_CP_MEMORY_POOL_SYNC_STALL"/> 51 <value value="41" name="A8XX_PERF_CP_MEMORY_POOL_ABOVE_THRESH"/> 52 <value value="42" name="A8XX_PERF_CP_MEMORY_POOL_BELOW_THRESH"/> 53 <value value="43" name="A8XX_PERF_CP_AHB_WR_STALL_PRE_DRAWS"/> 54 <value value="44" name="A8XX_PERF_CP_AHB_STALL_SQE_GMU"/> 55 <value value="45" name="A8XX_PERF_CP_AHB_STALL_SQE_WR_OTHER"/> 56 <value value="46" name="A8XX_PERF_CP_AHB_STALL_SQE_RD_OTHER"/> 57 <value value="47" name="A8XX_PERF_CP_CLUSTER_FE_U_EMPTY"/> 58 <value value="48" name="A8XX_PERF_CP_CLUSTER_FE_S_EMPTY"/> 59 <value value="49" name="A8XX_PERF_CP_CLUSTER_SP_VS_EMPTY"/> 60 <value value="50" name="A8XX_PERF_CP_CLUSTER_VPC_US_EMPTY"/> 61 <value value="51" name="A8XX_PERF_CP_CLUSTER_VPC_VS_EMPTY"/> 62 <value value="52" name="A8XX_PERF_CP_CLUSTER_GRAS_EMPTY"/> 63 <value value="53" name="A8XX_PERF_CP_CLUSTER_SP_PS_EMPTY"/> 64 <value value="54" name="A8XX_PERF_CP_CLUSTER_VPC_PS_EMPTY"/> 65 <value value="55" name="A8XX_PERF_CP_CLUSTER_PS_EMPTY"/> 66 <value value="56" name="A8XX_PERF_CP_PM4_DATA"/> 67 <value value="57" name="A8XX_PERF_CP_PM4_HEADERS"/> 68 <value value="58" name="A8XX_PERF_CP_VBIF_READ_BEATS"/> 69 <value value="59" name="A8XX_PERF_CP_VBIF_WRITE_BEATS"/> 70 <value value="60" name="A8XX_PERF_CP_SQE_INSTR_COUNTER"/> 71 <value value="61" name="A8XX_PERF_CP_CLUSTER_FE_US_FULL"/> 72 <value value="62" name="A8XX_PERF_CP_CLUSTER_FE_S_FULL"/> 73 <value value="63" name="A8XX_PERF_CP_CLUSTER_SP_VS_FULL"/> 74 <value value="64" name="A8XX_PERF_CP_CLUSTER_VPC_US_FULL"/> 75 <value value="65" name="A8XX_PERF_CP_CLUSTER_VPC_VS_FULL"/> 76 <value value="66" name="A8XX_PERF_CP_CLUSTER_GRAS_FULL"/> 77 <value value="67" name="A8XX_PERF_CP_CLUSTER_SP_PS_FULL"/> 78 <value value="68" name="A8XX_PERF_CP_CLUSTER_VPC_PS_FULL"/> 79 <value value="69" name="A8XX_PERF_CP_CLUSTER_PS_FULL"/> 80 <value value="70" name="A8XX_PERF_CP_ICACHE_MISSES"/> 81 <value value="71" name="A8XX_PERF_CP_ICACHE_HITS"/> 82 <value value="72" name="A8XX_PERF_CP_ICACHE_STALL"/> 83 <value value="73" name="A8XX_PERF_CP_DCACHE_MISSES"/> 84 <value value="74" name="A8XX_PERF_CP_DCACHE_HITS"/> 85 <value value="75" name="A8XX_PERF_CP_DCACHE_STALLS"/> 86 <value value="76" name="A8XX_PERF_CP_AQE_SQE_STALL"/> 87 <value value="77" name="A8XX_PERF_CP_SQE_AQE_STARVE"/> 88 <value value="78" name="A8XX_PERF_CP_ISR_CYCLES"/> 89 <value value="79" name="A8XX_PERF_CP_SQE_MD8_STALL_CYCLES"/> 90 <value value="80" name="A8XX_PERF_CP_SQE_MESH_EXEC_CYCLES"/> 91 <value value="81" name="A8XX_PERF_CP_AQE_NUM_AS_CHUNKS"/> 92 <value value="82" name="A8XX_PERF_CP_AQE_NUM_MS_CHUNKS"/> 93 <value value="83" name="A8XX_PERF_CP_S_SKEW_BUFFER_FULL"/> 94 <value value="84" name="A8XX_PERF_CP_S_SKEW_BUFFER_ABOVE_THRESH"/> 95 <value value="85" name="A8XX_PERF_CP_ECACHE_HITS"/> 96 <value value="86" name="A8XX_PERF_CP_ECACHE_KILLS"/> 97 <value value="87" name="A8XX_PERF_CP_ECACHE_REQS"/> 98 <value value="88" name="A8XX_PERF_CP_ECACHE_EVEN_REQS"/> 99 <value value="89" name="A8XX_PERF_CP_ECACHE_STALLS_RAP"/> 100 <value value="90" name="A8XX_PERF_CP_ECACHE_BUSY"/> 101</enum> 102 103<enum name="a8xx_rbbm_perfcounter_select"> 104 <value value="0" name="A8XX_PERF_RBBM_NEVER_COUNT"/> 105 <value value="1" name="A8XX_PERF_RBBM_US_ALWAYS_COUNT"/> 106 <value value="2" name="A8XX_PERF_RBBM_US_ALWAYS_ON"/> 107 <value value="3" name="A8XX_PERF_RBBM_US_STATUS_MASKED"/> 108 <value value="4" name="A8XX_PERF_RBBM_US_PC_BUSY"/> 109 <value value="5" name="A8XX_PERF_RBBM_US_COM_BUSY"/> 110 <value value="6" name="A8XX_PERF_RBBM_US_DCOM_BUSY"/> 111 <value value="7" name="A8XX_PERF_RBBM_US_VBIF_BUSY"/> 112 <value value="8" name="A8XX_PERF_RBBM_US_VSC_BUSY"/> 113 <value value="9" name="A8XX_PERF_RBBM_US_UCHE_BUSY"/> 114 <value value="10" name="A8XX_PERF_RBBM_US_HLSQ_BUSY"/> 115 <value value="11" name="A8XX_PERF_RBBM_S_HLSQ_BUSY"/> 116 <value value="12" name="A8XX_PERF_RBBM_S_PC_BUSY"/> 117 <value value="13" name="A8XX_PERF_RBBM_S_TESS_BUSY"/> 118 <value value="14" name="A8XX_PERF_RBBM_S_TSEFE_BUSY"/> 119 <value value="15" name="A8XX_PERF_RBBM_S_TSEBE_BUSY"/> 120 <value value="16" name="A8XX_PERF_RBBM_S_RAS_BUSY"/> 121</enum> 122 123<enum name="a8xx_pc_perfcounter_select"> 124 <value value="0" name="A8XX_PERF_PC_NEVER_COUNT"/> 125 <value value="1" name="A8XX_PERF_PC_US_BUSY_CYCLES"/> 126 <value value="2" name="A8XX_PERF_PC_US_WORKING_CYCLES"/> 127 <value value="3" name="A8XX_PERF_PC_US_UCHE_OUTSTANDING_TRANS"/> 128 <value value="4" name="A8XX_PERF_PC_US_PASS1_TF_STALL_CYCLES"/> 129 <value value="5" name="A8XX_PERF_PC_US_STARVE_CYCLES_FOR_INDEX"/> 130 <value value="6" name="A8XX_PERF_PC_US_STARVE_CYCLES_FOR_TF"/> 131 <value value="7" name="A8XX_PERF_PC_US_STARVE_CYCLES_FOR_VIZ_STREAM"/> 132 <value value="8" name="A8XX_PERF_PC_US_STARVE_CYCLES_DI"/> 133 <value value="9" name="A8XX_PERF_PC_US_VIS_STREAMS_LOADED"/> 134 <value value="10" name="A8XX_PERF_PC_US_INSTANCES"/> 135 <value value="11" name="A8XX_PERF_PC_US_DEAD_PRIM"/> 136 <value value="12" name="A8XX_PERF_PC_US_SLICE_LIVE_PRIM"/> 137 <value value="13" name="A8XX_PERF_PC_US_3D_DRAWCALLS"/> 138 <value value="14" name="A8XX_PERF_PC_US_2D_DRAWCALLS"/> 139 <value value="15" name="A8XX_PERF_PC_US_NON_DRAWCALL_GLOBAL_EVENTS"/> 140 <value value="16" name="A8XX_PERF_PC_US_MESH_DRAWS"/> 141 <value value="17" name="A8XX_PERF_PC_US_MESH_DEAD_DRAWS"/> 142 <value value="18" name="A8XX_PERF_PC_US_MESH_MVIS_EN_DRAWS"/> 143 <value value="19" name="A8XX_PERF_PC_US_MESH_DEAD_PRIM"/> 144 <value value="20" name="A8XX_PERF_PC_US_MESH_LIVE_PRIM"/> 145 <value value="21" name="A8XX_PERF_PC_US_MESH_PA_EN_PRIM"/> 146 <value value="22" name="A8XX_PERF_PC_US_STARVE_CYCLES_FOR_MVIS_STREAM"/> 147 <value value="23" name="A8XX_PERF_PC_US_STARVE_CYCLES_PREDRAW"/> 148 <value value="24" name="A8XX_PERF_PC_US_STALL_CYCLES_COMPUTE_GFX"/> 149 <value value="25" name="A8XX_PERF_PC_US_STALL_CYCLES_GFX_COMPUTE"/> 150 <value value="26" name="A8XX_PERF_PC_US_PREDRAW_STALLS"/> 151 <value value="27" name="A8XX_PERF_PC_US_DP0_INPUT_STALLS"/> 152 <value value="28" name="A8XX_PERF_PC_US_DP1_INPUT_STALLS"/> 153 <value value="29" name="A8XX_PERF_PC_US_BR_STALLS_BV_WORKLOAD"/> 154 <value value="30" name="A8XX_PERF_PC_US_BV_STALLS_BR_WORKLOAD"/> 155 <value value="31" name="A8XX_PERF_PC_US_PASSPAIR_STALL"/> 156 <value value="32" name="A8XX_PERF_PC_US_STALL_CYCLES_UCHE0"/> 157 <value value="33" name="A8XX_PERF_PC_US_STALL_CYCLES_UCHE1"/> 158 <value value="34" name="A8XX_PERF_PC_US_UCHE_0_TRANS"/> 159 <value value="35" name="A8XX_PERF_PC_US_UCHE_1_TRANS"/> 160 <value value="36" name="A8XX_PERF_PC_US_BV_STALLED_BY_ATTR"/> 161 <value value="37" name="A8XX_PERF_PC_US_BV_STARVED_BY_RARB"/> 162 <value value="38" name="A8XX_PERF_PC_US_VPC_PRIM_COUNT_STALLS_BR"/> 163 <value value="39" name="A8XX_PERF_PC_US_VPC_PRIM_COUNT_STALLS_BV"/> 164 <value value="40" name="A8XX_PERF_PC_US_BV_STALLED_BY_UCHE_FEEDBACK"/> 165 <value value="41" name="A8XX_PERF_PC_US_VSD_RARB_DVIZ_FULL"/> 166 <value value="42" name="A8XX_PERF_PC_US_VSD_RARB_PVIZ_FULL"/> 167 <value value="43" name="A8XX_PERF_PC_US_VSD_RARB_TVIZ_FULL"/> 168 <value value="44" name="A8XX_PERF_PC_US_DP0_RARB_FULL"/> 169 <value value="45" name="A8XX_PERF_PC_US_DP1_RARB_FULL"/> 170 <value value="46" name="A8XX_PERF_PC_US_DP0_LIVE_PRIM"/> 171 <value value="47" name="A8XX_PERF_PC_US_DP1_LIVE_PRIM"/> 172 <value value="48" name="A8XX_PERF_PC_US_BV2BR_SWITCH"/> 173 <value value="49" name="A8XX_PERF_PC_US_BR2BV_SWITCH"/> 174 <value value="50" name="A8XX_PERF_PC_US_STALL_CYCLES_PC_S"/> 175 <value value="51" name="A8XX_PERF_PC_RESERVED_51"/> 176 <value value="52" name="A8XX_PERF_PC_RESERVED_52"/> 177 <value value="53" name="A8XX_PERF_PC_RESERVED_53"/> 178 <value value="54" name="A8XX_PERF_PC_RESERVED_54"/> 179 <value value="55" name="A8XX_PERF_PC_RESERVED_55"/> 180 <value value="56" name="A8XX_PERF_PC_RESERVED_56"/> 181 <value value="57" name="A8XX_PERF_PC_RESERVED_57"/> 182 <value value="58" name="A8XX_PERF_PC_RESERVED_58"/> 183 <value value="59" name="A8XX_PERF_PC_RESERVED_59"/> 184 <value value="60" name="A8XX_PERF_PC_S_BUSY_CYCLES"/> 185 <value value="61" name="A8XX_PERF_PC_S_WORKING_CYCLES"/> 186 <value value="62" name="A8XX_PERF_PC_S_STALL_CYCLES_VFD"/> 187 <value value="63" name="A8XX_PERF_PC_S_STALL_CYCLES_VPC_FE"/> 188 <value value="64" name="A8XX_PERF_PC_S_STALL_CYCLES_TESS"/> 189 <value value="65" name="A8XX_PERF_PC_S_STALL_CYCLES_VFD_ONLY"/> 190 <value value="66" name="A8XX_PERF_PC_S_STALL_CYCLES_VPC_ONLY"/> 191 <value value="67" name="A8XX_PERF_PC_S_VPC_PRIMITIVES"/> 192 <value value="68" name="A8XX_PERF_PC_S_VERTEX_HITS"/> 193 <value value="69" name="A8XX_PERF_PC_S_IA_VERTICES"/> 194 <value value="70" name="A8XX_PERF_PC_S_IA_PRIMITIVES"/> 195 <value value="71" name="A8XX_PERF_PC_S_HS_INVOCATIONS"/> 196 <value value="72" name="A8XX_PERF_PC_S_DS_INVOCATIONS"/> 197 <value value="73" name="A8XX_PERF_PC_S_VS_INVOCATIONS"/> 198 <value value="74" name="A8XX_PERF_PC_S_GS_INVOCATIONS"/> 199 <value value="75" name="A8XX_PERF_PC_S_DS_PRIMITIVES"/> 200 <value value="76" name="A8XX_PERF_PC_S_TESS_BUSY_CYCLES"/> 201 <value value="77" name="A8XX_PERF_PC_S_TESS_WORKING_CYCLES"/> 202 <value value="78" name="A8XX_PERF_PC_S_TESS_STALL_CYCLES_PC"/> 203 <value value="79" name="A8XX_PERF_PC_S_TESS_STARVE_CYCLES_PC"/> 204 <value value="80" name="A8XX_PERF_PC_S_TESS_SETUP_ACTIVE"/> 205 <value value="81" name="A8XX_PERF_PC_S_TESS_PID_ACTIVE"/> 206 <value value="82" name="A8XX_PERF_PC_S_TESS_PRIM_GEN_ACTIVE"/> 207 <value value="83" name="A8XX_PERF_PC_S_TESS_FACTOR_TRANS"/> 208 <value value="84" name="A8XX_PERF_PC_S_TESS_PC_UV_TRANS"/> 209 <value value="85" name="A8XX_PERF_PC_S_TESS_PC_UV_PATCHES"/> 210 <value value="86" name="A8XX_PERF_PC_S_MESH_VS_WAVES"/> 211</enum> 212 213<enum name="a8xx_vfd_perfcounter_select"> 214 <value value="0" name="A8XX_PERF_VFD_NEVER_COUNT"/> 215 <value value="1" name="A8XX_PERF_VFD_BUSY_CYCLES"/> 216 <value value="2" name="A8XX_PERF_VFD_STALL_CYCLES_UCHE"/> 217 <value value="3" name="A8XX_PERF_VFD_STALL_CYCLES_VPC_ALLOC"/> 218 <value value="4" name="A8XX_PERF_VFD_STALL_CYCLES_SP_INFO"/> 219 <value value="5" name="A8XX_PERF_VFD_STALL_CYCLES_SP_ATTR"/> 220 <value value="6" name="A8XX_PERF_VFD_STARVE_CYCLES_UCHE"/> 221 <value value="7" name="A8XX_PERF_VFD_RBUFFER_FULL"/> 222 <value value="8" name="A8XX_PERF_VFD_ATTR_INFO_FIFO_FULL"/> 223 <value value="9" name="A8XX_PERF_VFD_DECODED_ATTRIBUTE_BYTES"/> 224 <value value="10" name="A8XX_PERF_VFD_NUM_ATTRIBUTES"/> 225 <value value="11" name="A8XX_PERF_VFD_UPPER_SHADER_FIBERS"/> 226 <value value="12" name="A8XX_PERF_VFD_LOWER_SHADER_FIBERS"/> 227 <value value="13" name="A8XX_PERF_VFD_MODE_0_FIBERS"/> 228 <value value="14" name="A8XX_PERF_VFD_MODE_1_FIBERS"/> 229 <value value="15" name="A8XX_PERF_VFD_MODE_2_FIBERS"/> 230 <value value="16" name="A8XX_PERF_VFD_MODE_3_FIBERS"/> 231 <value value="17" name="A8XX_PERF_VFD_MODE_4_FIBERS"/> 232 <value value="18" name="A8XX_PERF_VFD_TOTAL_VERTICES"/> 233 <value value="19" name="A8XX_PERF_VFDP_STALL_CYCLES_VFD"/> 234 <value value="20" name="A8XX_PERF_VFDP_STALL_CYCLES_VFD_INDEX"/> 235 <value value="21" name="A8XX_PERF_VFDP_STALL_CYCLES_VFD_PROG"/> 236 <value value="22" name="A8XX_PERF_VFDP_STARVE_CYCLES_PC"/> 237 <value value="23" name="A8XX_PERF_VFDP_VS_STAGE_WAVES"/> 238 <value value="24" name="A8XX_PERF_VFD_STALL_CYCLES_PRG_END_FE"/> 239 <value value="25" name="A8XX_PERF_VFD_STALL_CYCLES_CBSYNC"/> 240 <value value="26" name="A8XX_PERF_VFD_BOTTLENECK_CYCLES"/> 241 <value value="27" name="A8XX_PERF_VFD_WORKING_CYCLES"/> 242</enum> 243 244<enum name="a8xx_hlsq_perfcounter_select"> 245 <value value="0" name="A8XX_PERF_HLSQ_NEVER_COUNT"/> 246 <value value="1" name="A8XX_PERF_HLSQ_BUSY_CYCLES"/> 247 <value value="2" name="A8XX_PERF_HLSQ_STALL_CYCLES_SP_STATE"/> 248 <value value="3" name="A8XX_PERF_HLSQ_STALL_CYCLES_SP_FS_STAGE"/> 249 <value value="4" name="A8XX_PERF_HLSQ_UCHE_LATENCY_CYCLES"/> 250 <value value="5" name="A8XX_PERF_HLSQ_UCHE_LATENCY_COUNT"/> 251 <value value="6" name="A8XX_PERF_HLSQ_STALL_CYCLES_UCHE"/> 252 <value value="7" name="A8XX_PERF_HLSQ_RESERVED_7"/> 253 <value value="8" name="A8XX_PERF_HLSQ_RESERVED_8"/> 254 <value value="9" name="A8XX_PERF_HLSQ_RESERVED_9"/> 255 <value value="10" name="A8XX_PERF_HLSQ_COMPUTE_DRAWCALLS"/> 256 <value value="11" name="A8XX_PERF_HLSQ_FS_DATA_WAIT_PROGRAMMING"/> 257 <value value="12" name="A8XX_PERF_HLSQ_DUAL_FS_PROG_ACTIVE"/> 258 <value value="13" name="A8XX_PERF_HLSQ_DUAL_VS_PROG_ACTIVE"/> 259 <value value="14" name="A8XX_PERF_HLSQ_FS_BATCH_COUNT_ZERO"/> 260 <value value="15" name="A8XX_PERF_HLSQ_VS_BATCH_COUNT_ZERO"/> 261 <value value="16" name="A8XX_PERF_HLSQ_WAVE_PENDING_NO_QUAD"/> 262 <value value="17" name="A8XX_PERF_HLSQ_WAVE_PENDING_NO_PRIM_BASE"/> 263 <value value="18" name="A8XX_PERF_HLSQ_STALL_CYCLES_VPC_BE"/> 264 <value value="19" name="A8XX_PERF_HLSQ_RESERVED_19"/> 265 <value value="20" name="A8XX_PERF_HLSQ_RESERVED_20"/> 266 <value value="21" name="A8XX_PERF_HLSQ_VSBR_STALL_CYCLES"/> 267 <value value="22" name="A8XX_PERF_HLSQ_FS_STALL_CYCLES"/> 268 <value value="23" name="A8XX_PERF_HLSQ_LPAC_STALL_CYCLES"/> 269 <value value="24" name="A8XX_PERF_HLSQ_BV_STALL_CYCLES"/> 270 <value value="25" name="A8XX_PERF_HLSQ_VSBR_DEREF_CYCLES"/> 271 <value value="26" name="A8XX_PERF_HLSQ_FS_DEREF_CYCLES"/> 272 <value value="27" name="A8XX_PERF_HLSQ_LPAC_DEREF_CYCLES"/> 273 <value value="28" name="A8XX_PERF_HLSQ_BV_DEREF_CYCLES"/> 274 <value value="29" name="A8XX_PERF_HLSQ_VSBR_S2W_CYCLES"/> 275 <value value="30" name="A8XX_PERF_HLSQ_FS_S2W_CYCLES"/> 276 <value value="31" name="A8XX_PERF_HLSQ_LPAC_S2W_CYCLES"/> 277 <value value="32" name="A8XX_PERF_HLSQ_BV_S2W_CYCLES"/> 278 <value value="33" name="A8XX_PERF_HLSQ_VSBR_WAIT_FS_S2W"/> 279 <value value="34" name="A8XX_PERF_HLSQ_FS_WAIT_VS_S2W"/> 280 <value value="35" name="A8XX_PERF_HLSQ_LPAC_WAIT_VS_S2W"/> 281 <value value="36" name="A8XX_PERF_HLSQ_BV_WAIT_FS_S2W"/> 282 <value value="37" name="A8XX_PERF_HLSQ_RESERVED_37"/> 283 <value value="38" name="A8XX_PERF_HLSQ_FS_WAIT_SAME_VS_S2W"/> 284 <value value="39" name="A8XX_PERF_HLSQ_FS_STARVING_SP"/> 285 <value value="40" name="A8XX_PERF_HLSQ_VS_DATA_WAIT_PROGRAMMING"/> 286 <value value="41" name="A8XX_PERF_HLSQ_BV_DATA_WAIT_PROGRAMMING"/> 287 <value value="42" name="A8XX_PERF_HLSQ_STPROC_WAVE_CONTEXTS_VS"/> 288 <value value="43" name="A8XX_PERF_HLSQ_STPROC_WAVE_CONTEXT_CYCLES_VS"/> 289 <value value="44" name="A8XX_PERF_HLSQ_STPROC_WAVE_CONTEXTS_FS"/> 290 <value value="45" name="A8XX_PERF_HLSQ_STPROC_WAVE_CONTEXT_CYCLES_FS"/> 291 <value value="46" name="A8XX_PERF_HLSQ_STPROC_WAVE_CONTEXTS_BV"/> 292 <value value="47" name="A8XX_PERF_HLSQ_STPROC_WAVE_CONTEXT_CYCLES_BV"/> 293 <value value="48" name="A8XX_PERF_HLSQ_STPROC_WAVE_CONTEXTS_LPAC"/> 294 <value value="49" name="A8XX_PERF_HLSQ_STPROC_WAVE_CONTEXT_CYCLES_LPAC"/> 295 <value value="50" name="A8XX_PERF_HLSQ_SPTROC_STCHE_WARMUP_INC_VS"/> 296 <value value="51" name="A8XX_PERF_HLSQ_SPTROC_STCHE_WARMUP_INC_FS"/> 297 <value value="52" name="A8XX_PERF_HLSQ_SPTROC_STCHE_WARMUP_INC_BV"/> 298 <value value="53" name="A8XX_PERF_HLSQ_SPTROC_STCHE_WARMUP_INC_LPAC"/> 299 <value value="54" name="A8XX_PERF_HLSQ_SPTROC_STCHE_MISS_INC_VS"/> 300 <value value="55" name="A8XX_PERF_HLSQ_SPTROC_STCHE_MISS_INC_FS"/> 301 <value value="56" name="A8XX_PERF_HLSQ_SPTROC_STCHE_MISS_INC_BV"/> 302 <value value="57" name="A8XX_PERF_HLSQ_SPTROC_STCHE_MISS_INC_LPAC"/> 303 <value value="58" name="A8XX_PERF_HLSQ_VSBR_S2W_CYCLES_SP"/> 304 <value value="59" name="A8XX_PERF_HLSQ_FS_S2W_CYCLES_SP"/> 305 <value value="60" name="A8XX_PERF_HLSQ_LPAC_S2W_CYCLES_SP"/> 306 <value value="61" name="A8XX_PERF_HLSQ_BV_S2W_CYCLES_SP"/> 307 <value value="62" name="A8XX_PERF_HLSQ_L2STC_REQ_HLSQ"/> 308 <value value="63" name="A8XX_PERF_HLSQ_L2STC_REQ_HLSQ_HIT"/> 309 <value value="64" name="A8XX_PERF_HLSQ_L2STC_REQ_SP"/> 310 <value value="65" name="A8XX_PERF_HLSQ_L2STC_REQ_SP_HIT"/> 311 <value value="66" name="A8XX_PERF_HLSQ_L2STC_REQ_INS_HLSQ"/> 312 <value value="67" name="A8XX_PERF_HLSQ_L2STC_REQ_INS_HLSQ_HIT"/> 313 <value value="68" name="A8XX_PERF_HLSQ_L2STC_REQ_INS_SP"/> 314 <value value="69" name="A8XX_PERF_HLSQ_L2STC_REQ_INS_SP_HIT"/> 315 <value value="70" name="A8XX_PERF_HLSQ_L2STC_REQ_UCHE"/> 316 <value value="71" name="A8XX_PERF_HLSQ_L2STC_LATENCY_CYCLES"/> 317 <value value="72" name="A8XX_PERF_HLSQ_L2STC_LATENCY_COUNT"/> 318 <value value="73" name="A8XX_PERF_HLSQ_L2STC_STALL_SP_MISS_REQ"/> 319 <value value="74" name="A8XX_PERF_HLSQ_L2STC_BANK0_REPLACEMENT"/> 320 <value value="75" name="A8XX_PERF_HLSQ_L2STC_BANK1_REPLACEMENT"/> 321 <value value="76" name="A8XX_PERF_HLSQ_L2STC_BANK2_REPLACEMENT"/> 322 <value value="77" name="A8XX_PERF_HLSQ_L2STC_BANK3_REPLACEMENT"/> 323 <value value="78" name="A8XX_PERF_HLSQ_S2W_STALL_BY_MISS_RETURN"/> 324 <value value="79" name="A8XX_PERF_HLSQ_MISS_RETURN_STALL_BY_S2W"/> 325 <value value="80" name="A8XX_PERF_HLSQ_STPROC_L0_STALL_INS_RD"/> 326 <value value="81" name="A8XX_PERF_HLSQ_STPROC_L0_INS_MISS"/> 327 <value value="82" name="A8XX_PERF_HLSQ_STPROC_L0_INS_HIT"/> 328 <value value="83" name="A8XX_PERF_HLSQ_STPROC_L0_INS_LATENCY_COUNT"/> 329 <value value="84" name="A8XX_PERF_HLSQ_STPROC_L0_INS_LATENCY_CYCLE"/> 330 <value value="85" name="A8XX_PERF_HLSQ_STPROC_DPS_RUN_COUNT"/> 331 <value value="86" name="A8XX_PERF_HLSQ_STPROC_DPS_RUN_CYCLE"/> 332 <value value="87" name="A8XX_PERF_HLSQ_VSDP_BR_QUERY_REQ"/> 333 <value value="88" name="A8XX_PERF_HLSQ_VSDP_BV_QUERY_REQ"/> 334 <value value="89" name="A8XX_PERF_HLSQ_VSDP_BR_QUERY_REQ_WHEN_BV_PENDING"/> 335 <value value="90" name="A8XX_PERF_HLSQ_VSDP_BR_QUERY_BUSY"/> 336 <value value="91" name="A8XX_PERF_HLSQ_VSDP_BV_QUERY_BUSY"/> 337 <value value="92" name="A8XX_PERF_HLSQ_VSDP_BR_QUERY_FAIL"/> 338 <value value="93" name="A8XX_PERF_HLSQ_VSDP_BV_QUERY_FAIL"/> 339 <value value="94" name="A8XX_PERF_HLSQ_VS_CTXT_BUF_FULL_BLOCK_CPI"/> 340 <value value="95" name="A8XX_PERF_HLSQ_FS_CTXT_BUF_FULL_BLOCK_CPI"/> 341 <value value="96" name="A8XX_PERF_HLSQ_BV_CTXT_BUF_FULL_BLOCK_CPI"/> 342 <value value="97" name="A8XX_PERF_HLSQ_VS_CONST_BUF_FULL_BLOCK_CPI"/> 343 <value value="98" name="A8XX_PERF_HLSQ_FS_CONST_BUF_FULL_BLOCK_CPI"/> 344 <value value="99" name="A8XX_PERF_HLSQ_BV_CONST_BUF_FULL_BLOCK_CPI"/> 345 <value value="100" name="A8XX_PERF_HLSQ_VS_INS_BUF_FULL_BLOCK_CPI"/> 346 <value value="101" name="A8XX_PERF_HLSQ_FS_INS_BUF_FULL_BLOCK_CPI"/> 347 <value value="102" name="A8XX_PERF_HLSQ_BV_INS_BUF_FULL_BLOCK_CPI"/> 348 <value value="103" name="A8XX_PERF_HLSQ_VS_DES_BUF_FULL_BLOCK_CPI"/> 349 <value value="104" name="A8XX_PERF_HLSQ_FS_DES_BUF_FULL_BLOCK_CPI"/> 350 <value value="105" name="A8XX_PERF_HLSQ_BV_DES_BUF_FULL_BLOCK_CPI"/> 351 <value value="106" name="A8XX_PERF_HLSQ_PRIMITIVE_COUNT"/> 352 <value value="107" name="A8XX_PERF_HLSQ_LPAC2BV_SWITCH_CNT"/> 353 <value value="108" name="A8XX_PERF_HLSQ_BV2LPAC_SWITCH_CNT"/> 354 <value value="109" name="A8XX_PERF_HLSQ_LPAC2BV_SWITCH_CYC"/> 355 <value value="110" name="A8XX_PERF_HLSQ_BV2LPAC_SWITCH_CYC"/> 356 <value value="111" name="A8XX_PERF_HLSQ_VSDP_BV2BR_SWITCH_CYC"/> 357 <value value="112" name="A8XX_PERF_HLSQ_VS_SP_HCTX_ACTIVE_CNT"/> 358 <value value="113" name="A8XX_PERF_HLSQ_FS_SP_HCTX_ACTIVE_CNT"/> 359 <value value="114" name="A8XX_PERF_HLSQ_BV_SP_HCTX_ACTIVE_CNT"/> 360 <value value="115" name="A8XX_PERF_HLSQ_VS_SP_HCTX_ACTIVE_CYC"/> 361 <value value="116" name="A8XX_PERF_HLSQ_FS_SP_HCTX_ACTIVE_CYC"/> 362 <value value="117" name="A8XX_PERF_HLSQ_BV_SP_HCTX_ACTIVE_CYC"/> 363 <value value="118" name="A8XX_PERF_HLSQ_VS_SP_CCTX_ACTIVE_CNT"/> 364 <value value="119" name="A8XX_PERF_HLSQ_FS_SP_CCTX_ACTIVE_CNT"/> 365 <value value="120" name="A8XX_PERF_HLSQ_BV_SP_CCTX_ACTIVE_CNT"/> 366 <value value="121" name="A8XX_PERF_HLSQ_VS_SP_SCTX_ACTIVE_CNT"/> 367 <value value="122" name="A8XX_PERF_HLSQ_FS_SP_SCTX_ACTIVE_CNT"/> 368 <value value="123" name="A8XX_PERF_HLSQ_BV_SP_SCTX_ACTIVE_CNT"/> 369 <value value="124" name="A8XX_PERF_HLSQ_VS_SP_CTX_ALIVE_CYCLE"/> 370 <value value="125" name="A8XX_PERF_HLSQ_FS_SP_CTX_ALIVE_CYCLE"/> 371 <value value="126" name="A8XX_PERF_HLSQ_BV_SP_CTX_ALIVE_CYCLE"/> 372 <value value="127" name="A8XX_PERF_HLSQ_STPROC_WAVE_NUM_FS"/> 373 <value value="128" name="A8XX_PERF_HLSQ_STPROC_WAVE_NUM_VS"/> 374 <value value="129" name="A8XX_PERF_HLSQ_STPROC_WAVE_NUM_BV"/> 375 <value value="130" name="A8XX_PERF_HLSQ_STPROC_WAVE_NUM_LPAC"/> 376 <value value="131" name="A8XX_PERF_HLSQ_VS_SP_CCTX_NUM"/> 377 <value value="132" name="A8XX_PERF_HLSQ_FS_SP_CCTX_NUM"/> 378 <value value="133" name="A8XX_PERF_HLSQ_BV_SP_CCTX_NUM"/> 379 <value value="134" name="A8XX_PERF_HLSQ_VS_SP_SCTX_NUM"/> 380 <value value="135" name="A8XX_PERF_HLSQ_FS_SP_SCTX_NUM"/> 381 <value value="136" name="A8XX_PERF_HLSQ_BV_SP_SCTX_NUM"/> 382</enum> 383 384<enum name="a8xx_vpc_perfcounter_select"> 385 <value value="0" name="A8XX_PERF_VPC_NEVER_COUNT"/> 386 <value value="1" name="A8XX_PERF_VPC_FE_BUSY_CYCLES"/> 387 <value value="2" name="A8XX_PERF_VPC_FE_WORKING_CYCLES"/> 388 <value value="3" name="A8XX_PERF_VPC_FE_STALL_CYCLES_VFD_WACK"/> 389 <value value="4" name="A8XX_PERF_VPC_FE_STARVE_CYCLES_SP"/> 390 <value value="5" name="A8XX_PERF_VPC_FE_PC_PRIMITIVES"/> 391 <value value="6" name="A8XX_PERF_VPC_FE_SP_COMPONENTS"/> 392 <value value="7" name="A8XX_PERF_VPC_FE_STALL_CYCLES_VPCRAM_POS"/> 393 <value value="8" name="A8XX_PERF_VPC_FE_VS_BUSY_CYCLES"/> 394 <value value="9" name="A8XX_PERF_VPC_FE_VS_WORKING_CYCLES"/> 395 <value value="10" name="A8XX_PERF_VPC_FE_NUM_VPCRAM_READ_POS"/> 396 <value value="11" name="A8XX_PERF_VPC_FE_WIT_FULL_CYCLES"/> 397 <value value="12" name="A8XX_PERF_VPC_FE_VPCRAM_FULL_CYCLES"/> 398 <value value="13" name="A8XX_PERF_VPC_FE_NUM_VPCRAM_WRITE"/> 399 <value value="14" name="A8XX_PERF_VPC_FE_STALL_CYCLES_TSE_FE"/> 400 <value value="15" name="A8XX_PERF_VPC_FE_STALL_CYCLES_VPC_US"/> 401 <value value="16" name="A8XX_PERF_VPC_FE_TSE_FE_PRIMITIVES"/> 402 <value value="17" name="A8XX_PERF_VPC_FE_GS_PRIMITIVES"/> 403 <value value="18" name="A8XX_PERF_VPC_FE_TSE_FE_TRANSACTIONS"/> 404 <value value="19" name="A8XX_PERF_VPC_FE_STALL_CYCLES_CCU"/> 405 <value value="20" name="A8XX_PERF_VPC_FE_NUM_WM_HIT"/> 406 <value value="21" name="A8XX_PERF_VPC_FE_STALL_DQ_WACK"/> 407 <value value="22" name="A8XX_PERF_VPC_FE_STALL_CYCLES_PRG_END_FE"/> 408 <value value="23" name="A8XX_PERF_VPC_FE_STALL_CYCLES_PRG_END_VPCVS"/> 409 <value value="24" name="A8XX_PERF_VPC_FE_POSRAM_FULL_CYCLES"/> 410 <value value="25" name="A8XX_PERF_VPC_FE_GMEM_NOP_FULL_CYCLES"/> 411 <value value="26" name="A8XX_PERF_VPC_FE_GMEM_POS_FULL_CYCLES"/> 412 <value value="27" name="A8XX_PERF_VPC_FE_BOTTLENECK"/> 413 <value value="28" name="A8XX_PERF_VPC_US_BUSY_CYCLES"/> 414 <value value="29" name="A8XX_PERF_VPC_US_WORKING_CYCLES"/> 415 <value value="30" name="A8XX_PERF_VPC_US_STARVE_CYCLES_TSE_FE"/> 416 <value value="31" name="A8XX_PERF_VPC_US_PTUS_FULL"/> 417 <value value="32" name="A8XX_PERF_VPC_US_COMP_INVIS_PRIM_COUNT"/> 418 <value value="33" name="A8XX_PERF_VPC_US_STALL_CYCLES_VSC"/> 419 <value value="34" name="A8XX_PERF_VPC_US_STALL_CYCLES_VPC_BE"/> 420 <value value="35" name="A8XX_PERF_VPC_US_STALL_CYCLES_UCHE"/> 421 <value value="36" name="A8XX_PERF_VPC_US_STREAMOUT_TRANSACTION"/> 422 <value value="37" name="A8XX_PERF_VPC_US_NUM_GMEM_READ_SO"/> 423 <value value="38" name="A8XX_PERF_VPC_US_STARVE_CYCLES_UCHE_RD"/> 424 <value value="39" name="A8XX_PERF_VPC_US_STALL_CYCLES_PRG_END_VPCUS"/> 425 <value value="40" name="A8XX_PERF_VPC_US_STARVE_CYCLES_REORDER"/> 426 <value value="41" name="A8XX_PERF_VPC_US_BOTTLENECK"/> 427 <value value="42" name="A8XX_PERF_VPC_RESERVED_42"/> 428 <value value="43" name="A8XX_PERF_VPC_RESERVED_43"/> 429 <value value="44" name="A8XX_PERF_VPC_RESERVED_44"/> 430 <value value="45" name="A8XX_PERF_VPC_BE_BUSY_CYCLES"/> 431 <value value="46" name="A8XX_PERF_VPC_BE_WORKING_CYCLES"/> 432 <value value="47" name="A8XX_PERF_VPC_BE_STALL_CYCLES_TSE_BE"/> 433 <value value="48" name="A8XX_PERF_VPC_BE_TSE_BE_PRIMITIVES"/> 434 <value value="49" name="A8XX_PERF_VPC_BE_TSE_BE_TRANSACTIONS"/> 435 <value value="50" name="A8XX_PERF_VPC_BE_STARVE_CYCLES_LRZ"/> 436 <value value="51" name="A8XX_PERF_VPC_BE_LRZ_ASSIGN_PRIMITIVES"/> 437 <value value="52" name="A8XX_PERF_VPC_BE_RB_VISIBLE_PRIMITIVES"/> 438 <value value="53" name="A8XX_PERF_VPC_BE_STARVE_CYCLES_RB"/> 439 <value value="54" name="A8XX_PERF_VPC_BE_STALL_CYCLES_HLSQ_PRIM_ALLOC"/> 440 <value value="55" name="A8XX_PERF_VPC_BE_STALL_CYCLES_SP_LM"/> 441 <value value="56" name="A8XX_PERF_VPC_BE_NUM_PA_REQ"/> 442 <value value="57" name="A8XX_PERF_VPC_BE_NUM_LM_REQ_HIT"/> 443 <value value="58" name="A8XX_PERF_VPC_BE_NUM_ATTR_REQ_LM"/> 444 <value value="59" name="A8XX_PERF_VPC_BE_LM_TRANSACTION"/> 445 <value value="60" name="A8XX_PERF_VPC_BE_PS_BUSY_CYCLES"/> 446 <value value="61" name="A8XX_PERF_VPC_BE_PS_WORKING_CYCLES"/> 447 <value value="62" name="A8XX_PERF_VPC_BE_STALL_CYCLES_CCHE"/> 448 <value value="63" name="A8XX_PERF_VPC_BE_STARVE_CYCLES_CCHE"/> 449 <value value="64" name="A8XX_PERF_VPC_BE_LM_FULL_WAIT_FOR_INTP_END"/> 450 <value value="65" name="A8XX_PERF_VPC_BE_CCHE_REQBUF_FULL"/> 451 <value value="66" name="A8XX_PERF_VPC_BE_CCHE_NUM_POS_REQ"/> 452 <value value="67" name="A8XX_PERF_VPC_BE_STALL_CYCLES_LM_ACK"/> 453 <value value="68" name="A8XX_PERF_VPC_BE_STALL_CYCLES_PRG_END_VPCPS"/> 454 <value value="69" name="A8XX_PERF_VPC_BE_POS_OVERFETCH_ATTR"/> 455 <value value="70" name="A8XX_PERF_VPC_BE_BOTTLENECK"/> 456</enum> 457 458<enum name="a8xx_tse_perfcounter_select"> 459 <value value="0" name="A8XX_PERF_TSE_NEVER_COUNT"/> 460 <value value="1" name="A8XX_PERF_TSE_BE_BUSY_CYCLES"/> 461 <value value="2" name="A8XX_PERF_TSE_BE_CLIPPING_CYCLES"/> 462 <value value="3" name="A8XX_PERF_TSE_BE_STALL_CYCLES_RAS"/> 463 <value value="4" name="A8XX_PERF_TSE_BE_STALL_CYCLES_LRZ_BARYPLANE"/> 464 <value value="5" name="A8XX_PERF_TSE_BE_STALL_CYCLES_LRZ_ZPLANE"/> 465 <value value="6" name="A8XX_PERF_TSE_BE_STARVE_CYCLES_PC"/> 466 <value value="7" name="A8XX_PERF_TSE_BE_INPUT_PRIM"/> 467 <value value="8" name="A8XX_PERF_TSE_BE_INPUT_NULL_PRIM"/> 468 <value value="9" name="A8XX_PERF_TSE_BE_TRIVAL_REJ_PRIM"/> 469 <value value="10" name="A8XX_PERF_TSE_BE_CLIPPED_PRIM"/> 470 <value value="11" name="A8XX_PERF_TSE_BE_ZERO_AREA_PRIM"/> 471 <value value="12" name="A8XX_PERF_TSE_BE_FACENESS_CULLED_PRIM"/> 472 <value value="13" name="A8XX_PERF_TSE_BE_ZERO_PIXEL_PRIM"/> 473 <value value="14" name="A8XX_PERF_TSE_BE_OUTPUT_NULL_PRIM"/> 474 <value value="15" name="A8XX_PERF_TSE_BE_OUTPUT_VISIBLE_PRIM"/> 475 <value value="16" name="A8XX_PERF_TSE_BE_CINVOCATION"/> 476 <value value="17" name="A8XX_PERF_TSE_BE_CPRIMITIVES"/> 477 <value value="18" name="A8XX_PERF_TSE_BE_2D_INPUT_PRIM"/> 478 <value value="19" name="A8XX_PERF_TSE_BE_2D_ALIVE_CYCLES"/> 479 <value value="20" name="A8XX_PERF_TSE_BE_CLIP_PLANES"/> 480 <value value="21" name="A8XX_PERF_TSE_BE_EMPTY_BBOX_KILLED_PRIM"/> 481 <value value="22" name="A8XX_PERF_TSE_BE_ST1_VP_PARAMS_CACHE_MISS"/> 482 <value value="23" name="A8XX_PERF_TSE_BE_ST2_VPORT_VP_PARAMS_CACHE_MISS"/> 483 <value value="24" name="A8XX_PERF_TSE_BE_ST2_SCISSOR_VP_PARAMS_CACHE_MISS"/> 484 <value value="25" name="A8XX_PERF_TSE_BE_ILLEGAL_BOUNDING_BOX_PRIM"/> 485 <value value="26" name="A8XX_PERF_TSE_BE_VP_OUT_IS_NAN"/> 486 <value value="27" name="A8XX_PERF_TSE_BE_EXCLUDED_PRIM"/> 487 <value value="28" name="A8XX_PERF_TSE_BE_EARLY_CULL_CLIPPED_PRIM"/> 488 <value value="29" name="A8XX_PERF_TSE_BE_BR_STALLS_DUETO_BV_CLIP"/> 489 <value value="30" name="A8XX_PERF_TSE_BE_BR_STALLS_DUETO_BV_POLY"/> 490 <value value="31" name="A8XX_PERF_TSE_BE_BV_STALLS_DUETO_BR_CLIP"/> 491 <value value="32" name="A8XX_PERF_TSE_BE_BV_STALLS_DUETO_BR_POLY"/> 492 <value value="33" name="A8XX_PERF_TSE_BE_BV_STALLS_DUETO_BR"/> 493 <value value="34" name="A8XX_PERF_TSE_FE_BUSY_CYCLES"/> 494 <value value="35" name="A8XX_PERF_TSE_FE_STALL_CYCLES_VPC_US"/> 495 <value value="36" name="A8XX_PERF_TSE_FE_STARVE_CYCLES_PC"/> 496 <value value="37" name="A8XX_PERF_TSE_FE_INPUT_PRIM"/> 497 <value value="38" name="A8XX_PERF_TSE_FE_INPUT_NULL_PRIM"/> 498 <value value="39" name="A8XX_PERF_TSE_FE_TRIVAL_REJ_PRIM"/> 499 <value value="40" name="A8XX_PERF_TSE_FE_ZERO_AREA_PRIM"/> 500 <value value="41" name="A8XX_PERF_TSE_FE_FACENESS_CULLED_PRIM"/> 501 <value value="42" name="A8XX_PERF_TSE_FE_ZERO_PIXEL_PRIM"/> 502 <value value="43" name="A8XX_PERF_TSE_FE_OUTPUT_NULL_PRIM"/> 503 <value value="44" name="A8XX_PERF_TSE_FE_OUTPUT_VISIBLE_PRIM"/> 504 <value value="45" name="A8XX_PERF_TSE_FE_CINVOCATION"/> 505 <value value="46" name="A8XX_PERF_TSE_FE_CPRIMITIVES"/> 506 <value value="47" name="A8XX_PERF_TSE_FE_CLIP_PLANES"/> 507 <value value="48" name="A8XX_PERF_TSE_FE_EMPTY_BBOX_KILLED_PRIM"/> 508 <value value="49" name="A8XX_PERF_TSE_FE_ST1_VP_PARAMS_CACHE_MISS"/> 509 <value value="50" name="A8XX_PERF_TSE_FE_ST2_VPORT_VP_PARAMS_CACHE_MISS"/> 510 <value value="51" name="A8XX_PERF_TSE_FE_ST2_SCISSOR_VP_PARAMS_CACHE_MISS"/> 511 <value value="52" name="A8XX_PERF_TSE_FE_ILLEGAL_BOUNDING_BOX_PRIM"/> 512 <value value="53" name="A8XX_PERF_TSE_FE_VP_OUT_IS_NAN"/> 513 <value value="54" name="A8XX_PERF_TSE_FE_EXCLUDED_PRIM"/> 514 <value value="55" name="A8XX_PERF_TSE_FE_EARLY_CULL_CLIPPED_PRIM"/> 515 <value value="56" name="A8XX_PERF_TSE_FE_BR_STALLS_DUETO_BV_CLIP"/> 516 <value value="57" name="A8XX_PERF_TSE_FE_BR_STALLS_DUETO_BV_POLY"/> 517 <value value="58" name="A8XX_PERF_TSE_FE_BV_STALLS_DUETO_BR_CLIP"/> 518 <value value="59" name="A8XX_PERF_TSE_FE_BV_STALLS_DUETO_BR_POLY"/> 519 <value value="60" name="A8XX_PERF_TSE_FE_BV_STALLS_DUETO_BR"/> 520 <value value="61" name="A8XX_PERF_TSE_BE_STALL_CYCLES_LRZ_PRIM"/> 521 <value value="62" name="A8XX_PERF_TSE_FE_EARLY_BFCULL_GBCLIPPED_PRIM"/> 522 <value value="63" name="A8XX_PERF_TSE_REG_PROGRAMMING_WORKING_CYCLE_L1"/> 523 <value value="64" name="A8XX_PERF_TSE_REG_PROGRAMMING_ONLY_CYCLE_L0"/> 524 <value value="65" name="A8XX_PERF_TSE_COMMON_RAM_WORKING_CYCLE_L2"/> 525 <value value="66" name="A8XX_PERF_TSE_COMMON_RAM_RD_WORKING_CYCLE_L3"/> 526 <value value="67" name="A8XX_PERF_TSE_COMMON_RAM_WR_WORKING_CYCLE_L3"/> 527 <value value="68" name="A8XX_PERF_TSE_CLIP_CODE_WORKING_CYCLE_L1"/> 528 <value value="69" name="A8XX_PERF_TSE_CLIP_WORKING_CYCLE_L1"/> 529 <value value="70" name="A8XX_PERF_TSE_CLIP_CTRL_WORKING_CYCLE_L2"/> 530 <value value="71" name="A8XX_PERF_TSE_CLIP_VP_FMUL_WORKING_CYCLE_L2"/> 531 <value value="72" name="A8XX_PERF_TSE_CLIP_VP_FMUL_0_WORKING_CYCLE_L3"/> 532 <value value="73" name="A8XX_PERF_TSE_CLIP_VP_FMUL_1_WORKING_CYCLE_L3"/> 533 <value value="74" name="A8XX_PERF_TSE_CLIP_VP_FMUL_2_WORKING_CYCLE_L3"/> 534 <value value="75" name="A8XX_PERF_TSE_CLIP_VP_FMUL_3_WORKING_CYCLE_L3"/> 535 <value value="76" name="A8XX_PERF_TSE_CLIP_VP_FMUL_4_WORKING_CYCLE_L3"/> 536 <value value="77" name="A8XX_PERF_TSE_CLIP_VP_FMUL_5_WORKING_CYCLE_L3"/> 537 <value value="78" name="A8XX_PERF_TSE_CLIP_VP_FADD_WORKING_CYCLE_L2"/> 538 <value value="79" name="A8XX_PERF_TSE_CLIP_VP_FADD_0_WORKING_CYCLE_L3"/> 539 <value value="80" name="A8XX_PERF_TSE_CLIP_VP_FADD_1_WORKING_CYCLE_L3"/> 540 <value value="81" name="A8XX_PERF_TSE_CLIP_VP_FADD_2_WORKING_CYCLE_L3"/> 541 <value value="82" name="A8XX_PERF_TSE_CLIP_VP_RCP_WORKING_CYCLE_L2"/> 542 <value value="83" name="A8XX_PERF_TSE_VP_TRANSFORM_WORKING_CYCLE_L1"/> 543 <value value="84" name="A8XX_PERF_TSE_VP0_TRANSFORM_WORKING_CYCLE_L2"/> 544 <value value="85" name="A8XX_PERF_TSE_VP1_TRANSFORM_WORKING_CYCLE_L2"/> 545 <value value="86" name="A8XX_PERF_TSE_VP2_TRANSFORM_WORKING_CYCLE_L2"/> 546 <value value="87" name="A8XX_PERF_TSE_VERTEX_GEN_WORKING_CYCLE_L1"/> 547 <value value="88" name="A8XX_PERF_TSE_DET_WORKING_CYCLE_L1"/> 548 <value value="89" name="A8XX_PERF_TSE_BBOX_WORKING_CYCLE_L1"/> 549 <value value="90" name="A8XX_PERF_TSE_CULLING_WORKING_CYCLE_L1"/> 550 <value value="91" name="A8XX_PERF_TSE_SETUP_WORKING_CYCLE_L1"/> 551 <value value="92" name="A8XX_PERF_TSE_SETUP_CTRL_WORKING_CYCLE_L2"/> 552 <value value="93" name="A8XX_PERF_TSE_SETUP_FDP3_WORKING_CYCLE_L2"/> 553 <value value="94" name="A8XX_PERF_TSE_SETUP_FDP3_0_WORKING_CYCLE_L3"/> 554 <value value="95" name="A8XX_PERF_TSE_SETUP_FDP3_1_WORKING_CYCLE_L3"/> 555 <value value="96" name="A8XX_PERF_TSE_SETUP_FDP3_2_WORKING_CYCLE_L3"/> 556 <value value="97" name="A8XX_PERF_TSE_SETUP_FDP3_3_WORKING_CYCLE_L3"/> 557 <value value="98" name="A8XX_PERF_TSE_SETUP_FDP3_4_WORKING_CYCLE_L3"/> 558 <value value="99" name="A8XX_PERF_TSE_SETUP_FDP3_5_WORKING_CYCLE_L3"/> 559 <value value="100" name="A8XX_PERF_TSE_SETUP_FMUL_WORKING_CYCLE_L2"/> 560 <value value="101" name="A8XX_PERF_TSE_SETUP_FMUL_0_WORKING_CYCLE_L3"/> 561 <value value="102" name="A8XX_PERF_TSE_SETUP_FMUL_1_WORKING_CYCLE_L3"/> 562 <value value="103" name="A8XX_PERF_TSE_SETUP_FMUL_2_WORKING_CYCLE_L3"/> 563 <value value="104" name="A8XX_PERF_TSE_SETUP_FMUL_3_WORKING_CYCLE_L3"/> 564 <value value="105" name="A8XX_PERF_TSE_SETUP_FMUL_4_WORKING_CYCLE_L3"/> 565 <value value="106" name="A8XX_PERF_TSE_SETUP_FMUL_5_WORKING_CYCLE_L3"/> 566 <value value="107" name="A8XX_PERF_TSE_EDGE_SETUP_WORKING_CYCLE_L1"/> 567 <value value="108" name="A8XX_PERF_TSE_EDGE_SETUP_IMUL_WORKING_CYCLE_L2"/> 568 <value value="109" name="A8XX_PERF_TSE_RAS_INTF_WORKING_CYCLE_L1"/> 569 <value value="110" name="A8XX_PERF_TSE_LRZ_Z_INTF_WORKING_CYCLE_L1"/> 570 <value value="111" name="A8XX_PERF_TSE_LRZ_BARY_INTF_WORKING_CYCLE_L1"/> 571 <value value="112" name="A8XX_PERF_TSE_NON_CLIP_WORKING_CYCLES"/> 572 <value value="113" name="A8XX_PERF_TSE_NULL_WORKING_CYCLES"/> 573 <value value="114" name="A8XX_PERF_TSE_OUT_PRIM_WORKING_CYCLES"/> 574 <value value="115" name="A8XX_PERF_TSE_INPUT_VERTEX_WORKING_CYCLES"/> 575 <value value="116" name="A8XX_PERF_TSE_MVC_STALL_VPC"/> 576 <value value="117" name="A8XX_PERF_TSE_VPC_STARVE_TSE"/> 577 <value value="118" name="A8XX_PERF_TSE_WORKING_CYCLE_L0"/> 578</enum> 579 580<enum name="a8xx_ras_perfcounter_select"> 581 <value value="0" name="A8XX_PERF_RAS_NEVER_COUNT"/> 582 <value value="1" name="A8XX_PERF_RAS_BUSY_CYCLES"/> 583 <value value="2" name="A8XX_PERF_RAS_SUPERTILE_ACTIVE_CYCLES"/> 584 <value value="3" name="A8XX_PERF_RAS_STALL_CYCLES_LRZ"/> 585 <value value="4" name="A8XX_PERF_RAS_STARVE_CYCLES_TSE"/> 586 <value value="5" name="A8XX_PERF_RAS_SUPER_TILES"/> 587 <value value="6" name="A8XX_PERF_RAS_8X4_TILES"/> 588 <value value="7" name="A8XX_PERF_RAS_MASKGEN_ACTIVE"/> 589 <value value="8" name="A8XX_PERF_RAS_FULLY_COVERED_SUPER_TILES"/> 590 <value value="9" name="A8XX_PERF_RAS_FULLY_COVERED_8X4_TILES"/> 591 <value value="10" name="A8XX_PERF_RAS_PRIM_KILLED_INVISILBE"/> 592 <value value="11" name="A8XX_PERF_RAS_SUPERTILE_GEN_ACTIVE_CYCLES"/> 593 <value value="12" name="A8XX_PERF_RAS_LRZ_INTF_WORKING_CYCLES"/> 594 <value value="13" name="A8XX_PERF_RAS_BLOCKS"/> 595 <value value="14" name="A8XX_PERF_RAS_FALSE_PARTIAL_STILE"/> 596 <value value="15" name="A8XX_PERF_RAS_SLICE_BLOCK_NONEMTPY"/> 597 <value value="16" name="A8XX_PERF_RAS_SLICE_BLOCK_EMPTY"/> 598 <value value="17" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_0_WORKING_CC_L2"/> 599 <value value="18" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_1_WORKING_CC_L2"/> 600 <value value="19" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_2_WORKING_CC_L2"/> 601 <value value="20" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_3_WORKING_CC_L2"/> 602 <value value="21" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_4_WORKING_CC_L2"/> 603 <value value="22" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_5_WORKING_CC_L2"/> 604 <value value="23" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_6_WORKING_CC_L2"/> 605 <value value="24" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_7_WORKING_CC_L2"/> 606 <value value="25" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_8_WORKING_CC_L2"/> 607 <value value="26" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_9_WORKING_CC_L2"/> 608 <value value="27" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_10_WORKING_CC_L2"/> 609 <value value="28" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_11_WORKING_CC_L2"/> 610 <value value="29" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_12_WORKING_CC_L2"/> 611 <value value="30" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_13_WORKING_CC_L2"/> 612 <value value="31" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_14_WORKING_CC_L2"/> 613 <value value="32" name="A8XX_PERF_RAS_SAMPLE_MASK_GEN_LANE_15_WORKING_CC_L2"/> 614 <value value="33" name="A8XX_PERF_RAS_EMPTY_SBLOCK_SCAN_CYCLE_PERFCOUNTER"/> 615 <value value="34" name="A8XX_PERF_RAS_STEGN_STALL_BY_LATENCY_FIFO"/> 616 <value value="35" name="A8XX_PERF_RAS_STALL_CYCLES_LRZ_PREFETCH"/> 617 <value value="36" name="A8XX_PERF_RAS_STGEN_BOTTLENECK_CYCLES"/> 618 <value value="37" name="A8XX_PERF_RAS_MTGEN_BOTTLENECK_CYCLES"/> 619 <value value="38" name="A8XX_PERF_RAS_TGEN_BOTTLENECK_CYCLES"/> 620</enum> 621 622<enum name="a8xx_uche_perfcounter_select"> 623 <value value="0" name="A8XX_PERF_UCHE_NEVER_COUNT"/> 624 <value value="1" name="A8XX_PERF_UCHE_BUSY_CYCLES"/> 625 <value value="2" name="A8XX_PERF_UCHE_STALL_CYCLES_ARBITER"/> 626 <value value="3" name="A8XX_PERF_UCHE_VBIF_STALL_WRITE_DATA"/> 627 <value value="4" name="A8XX_PERF_UCHE_STARVED_CYCLES_VBIF_DECMP"/> 628 <value value="5" name="A8XX_PERF_UCHE_STALL_CYCLES_DECMP"/> 629 <value value="6" name="A8XX_PERF_UCHE_ARBITER_STALL_CYCLES_VBIF"/> 630 <value value="7" name="A8XX_PERF_UCHE_VBIF_LATENCY_CYCLES"/> 631 <value value="8" name="A8XX_PERF_UCHE_VBIF_LATENCY_SAMPLES"/> 632 <value value="9" name="A8XX_PERF_UCHE_DCMP_LATENCY_SAMPLES"/> 633 <value value="10" name="A8XX_PERF_UCHE_DCMP_LATENCY_CYCLES"/> 634 <value value="11" name="A8XX_PERF_UCHE_READ_REQUESTS_SP"/> 635 <value value="12" name="A8XX_PERF_UCHE_READ_REQUESTS_TP"/> 636 <value value="13" name="A8XX_PERF_UCHE_READ_REQUESTS_TP_UBWC"/> 637 <value value="14" name="A8XX_PERF_UCHE_READ_REQUESTS_TP_GBIF"/> 638 <value value="15" name="A8XX_PERF_UCHE_READ_REQUESTS_TP_GMEM"/> 639 <value value="16" name="A8XX_PERF_UCHE_READ_REQUESTS_VFD"/> 640 <value value="17" name="A8XX_PERF_UCHE_READ_REQUESTS_VPC"/> 641 <value value="18" name="A8XX_PERF_UCHE_READ_REQUESTS_HLSQ"/> 642 <value value="19" name="A8XX_PERF_UCHE_READ_REQUESTS_LRZ"/> 643 <value value="20" name="A8XX_PERF_UCHE_READ_REQUESTS_PC"/> 644 <value value="21" name="A8XX_PERF_UCHE_WRITE_REQUESTS_SP"/> 645 <value value="22" name="A8XX_PERF_UCHE_WRITE_REQUESTS_LRZ"/> 646 <value value="23" name="A8XX_PERF_UCHE_WRITE_REQUESTS_VPC"/> 647 <value value="24" name="A8XX_PERF_UCHE_WRITE_REQUESTS_VSC"/> 648 <value value="25" name="A8XX_PERF_UCHE_VBIF_READ_BEATS_SP"/> 649 <value value="26" name="A8XX_PERF_UCHE_VBIF_READ_BEATS_TP"/> 650 <value value="27" name="A8XX_PERF_UCHE_VBIF_READ_BEATS_VFD"/> 651 <value value="28" name="A8XX_PERF_UCHE_VBIF_READ_BEATS_VPC"/> 652 <value value="29" name="A8XX_PERF_UCHE_VBIF_READ_BEATS_HLSQ"/> 653 <value value="30" name="A8XX_PERF_UCHE_VBIF_READ_BEATS_LRZ"/> 654 <value value="31" name="A8XX_PERF_UCHE_VBIF_READ_BEATS_PC"/> 655 <value value="32" name="A8XX_PERF_UCHE_VBIF_READ_BEATS_CH0"/> 656 <value value="33" name="A8XX_PERF_UCHE_VBIF_READ_BEATS_CH1"/> 657 <value value="34" name="A8XX_PERF_UCHE_VBIF_WRITE_BEATS_CH0"/> 658 <value value="35" name="A8XX_PERF_UCHE_VBIF_WRITE_BEATS_CH1"/> 659 <value value="36" name="A8XX_PERF_UCHE_GMEM_READ_BEATS"/> 660 <value value="37" name="A8XX_PERF_UCHE_GMEM_WRITE_BEATS"/> 661 <value value="38" name="A8XX_PERF_UCHE_UBWC_READ_BEATS"/> 662 <value value="39" name="A8XX_PERF_UCHE_UBWC_WRITE_BEATS"/> 663 <value value="40" name="A8XX_PERF_UCHE_EVICTS"/> 664 <value value="41" name="A8XX_PERF_UCHE_BANK_REQ0"/> 665 <value value="42" name="A8XX_PERF_UCHE_BANK_REQ1"/> 666 <value value="43" name="A8XX_PERF_UCHE_BANK_REQ2"/> 667 <value value="44" name="A8XX_PERF_UCHE_BANK_REQ3"/> 668 <value value="45" name="A8XX_PERF_UCHE_BANK_REQ4"/> 669 <value value="46" name="A8XX_PERF_UCHE_BANK_REQ5"/> 670 <value value="47" name="A8XX_PERF_UCHE_BANK_REQ6"/> 671 <value value="48" name="A8XX_PERF_UCHE_BANK_REQ7"/> 672 <value value="49" name="A8XX_PERF_UCHE_TPH_REF_FULL"/> 673 <value value="50" name="A8XX_PERF_UCHE_TPH_VICTIM_FULL"/> 674 <value value="51" name="A8XX_PERF_UCHE_TPH_EXT_FULL"/> 675 <value value="52" name="A8XX_PERF_UCHE_RAM_READ_REQ"/> 676 <value value="53" name="A8XX_PERF_UCHE_RAM_WRITE_REQ"/> 677 <value value="54" name="A8XX_PERF_UCHE_LONG_LINE_ALL_EVICTS"/> 678 <value value="55" name="A8XX_PERF_UCHE_LONG_LINE_PARTIAL_EVICTS"/> 679 <value value="56" name="A8XX_PERF_UCHE_TPH_CONFLICT_CL_CCHE"/> 680 <value value="57" name="A8XX_PERF_UCHE_TPH_CONFLICT_CL_OTHER"/> 681 <value value="58" name="A8XX_PERF_UCHE_DBANK_CONFLICT_CL_CCHE"/> 682 <value value="59" name="A8XX_PERF_UCHE_DBANK_CONFLICT_CL_OTHER_CLIENTS"/> 683 <value value="60" name="A8XX_PERF_UCHE_CCHE_TPH_QUEUE_FULL"/> 684 <value value="61" name="A8XX_PERF_UCHE_CCHE_DPH_IO_QUEUE_FULL"/> 685 <value value="62" name="A8XX_PERF_UCHE_CCHE_DPH_CMDPOOL_FULL"/> 686 <value value="63" name="A8XX_PERF_UCHE_EVICTS_SP"/> 687 <value value="64" name="A8XX_PERF_UCHE_EVICTS_LRZ"/> 688 <value value="65" name="A8XX_PERF_UCHE_READ_REQUESTS_VPCUS"/> 689 <value value="66" name="A8XX_PERF_UCHE_READ_REQUESTS_VFD_BYPASS_BV"/> 690 <value value="67" name="A8XX_PERF_UCHE_READ_REQUESTS_VFD_BYPASS_BR"/> 691 <value value="68" name="A8XX_PERF_BYPC_FULL"/> 692 <value value="69" name="A8XX_PERF_BYPC_FULL_CCHE_STALL"/> 693 <value value="70" name="A8XX_PERF_BYPC_VHUB_STALL"/> 694 <value value="71" name="A8XX_PERF_BYPD_FULL"/> 695 <value value="72" name="A8XX_PERF_BYPD_FULL_GBIF_STALL"/> 696 <value value="73" name="A8XX_PERF_VHUB_PTABLE_FULL"/> 697 <value value="74" name="A8XX_PERF_DHUB_PTABLE_FULL"/> 698 <value value="75" name="A8XX_PERF_UCHE_RESERVED_75"/> 699 <value value="76" name="A8XX_PERF_UCHE_RESERVED_76"/> 700 <value value="77" name="A8XX_PERF_UCHE_RESERVED_77"/> 701 <value value="78" name="A8XX_PERF_UCHE_RESERVED_78"/> 702 <value value="79" name="A8XX_PERF_UCHE_RESERVED_79"/> 703 <value value="80" name="A8XX_PERF_UCHE_RESERVED_80"/> 704 <value value="81" name="A8XX_PERF_UCHE_RESERVED_81"/> 705 <value value="82" name="A8XX_PERF_UCHE_RESERVED_82"/> 706 <value value="83" name="A8XX_PERF_UCHE_RESERVED_83"/> 707 <value value="84" name="A8XX_PERF_UCHE_RESERVED_84"/> 708 <value value="85" name="A8XX_PERF_UCHE_RESERVED_85"/> 709 <value value="86" name="A8XX_PERF_UCHE_RESERVED_86"/> 710 <value value="87" name="A8XX_PERF_UCHE_RESERVED_87"/> 711 <value value="88" name="A8XX_PERF_UCHE_RESERVED_88"/> 712 <value value="89" name="A8XX_PERF_UCHE_RESERVED_89"/> 713 <value value="90" name="A8XX_PERF_UCHE_RESERVED_90"/> 714 <value value="91" name="A8XX_PERF_UCHE_RESERVED_91"/> 715 <value value="92" name="A8XX_PERF_UCHE_RESERVED_92"/> 716 <value value="93" name="A8XX_PERF_UCHE_RESERVED_93"/> 717 <value value="94" name="A8XX_PERF_UCHE_RESERVED_94"/> 718 <value value="95" name="A8XX_PERF_UCHE_RESERVED_95"/> 719 <value value="96" name="A8XX_PERF_UCHE_RESERVED_96"/> 720 <value value="97" name="A8XX_PERF_UCHE_RESERVED_97"/> 721 <value value="98" name="A8XX_PERF_UCHE_RESERVED_98"/> 722 <value value="99" name="A8XX_PERF_UCHE_RESERVED_99"/> 723 <value value="100" name="A8XX_PERF_UCHE_RESERVED_100"/> 724 <value value="101" name="A8XX_PERF_UCHE_RESERVED_101"/> 725 <value value="102" name="A8XX_PERF_UCHE_RESERVED_102"/> 726 <value value="103" name="A8XX_PERF_UCHE_RESERVED_103"/> 727 <value value="104" name="A8XX_PERF_UCHE_RESERVED_104"/> 728 <value value="105" name="A8XX_PERF_UCHE_RESERVED_105"/> 729 <value value="106" name="A8XX_PERF_UCHE_RESERVED_106"/> 730 <value value="107" name="A8XX_PERF_UCHE_RESERVED_107"/> 731 <value value="108" name="A8XX_PERF_UCHE_RESERVED_108"/> 732 <value value="109" name="A8XX_PERF_UCHE_RESERVED_109"/> 733 <value value="110" name="A8XX_PERF_UCHE_RESERVED_110"/> 734 <value value="111" name="A8XX_PERF_UCHE_RESERVED_111"/> 735 <value value="112" name="A8XX_PERF_UCHE_RESERVED_112"/> 736 <value value="113" name="A8XX_PERF_UCHE_RESERVED_113"/> 737 <value value="114" name="A8XX_PERF_UCHE_RESERVED_114"/> 738 <value value="115" name="A8XX_PERF_UCHE_RESERVED_115"/> 739 <value value="116" name="A8XX_PERF_UCHE_RESERVED_116"/> 740 <value value="117" name="A8XX_PERF_UCHE_RESERVED_117"/> 741 <value value="118" name="A8XX_PERF_UCHE_RESERVED_118"/> 742 <value value="119" name="A8XX_PERF_UCHE_RESERVED_119"/> 743 <value value="120" name="A8XX_PERF_UCHE_RESERVED_120"/> 744 <value value="121" name="A8XX_PERF_UCHE_RESERVED_121"/> 745 <value value="122" name="A8XX_PERF_UCHE_RESERVED_122"/> 746 <value value="123" name="A8XX_PERF_UCHE_RESERVED_123"/> 747 <value value="124" name="A8XX_PERF_UCHE_RESERVED_124"/> 748 <value value="125" name="A8XX_PERF_UCHE_RESERVED_125"/> 749 <value value="126" name="A8XX_PERF_UCHE_RESERVED_126"/> 750 <value value="127" name="A8XX_PERF_UCHE_RESERVED_127"/> 751 <value value="128" name="A8XX_PERF_CCHE_BUSY_CYCLES"/> 752 <value value="129" name="A8XX_PERF_CCHE_STALL_CYCLES_UCHE"/> 753 <value value="130" name="A8XX_PERF_CCHE_UCHE_STALL_WRITE_DATA"/> 754 <value value="131" name="A8XX_PERF_CCHE_UCHE_LATENCY_CYCLES"/> 755 <value value="132" name="A8XX_PERF_CCHE_UCHE_LATENCY_SAMPLES"/> 756 <value value="133" name="A8XX_PERF_CCHE_READ_REQUESTS_SP_TOTAL"/> 757 <value value="134" name="A8XX_PERF_CCHE_READ_REQUESTS_SP_UBWC"/> 758 <value value="135" name="A8XX_PERF_CCHE_READ_REQUESTS_SP_GBIF"/> 759 <value value="136" name="A8XX_PERF_CCHE_READ_REQUESTS_SP_GMEM"/> 760 <value value="137" name="A8XX_PERF_CCHE_READ_REQUESTS_TP_TOTAL"/> 761 <value value="138" name="A8XX_PERF_CCHE_READ_REQUESTS_TP_UBWC"/> 762 <value value="139" name="A8XX_PERF_CCHE_READ_REQUESTS_TP_GBIF"/> 763 <value value="140" name="A8XX_PERF_CCHE_READ_REQUESTS_TP_GMEM"/> 764 <value value="141" name="A8XX_PERF_CCHE_READ_REQUESTS_VFD_TOTAL"/> 765 <value value="142" name="A8XX_PERF_CCHE_READ_REQUEST_VFD_GMEM"/> 766 <value value="143" name="A8XX_PERF_CCHE_READ_REQUEST_VFD_GBIF"/> 767 <value value="144" name="A8XX_PERF_CCHE_READ_REQUESTS_LRZ"/> 768 <value value="145" name="A8XX_PERF_CCHE_READ_REQUESTS_VPC"/> 769 <value value="146" name="A8XX_PERF_CCHE_WRITE_REQUESTS_SP"/> 770 <value value="147" name="A8XX_PERF_CCHE_WRITE_REQUESTS_LRZ"/> 771 <value value="148" name="A8XX_PERF_CCHE_READ_REQUESTS_GMEM"/> 772 <value value="149" name="A8XX_PERF_CCHE_WRITE_REQUESTS_GMEM"/> 773 <value value="150" name="A8XX_PERF_CCHE_UCHE_READ_BEATS_TP"/> 774 <value value="151" name="A8XX_PERF_CCHE_UCHE_READ_BEATS_VFD"/> 775 <value value="152" name="A8XX_PERF_CCHE_UCHE_READ_BEATS_SP"/> 776 <value value="153" name="A8XX_PERF_CCHE_UCHE_READ_BEATS_VPC"/> 777 <value value="154" name="A8XX_PERF_CCHE_UCHE_READ_BEATS_LRZ"/> 778 <value value="155" name="A8XX_PERF_CCHE_UCHE_READ_BEATS_CH0"/> 779 <value value="156" name="A8XX_PERF_CCHE_UCHE_READ_BEATS_CH1"/> 780 <value value="157" name="A8XX_PERF_CCHE_GMEM_READ_BEATS_VPC"/> 781 <value value="158" name="A8XX_PERF_CCHE_GMEM_READ_BEATS_TP"/> 782 <value value="159" name="A8XX_PERF_CCHE_GMEM_READ_BEATS_SP"/> 783 <value value="160" name="A8XX_PERF_CCHE_GMEM_READ_BEATS_VFD"/> 784 <value value="161" name="A8XX_PERF_CCHE_BANK_REQ0"/> 785 <value value="162" name="A8XX_PERF_CCHE_BANK_REQ1"/> 786 <value value="163" name="A8XX_PERF_CCHE_BANK_REQ2"/> 787 <value value="164" name="A8XX_PERF_CCHE_BANK_REQ3"/> 788 <value value="165" name="A8XX_PERF_CCHE_BANK_REQ4"/> 789 <value value="166" name="A8XX_PERF_CCHE_BANK_REQ5"/> 790 <value value="167" name="A8XX_PERF_CCHE_BANK_REQ6"/> 791 <value value="168" name="A8XX_PERF_CCHE_BANK_REQ7"/> 792 <value value="169" name="A8XX_PERF_CCHE_BANK_REQ8"/> 793 <value value="170" name="A8XX_PERF_CCHE_BANK_REQ9"/> 794 <value value="171" name="A8XX_PERF_CCHE_BANK_REQ10"/> 795 <value value="172" name="A8XX_PERF_CCHE_BANK_REQ11"/> 796 <value value="173" name="A8XX_PERF_CCHE_BANK_REQ12"/> 797 <value value="174" name="A8XX_PERF_CCHE_BANK_REQ13"/> 798 <value value="175" name="A8XX_PERF_CCHE_BANK_REQ14"/> 799 <value value="176" name="A8XX_PERF_CCHE_BANK_REQ15"/> 800 <value value="177" name="A8XX_PERF_CCHE_GBANK_REQ0"/> 801 <value value="178" name="A8XX_PERF_CCHE_GBANK_REQ1"/> 802 <value value="179" name="A8XX_PERF_CCHE_GBANK_REQ2"/> 803 <value value="180" name="A8XX_PERF_CCHE_GBANK_REQ3"/> 804 <value value="181" name="A8XX_PERF_CCHE_TPH_REF_FULL"/> 805 <value value="182" name="A8XX_PERF_CCHE_TPH_VICTIM_FULL"/> 806 <value value="183" name="A8XX_PERF_CCHE_TPH_EXT_FULL"/> 807 <value value="184" name="A8XX_PERF_CCHE_RAM_READ_REQ"/> 808 <value value="185" name="A8XX_PERF_CCHE_RAM_WRITE_REQ"/> 809 <value value="186" name="A8XX_PERF_CCHE_TPH_CONFLICT_CL"/> 810 <value value="187" name="A8XX_PERF_CCHE_DBANK_CONFLICT"/> 811 <value value="188" name="A8XX_PERF_CCHE_TPH_QUEUE_FULL"/> 812 <value value="189" name="A8XX_PERF_CCHE_DPH_QUEUE_FULL"/> 813 <value value="190" name="A8XX_PERF_CCHE_OPH_QUEUE_FULL"/> 814 <value value="191" name="A8XX_PERF_CCHE_WACK_QUEUE_FULL"/> 815 <value value="192" name="A8XX_PERF_CCHE_GMEM0_LOCAL_RD_REQUEST"/> 816 <value value="193" name="A8XX_PERF_CCHE_GMEM0_LOCAL_WR_REQUEST"/> 817 <value value="194" name="A8XX_PERF_CCHE_GMEM1_LOCAL_RD_REQUEST"/> 818 <value value="195" name="A8XX_PERF_CCHE_GMEM1_LOCAL_WR_REQUEST"/> 819 <value value="196" name="A8XX_PERF_CCHE_GMEM0_REMOTE_RD_REQUEST"/> 820 <value value="197" name="A8XX_PERF_CCHE_GMEM0_REMOTE_WR_REQUEST"/> 821 <value value="198" name="A8XX_PERF_CCHE_GMEM1_REMOTE_RD_REQUEST"/> 822 <value value="199" name="A8XX_PERF_CCHE_GMEM1_REMOTE_WR_REQUEST"/> 823 <value value="200" name="A8XX_PERF_CCHE_STALL_CYCLES_TP"/> 824 <value value="201" name="A8XX_PERF_CCHE_ATOMIC_REQUESTS_SP_TOTAL"/> 825 <value value="202" name="A8XX_PERF_CCHE_ATOMIC_PACKING_BEAT_SP_TOTAL"/> 826</enum> 827 828<enum name="a8xx_tp_perfcounter_select"> 829 <value value="0" name="A8XX_PERF_TP_NEVER_COUNT"/> 830 <value value="1" name="A8XX_PERF_TP_BUSY_CYCLES"/> 831 <value value="2" name="A8XX_PERF_TP_STALL_CYCLES_UCHE"/> 832 <value value="3" name="A8XX_PERF_TP_LATENCY_CYCLES"/> 833 <value value="4" name="A8XX_PERF_TP_LATENCY_TRANS"/> 834 <value value="5" name="A8XX_PERF_TP_FLAG_FIFO_DELAY_SAMPLES"/> 835 <value value="6" name="A8XX_PERF_TP_FLAG_FIFO_DELAY_CYCLES"/> 836 <value value="7" name="A8XX_PERF_TP_L1_CACHELINE_REQUESTS"/> 837 <value value="8" name="A8XX_PERF_TP_L1_CACHELINE_MISSES"/> 838 <value value="9" name="A8XX_PERF_TP_SP_TP_TRANS"/> 839 <value value="10" name="A8XX_PERF_TP_TP_SP_TRANS"/> 840 <value value="11" name="A8XX_PERF_TP_OUTPUT_PIXELS"/> 841 <value value="12" name="A8XX_PERF_TP_FILTER_WORKLOAD_16BIT"/> 842 <value value="13" name="A8XX_PERF_TP_FILTER_WORKLOAD_32BIT"/> 843 <value value="14" name="A8XX_PERF_TP_QUADS_RECEIVED"/> 844 <value value="15" name="A8XX_PERF_TP_QUADS_OFFSET"/> 845 <value value="16" name="A8XX_PERF_TP_QUADS_SHADOW"/> 846 <value value="17" name="A8XX_PERF_TP_QUADS_ARRAY"/> 847 <value value="18" name="A8XX_PERF_TP_QUADS_GRADIENT"/> 848 <value value="19" name="A8XX_PERF_TP_QUADS_1D"/> 849 <value value="20" name="A8XX_PERF_TP_QUADS_2D"/> 850 <value value="21" name="A8XX_PERF_TP_QUADS_BUFFER"/> 851 <value value="22" name="A8XX_PERF_TP_QUADS_3D"/> 852 <value value="23" name="A8XX_PERF_TP_QUADS_CUBE"/> 853 <value value="24" name="A8XX_PERF_TP_DIVERGENT_QUADS_RECEIVED"/> 854 <value value="25" name="A8XX_PERF_TP_PRT_NON_RESIDENT_EVENTS"/> 855 <value value="26" name="A8XX_PERF_TP_OUTPUT_PIXELS_POINT"/> 856 <value value="27" name="A8XX_PERF_TP_OUTPUT_PIXELS_BILINEAR"/> 857 <value value="28" name="A8XX_PERF_TP_OUTPUT_PIXELS_MIP"/> 858 <value value="29" name="A8XX_PERF_TP_OUTPUT_PIXELS_ANISO"/> 859 <value value="30" name="A8XX_PERF_TP_OUTPUT_PIXELS_ZERO_LOD"/> 860 <value value="31" name="A8XX_PERF_TP_FLAG_CACHE_REQUESTS"/> 861 <value value="32" name="A8XX_PERF_TP_FLAG_CACHE_MISSES"/> 862 <value value="33" name="A8XX_PERF_TP_L1_5_L2_REQUESTS"/> 863 <value value="34" name="A8XX_PERF_TP_2D_OUTPUT_PIXELS"/> 864 <value value="35" name="A8XX_PERF_TP_2D_OUTPUT_PIXELS_POINT"/> 865 <value value="36" name="A8XX_PERF_TP_2D_OUTPUT_PIXELS_BILINEAR"/> 866 <value value="37" name="A8XX_PERF_TP_2D_FILTER_WORKLOAD_16BIT"/> 867 <value value="38" name="A8XX_PERF_TP_2D_FILTER_WORKLOAD_32BIT"/> 868 <value value="39" name="A8XX_PERF_TP_TPA2TPC_TRANS"/> 869 <value value="40" name="A8XX_PERF_TP_L1_MISSES_ASTC_1TILE"/> 870 <value value="41" name="A8XX_PERF_TP_L1_MISSES_ASTC_2TILE"/> 871 <value value="42" name="A8XX_PERF_TP_L1_MISSES_ASTC_4TILE"/> 872 <value value="43" name="A8XX_PERF_TP_L1_5_COMPRESS_REQS"/> 873 <value value="44" name="A8XX_PERF_TP_L1_5_L2_COMPRESS_MISS"/> 874 <value value="45" name="A8XX_PERF_TP_L1_BANK_CONFLICT"/> 875 <value value="46" name="A8XX_PERF_TP_L1_5_MISS_LATENCY_CYCLES"/> 876 <value value="47" name="A8XX_PERF_TP_L1_5_MISS_LATENCY_TRANS"/> 877 <value value="48" name="A8XX_PERF_TP_QUADS_CONSTANT_MULTIPLIED"/> 878 <value value="49" name="A8XX_PERF_TP_FRONTEND_WORKING_CYCLES"/> 879 <value value="50" name="A8XX_PERF_TP_L1_TAG_WORKING_CYCLES"/> 880 <value value="51" name="A8XX_PERF_TP_L1_DATA_WRITE_WORKING_CYCLES"/> 881 <value value="52" name="A8XX_PERF_TP_PRE_L1_DECOM_WORKING_CYCLES"/> 882 <value value="53" name="A8XX_PERF_TP_BACKEND_WORKING_CYCLES"/> 883 <value value="54" name="A8XX_PERF_TP_L1_5_CACHE_WORKING_CYCLES"/> 884 <value value="55" name="A8XX_PERF_TP_STARVE_CYCLES_SP"/> 885 <value value="56" name="A8XX_PERF_TP_STARVE_CYCLES_UCHE"/> 886 <value value="57" name="A8XX_PERF_TP_STALL_CYCLES_UFC"/> 887 <value value="58" name="A8XX_PERF_TP_FORMAT_DECOMP_POINT"/> 888 <value value="59" name="A8XX_PERF_TP_FILTER_POINT_FP16"/> 889 <value value="60" name="A8XX_PERF_TP_FILTER_POINT_FP32"/> 890 <value value="61" name="A8XX_PERF_TP_LATENCY_FIFO_FULL"/> 891 <value value="62" name="A8XX_PERF_TP_RESERVED_62"/> 892 <value value="63" name="A8XX_PERF_TP_RESERVED_63"/> 893 <value value="64" name="A8XX_PERF_TP_RESERVED_64"/> 894 <value value="65" name="A8XX_PERF_TP_RESERVED_65"/> 895 <value value="66" name="A8XX_PERF_TP_RESERVED_66"/> 896 <value value="67" name="A8XX_PERF_TP_RESERVED_67"/> 897 <value value="68" name="A8XX_PERF_TP_RESERVED_68"/> 898 <value value="69" name="A8XX_PERF_TP_RESERVED_69"/> 899 <value value="70" name="A8XX_PERF_TP_RESERVED_70"/> 900 <value value="71" name="A8XX_PERF_TP_RESERVED_71"/> 901 <value value="72" name="A8XX_PERF_TP_RESERVED_72"/> 902 <value value="73" name="A8XX_PERF_TP_RESERVED_73"/> 903 <value value="74" name="A8XX_PERF_TP_RESERVED_74"/> 904 <value value="75" name="A8XX_PERF_TP_RESERVED_75"/> 905 <value value="76" name="A8XX_PERF_TP_RESERVED_76"/> 906 <value value="77" name="A8XX_PERF_TP_RESERVED_77"/> 907 <value value="78" name="A8XX_PERF_TP_RESERVED_78"/> 908 <value value="79" name="A8XX_PERF_TP_RESERVED_79"/> 909 <value value="80" name="A8XX_PERF_TP_RESERVED_80"/> 910 <value value="81" name="A8XX_PERF_TP_RESERVED_81"/> 911 <value value="82" name="A8XX_PERF_TP_RESERVED_82"/> 912 <value value="83" name="A8XX_PERF_TP_RESERVED_83"/> 913 <value value="84" name="A8XX_PERF_TP_RESERVED_84"/> 914 <value value="85" name="A8XX_PERF_TP_RESERVED_85"/> 915 <value value="86" name="A8XX_PERF_TP_RESERVED_86"/> 916 <value value="87" name="A8XX_PERF_TP_RESERVED_87"/> 917 <value value="88" name="A8XX_PERF_TP_RESERVED_88"/> 918 <value value="89" name="A8XX_PERF_TP_RESERVED_89"/> 919 <value value="90" name="A8XX_PERF_TP_RESERVED_90"/> 920 <value value="91" name="A8XX_PERF_TP_RESERVED_91"/> 921 <value value="92" name="A8XX_PERF_TP_RESERVED_92"/> 922 <value value="93" name="A8XX_PERF_TP_RESERVED_93"/> 923 <value value="94" name="A8XX_PERF_TP_RESERVED_94"/> 924 <value value="95" name="A8XX_PERF_TP_RESERVED_95"/> 925 <value value="96" name="A8XX_PERF_TP_RESERVED_96"/> 926 <value value="97" name="A8XX_PERF_TP_RESERVED_97"/> 927 <value value="98" name="A8XX_PERF_TP_RESERVED_98"/> 928 <value value="99" name="A8XX_PERF_TP_RESERVED_99"/> 929 <value value="100" name="A8XX_PERF_TP_RESERVED_100"/> 930 <value value="101" name="A8XX_PERF_TP_RESERVED_101"/> 931 <value value="102" name="A8XX_PERF_TP_RESERVED_102"/> 932 <value value="103" name="A8XX_PERF_TP_RESERVED_103"/> 933 <value value="104" name="A8XX_PERF_TP_RESERVED_104"/> 934 <value value="105" name="A8XX_PERF_TP_RESERVED_105"/> 935 <value value="106" name="A8XX_PERF_TP_RESERVED_106"/> 936 <value value="107" name="A8XX_PERF_TP_RESERVED_107"/> 937 <value value="108" name="A8XX_PERF_TP_RESERVED_108"/> 938 <value value="109" name="A8XX_PERF_TP_RESERVED_109"/> 939 <value value="110" name="A8XX_PERF_TP_RESERVED_110"/> 940 <value value="111" name="A8XX_PERF_TP_RESERVED_111"/> 941 <value value="112" name="A8XX_PERF_TP_RESERVED_112"/> 942 <value value="113" name="A8XX_PERF_TP_RESERVED_113"/> 943 <value value="114" name="A8XX_PERF_TP_RESERVED_114"/> 944 <value value="115" name="A8XX_PERF_TP_RESERVED_115"/> 945 <value value="116" name="A8XX_PERF_TP_RESERVED_116"/> 946 <value value="117" name="A8XX_PERF_TP_RESERVED_117"/> 947 <value value="118" name="A8XX_PERF_TP_RESERVED_118"/> 948 <value value="119" name="A8XX_PERF_TP_RESERVED_119"/> 949 <value value="120" name="A8XX_PERF_TP_RESERVED_120"/> 950 <value value="121" name="A8XX_PERF_TP_RESERVED_121"/> 951 <value value="122" name="A8XX_PERF_TP_RESERVED_122"/> 952 <value value="123" name="A8XX_PERF_TP_RESERVED_123"/> 953 <value value="124" name="A8XX_PERF_TP_RESERVED_124"/> 954 <value value="125" name="A8XX_PERF_TP_RESERVED_125"/> 955 <value value="126" name="A8XX_PERF_TP_RESERVED_126"/> 956 <value value="127" name="A8XX_PERF_TP_RESERVED_127"/> 957 <value value="128" name="A8XX_PERF_TP_FORMAT_DECOMP_BILINEAR"/> 958 <value value="129" name="A8XX_PERF_TP_PACKED_POINT_BOTH_VALID_FP16"/> 959 <value value="130" name="A8XX_PERF_TP_PACKED_POINT_SINGLE_VALID_FP16"/> 960 <value value="131" name="A8XX_PERF_TP_PACKED_POINT_BOTH_VALID_FP32"/> 961 <value value="132" name="A8XX_PERF_TP_PACKED_POINT_SINGLE_VALID_FP32"/> 962 <value value="133" name="A8XX_PERF_TP_TOTAL_DECOMP_L1_RESP_CH0"/> 963 <value value="134" name="A8XX_PERF_TP_TOTAL_DECOMP_L1_RESP_CH1"/> 964 <value value="135" name="A8XX_PERF_TP_L1POINT5_PRE_L1_DECOMP_0_WORKLOAD_R"/> 965 <value value="136" name="A8XX_PERF_TP_L1POINT5_PRE_L1_DECOMP_1_WORKLOAD_R"/> 966 <value value="137" name="A8XX_PERF_TP_L1POINT5_ASTC_DECODER_0_WORKLOAD_R"/> 967 <value value="138" name="A8XX_PERF_TP_L1POINT5_ASTC_DECODER_1_WORKLOAD_R"/> 968 <value value="139" name="A8XX_PERF_TP_PARTIAL_SURFACE_PGMEM_PIXELS"/> 969 <value value="140" name="A8XX_PERF_TP_PARTIAL_SURFACE_SYSMEM_PIXELS"/> 970 <value value="141" name="A8XX_PERF_TP_PARTIAL_SURFACE_PGMEM_MISS_REQ"/> 971 <value value="142" name="A8XX_PERF_TP_PARTIAL_SURFACE_SYSMEM_MISS_REQ"/> 972</enum> 973 974<enum name="a8xx_sp_perfcounter_select"> 975 <value value="0" name="A8XX_PERF_SP_NEVER_COUNT"/> 976 <value value="1" name="A8XX_PERF_SP_BUSY_CYCLES"/> 977 <value value="2" name="A8XX_PERF_SP_ALU_WORKING_CYCLES"/> 978 <value value="3" name="A8XX_PERF_SP_STALL_CYCLES_VPC_BE"/> 979 <value value="4" name="A8XX_PERF_SP_STALL_CYCLES_TP"/> 980 <value value="5" name="A8XX_PERF_SP_STALL_CYCLES_UCHE"/> 981 <value value="6" name="A8XX_PERF_SP_STALL_CYCLES_RB"/> 982 <value value="7" name="A8XX_PERF_SP_NON_EXECUTION_CYCLES"/> 983 <value value="8" name="A8XX_PERF_SP_WAVE_CONTEXTS"/> 984 <value value="9" name="A8XX_PERF_SP_WAVE_CONTEXT_CYCLES"/> 985 <value value="10" name="A8XX_PERF_SP_FS_STAGE_WAVE_CYCLES"/> 986 <value value="11" name="A8XX_PERF_SP_FS_STAGE_WAVE_SAMPLES"/> 987 <value value="12" name="A8XX_PERF_SP_VS_STAGE_WAVE_CYCLES"/> 988 <value value="13" name="A8XX_PERF_SP_VS_STAGE_WAVE_SAMPLES"/> 989 <value value="14" name="A8XX_PERF_SP_FS_STAGE_DURATION_CYCLES"/> 990 <value value="15" name="A8XX_PERF_SP_VS_STAGE_DURATION_CYCLES"/> 991 <value value="16" name="A8XX_PERF_SP_WAVE_CTRL_CYCLES"/> 992 <value value="17" name="A8XX_PERF_SP_WAVE_LOAD_CYCLES"/> 993 <value value="18" name="A8XX_PERF_SP_WAVE_EMIT_CYCLES"/> 994 <value value="19" name="A8XX_PERF_SP_WAVE_NOP_CYCLES"/> 995 <value value="20" name="A8XX_PERF_SP_WAVE_WAIT_CYCLES"/> 996 <value value="21" name="A8XX_PERF_SP_WAVE_FETCH_CYCLES"/> 997 <value value="22" name="A8XX_PERF_SP_WAVE_IDLE_CYCLES"/> 998 <value value="23" name="A8XX_PERF_SP_WAVE_END_CYCLES"/> 999 <value value="24" name="A8XX_PERF_SP_WAVE_LONG_SYNC_CYCLES"/> 1000 <value value="25" name="A8XX_PERF_SP_WAVE_SHORT_SYNC_CYCLES"/> 1001 <value value="26" name="A8XX_PERF_SP_WAVE_JOIN_CYCLES"/> 1002 <value value="27" name="A8XX_PERF_SP_LM_LOAD_INSTRUCTIONS"/> 1003 <value value="28" name="A8XX_PERF_SP_LM_STORE_INSTRUCTIONS"/> 1004 <value value="29" name="A8XX_PERF_SP_LM_ATOMICS"/> 1005 <value value="30" name="A8XX_PERF_SP_GM_LOAD_INSTRUCTIONS"/> 1006 <value value="31" name="A8XX_PERF_SP_GM_STORE_INSTRUCTIONS"/> 1007 <value value="32" name="A8XX_PERF_SP_GM_ATOMICS"/> 1008 <value value="33" name="A8XX_PERF_SP_VS_STAGE_TEX_INSTRUCTIONS"/> 1009 <value value="34" name="A8XX_PERF_SP_VS_STAGE_EFU_INSTRUCTIONS"/> 1010 <value value="35" name="A8XX_PERF_SP_VS_STAGE_FULL_ALU_INSTRUCTIONS"/> 1011 <value value="36" name="A8XX_PERF_SP_VS_STAGE_HALF_ALU_INSTRUCTIONS"/> 1012 <value value="37" name="A8XX_PERF_SP_FS_STAGE_TEX_INSTRUCTIONS"/> 1013 <value value="38" name="A8XX_PERF_SP_FS_STAGE_CFLOW_INSTRUCTIONS"/> 1014 <value value="39" name="A8XX_PERF_SP_FS_STAGE_EFU_INSTRUCTIONS"/> 1015 <value value="40" name="A8XX_PERF_SP_FS_STAGE_FULL_ALU_INSTRUCTIONS"/> 1016 <value value="41" name="A8XX_PERF_SP_FS_STAGE_HALF_ALU_INSTRUCTIONS"/> 1017 <value value="42" name="A8XX_PERF_SP_FS_STAGE_BARY_INSTRUCTIONS"/> 1018 <value value="43" name="A8XX_PERF_SP_VS_INSTRUCTIONS"/> 1019 <value value="44" name="A8XX_PERF_SP_FS_INSTRUCTIONS"/> 1020 <value value="45" name="A8XX_PERF_SP_ADDR_LOCK_COUNT"/> 1021 <value value="46" name="A8XX_PERF_SP_UCHE_READ_TRANS"/> 1022 <value value="47" name="A8XX_PERF_SP_UCHE_WRITE_TRANS"/> 1023 <value value="48" name="A8XX_PERF_SP_EXPORT_VPC_TRANS"/> 1024 <value value="49" name="A8XX_PERF_SP_EXPORT_RB_TRANS"/> 1025 <value value="50" name="A8XX_PERF_SP_PIXELS_KILLED"/> 1026 <value value="51" name="A8XX_PERF_SP_ICL1_REQUESTS"/> 1027 <value value="52" name="A8XX_PERF_SP_ICL1_MISSES"/> 1028 <value value="53" name="A8XX_PERF_SP_HS_INSTRUCTIONS"/> 1029 <value value="54" name="A8XX_PERF_SP_DS_INSTRUCTIONS"/> 1030 <value value="55" name="A8XX_PERF_SP_GS_INSTRUCTIONS"/> 1031 <value value="56" name="A8XX_PERF_SP_CS_INSTRUCTIONS"/> 1032 <value value="57" name="A8XX_PERF_SP_GPR_READ"/> 1033 <value value="58" name="A8XX_PERF_SP_GPR_WRITE"/> 1034 <value value="59" name="A8XX_PERF_SP_FS_STAGE_HALF_EFU_INSTRUCTIONS"/> 1035 <value value="60" name="A8XX_PERF_SP_VS_STAGE_HALF_EFU_INSTRUCTIONS"/> 1036 <value value="61" name="A8XX_PERF_SP_LM_BANK_CONFLICTS"/> 1037 <value value="62" name="A8XX_PERF_SP_TEX_CONTROL_WORKING_CYCLES"/> 1038 <value value="63" name="A8XX_PERF_SP_LOAD_CONTROL_WORKING_CYCLES"/> 1039 <value value="64" name="A8XX_PERF_SP_FLOW_CONTROL_WORKING_CYCLES"/> 1040 <value value="65" name="A8XX_PERF_SP_LM_WORKING_CYCLES"/> 1041 <value value="66" name="A8XX_PERF_SP_DISPATCHER_WORKING_CYCLES"/> 1042 <value value="67" name="A8XX_PERF_SP_SEQUENCER_WORKING_CYCLES"/> 1043 <value value="68" name="A8XX_PERF_SP_LOW_EFFICIENCY_STARVED_BY_TP"/> 1044 <value value="69" name="A8XX_PERF_SP_STARVE_CYCLES_HLSQ"/> 1045 <value value="70" name="A8XX_PERF_SP_NON_EXECUTION_LS_CYCLES"/> 1046 <value value="71" name="A8XX_PERF_SP_WORKING_EU"/> 1047 <value value="72" name="A8XX_PERF_SP_ANY_EU_WORKING"/> 1048 <value value="73" name="A8XX_PERF_SP_WORKING_EU_FS_STAGE"/> 1049 <value value="74" name="A8XX_PERF_SP_ANY_EU_WORKING_FS_STAGE"/> 1050 <value value="75" name="A8XX_PERF_SP_WORKING_EU_VS_STAGE"/> 1051 <value value="76" name="A8XX_PERF_SP_ANY_EU_WORKING_VS_STAGE"/> 1052 <value value="77" name="A8XX_PERF_SP_WORKING_EU_CS_STAGE"/> 1053 <value value="78" name="A8XX_PERF_SP_ANY_EU_WORKING_CS_STAGE"/> 1054 <value value="79" name="A8XX_PERF_SP_GPR_READ_PREFETCH"/> 1055 <value value="80" name="A8XX_PERF_SP_GPR_READ_CONFLICT"/> 1056 <value value="81" name="A8XX_PERF_SP_GPR_WRITE_CONFLICT"/> 1057 <value value="82" name="A8XX_PERF_SP_GM_LOAD_LATENCY_CYCLES"/> 1058 <value value="83" name="A8XX_PERF_SP_GM_LOAD_LATENCY_SAMPLES"/> 1059 <value value="84" name="A8XX_PERF_SP_EXECUTABLE_WAVES"/> 1060 <value value="85" name="A8XX_PERF_SP_ICL1_MISS_FETCH_CYCLES"/> 1061 <value value="86" name="A8XX_PERF_SP_RESERVED_86"/> 1062 <value value="87" name="A8XX_PERF_SP_BYPASS_BUSY_CYCLES"/> 1063 <value value="88" name="A8XX_PERF_SP_ANY_EU_WORKING_LPAC"/> 1064 <value value="89" name="A8XX_PERF_SP_WAVE_ALU_CYCLES"/> 1065 <value value="90" name="A8XX_PERF_SP_WAVE_EFU_CYCLES"/> 1066 <value value="91" name="A8XX_PERF_SP_WAVE_INT_CYCLES"/> 1067 <value value="92" name="A8XX_PERF_SP_WAVE_CSP_CYCLES"/> 1068 <value value="93" name="A8XX_PERF_SP_EWAVE_CONTEXTS"/> 1069 <value value="94" name="A8XX_PERF_SP_EWAVE_CONTEXT_CYCLES"/> 1070 <value value="95" name="A8XX_PERF_SP_LPAC_BUSY_CYCLES"/> 1071 <value value="96" name="A8XX_PERF_SP_LPAC_INSTRUCTIONS"/> 1072 <value value="97" name="A8XX_PERF_SP_FS_STAGE_1X_WAVES"/> 1073 <value value="98" name="A8XX_PERF_SP_FS_STAGE_2X_WAVES"/> 1074 <value value="99" name="A8XX_PERF_SP_QUADS"/> 1075 <value value="100" name="A8XX_PERF_SP_CS_INVOCATIONS"/> 1076 <value value="101" name="A8XX_PERF_SP_PIXELS"/> 1077 <value value="102" name="A8XX_PERF_SP_LPAC_DRAWCALLS"/> 1078 <value value="103" name="A8XX_PERF_SP_PI_WORKING_CYCLES"/> 1079 <value value="104" name="A8XX_PERF_SP_WAVE_INPUT_CYCLES"/> 1080 <value value="105" name="A8XX_PERF_SP_WAVE_OUTPUT_CYCLES"/> 1081 <value value="106" name="A8XX_PERF_SP_WAVE_HWAVE_WAIT_CYCLES"/> 1082 <value value="107" name="A8XX_PERF_SP_WAVE_HWAVE_SYNC"/> 1083 <value value="108" name="A8XX_PERF_SP_OUTPUT_3D_PIXELS"/> 1084 <value value="109" name="A8XX_PERF_SP_FULL_ALU_MAD_INSTRUCTIONS"/> 1085 <value value="110" name="A8XX_PERF_SP_HALF_ALU_MAD_INSTRUCTIONS"/> 1086 <value value="111" name="A8XX_PERF_SP_FULL_ALU_MUL_INSTRUCTIONS"/> 1087 <value value="112" name="A8XX_PERF_SP_HALF_ALU_MUL_INSTRUCTIONS"/> 1088 <value value="113" name="A8XX_PERF_SP_FULL_ALU_ADD_INSTRUCTIONS"/> 1089 <value value="114" name="A8XX_PERF_SP_HALF_ALU_ADD_INSTRUCTIONS"/> 1090 <value value="115" name="A8XX_PERF_SP_BARY_FP32_INSTRUCTIONS"/> 1091 <value value="116" name="A8XX_PERF_SP_ALU_GPR_READ_CYCLES"/> 1092 <value value="117" name="A8XX_PERF_SP_ALU_DATA_FORWARDING_CYCLES"/> 1093 <value value="118" name="A8XX_PERF_SP_LM_FULL_CYCLES"/> 1094 <value value="119" name="A8XX_PERF_SP_TEXTURE_FETCH_LATENCY_CYCLES"/> 1095 <value value="120" name="A8XX_PERF_SP_TEXTURE_FETCH_LATENCY_SAMPLES"/> 1096 <value value="121" name="A8XX_PERF_SP_FS_STAGE_PI_TEX_INSTRUCTION"/> 1097 <value value="122" name="A8XX_PERF_SP_RAY_QUERY_INSTRUCTIONS"/> 1098 <value value="123" name="A8XX_PERF_SP_RBRT_KICKOFF_FIBERS"/> 1099 <value value="124" name="A8XX_PERF_SP_RBRT_KICKOFF_DQUADS"/> 1100 <value value="125" name="A8XX_PERF_SP_RTU_BUSY_CYCLES"/> 1101 <value value="126" name="A8XX_PERF_SP_RTU_L0_HITS"/> 1102 <value value="127" name="A8XX_PERF_SP_RTU_L0_MISSES"/> 1103 <value value="128" name="A8XX_PERF_SP_RTU_L0_HIT_ON_MISS"/> 1104 <value value="129" name="A8XX_PERF_SP_RTU_STALL_CYCLES_WAVE_QUEUE"/> 1105 <value value="130" name="A8XX_PERF_SP_RTU_STALL_CYCLES_L0_HIT_QUEUE"/> 1106 <value value="131" name="A8XX_PERF_SP_RTU_STALL_CYCLES_L0_MISS_QUEUE"/> 1107 <value value="132" name="A8XX_PERF_SP_RTU_STALL_CYCLES_L0D_IDX_QUEUE"/> 1108 <value value="133" name="A8XX_PERF_SP_RTU_STALL_CYCLES_L0DATA"/> 1109 <value value="134" name="A8XX_PERF_SP_RTU_STALL_CYCLES_REPLACE_CNT"/> 1110 <value value="135" name="A8XX_PERF_SP_RTU_STALL_CYCLES_MRG_CNT"/> 1111 <value value="136" name="A8XX_PERF_SP_RTU_STALL_CYCLES_UCHE"/> 1112 <value value="137" name="A8XX_PERF_SP_RTU_OPERAND_FETCH_STALL_CYCLES_L0"/> 1113 <value value="138" name="A8XX_PERF_SP_RTU_OPERAND_FETCH_STALL_CYCLES_INS_FIFO"/> 1114 <value value="139" name="A8XX_PERF_SP_RTU_BVH_FETCH_LATENCY_CYCLES"/> 1115 <value value="140" name="A8XX_PERF_SP_RTU_BVH_FETCH_LATENCY_SAMPLES"/> 1116 <value value="141" name="A8XX_PERF_SP_STCHE_MISS_INC_VS"/> 1117 <value value="142" name="A8XX_PERF_SP_STCHE_MISS_INC_FS"/> 1118 <value value="143" name="A8XX_PERF_SP_STCHE_MISS_INC_BV"/> 1119 <value value="144" name="A8XX_PERF_SP_STCHE_MISS_INC_LPAC"/> 1120 <value value="145" name="A8XX_PERF_SP_VGPR_ACTIVE_CONTEXTS"/> 1121 <value value="146" name="A8XX_PERF_SP_PGPR_ALLOC_CONTEXTS"/> 1122 <value value="147" name="A8XX_PERF_SP_VGPR_ALLOC_CONTEXTS"/> 1123 <value value="148" name="A8XX_PERF_SP_RTU_RAY_BOX_INTERSECTIONS"/> 1124 <value value="149" name="A8XX_PERF_SP_RTU_RAY_TRIANGLE_INTERSECTIONS"/> 1125 <value value="150" name="A8XX_PERF_SP_SCH_STALL_CYCLES_RTU"/> 1126 <value value="151" name="A8XX_PERF_SP_EFU_WORKING_CYCLES"/> 1127 <value value="152" name="A8XX_PERF_SP_BRANCH_TAKEN"/> 1128 <value value="153" name="A8XX_PERF_SP_BRANCH_NOT_TAKEN"/> 1129 <value value="154" name="A8XX_PERF_SP_BRANCH_INS_DIVERGENCY_COUNT"/> 1130 <value value="155" name="A8XX_PERF_SP_BRANCH_INS_COUNT"/> 1131 <value value="156" name="A8XX_PERF_SP_PREDICT_TAKEN"/> 1132 <value value="157" name="A8XX_PERF_SP_PREDICT_NOT_TAKEN"/> 1133 <value value="158" name="A8XX_PERF_SP_PREDICT_INS_DIVERGENCY_COUNT"/> 1134 <value value="159" name="A8XX_PERF_SP_PREDICT_INS_COUNT"/> 1135 <value value="160" name="A8XX_PERF_SP_CCHE_UAV_TOTAL_REQ"/> 1136 <value value="161" name="A8XX_PERF_SP_CCHE_UAV_TOTAL_DUALQUAD"/> 1137 <value value="162" name="A8XX_PERF_SP_CCHE_NONUAV_TOTAL_REQ"/> 1138 <value value="163" name="A8XX_PERF_SP_CCHE_NONUAV_TOTAL_DUALQUAD"/> 1139 <value value="164" name="A8XX_PERF_SP_LB_NONUAV_TOTAL_REQ"/> 1140 <value value="165" name="A8XX_PERF_SP_LB_NONUAV_TOTAL_DUALQUAD"/> 1141 <value value="166" name="A8XX_PERF_SP_LB_READ_XFER_ALU"/> 1142 <value value="167" name="A8XX_PERF_SP_LB_ALU_READ_CONS"/> 1143 <value value="168" name="A8XX_PERF_SP_LB_READ_ALU_BLOCK_OTHER"/> 1144 <value value="169" name="A8XX_PERF_SP_LB_WRITE_XFER_VPC"/> 1145 <value value="170" name="A8XX_PERF_SP_LB_WRITE_VPC_BLOCK_OTHER"/> 1146 <value value="171" name="A8XX_PERF_SP_LB_LDST_RW_LM"/> 1147 <value value="172" name="A8XX_PERF_SP_LB_LDST_RW_LM_BLOCKED"/> 1148 <value value="173" name="A8XX_PERF_SP_LB_LDST_WRITE_CONS"/> 1149 <value value="174" name="A8XX_PERF_SP_LB_LDST_WRITE_CONS_BLOCKED"/> 1150 <value value="175" name="A8XX_PERF_SP_GPR_READ_BANK"/> 1151 <value value="176" name="A8XX_PERF_SP_GPR_WRITE_BANK"/> 1152 <value value="177" name="A8XX_PERF_SP_VS_WAVE_REQ_PENDING"/> 1153 <value value="178" name="A8XX_PERF_SP_FS_WAVE_REQ_PENDING"/> 1154 <value value="179" name="A8XX_PERF_SP_LPAC_WAVE_REQ_PENDING"/> 1155 <value value="180" name="A8XX_PERF_SP_WAVE_SPLIT_CNT"/> 1156 <value value="181" name="A8XX_PERF_SP_FS_OOO_WAVE_ACC"/> 1157 <value value="182" name="A8XX_PERF_SP_SCH_MEM_CTRL_WORKING_CYCLES"/> 1158 <value value="183" name="A8XX_PERF_SP_LDST_EXECUTION_CYCLES"/> 1159 <value value="184" name="A8XX_PERF_SP_CCHE_UAV_TOTAL_ATOM_REQ"/> 1160 <value value="185" name="A8XX_PERF_SP_CCHE_NONUAV_TOTAL_AOM_REQ"/> 1161 <value value="186" name="A8XX_PERF_SP_TTU_INSTRUCTIONS"/> 1162 <value value="187" name="A8XX_PERF_SP_TTU_ACTIVE_FIBERS"/> 1163 <value value="188" name="A8XX_PERF_SP_TTU_BUSY_CYCLES"/> 1164 <value value="189" name="A8XX_PERF_SP_TTU_GPR_RD_CYCLES"/> 1165 <value value="190" name="A8XX_PERF_SP_TTU_GPR_RD_REQ"/> 1166 <value value="191" name="A8XX_PERF_SP_TTU_GPR_WR_CYCLES"/> 1167 <value value="192" name="A8XX_PERF_SP_TTU_GPR_WR_REQ"/> 1168 <value value="193" name="A8XX_PERF_SP_GPR_CACHE_SRC0_GPR_RDCNT"/> 1169 <value value="194" name="A8XX_PERF_SP_GPR_CACHE_SRC0_GPR_CACHE_HIT_RDCNT"/> 1170 <value value="195" name="A8XX_PERF_SP_GPR_CACHE_SRC0_GPR_CACHE_HINT_RDCNT"/> 1171 <value value="196" name="A8XX_PERF_SP_GPR_CACHE_SRC1_RDCNT"/> 1172 <value value="197" name="A8XX_PERF_SP_GPR_CACHE_SRC1_GPR_CACHE_HIT_RDCNT"/> 1173 <value value="198" name="A8XX_PERF_SP_GPR_CACHE_SRC1_GPR_CACHE_HINT_RDCNT"/> 1174 <value value="199" name="A8XX_PERF_SP_GPR_CACHE_SRC2_RDCNT"/> 1175 <value value="200" name="A8XX_PERF_SP_GPR_CACHE_SRC2_GPR_CACHE_HIT_RDCNT"/> 1176 <value value="201" name="A8XX_PERF_SP_GPR_CACHE_SRC2_GPR_CACHE_HINT_RDCNT"/> 1177 <value value="202" name="A8XX_PERF_SP_UCHE_READ_BURST"/> 1178 <value value="203" name="A8XX_PERF_SP_UCHE_WRITE_BURST"/> 1179 <value value="204" name="A8XX_PERF_SP_LDST_GMEM_REQ_NUM"/> 1180</enum> 1181 1182<enum name="a8xx_rb_perfcounter_select"> 1183 <value value="0" name="A8XX_PERF_RB_NEVER_COUNT"/> 1184 <value value="1" name="A8XX_PERF_RB_BUSY_CYCLES"/> 1185 <value value="2" name="A8XX_PERF_RB_STALL_CYCLES_HLSQ"/> 1186 <value value="3" name="A8XX_PERF_RB_STALL_CYCLES_FIFO0_FULL"/> 1187 <value value="4" name="A8XX_PERF_RB_STALL_CYCLES_FIFO1_FULL"/> 1188 <value value="5" name="A8XX_PERF_RB_STALL_CYCLES_FIFO2_FULL"/> 1189 <value value="6" name="A8XX_PERF_RB_STARVE_CYCLES_SP"/> 1190 <value value="7" name="A8XX_PERF_RB_STARVE_CYCLES_LRZ_TILE"/> 1191 <value value="8" name="A8XX_PERF_RB_STARVE_CYCLES_CCU"/> 1192 <value value="9" name="A8XX_PERF_RB_STARVE_CYCLES_Z_PLANE"/> 1193 <value value="10" name="A8XX_PERF_RB_STARVE_CYCLES_BARY_PLANE"/> 1194 <value value="11" name="A8XX_PERF_RB_Z_WORKLOAD"/> 1195 <value value="12" name="A8XX_PERF_RB_HLSQ_ACTIVE"/> 1196 <value value="13" name="A8XX_PERF_RB_Z_READ"/> 1197 <value value="14" name="A8XX_PERF_RB_Z_WRITE"/> 1198 <value value="15" name="A8XX_PERF_RB_C_READ"/> 1199 <value value="16" name="A8XX_PERF_RB_C_WRITE"/> 1200 <value value="17" name="A8XX_PERF_RB_TOTAL_PASS"/> 1201 <value value="18" name="A8XX_PERF_RB_Z_PASS"/> 1202 <value value="19" name="A8XX_PERF_RB_Z_FAIL"/> 1203 <value value="20" name="A8XX_PERF_RB_S_FAIL"/> 1204 <value value="21" name="A8XX_PERF_RB_BLENDED_FXP_COMPONENTS"/> 1205 <value value="22" name="A8XX_PERF_RB_BLENDED_FP16_COMPONENTS"/> 1206 <value value="23" name="A8XX_PERF_RB_PS_INVOCATIONS"/> 1207 <value value="24" name="A8XX_PERF_RB_2D_ALIVE_CYCLES"/> 1208 <value value="25" name="A8XX_PERF_RB_2D_STARVE_CYCLES_SP"/> 1209 <value value="26" name="A8XX_PERF_RB_2D_VALID_PIXELS"/> 1210 <value value="27" name="A8XX_PERF_RB_3D_PIXELS"/> 1211 <value value="28" name="A8XX_PERF_RB_BLENDER_WORKING_CYCLES"/> 1212 <value value="29" name="A8XX_PERF_RB_ZPROC_WORKING_CYCLES"/> 1213 <value value="30" name="A8XX_PERF_RB_CPROC_WORKING_CYCLES"/> 1214 <value value="31" name="A8XX_PERF_RB_SAMPLER_WORKING_CYCLES"/> 1215 <value value="32" name="A8XX_PERF_RB_STALL_CYCLES_CCU_COLOR_READ"/> 1216 <value value="33" name="A8XX_PERF_RB_STALL_CYCLES_CCU_COLOR_WRITE"/> 1217 <value value="34" name="A8XX_PERF_RB_STALL_CYCLES_CCU_DEPTH_READ"/> 1218 <value value="35" name="A8XX_PERF_RB_STALL_CYCLES_CCU_DEPTH_WRITE"/> 1219 <value value="36" name="A8XX_PERF_RB_STALL_CYCLES_VPC_BE"/> 1220 <value value="37" name="A8XX_PERF_RB_BLENDED_FP32_COMPONENTS"/> 1221 <value value="38" name="A8XX_PERF_RB_COLOR_PIX_TILES"/> 1222 <value value="39" name="A8XX_PERF_RB_STALL_CYCLES_CCU"/> 1223 <value value="40" name="A8XX_PERF_RB_EARLY_Z_ARB3_GRANT"/> 1224 <value value="41" name="A8XX_PERF_RB_LATE_Z_ARB3_GRANT"/> 1225 <value value="42" name="A8XX_PERF_RB_EARLY_Z_SKIP_GRANT"/> 1226 <value value="43" name="A8XX_PERF_RB_VRS_1X1_QUADS"/> 1227 <value value="44" name="A8XX_PERF_RB_VRS_2X1_QUADS"/> 1228 <value value="45" name="A8XX_PERF_RB_VRS_1X2_QUADS"/> 1229 <value value="46" name="A8XX_PERF_RB_VRS_2X2_QUADS"/> 1230 <value value="47" name="A8XX_PERF_RB_VRS_2X4_QUADS"/> 1231 <value value="48" name="A8XX_PERF_RB_VRS_4X2_QUADS"/> 1232 <value value="49" name="A8XX_PERF_RB_VRS_4X4_QUADS"/> 1233 <value value="50" name="A8XX_PERF_RB_STALL_CYCLES_HLSQ_INFO"/> 1234 <value value="51" name="A8XX_PERF_RB_HLSQ_ACTIVE_INFO"/> 1235 <value value="52" name="A8XX_PERF_RB_STALL_CYCLES_HLSQ_ATTR"/> 1236 <value value="53" name="A8XX_PERF_RB_HLSQ_ACTIVE_ATTR"/> 1237 <value value="54" name="A8XX_PERF_RB_STALL_CYCLES_ZMODE_SWITCH"/> 1238 <value value="55" name="A8XX_PERF_RB_TOTAL_PASS_PIXELS"/> 1239</enum> 1240 1241<enum name="a8xx_vsc_perfcounter_select"> 1242 <value value="0" name="A8XX_PERF_VSC_NEVER_COUNT"/> 1243 <value value="1" name="A8XX_PERF_VSC_BUSY_CYCLES"/> 1244 <value value="2" name="A8XX_PERF_VSC_WORKING_CYCLES"/> 1245 <value value="3" name="A8XX_PERF_VSC_STALL_CYCLES_UCHE"/> 1246 <value value="4" name="A8XX_PERF_VSC_EOT_NUM"/> 1247 <value value="5" name="A8XX_PERF_VSC_INPUT_TILES"/> 1248 <value value="6" name="A8XX_PERF_VSC_TILE_COMP_TRAN"/> 1249 <value value="7" name="A8XX_PERF_VSC_TILE_BYPASS_TRAN"/> 1250</enum> 1251 1252<enum name="a8xx_ccu_perfcounter_select"> 1253 <value value="0" name="A8XX_PERF_CCU_NEVER_COUNT"/> 1254 <value value="1" name="A8XX_PERF_CCU_BUSY_CYCLES"/> 1255 <value value="2" name="A8XX_PERF_CCU_STALL_CYCLES_RB_DEPTH_RETURN"/> 1256 <value value="3" name="A8XX_PERF_CCU_STALL_CYCLES_RB_COLOR_RETURN"/> 1257 <value value="4" name="A8XX_PERF_CCU_DEPTH_BLOCKS"/> 1258 <value value="5" name="A8XX_PERF_CCU_COLOR_BLOCKS"/> 1259 <value value="6" name="A8XX_PERF_CCU_DEPTH_BLOCK_HIT"/> 1260 <value value="7" name="A8XX_PERF_CCU_COLOR_BLOCK_HIT"/> 1261 <value value="8" name="A8XX_PERF_CCU_PARTIAL_BLOCK_READ"/> 1262 <value value="9" name="A8XX_PERF_CCU_GMEM_READ"/> 1263 <value value="10" name="A8XX_PERF_CCU_GMEM_WRITE"/> 1264 <value value="11" name="A8XX_PERF_CCU_2D_RD_REQ"/> 1265 <value value="12" name="A8XX_PERF_CCU_2D_WR_REQ"/> 1266 <value value="13" name="A8XX_PERF_CCU_UBWC_COLOR_BLOCKS_CONCURRENT"/> 1267 <value value="14" name="A8XX_PERF_CCU_UBWC_DEPTH_BLOCKS_CONCURRENT"/> 1268 <value value="15" name="A8XX_PERF_CCU_COLOR_RESOLVE_DROPPED"/> 1269 <value value="16" name="A8XX_PERF_CCU_DEPTH_RESOLVE_DROPPED"/> 1270 <value value="17" name="A8XX_PERF_CCU_COLOR_RENDER_CONCURRENT"/> 1271 <value value="18" name="A8XX_PERF_CCU_DEPTH_RENDER_CONCURRENT"/> 1272 <value value="19" name="A8XX_PERF_CCU_COLOR_RESOLVE_AFTER_RENDER"/> 1273 <value value="20" name="A8XX_PERF_CCU_DEPTH_RESOLVE_AFTER_RENDER"/> 1274 <value value="21" name="A8XX_PERF_CCU_GMEM_EXTRA_DEPTH_READ"/> 1275 <value value="22" name="A8XX_PERF_CCU_GMEM_COLOR_READ_4AA"/> 1276 <value value="23" name="A8XX_PERF_CCU_GMEM_COLOR_READ_4AA_FULL"/> 1277 <value value="24" name="A8XX_PERF_CCU_COLOR_EVB_STALL"/> 1278 <value value="25" name="A8XX_PERF_CCU_RENDER_OVERLAP_CRE_C"/> 1279 <value value="26" name="A8XX_PERF_CCU_RENDER_OVERLAP_CRE_Z"/> 1280 <value value="27" name="A8XX_PERF_CCU_RENDER_STALL_BY_CRE_C"/> 1281 <value value="28" name="A8XX_PERF_CCU_RENDER_STALL_BY_CRE_Z"/> 1282 <value value="29" name="A8XX_PERF_CCU_FULL_SURFACE_RESOLVE_CYCLES"/> 1283 <value value="30" name="A8XX_PERF_CCU_RENDER_OVERLAP_FULL_SURFACE_RESOLVE"/> 1284 <value value="31" name="A8XX_PERF_CCU_STALL_BY_FULL_SURFACE_RESOLVE"/> 1285 <value value="32" name="A8XX_PERF_CCU_CONCURRENT_RESOLVE_CYCLES"/> 1286 <value value="33" name="A8XX_PERF_CCU_GMEM_BK2BK_STALL"/> 1287 <value value="34" name="A8XX_PERF_CCU_RESERVED_34"/> 1288 <value value="35" name="A8XX_PERF_CCU_RESERVED_35"/> 1289 <value value="36" name="A8XX_PERF_CCU_RESERVED_36"/> 1290 <value value="37" name="A8XX_PERF_CCU_RESERVED_37"/> 1291 <value value="38" name="A8XX_PERF_CCU_RESERVED_38"/> 1292 <value value="39" name="A8XX_PERF_CCU_RESERVED_39"/> 1293 <value value="40" name="A8XX_PERF_CCU_RESERVED_40"/> 1294 <value value="41" name="A8XX_PERF_CCU_RESERVED_41"/> 1295 <value value="42" name="A8XX_PERF_CCU_RESERVED_42"/> 1296 <value value="43" name="A8XX_PERF_CCU_RESERVED_43"/> 1297 <value value="44" name="A8XX_PERF_CCU_RESERVED_44"/> 1298 <value value="45" name="A8XX_PERF_CCU_RESERVED_45"/> 1299 <value value="46" name="A8XX_PERF_CCU_RESERVED_46"/> 1300 <value value="47" name="A8XX_PERF_CCU_RESERVED_47"/> 1301 <value value="48" name="A8XX_PERF_CCU_RESERVED_48"/> 1302 <value value="49" name="A8XX_PERF_CCU_RESERVED_49"/> 1303 <value value="50" name="A8XX_PERF_CCU_RESERVED_50"/> 1304 <value value="51" name="A8XX_PERF_CCU_RESERVED_51"/> 1305 <value value="52" name="A8XX_PERF_CCU_RESERVED_52"/> 1306 <value value="53" name="A8XX_PERF_CCU_RESERVED_53"/> 1307 <value value="54" name="A8XX_PERF_CCU_RESERVED_54"/> 1308 <value value="55" name="A8XX_PERF_CCU_RESERVED_55"/> 1309 <value value="56" name="A8XX_PERF_CCU_RESERVED_56"/> 1310 <value value="57" name="A8XX_PERF_CCU_RESERVED_57"/> 1311 <value value="58" name="A8XX_PERF_CCU_RESERVED_58"/> 1312 <value value="59" name="A8XX_PERF_CCU_RESERVED_59"/> 1313 <value value="60" name="A8XX_PERF_CCU_RESERVED_60"/> 1314 <value value="61" name="A8XX_PERF_CCU_RESERVED_61"/> 1315 <value value="62" name="A8XX_PERF_CCU_RESERVED_62"/> 1316 <value value="63" name="A8XX_PERF_CCU_RESERVED_63"/> 1317 <value value="64" name="A8XX_PERF_UFC_L0_TP_HINT_REQUESTS"/> 1318 <value value="65" name="A8XX_PERF_UFC_L0_TP_HINT_TAG_MISS"/> 1319 <value value="66" name="A8XX_PERF_UFC_L0_TP_HINT_TAG_HIT_RDY"/> 1320 <value value="67" name="A8XX_PERF_UFC_L0_TP_HINT_TAG_HIT_NRDY"/> 1321 <value value="68" name="A8XX_PERF_UFC_L0_TP_HINT_IS_FCLEAR"/> 1322 <value value="69" name="A8XX_PERF_UFC_L0_TP_HINT_IS_ALPHA0"/> 1323 <value value="70" name="A8XX_PERF_UFC_L0_TP_HINT_IS_ALPHA1"/> 1324 <value value="71" name="A8XX_PERF_UFC_L0_TP_HINT_IS_UNCOMP"/> 1325 <value value="72" name="A8XX_PERF_UFC_L0_SP_REQUESTS"/> 1326 <value value="73" name="A8XX_PERF_UFC_L0_SP_FILTER_HIT"/> 1327 <value value="74" name="A8XX_PERF_UFC_L0_SP_FILTER_MISS"/> 1328 <value value="75" name="A8XX_PERF_UFC_L0_SP_REQ_STALLED_CYCLES"/> 1329 <value value="76" name="A8XX_PERF_UFC_L0_TP_REQ_STALLED_CYCLES"/> 1330 <value value="77" name="A8XX_PERF_UFC_L0_TP_RTN_STALLED_CYCLES"/> 1331 <value value="78" name="A8XX_PERF_CCU_RESERVED_78"/> 1332 <value value="79" name="A8XX_PERF_CCU_RESERVED_79"/> 1333 <value value="80" name="A8XX_PERF_CCU_RESERVED_80"/> 1334 <value value="81" name="A8XX_PERF_CCU_RESERVED_81"/> 1335 <value value="82" name="A8XX_PERF_CCU_RESERVED_82"/> 1336 <value value="83" name="A8XX_PERF_CCU_RESERVED_83"/> 1337 <value value="84" name="A8XX_PERF_CCU_RESERVED_84"/> 1338 <value value="85" name="A8XX_PERF_CCU_RESERVED_85"/> 1339 <value value="86" name="A8XX_PERF_CCU_RESERVED_86"/> 1340 <value value="87" name="A8XX_PERF_CCU_RESERVED_87"/> 1341 <value value="88" name="A8XX_PERF_CCU_RESERVED_88"/> 1342 <value value="89" name="A8XX_PERF_CCU_RESERVED_89"/> 1343 <value value="90" name="A8XX_PERF_CCU_RESERVED_90"/> 1344 <value value="91" name="A8XX_PERF_CCU_RESERVED_91"/> 1345 <value value="92" name="A8XX_PERF_CCU_RESERVED_92"/> 1346 <value value="93" name="A8XX_PERF_CCU_RESERVED_93"/> 1347 <value value="94" name="A8XX_PERF_CCU_RESERVED_94"/> 1348 <value value="95" name="A8XX_PERF_CCU_RESERVED_95"/> 1349 <value value="96" name="A8XX_PERF_CCU_RESERVED_96"/> 1350 <value value="97" name="A8XX_PERF_CCU_RESERVED_97"/> 1351 <value value="98" name="A8XX_PERF_CCU_RESERVED_98"/> 1352 <value value="99" name="A8XX_PERF_CCU_RESERVED_99"/> 1353 <value value="100" name="A8XX_PERF_CCU_RESERVED_100"/> 1354 <value value="101" name="A8XX_PERF_CCU_RESERVED_101"/> 1355 <value value="102" name="A8XX_PERF_CCU_RESERVED_102"/> 1356 <value value="103" name="A8XX_PERF_CCU_RESERVED_103"/> 1357 <value value="104" name="A8XX_PERF_CCU_RESERVED_104"/> 1358 <value value="105" name="A8XX_PERF_CCU_RESERVED_105"/> 1359 <value value="106" name="A8XX_PERF_CCU_RESERVED_106"/> 1360 <value value="107" name="A8XX_PERF_CCU_RESERVED_107"/> 1361 <value value="108" name="A8XX_PERF_CCU_RESERVED_108"/> 1362 <value value="109" name="A8XX_PERF_CCU_RESERVED_109"/> 1363 <value value="110" name="A8XX_PERF_CCU_RESERVED_110"/> 1364 <value value="111" name="A8XX_PERF_CCU_RESERVED_111"/> 1365 <value value="112" name="A8XX_PERF_CCU_RESERVED_112"/> 1366 <value value="113" name="A8XX_PERF_CCU_RESERVED_113"/> 1367 <value value="114" name="A8XX_PERF_CCU_RESERVED_114"/> 1368 <value value="115" name="A8XX_PERF_CCU_RESERVED_115"/> 1369 <value value="116" name="A8XX_PERF_CCU_RESERVED_116"/> 1370 <value value="117" name="A8XX_PERF_CCU_RESERVED_117"/> 1371 <value value="118" name="A8XX_PERF_CCU_RESERVED_118"/> 1372 <value value="119" name="A8XX_PERF_CCU_RESERVED_119"/> 1373 <value value="120" name="A8XX_PERF_CCU_RESERVED_120"/> 1374 <value value="121" name="A8XX_PERF_CCU_RESERVED_121"/> 1375 <value value="122" name="A8XX_PERF_CCU_RESERVED_122"/> 1376 <value value="123" name="A8XX_PERF_CCU_RESERVED_123"/> 1377 <value value="124" name="A8XX_PERF_CCU_RESERVED_124"/> 1378 <value value="125" name="A8XX_PERF_CCU_RESERVED_125"/> 1379 <value value="126" name="A8XX_PERF_CCU_RESERVED_126"/> 1380 <value value="127" name="A8XX_PERF_CCU_RESERVED_127"/> 1381 <value value="128" name="A8XX_PERF_CRE_RESOLVE_EVENTS"/> 1382 <value value="129" name="A8XX_PERF_CRE_CONCURRENT_RESOLVE_EVENTS"/> 1383 <value value="130" name="A8XX_PERF_CRE_DROPPED_CLEAR_EVENTS"/> 1384 <value value="131" name="A8XX_PERF_CRE_ST_BLOCKS_CONCURRENT"/> 1385 <value value="132" name="A8XX_PERF_CRE_LRZ_ST_BLOCKS_CONCURRENT"/> 1386 <value value="133" name="A8XX_PERF_CRE_SP_UFC_PREFETCH_REQUESTS"/> 1387 <value value="134" name="A8XX_PERF_CRE_RESOLVE_CDP_PREFETCH_REQUESTS"/> 1388 <value value="135" name="A8XX_PERF_CRE_RESOLVE_UFC_PREFETCH_REQUESTS"/> 1389 <value value="136" name="A8XX_PERF_CRE_DR_UFC_PREFTCH_REQUESTS"/> 1390</enum> 1391 1392<enum name="a8xx_lrz_perfcounter_select"> 1393 <value value="0" name="A8XX_PERF_LRZ_NEVER_COUNT"/> 1394 <value value="1" name="A8XX_PERF_LRZ_BUSY_CYCLES"/> 1395 <value value="2" name="A8XX_PERF_LRZ_STARVE_CYCLES_RAS"/> 1396 <value value="3" name="A8XX_PERF_LRZ_STALL_CYCLES_RB"/> 1397 <value value="4" name="A8XX_PERF_LRZ_STALL_CYCLES_VSC"/> 1398 <value value="5" name="A8XX_PERF_LRZ_STALL_CYCLES_VPC_BE"/> 1399 <value value="6" name="A8XX_PERF_LRZ_STALL_CYCLES_FLAG_ACR"/> 1400 <value value="7" name="A8XX_PERF_LRZ_STALL_CYCLES_UCHE"/> 1401 <value value="8" name="A8XX_PERF_LRZ_LRZ_READ"/> 1402 <value value="9" name="A8XX_PERF_LRZ_LRZ_WRITE"/> 1403 <value value="10" name="A8XX_PERF_LRZ_READ_LATENCY"/> 1404 <value value="11" name="A8XX_PERF_LRZ_MERGE_CACHE_UPDATING"/> 1405 <value value="12" name="A8XX_PERF_LRZ_PRIM_KILLED_BY_MASKGEN"/> 1406 <value value="13" name="A8XX_PERF_LRZ_PRIM_KILLED_BY_LRZ"/> 1407 <value value="14" name="A8XX_PERF_LRZ_VISIBLE_PRIM_AFTER_LRZ"/> 1408 <value value="15" name="A8XX_PERF_LRZ_FULL_8X8_TILES"/> 1409 <value value="16" name="A8XX_PERF_LRZ_PARTIAL_8X8_TILES"/> 1410 <value value="17" name="A8XX_PERF_LRZ_TILE_KILLED"/> 1411 <value value="18" name="A8XX_PERF_LRZ_TOTAL_PIXEL"/> 1412 <value value="19" name="A8XX_PERF_LRZ_VISIBLE_PIXEL_AFTER_LRZ"/> 1413 <value value="20" name="A8XX_PERF_LRZ_FEEDBACK_ACCEPT"/> 1414 <value value="21" name="A8XX_PERF_LRZ_FEEDBACK_DISCARD"/> 1415 <value value="22" name="A8XX_PERF_LRZ_FEEDBACK_STALL"/> 1416 <value value="23" name="A8XX_PERF_LRZ_STALL_CYCLES_RB_ZPLANE"/> 1417 <value value="24" name="A8XX_PERF_LRZ_STALL_CYCLES_RB_BPLANE"/> 1418 <value value="25" name="A8XX_PERF_LRZ_RAS_MASK_TRANS"/> 1419 <value value="26" name="A8XX_PERF_LRZ_STALL_CYCLES_MVC"/> 1420 <value value="27" name="A8XX_PERF_LRZ_TILE_KILLED_BY_IMAGE_VRS"/> 1421 <value value="28" name="A8XX_PERF_LRZ_TILE_KILLED_BY_Z"/> 1422 <value value="29" name="A8XX_PERF_LRZ_STALL_CYCLES_HLSQ_BATCH"/> 1423 <value value="30" name="A8XX_PERF_LRZ_NUM_FLOCK"/> 1424 <value value="31" name="A8XX_PERF_LRZ_DRAWS_TOTAL"/> 1425 <value value="32" name="A8XX_PERF_LRZ_DRAWS_LRZ_DIS"/> 1426 <value value="33" name="A8XX_PERF_LRZ_DRAWS_LRZ_WRITE_DIS"/> 1427</enum> 1428 1429<enum name="a8xx_cmp_perfcounter_select"> 1430 <value value="0" name="A8XX_PERF_CMPDECMP_NEVER_COUNT"/> 1431 <value value="1" name="A8XX_PERF_CMPDECMP_STALL_CYCLES_ARB"/> 1432 <value value="2" name="A8XX_PERF_CMPDECMP_VBIF_LATENCY_CYCLES"/> 1433 <value value="3" name="A8XX_PERF_CMPDECMP_VBIF_LATENCY_SAMPLES"/> 1434 <value value="4" name="A8XX_PERF_CMPDECMP_VBIF_READ_DATA_CCU"/> 1435 <value value="5" name="A8XX_PERF_CMPDECMP_VBIF_WRITE_DATA_CCU"/> 1436 <value value="6" name="A8XX_PERF_CMPDECMP_VBIF_READ_REQUEST"/> 1437 <value value="7" name="A8XX_PERF_CMPDECMP_VBIF_WRITE_REQUEST"/> 1438 <value value="8" name="A8XX_PERF_CMPDECMP_VBIF_READ_DATA"/> 1439 <value value="9" name="A8XX_PERF_CMPDECMP_VBIF_WRITE_DATA"/> 1440 <value value="10" name="A8XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG1_COUNT"/> 1441 <value value="11" name="A8XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG2_COUNT"/> 1442 <value value="12" name="A8XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG3_COUNT"/> 1443 <value value="13" name="A8XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG4_COUNT"/> 1444 <value value="14" name="A8XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG5_COUNT"/> 1445 <value value="15" name="A8XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG6_COUNT"/> 1446 <value value="16" name="A8XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG8_COUNT"/> 1447 <value value="17" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAG1_COUNT"/> 1448 <value value="18" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAG2_COUNT"/> 1449 <value value="19" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAG3_COUNT"/> 1450 <value value="20" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAG4_COUNT"/> 1451 <value value="21" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAG5_COUNT"/> 1452 <value value="22" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAG6_COUNT"/> 1453 <value value="23" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAG8_COUNT"/> 1454 <value value="24" name="A8XX_PERF_CMPDECMP_VBIF_READ_DATA_UCHE_CH0"/> 1455 <value value="25" name="A8XX_PERF_CMPDECMP_VBIF_READ_DATA_UCHE_CH1"/> 1456 <value value="26" name="A8XX_PERF_CMPDECMP_VBIF_WRITE_DATA_UCHE"/> 1457 <value value="27" name="A8XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG0_COUNT"/> 1458 <value value="28" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAG0_COUNT"/> 1459 <value value="29" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAGALPHA_COUNT"/> 1460 <value value="30" name="A8XX_PERF_CMPDECMP_CDP_FILTER_HIT"/> 1461 <value value="31" name="A8XX_PERF_CMPDECMP_CDP_FILTER_MISS"/> 1462 <value value="32" name="A8XX_PERF_CMPDECMP_DEPTH_READ_FLAG0_COUNT"/> 1463 <value value="33" name="A8XX_PERF_CMPDECMP_DEPTH_READ_FLAG1_COUNT"/> 1464 <value value="34" name="A8XX_PERF_CMPDECMP_DEPTH_READ_FLAG2_COUNT"/> 1465 <value value="35" name="A8XX_PERF_CMPDECMP_DEPTH_READ_FLAG3_COUNT"/> 1466 <value value="36" name="A8XX_PERF_CMPDECMP_DEPTH_READ_FLAG4_COUNT"/> 1467 <value value="37" name="A8XX_PERF_CMPDECMP_DEPTH_READ_FLAG5_COUNT"/> 1468 <value value="38" name="A8XX_PERF_CMPDECMP_DEPTH_READ_FLAG6_COUNT"/> 1469 <value value="39" name="A8XX_PERF_CMPDECMP_DEPTH_READ_FLAG8_COUNT"/> 1470 <value value="40" name="A8XX_PERF_CMPDECMP_COLOR_READ_FLAG0_COUNT"/> 1471 <value value="41" name="A8XX_PERF_CMPDECMP_COLOR_READ_FLAG1_COUNT"/> 1472 <value value="42" name="A8XX_PERF_CMPDECMP_COLOR_READ_FLAG2_COUNT"/> 1473 <value value="43" name="A8XX_PERF_CMPDECMP_COLOR_READ_FLAG3_COUNT"/> 1474 <value value="44" name="A8XX_PERF_CMPDECMP_COLOR_READ_FLAG4_COUNT"/> 1475 <value value="45" name="A8XX_PERF_CMPDECMP_COLOR_READ_FLAG5_COUNT"/> 1476 <value value="46" name="A8XX_PERF_CMPDECMP_COLOR_READ_FLAG6_COUNT"/> 1477 <value value="47" name="A8XX_PERF_CMPDECMP_COLOR_READ_FLAG8_COUNT"/> 1478 <value value="48" name="A8XX_PERF_CMPDECMP_UFC_REQ_CCU"/> 1479 <value value="49" name="A8XX_PERF_CMPDECMP_UFC_REQ_UCHE"/> 1480 <value value="50" name="A8XX_PERF_CMPDECMP_INPUT_STALL_CYCLES_ENC"/> 1481 <value value="51" name="A8XX_PERF_CMPDECMP_ENC_STALL_CYCLES_UFC"/> 1482 <value value="52" name="A8XX_PERF_CMPDECMP_ENC_STALL_CYCLES_GBIF_DATA"/> 1483 <value value="53" name="A8XX_PERF_CMPDECMP_ENC_STALL_CYCLES_GBIF_CMD"/> 1484 <value value="54" name="A8XX_PERF_CMPDECMP_INPUT_STALL_CYCLES_DEC"/> 1485 <value value="55" name="A8XX_PERF_CMPDECMP_DEC_STALL_CYCLES_OUTPUT"/> 1486 <value value="56" name="A8XX_PERF_CMPDECMP_REQ_SSEC_FLAG_COMP"/> 1487 <value value="57" name="A8XX_PERF_CMPDECMP_CCU_EVENT_SKEW_STALL"/> 1488 <value value="58" name="A8XX_PERF_CMPDECMP_CCU_BV_EVENT_SKEW_STALL"/> 1489 <value value="59" name="A8XX_PERF_CMPDECMP_DEPTH_WRITE_FLAG7_COUNT"/> 1490 <value value="60" name="A8XX_PERF_CMPDECMP_COLOR_WRITE_FLAG7_COUNT"/> 1491 <value value="61" name="A8XX_PERF_CMPDECMP_DEPTH_READ_FLAG7_COUNT"/> 1492 <value value="62" name="A8XX_PERF_CMPDECMP_COLOR_READ_FLAG7_COUNT"/> 1493</enum> 1494 1495<enum name="a8xx_gbif_perfcounter_select"> 1496 <value value="0" name="A8XX_PERF_GBIF_NEVER_COUNT"/> 1497 <value value="1" name="A8XX_PERF_GBIF_RESERVED_1"/> 1498 <value value="2" name="A8XX_PERF_GBIF_RESERVED_2"/> 1499 <value value="3" name="A8XX_PERF_GBIF_RESERVED_3"/> 1500 <value value="4" name="A8XX_PERF_GBIF_RESERVED_4"/> 1501 <value value="5" name="A8XX_PERF_GBIF_RESERVED_5"/> 1502 <value value="6" name="A8XX_PERF_GBIF_RESERVED_6"/> 1503 <value value="7" name="A8XX_PERF_GBIF_RESERVED_7"/> 1504 <value value="8" name="A8XX_PERF_GBIF_RESERVED_8"/> 1505 <value value="9" name="A8XX_PERF_GBIF_RESERVED_9"/> 1506 <value value="10" name="A8XX_PERF_GBIF_AXI0_READ_REQUESTS_TOTAL"/> 1507 <value value="11" name="A8XX_PERF_GBIF_AXI1_READ_REQUESTS_TOTAL"/> 1508 <value value="12" name="A8XX_PERF_GBIF_RESERVED_12"/> 1509 <value value="13" name="A8XX_PERF_GBIF_RESERVED_13"/> 1510 <value value="14" name="A8XX_PERF_GBIF_RESERVED_14"/> 1511 <value value="15" name="A8XX_PERF_GBIF_RESERVED_15"/> 1512 <value value="16" name="A8XX_PERF_GBIF_RESERVED_16"/> 1513 <value value="17" name="A8XX_PERF_GBIF_RESERVED_17"/> 1514 <value value="18" name="A8XX_PERF_GBIF_RESERVED_18"/> 1515 <value value="19" name="A8XX_PERF_GBIF_RESERVED_19"/> 1516 <value value="20" name="A8XX_PERF_GBIF_RESERVED_20"/> 1517 <value value="21" name="A8XX_PERF_GBIF_RESERVED_21"/> 1518 <value value="22" name="A8XX_PERF_GBIF_AXI0_WRITE_REQUESTS_TOTAL"/> 1519 <value value="23" name="A8XX_PERF_GBIF_AXI1_WRITE_REQUESTS_TOTAL"/> 1520 <value value="24" name="A8XX_PERF_GBIF_RESERVED_24"/> 1521 <value value="25" name="A8XX_PERF_GBIF_RESERVED_25"/> 1522 <value value="26" name="A8XX_PERF_GBIF_RESERVED_26"/> 1523 <value value="27" name="A8XX_PERF_GBIF_RESERVED_27"/> 1524 <value value="28" name="A8XX_PERF_GBIF_RESERVED_28"/> 1525 <value value="29" name="A8XX_PERF_GBIF_RESERVED_29"/> 1526 <value value="30" name="A8XX_PERF_GBIF_RESERVED_30"/> 1527 <value value="31" name="A8XX_PERF_GBIF_RESERVED_31"/> 1528 <value value="32" name="A8XX_PERF_GBIF_RESERVED_32"/> 1529 <value value="33" name="A8XX_PERF_GBIF_RESERVED_33"/> 1530 <value value="34" name="A8XX_PERF_GBIF_AXI0_READ_DATA_BEATS_TOTAL"/> 1531 <value value="35" name="A8XX_PERF_GBIF_AXI1_READ_DATA_BEATS_TOTAL"/> 1532 <value value="36" name="A8XX_PERF_GBIF_RESERVED_36"/> 1533 <value value="37" name="A8XX_PERF_GBIF_RESERVED_37"/> 1534 <value value="38" name="A8XX_PERF_GBIF_RESERVED_38"/> 1535 <value value="39" name="A8XX_PERF_GBIF_RESERVED_39"/> 1536 <value value="40" name="A8XX_PERF_GBIF_RESERVED_40"/> 1537 <value value="41" name="A8XX_PERF_GBIF_RESERVED_41"/> 1538 <value value="42" name="A8XX_PERF_GBIF_RESERVED_42"/> 1539 <value value="43" name="A8XX_PERF_GBIF_RESERVED_43"/> 1540 <value value="44" name="A8XX_PERF_GBIF_RESERVED_44"/> 1541 <value value="45" name="A8XX_PERF_GBIF_RESERVED_45"/> 1542 <value value="46" name="A8XX_PERF_GBIF_AXI0_WRITE_DATA_BEATS_TOTAL"/> 1543 <value value="47" name="A8XX_PERF_GBIF_AXI1_WRITE_DATA_BEATS_TOTAL"/> 1544 <value value="48" name="A8XX_PERF_GBIF_RESERVED_48"/> 1545 <value value="49" name="A8XX_PERF_GBIF_RESERVED_49"/> 1546 <value value="50" name="A8XX_PERF_GBIF_RESERVED_50"/> 1547 <value value="51" name="A8XX_PERF_GBIF_RESERVED_51"/> 1548 <value value="52" name="A8XX_PERF_GBIF_RESERVED_52"/> 1549 <value value="53" name="A8XX_PERF_GBIF_RESERVED_53"/> 1550 <value value="54" name="A8XX_PERF_GBIF_RESERVED_54"/> 1551 <value value="55" name="A8XX_PERF_GBIF_RESERVED_55"/> 1552 <value value="56" name="A8XX_PERF_GBIF_RESERVED_56"/> 1553 <value value="57" name="A8XX_PERF_GBIF_RESERVED_57"/> 1554 <value value="58" name="A8XX_PERF_GBIF_RESERVED_58"/> 1555 <value value="59" name="A8XX_PERF_GBIF_RESERVED_59"/> 1556 <value value="60" name="A8XX_PERF_GBIF_RESERVED_60"/> 1557 <value value="61" name="A8XX_PERF_GBIF_RESERVED_61"/> 1558 <value value="62" name="A8XX_PERF_GBIF_RESERVED_62"/> 1559 <value value="63" name="A8XX_PERF_GBIF_RESERVED_63"/> 1560 <value value="64" name="A8XX_PERF_GBIF_RESERVED_64"/> 1561 <value value="65" name="A8XX_PERF_GBIF_RESERVED_65"/> 1562 <value value="66" name="A8XX_PERF_GBIF_RESERVED_66"/> 1563 <value value="67" name="A8XX_PERF_GBIF_RESERVED_67"/> 1564 <value value="68" name="A8XX_PERF_GBIF_CYCLES_CH0_HELD_OFF_RD_ALL"/> 1565 <value value="69" name="A8XX_PERF_GBIF_CYCLES_CH1_HELD_OFF_RD_ALL"/> 1566 <value value="70" name="A8XX_PERF_GBIF_CYCLES_CH0_HELD_OFF_WR_ALL"/> 1567 <value value="71" name="A8XX_PERF_GBIF_CYCLES_CH1_HELD_OFF_WR_ALL"/> 1568 <value value="72" name="A8XX_PERF_GBIF_AXI_CH0_REQUEST_HELD_OFF"/> 1569 <value value="73" name="A8XX_PERF_GBIF_AXI_CH1_REQUEST_HELD_OFF"/> 1570 <value value="74" name="A8XX_PERF_GBIF_AXI_REQUEST_HELD_OFF"/> 1571 <value value="75" name="A8XX_PERF_GBIF_AXI_CH0_WRITE_DATA_HELD_OFF"/> 1572 <value value="76" name="A8XX_PERF_GBIF_AXI_CH1_WRITE_DATA_HELD_OFF"/> 1573 <value value="77" name="A8XX_PERF_GBIF_AXI_ALL_WRITE_DATA_HELD_OFF"/> 1574 <value value="78" name="A8XX_PERF_GBIF_RESERVED_78"/> 1575 <value value="79" name="A8XX_PERF_GBIF_RESERVED_79"/> 1576 <value value="80" name="A8XX_PERF_GBIF_RESERVED_80"/> 1577 <value value="81" name="A8XX_PERF_GBIF_RESERVED_81"/> 1578 <value value="82" name="A8XX_PERF_GBIF_RESERVED_82"/> 1579 <value value="83" name="A8XX_PERF_GBIF_RESERVED_83"/> 1580 <value value="84" name="A8XX_PERF_GBIF_RESERVED_84"/> 1581 <value value="85" name="A8XX_PERF_GBIF_RESERVED_85"/> 1582 <value value="86" name="A8XX_PERF_GBIF_RESERVED_86"/> 1583 <value value="87" name="A8XX_PERF_GBIF_RESERVED_87"/> 1584 <value value="88" name="A8XX_PERF_GBIF_AXI2_READ_REQUESTS_TOTAL"/> 1585 <value value="89" name="A8XX_PERF_GBIF_AXI3_READ_REQUESTS_TOTAL"/> 1586 <value value="90" name="A8XX_PERF_GBIF_RESERVED_90"/> 1587 <value value="91" name="A8XX_PERF_GBIF_RESERVED_91"/> 1588 <value value="92" name="A8XX_PERF_GBIF_RESERVED_92"/> 1589 <value value="93" name="A8XX_PERF_GBIF_RESERVED_93"/> 1590 <value value="94" name="A8XX_PERF_GBIF_RESERVED_94"/> 1591 <value value="95" name="A8XX_PERF_GBIF_RESERVED_95"/> 1592 <value value="96" name="A8XX_PERF_GBIF_RESERVED_96"/> 1593 <value value="97" name="A8XX_PERF_GBIF_RESERVED_97"/> 1594 <value value="98" name="A8XX_PERF_GBIF_RESERVED_98"/> 1595 <value value="99" name="A8XX_PERF_GBIF_RESERVED_99"/> 1596 <value value="100" name="A8XX_PERF_GBIF_AXI2_WRITE_REQUESTS_TOTAL"/> 1597 <value value="101" name="A8XX_PERF_GBIF_AXI3_WRITE_REQUESTS_TOTAL"/> 1598 <value value="102" name="A8XX_PERF_GBIF_RESERVED_102"/> 1599 <value value="103" name="A8XX_PERF_GBIF_RESERVED_103"/> 1600 <value value="104" name="A8XX_PERF_GBIF_RESERVED_104"/> 1601 <value value="105" name="A8XX_PERF_GBIF_RESERVED_105"/> 1602 <value value="106" name="A8XX_PERF_GBIF_RESERVED_106"/> 1603 <value value="107" name="A8XX_PERF_GBIF_RESERVED_107"/> 1604 <value value="108" name="A8XX_PERF_GBIF_RESERVED_108"/> 1605 <value value="109" name="A8XX_PERF_GBIF_RESERVED_109"/> 1606 <value value="110" name="A8XX_PERF_GBIF_RESERVED_110"/> 1607 <value value="111" name="A8XX_PERF_GBIF_RESERVED_111"/> 1608 <value value="112" name="A8XX_PERF_GBIF_AXI2_READ_DATA_BEATS_TOTAL"/> 1609 <value value="113" name="A8XX_PERF_GBIF_AXI3_READ_DATA_BEATS_TOTAL"/> 1610 <value value="114" name="A8XX_PERF_GBIF_RESERVED_114"/> 1611 <value value="115" name="A8XX_PERF_GBIF_RESERVED_115"/> 1612 <value value="116" name="A8XX_PERF_GBIF_RESERVED_116"/> 1613 <value value="117" name="A8XX_PERF_GBIF_RESERVED_117"/> 1614 <value value="118" name="A8XX_PERF_GBIF_RESERVED_118"/> 1615 <value value="119" name="A8XX_PERF_GBIF_RESERVED_119"/> 1616 <value value="120" name="A8XX_PERF_GBIF_RESERVED_120"/> 1617 <value value="121" name="A8XX_PERF_GBIF_RESERVED_121"/> 1618 <value value="122" name="A8XX_PERF_GBIF_RESERVED_122"/> 1619 <value value="123" name="A8XX_PERF_GBIF_RESERVED_123"/> 1620 <value value="124" name="A8XX_PERF_GBIF_AXI2_WRITE_DATA_BEATS_TOTAL"/> 1621 <value value="125" name="A8XX_PERF_GBIF_AXI3_WRITE_DATA_BEATS_TOTAL"/> 1622 <value value="126" name="A8XX_PERF_GBIF_RESERVED_126"/> 1623 <value value="127" name="A8XX_PERF_GBIF_RESERVED_127"/> 1624 <value value="128" name="A8XX_PERF_GBIF_RESERVED_128"/> 1625 <value value="129" name="A8XX_PERF_GBIF_RESERVED_129"/> 1626 <value value="130" name="A8XX_PERF_GBIF_RESERVED_130"/> 1627 <value value="131" name="A8XX_PERF_GBIF_RESERVED_131"/> 1628 <value value="132" name="A8XX_PERF_GBIF_RESERVED_132"/> 1629 <value value="133" name="A8XX_PERF_GBIF_RESERVED_133"/> 1630 <value value="134" name="A8XX_PERF_GBIF_RESERVED_134"/> 1631 <value value="135" name="A8XX_PERF_GBIF_RESERVED_135"/> 1632 <value value="136" name="A8XX_PERF_GBIF_RESERVED_136"/> 1633 <value value="137" name="A8XX_PERF_GBIF_RESERVED_137"/> 1634 <value value="138" name="A8XX_PERF_GBIF_RESERVED_138"/> 1635 <value value="139" name="A8XX_PERF_GBIF_RESERVED_139"/> 1636 <value value="140" name="A8XX_PERF_GBIF_RESERVED_140"/> 1637 <value value="141" name="A8XX_PERF_GBIF_RESERVED_141"/> 1638 <value value="142" name="A8XX_PERF_GBIF_RESERVED_142"/> 1639 <value value="143" name="A8XX_PERF_GBIF_RESERVED_143"/> 1640 <value value="144" name="A8XX_PERF_GBIF_RESERVED_144"/> 1641 <value value="145" name="A8XX_PERF_GBIF_RESERVED_145"/> 1642 <value value="146" name="A8XX_PERF_GBIF_RESERVED_146"/> 1643 <value value="147" name="A8XX_PERF_GBIF_RESERVED_147"/> 1644 <value value="148" name="A8XX_PERF_GBIF_RESERVED_148"/> 1645 <value value="149" name="A8XX_PERF_GBIF_RESERVED_149"/> 1646 <value value="150" name="A8XX_PERF_GBIF_READ_BEAT_ALL_CHANNELS"/> 1647 <value value="151" name="A8XX_PERF_GBIF_WRITE_BEAT_ALL_CHANNELS"/> 1648 <value value="152" name="A8XX_PERF_GBIF_READ_AND_WRITE_BEAT_ALL_CHANNELS"/> 1649 <value value="153" name="A8XX_PERF_GBIF_RESERVED_153"/> 1650 <value value="154" name="A8XX_PERF_GBIF_RESERVED_154"/> 1651 <value value="155" name="A8XX_PERF_GBIF_RESERVED_155"/> 1652 <value value="156" name="A8XX_PERF_GBIF_CYCLES_CH2_HELD_OFF_RD_ALL"/> 1653 <value value="157" name="A8XX_PERF_GBIF_CYCLES_CH3_HELD_OFF_RD_ALL"/> 1654 <value value="158" name="A8XX_PERF_GBIF_CYCLES_CH2_HELD_OFF_WR_ALL"/> 1655 <value value="159" name="A8XX_PERF_GBIF_CYCLES_CH3_HELD_OFF_WR_ALL"/> 1656 <value value="160" name="A8XX_PERF_GBIF_AXI_CH2_REQUEST_HELD_OFF"/> 1657 <value value="161" name="A8XX_PERF_GBIF_AXI_CH3_REQUEST_HELD_OFF"/> 1658 <value value="162" name="A8XX_PERF_GBIF_AXI_CH2_WRITE_DATA_HELD_OFF"/> 1659 <value value="163" name="A8XX_PERF_GBIF_AXI_CH3_WRITE_DATA_HELD_OFF"/> 1660 <value value="164" name="A8XX_PERF_GBIF_AXI_CH0_READ_PENDING_SUM"/> 1661 <value value="165" name="A8XX_PERF_GBIF_AXI_CH1_READ_PENDING_SUM"/> 1662 <value value="166" name="A8XX_PERF_GBIF_AXI_CH2_READ_PENDING_SUM"/> 1663 <value value="167" name="A8XX_PERF_GBIF_AXI_CH3_READ_PENDING_SUM"/> 1664 <value value="168" name="A8XX_PERF_GBIF_AXI_CH0_WRITE_PENDING_SUM"/> 1665 <value value="169" name="A8XX_PERF_GBIF_AXI_CH1_WRITE_PENDING_SUM"/> 1666 <value value="170" name="A8XX_PERF_GBIF_AXI_CH2_WRITE_PENDING_SUM"/> 1667 <value value="171" name="A8XX_PERF_GBIF_AXI_CH3_WRITE_PENDING_SUM"/> 1668 <value value="172" name="A8XX_PERF_GBIF_SMMU_RD_REQ_SAMPLES_CH0"/> 1669 <value value="173" name="A8XX_PERF_GBIF_SMMU_RD_REQ_CYCLES_CH0"/> 1670 <value value="174" name="A8XX_PERF_GBIF_RBUF_RD_REQ_SAMPLES_CH0"/> 1671 <value value="175" name="A8XX_PERF_GBIF_RBUF_RD_REQ_CYCLES_CH0"/> 1672 <value value="176" name="A8XX_PERF_GBIF_RBUF_UTIL_SAMPLES_CH0"/> 1673 <value value="177" name="A8XX_PERF_GBIF_RBUF_BUSY_CYCLES_CH0"/> 1674 <value value="178" name="A8XX_PERF_GBIF_RTABLE_OT_UTIL_SAMPLES_CH0"/> 1675 <value value="179" name="A8XX_PERF_GBIF_SMMU_RD_REQ_SAMPLES_CH1"/> 1676 <value value="180" name="A8XX_PERF_GBIF_SMMU_RD_REQ_CYCLES_CH1"/> 1677 <value value="181" name="A8XX_PERF_GBIF_RBUF_RD_REQ_SAMPLES_CH1"/> 1678 <value value="182" name="A8XX_PERF_GBIF_RBUF_RD_REQ_CYCLES_CH1"/> 1679 <value value="183" name="A8XX_PERF_GBIF_RBUF_UTIL_SAMPLES_CH1"/> 1680 <value value="184" name="A8XX_PERF_GBIF_RBUF_BUSY_CYCLES_CH1"/> 1681 <value value="185" name="A8XX_PERF_GBIF_RTABLE_OT_UTIL_SAMPLES_CH1"/> 1682 <value value="186" name="A8XX_PERF_GBIF_SMMU_RD_REQ_SAMPLES_CH2"/> 1683 <value value="187" name="A8XX_PERF_GBIF_SMMU_RD_REQ_CYCLES_CH2"/> 1684 <value value="188" name="A8XX_PERF_GBIF_RBUF_RD_REQ_SAMPLES_CH2"/> 1685 <value value="189" name="A8XX_PERF_GBIF_RBUF_RD_REQ_CYCLES_CH2"/> 1686 <value value="190" name="A8XX_PERF_GBIF_RBUF_UTIL_SAMPLES_CH2"/> 1687 <value value="191" name="A8XX_PERF_GBIF_RBUF_BUSY_CYCLES_CH2"/> 1688 <value value="192" name="A8XX_PERF_GBIF_RTABLE_OT_UTIL_SAMPLES_CH2"/> 1689 <value value="193" name="A8XX_PERF_GBIF_SMMU_RD_REQ_SAMPLES_CH3"/> 1690 <value value="194" name="A8XX_PERF_GBIF_SMMU_RD_REQ_CYCLES_CH3"/> 1691 <value value="195" name="A8XX_PERF_GBIF_RBUF_RD_REQ_SAMPLES_CH3"/> 1692 <value value="196" name="A8XX_PERF_GBIF_RBUF_RD_REQ_CYCLES_CH3"/> 1693 <value value="197" name="A8XX_PERF_GBIF_RBUF_UTIL_SAMPLES_CH3"/> 1694 <value value="198" name="A8XX_PERF_GBIF_RBUF_BUSY_CYCLES_CH3"/> 1695 <value value="199" name="A8XX_PERF_GBIF_RTABLE_OT_UTIL_SAMPLES_CH3"/> 1696</enum> 1697 1698<enum name="a8xx_gbif_pwr_perfcounter_select"> 1699 <value value="0" name="A8XX_M0_STALL"/> 1700 <value value="1" name="A8XX_M1_STALL"/> 1701 <value value="2" name="A8XX_M0_NO_CLIENT_REQ"/> 1702 <value value="3" name="A8XX_M1_NO_CLIENT_REQ"/> 1703</enum> 1704 1705<enum name="a8xx_alwayson_perfcounter_select"> 1706 <value value="0" name="A8XX_PERF_ALWAYSON"/> 1707</enum> 1708 1709<enum name="a8xx_gmu_xoclk_perfcounter_select"> 1710 <value value="0" name="A8XX_PERF_GMU_XOCLK_NO_COUNT"/> 1711 <value value="1" name="A8XX_PERF_GMU_PWC_GPU_TOP_POWER_ON_CYCLES"/> 1712 <value value="2" name="A8XX_PERF_GMU_PWC_GPU_TOP_POWER_OFF_SWITCHING_CYCLES"/> 1713 <value value="3" name="A8XX_PERF_GMU_PWC_GPU_TOP_POWER_OFF_CYCLES"/> 1714 <value value="4" name="A8XX_PERF_GMU_PWC_GPU_TOP_POWER_ON_SWITCHING_CYCLES"/> 1715 <value value="5" name="A8XX_PERF_GMU_PWC_GPU_TOP_POWER_COLLAPSED"/> 1716 <value value="6" name="A8XX_PERF_GMU_PWC_SPTPRAC_POWER_ON_CYCLES"/> 1717 <value value="7" name="A8XX_PERF_GMU_PWC_SPTPRAC_POWER_OFF_SWITCHING_CYCLES"/> 1718 <value value="8" name="A8XX_PERF_GMU_PWC_SPTPRAC_POWER_OFF_CYCLES"/> 1719 <value value="9" name="A8XX_PERF_GMU_PWC_SPTPRAC_POWER_ON_SWITCHING_CYCLES"/> 1720 <value value="10" name="A8XX_PERF_GMU_PWC_SPTPRAC_POWER_COLLAPSED"/> 1721 <value value="11" name="A8XX_PERF_GMU_PWC_GPU_TOP_IDLE_PHASE1_IN_LATENCY"/> 1722 <value value="12" name="A8XX_PERF_GMU_PWC_GPU_TOP_IDLE_PHASE2_IN_LATENCY"/> 1723 <value value="13" name="A8XX_PERF_GMU_PWC_GPU_TOP_IDLE_PHASE1_OUT_LATENCY"/> 1724 <value value="14" name="A8XX_PERF_GMU_PWC_GPU_TOP_IDLE_PHASE2_OUT_LATENCY"/> 1725 <value value="15" name="A8XX_PERF_GMU_PWC_TOTAL_THROTTLED_CYCLES"/> 1726 <value value="16" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_0"/> 1727 <value value="17" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_1"/> 1728 <value value="18" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_2"/> 1729 <value value="19" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_3"/> 1730 <value value="20" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_4"/> 1731 <value value="21" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_5"/> 1732 <value value="22" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_6"/> 1733 <value value="23" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_7"/> 1734 <value value="24" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_8"/> 1735 <value value="25" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_9"/> 1736 <value value="26" name="A8XX_PERF_GMU_PWC_NUM_GDPM_EPOCH_TOO_SHORT_INTR"/> 1737 <value value="27" name="A8XX_PERF_GMU_PWC_NUM_GDPM_INVALID_OPCODE_INTR"/> 1738 <value value="28" name="A8XX_PERF_GMU_PWC_NUM_MAX_THRESHOLD_BREACH"/> 1739 <value value="29" name="A8XX_PERF_GMU_PWC_NUM_MIN_THRESHOLD_BREACH"/> 1740 <value value="30" name="A8XX_PERF_GMU_PWC_CYCLE_MAX_THRESHOLD_BREACH"/> 1741 <value value="31" name="A8XX_PERF_GMU_PWC_CYCLE_MIN_THRESHOLD_BREACH"/> 1742 <value value="32" name="A8XX_PERF_GMU_PWC_GPU_BUSY_CYCLES"/> 1743 <value value="33" name="A8XX_PERF_GMU_PWC_CYCLE_ALM_LOW_THROTTLE_CYCLES"/> 1744 <value value="34" name="A8XX_PERF_GMU_PWC_CYCLE_ALM_HIGH_THROTTLE_CYCLES"/> 1745 <value value="35" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_10"/> 1746 <value value="36" name="A8XX_PERF_GMU_PWC_SID_N_TOTAL_THROTTLED_CYCLES_11"/> 1747 <value value="37" name="A8XX_PERF_GMU_PWC_CLX_TOTAL_THROTTLE_CYCLES"/> 1748 <value value="38" name="A8XX_PERF_GMU_PWC_BCL_TOTAL_THROTTLE_CYCLES"/> 1749 <value value="39" name="A8XX_PERF_GMU_PWC_MSG2_CLX_TOTAL_THROTTLE_CYCLES"/> 1750 <value value="40" name="A8XX_PERF_GMU_XOCLK_RESERVED_40"/> 1751 <value value="41" name="A8XX_PERF_GMU_XOCLK_RESERVED_41"/> 1752 <value value="42" name="A8XX_PERF_GMU_XOCLK_RESERVED_42"/> 1753 <value value="43" name="A8XX_PERF_GMU_XOCLK_RESERVED_43"/> 1754 <value value="44" name="A8XX_PERF_GMU_XOCLK_RESERVED_44"/> 1755 <value value="45" name="A8XX_PERF_GMU_XOCLK_RESERVED_45"/> 1756 <value value="46" name="A8XX_PERF_GMU_XOCLK_RESERVED_46"/> 1757 <value value="47" name="A8XX_PERF_GMU_XOCLK_RESERVED_47"/> 1758 <value value="48" name="A8XX_PERF_GMU_PWC_LPAC_BUSY_CYCLES"/> 1759 <value value="49" name="A8XX_PERF_GMU_PWC_GPU_OR_LPAC_BUSY_CYCLES"/> 1760 <value value="50" name="A8XX_PERF_GMU_PWC_GX_THROTTLE_VIOLATION_CNT"/> 1761 <value value="51" name="A8XX_PERF_GMU_PWC_MX_THROTTLE_VIOLATION_CNT"/> 1762 <value value="52" name="A8XX_PERF_GMU_PWC_PWRLIMITS_PREBUCK_THROTTLE_CYCLES"/> 1763 <value value="53" name="A8XX_PERF_GMU_PWC_GX_IFF_THROTTLE_CYCLES"/> 1764 <value value="54" name="A8XX_PERF_GMU_PWC_GFX_PCLX_THROTTLE_CYCLES"/> 1765 <value value="55" name="A8XX_PERF_GMU_PWC_MX_IFF_THROTTLE_CYCLES"/> 1766 <value value="56" name="A8XX_PERF_GMU_PWC_MX_PCLX_THROTTLE_CYCLES"/> 1767 <value value="57" name="A8XX_PERF_GMU_XOCLK_RESERVED_57"/> 1768 <value value="58" name="A8XX_PERF_GMU_XOCLK_RESERVED_58"/> 1769 <value value="59" name="A8XX_PERF_GMU_XOCLK_RESERVED_59"/> 1770 <value value="60" name="A8XX_PERF_GMU_XOCLK_RESERVED_60"/> 1771 <value value="61" name="A8XX_PERF_GMU_XOCLK_RESERVED_61"/> 1772 <value value="62" name="A8XX_PERF_GMU_XOCLK_RESERVED_62"/> 1773 <value value="63" name="A8XX_PERF_GMU_XOCLK_RESERVED_63"/> 1774 <value value="64" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_0_CNT"/> 1775 <value value="65" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_1_CNT"/> 1776 <value value="66" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_2_CNT"/> 1777 <value value="67" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_3_CNT"/> 1778 <value value="68" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_4_CNT"/> 1779 <value value="69" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_5_CNT"/> 1780 <value value="70" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_6_CNT"/> 1781 <value value="71" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_7_CNT"/> 1782 <value value="72" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_8_CNT"/> 1783 <value value="73" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_9_CNT"/> 1784 <value value="74" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_10_CNT"/> 1785 <value value="75" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_11_CNT"/> 1786 <value value="76" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_12_CNT"/> 1787 <value value="77" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_13_CNT"/> 1788 <value value="78" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_14_CNT"/> 1789 <value value="79" name="A8XX_PERF_GMU_PWC_GXDCE_HIST_BIN_15_CNT"/> 1790 <value value="80" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_0_CNT"/> 1791 <value value="81" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_1_CNT"/> 1792 <value value="82" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_2_CNT"/> 1793 <value value="83" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_3_CNT"/> 1794 <value value="84" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_4_CNT"/> 1795 <value value="85" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_5_CNT"/> 1796 <value value="86" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_6_CNT"/> 1797 <value value="87" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_7_CNT"/> 1798 <value value="88" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_8_CNT"/> 1799 <value value="89" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_9_CNT"/> 1800 <value value="90" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_10_CNT"/> 1801 <value value="91" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_11_CNT"/> 1802 <value value="92" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_12_CNT"/> 1803 <value value="93" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_13_CNT"/> 1804 <value value="94" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_14_CNT"/> 1805 <value value="95" name="A8XX_PERF_GMU_PWC_GXCDYN_HIST_BIN_15_CNT"/> 1806</enum> 1807 1808<enum name="a8xx_gmu_gmuclk_perfcounter_select"> 1809 <value value="0" name="A8XX_PERF_GMUCLK_NO_COUNT"/> 1810 <value value="1" name="A8XX_PERF_GMU_PWC_FW_INCREMENT_0"/> 1811 <value value="2" name="A8XX_PERF_GMU_PWC_FW_INCREMENT_1"/> 1812 <value value="3" name="A8XX_PERF_GMU_PWC_FW_INCREMENT_2"/> 1813 <value value="4" name="A8XX_PERF_GMU_PWC_FW_INCREMENT_3"/> 1814 <value value="5" name="A8XX_PERF_GMU_PWC_FW_INCREMENT_4"/> 1815 <value value="6" name="A8XX_PERF_GMU_PWC_FW_INCREMENT_5"/> 1816 <value value="7" name="A8XX_PERF_GMU_PWC_FW_INCREMENT_6"/> 1817 <value value="8" name="A8XX_PERF_GMU_PWC_FW_INCREMENT_7"/> 1818 <value value="9" name="A8XX_PERF_GMU_PWC_SOC_MIN_IDLE_VOTE"/> 1819 <value value="10" name="A8XX_PERF_GMU_PWC_TSENSE_CBCAST_MSG"/> 1820 <value value="11" name="A8XX_PERF_GMU_PWC_MXA_CBCAST_MSG"/> 1821 <value value="12" name="A8XX_PERF_GMU_PWC_CX_CBCAST_MSG"/> 1822 <value value="13" name="A8XX_PERF_GMU_PWC_GX_CBCAST_MSG"/> 1823 <value value="14" name="A8XX_PERF_GMU_PWC_BCL_CBCAST_MSG"/> 1824 <value value="15" name="A8XX_PERF_GMU_PWC_MXC_CBCAST_MSG"/> 1825 <value value="16" name="A8XX_PERF_GMU_PWC_GENERIC_CBCAST_MSG"/> 1826 <value value="17" name="A8XX_PERF_GMU_PWC_PMIC_CBCAST_MSG"/> 1827 <value value="18" name="A8XX_PERF_GMU_PWC_CLX_CBCAST_MSG"/> 1828 <value value="19" name="A8XX_PERF_GMU_PWC_PMICARB_CLX_IRQ"/> 1829 <value value="20" name="A8XX_PERF_GMU_PWC_CLX_EXPIRE_CBCAST_MSG"/> 1830 <value value="21" name="A8XX_PERF_GMU_PWC_PMICARB_CLX_EXPIRE_IRQ"/> 1831 <value value="22" name="A8XX_PERF_GMU_PWC_MXC_CLX_CBCAST_MSG"/> 1832 <value value="23" name="A8XX_PERF_GMU_PWC_BCL_TYPE_0_CBCAST_MSG"/> 1833 <value value="24" name="A8XX_PERF_GMU_PWC_BCL_TYPE_1_CBCAST_MSG"/> 1834 <value value="25" name="A8XX_PERF_GMU_PWC_BCL_TYPE_2_CBCAST_MSG"/> 1835 <value value="26" name="A8XX_PERF_GMU_PWC_PMIC_MSG2_CBCAST_MSG"/> 1836 <value value="27" name="A8XX_PERF_GMU_PWC_MSG2_CLX_START_CBCAST_MSG"/> 1837 <value value="28" name="A8XX_PERF_GMU_PWC_MSG2_CLX_EXPIRE_CBCAST_MSG"/> 1838 <value value="29" name="A8XX_PERF_GMU_PWC_GX_VRM_1_CBCAST_MSG"/> 1839 <value value="30" name="A8XX_PERF_GMU_GMUCLK_RESERVED_30"/> 1840 <value value="31" name="A8XX_PERF_GMU_GMUCLK_RESERVED_31"/> 1841 <value value="32" name="A8XX_PERF_GMU_PWC_CTXT_DONE_BR"/> 1842 <value value="33" name="A8XX_PERF_GMU_PWC_CTXT_DONE_BV"/> 1843 <value value="34" name="A8XX_PERF_GMU_PWC_CTXT_DONE_LPAC"/> 1844 <value value="35" name="A8XX_PERF_GMU_PWC_GFX_IFF_MSG"/> 1845 <value value="36" name="A8XX_PERF_GMU_PWC_GFX_PCLX_MSG"/> 1846 <value value="37" name="A8XX_PERF_GMU_PWC_MX_IFF_MSG"/> 1847 <value value="38" name="A8XX_PERF_GMU_PWC_MX_PCLX_MSG"/> 1848</enum> 1849 1850<enum name="a8xx_gmu_perf_perfcounter_select"> 1851 <value value="0" name="A8XX_PERF_GMU_NO_COUNT"/> 1852 <value value="1" name="A8XX_PERF_GMU_CM3_BUSY_CYCLES"/> 1853 <value value="2" name="A8XX_PERF_GMU_DATA_CACHE_READ"/> 1854 <value value="3" name="A8XX_PERF_GMU_DATA_CACHE_READ_MISS"/> 1855 <value value="4" name="A8XX_PERF_GMU_DATA_CACHE_WRITE"/> 1856 <value value="5" name="A8XX_PERF_GMU_DATA_CACHE_WRITE_MISS"/> 1857 <value value="6" name="A8XX_PERF_GMU_DATA_CACHE_EVICTIONS"/> 1858 <value value="7" name="A8XX_PERF_GMU_L0_INSTRUCTION_CACHE_READ"/> 1859 <value value="8" name="A8XX_PERF_GMU_L0_INSTRUCTION_CACHE_READ_MISS"/> 1860 <value value="9" name="A8XX_PERF_GMU_L1_INSTRUCTION_CACHE_READ"/> 1861 <value value="10" name="A8XX_PERF_GMU_L1_INSTRUCTION_CACHE_READ_MISS"/> 1862 <value value="11" name="A8XX_PERF_GMU_SYS_AHB_WRITE"/> 1863 <value value="12" name="A8XX_PERF_GMU_SYS_AHB_WRITE_BUFFER_MISS"/> 1864 <value value="13" name="A8XX_PERF_GMU_SYS_AHB_READ"/> 1865 <value value="14" name="A8XX_PERF_GMU_SYS_AHB_READ_BUFFER_MISS"/> 1866 <value value="15" name="A8XX_PERF_GMU_DATA_CACHE_AHB_TOTAL_WAIT_CYCLES"/> 1867 <value value="16" name="A8XX_PERF_GMU_DATA_CACHE_VBIF_TOTAL_WAIT_CYCLES"/> 1868 <value value="17" name="A8XX_PERF_GMU_INSTRUCTION_CACHE_AHB_TOTAL_WAIT_CYCLES"/> 1869 <value value="18" name="A8XX_PERF_GMU_INSTRUCTION_CACHE_VBIF_TOTAL_WAIT_CYCLES"/> 1870 <value value="19" name="A8XX_PERF_GMU_SYS_VBIF_AHB_TOTAL_WAIT_CYCLES"/> 1871 <value value="20" name="A8XX_PERF_GMU_SYS__AHB_TOTAL_WAIT_CYCLES"/> 1872 <value value="21" name="A8XX_PERF_GMU_TOTAL_INTR_LATENCY_CYCLES"/> 1873 <value value="22" name="A8XX_PERF_GMU_WORST_INTR_LATENCY_CYCLES"/> 1874 <value value="23" name="A8XX_PERF_GMU_TOTAL_OUTSTANDING_INTERRUPTS"/> 1875</enum> 1876 1877<enum name="a8xx_ufc_perfcounter_select"> 1878 <value value="0" name="A8XX_PERF_UFC_NEVER_COUNT"/> 1879 <value value="1" name="A8XX_PERF_UFC_BUSY_CYCLES"/> 1880 <value value="2" name="A8XX_PERF_UFC_READ_DATA_VBIF"/> 1881 <value value="3" name="A8XX_PERF_UFC_WRITE_DATA_VBIF"/> 1882 <value value="4" name="A8XX_PERF_UFC_READ_REQUEST_VBIF"/> 1883 <value value="5" name="A8XX_PERF_UFC_WRITE_REQUEST_VBIF"/> 1884 <value value="6" name="A8XX_PERF_UFC_MAIN_HIT_CRE_PREFETCH"/> 1885 <value value="7" name="A8XX_PERF_UFC_MAIN_HIT_SP_PREFETCH"/> 1886 <value value="8" name="A8XX_PERF_UFC_MAIN_HIT_TP_PREFETCH"/> 1887 <value value="9" name="A8XX_PERF_UFC_MAIN_HIT_UBWC_READ"/> 1888 <value value="10" name="A8XX_PERF_UFC_MAIN_HIT_UBWC_WRITE"/> 1889 <value value="11" name="A8XX_PERF_UFC_MAIN_MISS_CRE_PREFETCH"/> 1890 <value value="12" name="A8XX_PERF_UFC_MAIN_MISS_SP_PREFETCH"/> 1891 <value value="13" name="A8XX_PERF_UFC_MAIN_MISS_TP_PREFETCH"/> 1892 <value value="14" name="A8XX_PERF_UFC_MAIN_MISS_UBWC_READ"/> 1893 <value value="15" name="A8XX_PERF_UFC_MAIN_MISS_UBWC_WRITE"/> 1894 <value value="16" name="A8XX_PERF_UFC_MAIN_UBWC_RD_NRDY"/> 1895 <value value="17" name="A8XX_PERF_UFC_MAIN_UBWC_RD_RDY"/> 1896 <value value="18" name="A8XX_PERF_UFC_MAIN_TP_RD_NRDY"/> 1897 <value value="19" name="A8XX_PERF_UFC_MAIN_TP_RD_RDY"/> 1898 <value value="20" name="A8XX_PERF_UFC_STALL_CYCLES_GBIF_CMD"/> 1899 <value value="21" name="A8XX_PERF_UFC_STALL_CYCLES_GBIF_RDATA"/> 1900 <value value="22" name="A8XX_PERF_UFC_STALL_CYCLES_GBIF_WDATA"/> 1901 <value value="23" name="A8XX_PERF_UFC_STALL_CYCLES_UBWC_WR_FLAG"/> 1902 <value value="24" name="A8XX_PERF_UFC_STALL_CYCLES_UBWC_FLAG_RTN"/> 1903 <value value="25" name="A8XX_PERF_UFC_STALL_CYCLES_UBWC_EVENT"/> 1904 <value value="26" name="A8XX_PERF_UFC_UBWC_REQ_STALLED_CYCLES"/> 1905 <value value="27" name="A8XX_PERF_UFC_UBWC_RD_STALLED_CYCLES"/> 1906 <value value="28" name="A8XX_PERF_UFC_UBWC_WR_STALLED_CYCLES"/> 1907 <value value="29" name="A8XX_PERF_UFC_PREFETCH_STALLED_CYCLES"/> 1908 <value value="30" name="A8XX_PERF_UFC_EVICTION_STALLED_CYCLES"/> 1909 <value value="31" name="A8XX_PERF_UFC_LOCK_STALLED_CYCLES"/> 1910 <value value="32" name="A8XX_PERF_UFC_MISS_LATENCY_CYCLES"/> 1911 <value value="33" name="A8XX_PERF_UFC_MISS_LATENCY_SAMPLES"/> 1912 <value value="34" name="A8XX_PERF_UFC_L1_CRE_REQUESTS"/> 1913 <value value="35" name="A8XX_PERF_UFC_L1_CRE_STALLED_CYCLES"/> 1914 <value value="36" name="A8XX_PERF_UFC_L1_CRE_FILTER_HIT"/> 1915 <value value="37" name="A8XX_PERF_UFC_L1_CRE_FILTER_MISS"/> 1916 <value value="38" name="A8XX_PERF_UFC_L1_SP_REQUESTS"/> 1917 <value value="39" name="A8XX_PERF_UFC_L1_SP_STALLED_CYCLES"/> 1918 <value value="40" name="A8XX_PERF_UFC_L1_SP_FILTER_HIT"/> 1919 <value value="41" name="A8XX_PERF_UFC_L1_SP_FILTER_MISS"/> 1920 <value value="42" name="A8XX_PERF_UFC_L1_TP_HINT_REQUESTS"/> 1921 <value value="43" name="A8XX_PERF_UFC_L1_TP_STALLED_CYCLES"/> 1922 <value value="44" name="A8XX_PERF_UFC_L1_TP_HINT_TAG_MISS"/> 1923 <value value="45" name="A8XX_PERF_UFC_L1_TP_HINT_TAG_HIT_RDY"/> 1924 <value value="46" name="A8XX_PERF_UFC_L1_TP_HINT_TAG_HIT_NRDY"/> 1925 <value value="47" name="A8XX_PERF_UFC_AUTO_EVICTIONS"/> 1926 <value value="48" name="A8XX_PERF_UFC_PARTIAL_EVICTIONS"/> 1927</enum> 1928 1929</database> 1930