xref: /linux/drivers/gpu/drm/msm/registers/adreno/a8xx_descriptors.xml (revision 3f1c07fc21c68bd3bd2df9d2c9441f6485e934d9)
1<?xml version="1.0" encoding="UTF-8"?>
2<database xmlns="http://nouveau.freedesktop.org/"
3xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
5<import file="freedreno_copyright.xml"/>
6<import file="adreno/adreno_common.xml"/>
7<import file="adreno/adreno_pm4.xml"/>
8<import file="adreno/a6xx_enums.xml"/>
9<import file="adreno/a8xx_enums.xml"/>
10
11<domain name="A8XX_TEX_SAMP" width="32">
12	<doc>Texture sampler dwords</doc>
13	<reg32 offset="0" name="0">
14		<bitfield name="MIPFILTER_LINEAR_NEAR" pos="0" type="boolean"/>
15		<bitfield name="MIPMAPING_DIS" pos="1" type="boolean"/>
16		<bitfield name="XY_MAG" low="2" high="3" type="a6xx_tex_filter"/>
17		<bitfield name="XY_MIN" low="4" high="5" type="a6xx_tex_filter"/>
18		<bitfield name="WRAP_S" low="6" high="8" type="a6xx_tex_clamp"/>
19		<bitfield name="WRAP_T" low="9" high="11" type="a6xx_tex_clamp"/>
20		<bitfield name="WRAP_R" low="12" high="14" type="a6xx_tex_clamp"/>
21		<bitfield name="MSAA_BOX_FILTERING" pos="15" type="boolean"/>
22		<bitfield name="LOD_BIAS" low="16" high="28" type="fixed" radix="8"/>
23		<bitfield name="ANISO" low="29" high="31" type="a6xx_tex_aniso"/>
24	</reg32>
25	<reg32 offset="1" name="1">
26		<bitfield name="MAX_LOD" low="0" high="11" type="ufixed" radix="8"/>
27		<bitfield name="MIN_LOD" low="12" high="23" type="ufixed" radix="8"/>
28		<bitfield name="REDUCTION_MODE" low="24" high="25" type="a6xx_reduction_mode"/>
29		<bitfield name="COMPARE_FUNC" low="26" high="28" type="adreno_compare_func"/>
30		<bitfield name="CHROMA_LINEAR" pos="29" type="boolean"/>
31		<bitfield name="CUBEMAPSEAMLESSFILTOFF" pos="30" type="boolean"/>
32		<bitfield name="UNNORM_COORDS" pos="31" type="boolean"/>
33	</reg32>
34	<reg32 offset="2" name="2">
35		<bitfield name="FASTBORDERCOLOREN" pos="0" type="boolean"/>
36		<bitfield name="FASTBORDERCOLOR" low="1" high="2" type="a6xx_fast_border_color"/>
37		<bitfield name="BCOLOR" low="7" high="31"/>
38	</reg32>
39	<reg32 offset="3" name="3"/>
40</domain>
41
42<domain name="A8XX_TEX_MEMOBJ" width="32" varset="chip">
43	<doc>Texture memobj dwords</doc>
44	<reg32 offset="0" name="0">
45		<bitfield name="BASE_LO" low="6" high="31" shr="6"/>
46	</reg32>
47	<reg32 offset="1" name="1">
48		<bitfield name="BASE_HI" low="0" high="16"/>
49		<bitfield name="TYPE" low="17" high="19" type="a6xx_tex_type"/>
50		<bitfield name="DEPTH" low="20" high="31" type="uint"/>
51	</reg32>
52	<reg32 offset="2" name="2">
53		<bitfield name="WIDTH" low="0" high="14" type="uint"/>
54		<bitfield name="HEIGHT" low="15" high="29" type="uint"/>
55		<bitfield name="SAMPLES" low="30" high="31" type="a3xx_msaa_samples"/>
56	</reg32>
57	<reg32 offset="3" name="3">
58		<bitfield name="FMT" low="0" high="7" type="a6xx_format"/>
59		<bitfield name="SWAP" low="8" high="9" type="a3xx_color_swap"/>
60		<bitfield name="SWIZ_X" low="10" high="12" type="a8xx_tex_swiz"/>
61		<bitfield name="SWIZ_Y" low="13" high="15" type="a8xx_tex_swiz"/>
62		<bitfield name="SWIZ_Z" low="16" high="18" type="a8xx_tex_swiz"/>
63		<bitfield name="SWIZ_W" low="19" high="21" type="a8xx_tex_swiz"/>
64	</reg32>
65	<reg32 offset="4" name="4">
66		<bitfield name="TILE_MODE" low="0" high="1" type="a6xx_tile_mode"/>
67		<bitfield name="FLAG" pos="2" type="boolean"/>
68		<bitfield name="PRT_EN" pos="3" type="boolean"/>
69		<bitfield name="TILE_ALL" pos="4" type="boolean"/>
70		<bitfield name="SRGB" pos="5" type="boolean"/>
71		<bitfield name="FLAG_LO" low="6" high="31" shr="6"/>
72		<!-- For multiplanar: -->
73		<bitfield name="BASE_U_LO" low="6" high="31" shr="6"/>
74	</reg32>
75	<reg32 offset="5" name="5">
76		<bitfield name="FLAG_HI" low="0" high="16"/>
77		<!-- For multiplanar: -->
78		<bitfield name="BASE_U_HI" low="0" high="16"/>
79		<bitfield name="FLAG_BUFFER_PITCH" low="17" high="24" shr="6" type="uint"/>
80		<bitfield name="ALL_SAMPLES_CENTER" pos="29" type="boolean"/>
81		<bitfield name="MUTABLEEN" pos="31" type="boolean"/>
82	</reg32>
83	<reg32 offset="6" name="6">
84		<bitfield name="TEX_LINE_OFFSET" low="0" high="23" type="uint"/> <!-- PITCH -->
85		<bitfield name="MIN_LINE_OFFSET" low="24" high="27" type="uint"/> <!-- PITCHALIGN -->
86		<bitfield name="MIPLVLS" low="28" high="31" type="uint"/>
87	</reg32>
88	<reg32 offset="7" name="7">
89		<bitfield name="ARRAY_SLICE_OFFSET" low="0" high="22" shr="12" type="uint"/> <!-- ARRAY_PITCH -->
90		<bitfield name="ASO_UNIT" pos="23"/> <!-- 4KB or 32B ? -->
91		<bitfield name="MIN_ARRAY_SLIZE_OFFSET" low="24" high="27" shr="12"/> <!-- MIN_LAYERSZ -->
92		<bitfield name="GMEM_TILING_FALLBACK_EN" pos="28" type="boolean"/>
93		<bitfield name="CORNER_BASED_EN" pos="30" type="boolean"/>
94		<bitfield name="GMEM_FULL_SURF" pos="31" type="boolean"/>
95		<!-- For multiplanar.  This overlaps other single-planar fields: -->
96		<bitfield name="UV_OFFSET_H" low="24" high="25" type="ufixed" radix="2"/> <!-- CHROMA_MIDPOINT_X -->
97		<bitfield name="UV_OFFSET_V" low="26" high="27" type="ufixed" radix="2"/> <!-- CHROMA_MIDPOINT_Y -->
98	</reg32>
99	<reg32 offset="8" name="8">
100		<bitfield name="FLAG_ARRAY_PITCH" low="0" high="14" shr="12" type="uint"/> <!-- FLAG_BUFFER_ARRAY_PITCH -->
101		<!-- log2 size of the first level, required for mipmapping -->
102		<bitfield name="FLAG_BUFFER_LOGW" low="24" high="27" type="uint"/>
103		<bitfield name="FLAG_BUFFER_LOGH" low="28" high="31" type="uint"/>
104		<!-- For multiplanar.  This overlaps other single-planar fields: -->
105		<bitfield name="BASE_V_LO" low="6" high="31" shr="6"/>
106	</reg32>
107	<reg32 offset="9" name="9">
108		<bitfield name="MIN_LOD_CLAMP" low="19" high="30" type="ufixed" radix="8"/>
109		<!-- For multiplanar, this overlaps other fields: -->
110		<bitfield name="BASE_V_HI" low="0" high="16"/>
111		<bitfield name="UV_PITCH" low="17" high="26"/> <!-- PLANE_PITCH -->
112	</reg32>
113	<reg32 offset="10" name="10"/>
114	<reg32 offset="11" name="11"/>
115	<reg32 offset="12" name="12"/>
116	<reg32 offset="13" name="13"/>
117	<reg32 offset="14" name="14"/>
118	<reg32 offset="15" name="15"/>
119</domain>
120
121</database>
122