1*e1341f91SRob Clark /* SPDX-License-Identifier: GPL-2.0-only */ 2*e1341f91SRob Clark /* Copyright (C) 2020 Google, Inc */ 3*e1341f91SRob Clark 4*e1341f91SRob Clark #ifndef __MSM_GEM_SYNCOBJ_H__ 5*e1341f91SRob Clark #define __MSM_GEM_SYNCOBJ_H__ 6*e1341f91SRob Clark 7*e1341f91SRob Clark #include "drm/drm_device.h" 8*e1341f91SRob Clark #include "drm/drm_syncobj.h" 9*e1341f91SRob Clark #include "drm/gpu_scheduler.h" 10*e1341f91SRob Clark 11*e1341f91SRob Clark struct msm_syncobj_post_dep { 12*e1341f91SRob Clark struct drm_syncobj *syncobj; 13*e1341f91SRob Clark uint64_t point; 14*e1341f91SRob Clark struct dma_fence_chain *chain; 15*e1341f91SRob Clark }; 16*e1341f91SRob Clark 17*e1341f91SRob Clark struct drm_syncobj ** 18*e1341f91SRob Clark msm_syncobj_parse_deps(struct drm_device *dev, 19*e1341f91SRob Clark struct drm_sched_job *job, 20*e1341f91SRob Clark struct drm_file *file, 21*e1341f91SRob Clark uint64_t in_syncobjs_addr, 22*e1341f91SRob Clark uint32_t nr_in_syncobjs, 23*e1341f91SRob Clark size_t syncobj_stride); 24*e1341f91SRob Clark 25*e1341f91SRob Clark void msm_syncobj_reset(struct drm_syncobj **syncobjs, uint32_t nr_syncobjs); 26*e1341f91SRob Clark 27*e1341f91SRob Clark struct msm_syncobj_post_dep * 28*e1341f91SRob Clark msm_syncobj_parse_post_deps(struct drm_device *dev, 29*e1341f91SRob Clark struct drm_file *file, 30*e1341f91SRob Clark uint64_t syncobjs_addr, 31*e1341f91SRob Clark uint32_t nr_syncobjs, 32*e1341f91SRob Clark size_t syncobj_stride); 33*e1341f91SRob Clark 34*e1341f91SRob Clark void msm_syncobj_process_post_deps(struct msm_syncobj_post_dep *post_deps, 35*e1341f91SRob Clark uint32_t count, struct dma_fence *fence); 36*e1341f91SRob Clark 37*e1341f91SRob Clark #endif /* __MSM_GEM_SYNCOBJ_H__ */ 38