xref: /linux/drivers/gpu/drm/msm/msm_syncobj.h (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (C) 2020 Google, Inc */
3 
4 #ifndef __MSM_GEM_SYNCOBJ_H__
5 #define __MSM_GEM_SYNCOBJ_H__
6 
7 #include "drm/drm_device.h"
8 #include "drm/drm_syncobj.h"
9 #include "drm/gpu_scheduler.h"
10 
11 struct msm_syncobj_post_dep {
12 	struct drm_syncobj *syncobj;
13 	uint64_t point;
14 	struct dma_fence_chain *chain;
15 };
16 
17 struct drm_syncobj **
18 msm_syncobj_parse_deps(struct drm_device *dev,
19 		       struct drm_sched_job *job,
20 		       struct drm_file *file,
21 		       uint64_t in_syncobjs_addr,
22 		       uint32_t nr_in_syncobjs,
23 		       size_t syncobj_stride);
24 
25 void msm_syncobj_reset(struct drm_syncobj **syncobjs, uint32_t nr_syncobjs);
26 
27 struct msm_syncobj_post_dep *
28 msm_syncobj_parse_post_deps(struct drm_device *dev,
29 			    struct drm_file *file,
30 			    uint64_t syncobjs_addr,
31 			    uint32_t nr_syncobjs,
32 			    size_t syncobj_stride);
33 
34 void msm_syncobj_process_post_deps(struct msm_syncobj_post_dep *post_deps,
35 				   uint32_t count, struct dma_fence *fence);
36 
37 #endif /* __MSM_GEM_SYNCOBJ_H__ */
38