1c8afe684SRob Clark 2c8afe684SRob Clarkconfig DRM_MSM 3c8afe684SRob Clark tristate "MSM DRM" 4c8afe684SRob Clark depends on DRM 5fb27b8f2SRob Clark depends on ARCH_QCOM || (ARM && COMPILE_TEST) 640039904SArnd Bergmann depends on OF && COMMON_CLK 7b7bbd640SRob Clark select REGULATOR 8c8afe684SRob Clark select DRM_KMS_HELPER 93e87599bSRob Clark select DRM_PANEL 10c8afe684SRob Clark select SHMEM 11c8afe684SRob Clark select TMPFS 12c6a57a50Sjilai wang select QCOM_SCM 13f1427016SSrinivas Kandagatla select SND_SOC_HDMI_CODEC if SND_SOC 14*f0a42bb5SRob Clark select SYNC_FILE 15c8afe684SRob Clark default y 16c8afe684SRob Clark help 17c8afe684SRob Clark DRM/KMS driver for MSM/snapdragon. 18c8afe684SRob Clark 19c8afe684SRob Clarkconfig DRM_MSM_REGISTER_LOGGING 20c8afe684SRob Clark bool "MSM DRM register logging" 21c8afe684SRob Clark depends on DRM_MSM 22c8afe684SRob Clark default n 23c8afe684SRob Clark help 24c8afe684SRob Clark Compile in support for logging register reads/writes in a format 25c8afe684SRob Clark that can be parsed by envytools demsm tool. If enabled, register 26c8afe684SRob Clark logging can be switched on via msm.reglog=y module param. 27a689554bSHai Li 28feb46f02SRob Clarkconfig DRM_MSM_HDMI_HDCP 29feb46f02SRob Clark bool "Enable HDMI HDCP support in MSM DRM driver" 30feb46f02SRob Clark depends on DRM_MSM && QCOM_SCM 31feb46f02SRob Clark default y 32feb46f02SRob Clark help 33feb46f02SRob Clark Choose this option to enable HDCP state machine 34feb46f02SRob Clark 35a689554bSHai Liconfig DRM_MSM_DSI 36a689554bSHai Li bool "Enable DSI support in MSM DRM driver" 37a689554bSHai Li depends on DRM_MSM 38a689554bSHai Li select DRM_PANEL 39a689554bSHai Li select DRM_MIPI_DSI 40a689554bSHai Li default y 41a689554bSHai Li help 42a689554bSHai Li Choose this option if you have a need for MIPI DSI connector 43a689554bSHai Li support. 44a689554bSHai Li 45825637b9SHai Liconfig DRM_MSM_DSI_PLL 46825637b9SHai Li bool "Enable DSI PLL driver in MSM DRM" 47825637b9SHai Li depends on DRM_MSM_DSI && COMMON_CLK 48825637b9SHai Li default y 49825637b9SHai Li help 50825637b9SHai Li Choose this option to enable DSI PLL driver which provides DSI 51825637b9SHai Li source clocks under common clock framework. 521bf4d7c5SHai Li 531bf4d7c5SHai Liconfig DRM_MSM_DSI_28NM_PHY 541bf4d7c5SHai Li bool "Enable DSI 28nm PHY driver in MSM DRM" 551bf4d7c5SHai Li depends on DRM_MSM_DSI 561bf4d7c5SHai Li default y 571bf4d7c5SHai Li help 581bf4d7c5SHai Li Choose this option if the 28nm DSI PHY is used on the platform. 591bf4d7c5SHai Li 601bf4d7c5SHai Liconfig DRM_MSM_DSI_20NM_PHY 611bf4d7c5SHai Li bool "Enable DSI 20nm PHY driver in MSM DRM" 621bf4d7c5SHai Li depends on DRM_MSM_DSI 631bf4d7c5SHai Li default y 641bf4d7c5SHai Li help 651bf4d7c5SHai Li Choose this option if the 20nm DSI PHY is used on the platform. 66225380b3SArchit Taneja 67225380b3SArchit Tanejaconfig DRM_MSM_DSI_28NM_8960_PHY 68225380b3SArchit Taneja bool "Enable DSI 28nm 8960 PHY driver in MSM DRM" 69225380b3SArchit Taneja depends on DRM_MSM_DSI 70225380b3SArchit Taneja default y 71225380b3SArchit Taneja help 72225380b3SArchit Taneja Choose this option if the 28nm DSI PHY 8960 variant is used on the 73225380b3SArchit Taneja platform. 74