1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 * Copyright (C) 2014 Endless Mobile 6 * 7 * Written by: 8 * Jasper St. Pierre <jstpierre@mecheye.net> 9 */ 10 11 #include <linux/component.h> 12 #include <linux/module.h> 13 #include <linux/of_graph.h> 14 #include <linux/platform_device.h> 15 #include <linux/soc/amlogic/meson-canvas.h> 16 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fb_helper.h> 20 #include <drm/drm_gem_cma_helper.h> 21 #include <drm/drm_gem_framebuffer_helper.h> 22 #include <drm/drm_irq.h> 23 #include <drm/drm_modeset_helper_vtables.h> 24 #include <drm/drm_probe_helper.h> 25 #include <drm/drm_vblank.h> 26 27 #include "meson_crtc.h" 28 #include "meson_drv.h" 29 #include "meson_overlay.h" 30 #include "meson_plane.h" 31 #include "meson_registers.h" 32 #include "meson_venc_cvbs.h" 33 #include "meson_viu.h" 34 #include "meson_vpp.h" 35 36 #define DRIVER_NAME "meson" 37 #define DRIVER_DESC "Amlogic Meson DRM driver" 38 39 /** 40 * DOC: Video Processing Unit 41 * 42 * VPU Handles the Global Video Processing, it includes management of the 43 * clocks gates, blocks reset lines and power domains. 44 * 45 * What is missing : 46 * 47 * - Full reset of entire video processing HW blocks 48 * - Scaling and setup of the VPU clock 49 * - Bus clock gates 50 * - Powering up video processing HW blocks 51 * - Powering Up HDMI controller and PHY 52 */ 53 54 static const struct drm_mode_config_funcs meson_mode_config_funcs = { 55 .atomic_check = drm_atomic_helper_check, 56 .atomic_commit = drm_atomic_helper_commit, 57 .fb_create = drm_gem_fb_create, 58 }; 59 60 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = { 61 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, 62 }; 63 64 static irqreturn_t meson_irq(int irq, void *arg) 65 { 66 struct drm_device *dev = arg; 67 struct meson_drm *priv = dev->dev_private; 68 69 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG)); 70 71 meson_crtc_irq(priv); 72 73 return IRQ_HANDLED; 74 } 75 76 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev, 77 struct drm_mode_create_dumb *args) 78 { 79 /* 80 * We need 64bytes aligned stride, and PAGE aligned size 81 */ 82 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64); 83 args->size = PAGE_ALIGN(args->pitch * args->height); 84 85 return drm_gem_cma_dumb_create_internal(file, dev, args); 86 } 87 88 DEFINE_DRM_GEM_CMA_FOPS(fops); 89 90 static struct drm_driver meson_driver = { 91 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 92 93 /* IRQ */ 94 .irq_handler = meson_irq, 95 96 /* PRIME Ops */ 97 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 98 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 99 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 100 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 101 .gem_prime_vmap = drm_gem_cma_prime_vmap, 102 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 103 .gem_prime_mmap = drm_gem_cma_prime_mmap, 104 105 /* GEM Ops */ 106 .dumb_create = meson_dumb_create, 107 .gem_free_object_unlocked = drm_gem_cma_free_object, 108 .gem_vm_ops = &drm_gem_cma_vm_ops, 109 110 /* Misc */ 111 .fops = &fops, 112 .name = DRIVER_NAME, 113 .desc = DRIVER_DESC, 114 .date = "20161109", 115 .major = 1, 116 .minor = 0, 117 }; 118 119 static bool meson_vpu_has_available_connectors(struct device *dev) 120 { 121 struct device_node *ep, *remote; 122 123 /* Parses each endpoint and check if remote exists */ 124 for_each_endpoint_of_node(dev->of_node, ep) { 125 /* If the endpoint node exists, consider it enabled */ 126 remote = of_graph_get_remote_port(ep); 127 if (remote) 128 return true; 129 } 130 131 return false; 132 } 133 134 static struct regmap_config meson_regmap_config = { 135 .reg_bits = 32, 136 .val_bits = 32, 137 .reg_stride = 4, 138 .max_register = 0x1000, 139 }; 140 141 static void meson_vpu_init(struct meson_drm *priv) 142 { 143 u32 value; 144 145 /* 146 * Slave dc0 and dc5 connected to master port 1. 147 * By default other slaves are connected to master port 0. 148 */ 149 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) | 150 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1); 151 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); 152 153 /* Slave dc0 connected to master port 1 */ 154 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1); 155 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); 156 157 /* Slave dc4 and dc7 connected to master port 1 */ 158 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) | 159 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1); 160 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); 161 162 /* Slave dc1 connected to master port 1 */ 163 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1); 164 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); 165 } 166 167 static void meson_remove_framebuffers(void) 168 { 169 struct apertures_struct *ap; 170 171 ap = alloc_apertures(1); 172 if (!ap) 173 return; 174 175 /* The framebuffer can be located anywhere in RAM */ 176 ap->ranges[0].base = 0; 177 ap->ranges[0].size = ~0; 178 179 drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb", 180 false); 181 kfree(ap); 182 } 183 184 static int meson_drv_bind_master(struct device *dev, bool has_components) 185 { 186 struct platform_device *pdev = to_platform_device(dev); 187 struct meson_drm *priv; 188 struct drm_device *drm; 189 struct resource *res; 190 void __iomem *regs; 191 int ret; 192 193 /* Checks if an output connector is available */ 194 if (!meson_vpu_has_available_connectors(dev)) { 195 dev_err(dev, "No output connector available\n"); 196 return -ENODEV; 197 } 198 199 drm = drm_dev_alloc(&meson_driver, dev); 200 if (IS_ERR(drm)) 201 return PTR_ERR(drm); 202 203 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 204 if (!priv) { 205 ret = -ENOMEM; 206 goto free_drm; 207 } 208 drm->dev_private = priv; 209 priv->drm = drm; 210 priv->dev = dev; 211 212 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu"); 213 regs = devm_ioremap_resource(dev, res); 214 if (IS_ERR(regs)) { 215 ret = PTR_ERR(regs); 216 goto free_drm; 217 } 218 219 priv->io_base = regs; 220 221 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); 222 if (!res) { 223 ret = -EINVAL; 224 goto free_drm; 225 } 226 /* Simply ioremap since it may be a shared register zone */ 227 regs = devm_ioremap(dev, res->start, resource_size(res)); 228 if (!regs) { 229 ret = -EADDRNOTAVAIL; 230 goto free_drm; 231 } 232 233 priv->hhi = devm_regmap_init_mmio(dev, regs, 234 &meson_regmap_config); 235 if (IS_ERR(priv->hhi)) { 236 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); 237 ret = PTR_ERR(priv->hhi); 238 goto free_drm; 239 } 240 241 priv->canvas = meson_canvas_get(dev); 242 if (IS_ERR(priv->canvas)) { 243 ret = PTR_ERR(priv->canvas); 244 goto free_drm; 245 } 246 247 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); 248 if (ret) 249 goto free_drm; 250 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); 251 if (ret) { 252 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 253 goto free_drm; 254 } 255 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); 256 if (ret) { 257 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 258 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 259 goto free_drm; 260 } 261 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); 262 if (ret) { 263 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 264 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 265 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 266 goto free_drm; 267 } 268 269 priv->vsync_irq = platform_get_irq(pdev, 0); 270 271 ret = drm_vblank_init(drm, 1); 272 if (ret) 273 goto free_drm; 274 275 /* Remove early framebuffers (ie. simplefb) */ 276 meson_remove_framebuffers(); 277 278 drm_mode_config_init(drm); 279 drm->mode_config.max_width = 3840; 280 drm->mode_config.max_height = 2160; 281 drm->mode_config.funcs = &meson_mode_config_funcs; 282 drm->mode_config.helper_private = &meson_mode_config_helpers; 283 284 /* Hardware Initialization */ 285 286 meson_vpu_init(priv); 287 meson_venc_init(priv); 288 meson_vpp_init(priv); 289 meson_viu_init(priv); 290 291 /* Encoder Initialization */ 292 293 ret = meson_venc_cvbs_create(priv); 294 if (ret) 295 goto free_drm; 296 297 if (has_components) { 298 ret = component_bind_all(drm->dev, drm); 299 if (ret) { 300 dev_err(drm->dev, "Couldn't bind all components\n"); 301 goto free_drm; 302 } 303 } 304 305 ret = meson_plane_create(priv); 306 if (ret) 307 goto free_drm; 308 309 ret = meson_overlay_create(priv); 310 if (ret) 311 goto free_drm; 312 313 ret = meson_crtc_create(priv); 314 if (ret) 315 goto free_drm; 316 317 ret = drm_irq_install(drm, priv->vsync_irq); 318 if (ret) 319 goto free_drm; 320 321 drm_mode_config_reset(drm); 322 323 drm_kms_helper_poll_init(drm); 324 325 platform_set_drvdata(pdev, priv); 326 327 ret = drm_dev_register(drm, 0); 328 if (ret) 329 goto uninstall_irq; 330 331 drm_fbdev_generic_setup(drm, 32); 332 333 return 0; 334 335 uninstall_irq: 336 drm_irq_uninstall(drm); 337 free_drm: 338 drm_dev_put(drm); 339 340 return ret; 341 } 342 343 static int meson_drv_bind(struct device *dev) 344 { 345 return meson_drv_bind_master(dev, true); 346 } 347 348 static void meson_drv_unbind(struct device *dev) 349 { 350 struct meson_drm *priv = dev_get_drvdata(dev); 351 struct drm_device *drm = priv->drm; 352 353 if (priv->canvas) { 354 meson_canvas_free(priv->canvas, priv->canvas_id_osd1); 355 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); 356 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); 357 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); 358 } 359 360 drm_dev_unregister(drm); 361 drm_irq_uninstall(drm); 362 drm_kms_helper_poll_fini(drm); 363 drm_mode_config_cleanup(drm); 364 drm_dev_put(drm); 365 366 } 367 368 static const struct component_master_ops meson_drv_master_ops = { 369 .bind = meson_drv_bind, 370 .unbind = meson_drv_unbind, 371 }; 372 373 static int compare_of(struct device *dev, void *data) 374 { 375 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n", 376 dev->of_node, data); 377 378 return dev->of_node == data; 379 } 380 381 /* Possible connectors nodes to ignore */ 382 static const struct of_device_id connectors_match[] = { 383 { .compatible = "composite-video-connector" }, 384 { .compatible = "svideo-connector" }, 385 { .compatible = "hdmi-connector" }, 386 { .compatible = "dvi-connector" }, 387 {} 388 }; 389 390 static int meson_probe_remote(struct platform_device *pdev, 391 struct component_match **match, 392 struct device_node *parent, 393 struct device_node *remote) 394 { 395 struct device_node *ep, *remote_node; 396 int count = 1; 397 398 /* If node is a connector, return and do not add to match table */ 399 if (of_match_node(connectors_match, remote)) 400 return 1; 401 402 component_match_add(&pdev->dev, match, compare_of, remote); 403 404 for_each_endpoint_of_node(remote, ep) { 405 remote_node = of_graph_get_remote_port_parent(ep); 406 if (!remote_node || 407 remote_node == parent || /* Ignore parent endpoint */ 408 !of_device_is_available(remote_node)) { 409 of_node_put(remote_node); 410 continue; 411 } 412 413 count += meson_probe_remote(pdev, match, remote, remote_node); 414 415 of_node_put(remote_node); 416 } 417 418 return count; 419 } 420 421 static int meson_drv_probe(struct platform_device *pdev) 422 { 423 struct component_match *match = NULL; 424 struct device_node *np = pdev->dev.of_node; 425 struct device_node *ep, *remote; 426 int count = 0; 427 428 for_each_endpoint_of_node(np, ep) { 429 remote = of_graph_get_remote_port_parent(ep); 430 if (!remote || !of_device_is_available(remote)) { 431 of_node_put(remote); 432 continue; 433 } 434 435 count += meson_probe_remote(pdev, &match, np, remote); 436 of_node_put(remote); 437 } 438 439 if (count && !match) 440 return meson_drv_bind_master(&pdev->dev, false); 441 442 /* If some endpoints were found, initialize the nodes */ 443 if (count) { 444 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); 445 446 return component_master_add_with_match(&pdev->dev, 447 &meson_drv_master_ops, 448 match); 449 } 450 451 /* If no output endpoints were available, simply bail out */ 452 return 0; 453 }; 454 455 static const struct of_device_id dt_match[] = { 456 { .compatible = "amlogic,meson-gxbb-vpu" }, 457 { .compatible = "amlogic,meson-gxl-vpu" }, 458 { .compatible = "amlogic,meson-gxm-vpu" }, 459 { .compatible = "amlogic,meson-g12a-vpu" }, 460 {} 461 }; 462 MODULE_DEVICE_TABLE(of, dt_match); 463 464 static struct platform_driver meson_drm_platform_driver = { 465 .probe = meson_drv_probe, 466 .driver = { 467 .name = "meson-drm", 468 .of_match_table = dt_match, 469 }, 470 }; 471 472 module_platform_driver(meson_drm_platform_driver); 473 474 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>"); 475 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); 476 MODULE_DESCRIPTION(DRIVER_DESC); 477 MODULE_LICENSE("GPL"); 478