xref: /linux/drivers/gpu/drm/lima/lima_l2_cache.c (revision b7e1e969c887c897947fdc3754fe9b0c24acb155)
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
3 
4 #include <linux/iopoll.h>
5 #include <linux/device.h>
6 
7 #include "lima_device.h"
8 #include "lima_l2_cache.h"
9 #include "lima_regs.h"
10 
11 #define l2_cache_write(reg, data) writel(data, ip->iomem + reg)
12 #define l2_cache_read(reg) readl(ip->iomem + reg)
13 
lima_l2_cache_wait_idle(struct lima_ip * ip)14 static int lima_l2_cache_wait_idle(struct lima_ip *ip)
15 {
16 	struct lima_device *dev = ip->dev;
17 	int err;
18 	u32 v;
19 
20 	err = readl_poll_timeout(ip->iomem + LIMA_L2_CACHE_STATUS, v,
21 				 !(v & LIMA_L2_CACHE_STATUS_COMMAND_BUSY),
22 				 0, 1000);
23 	if (err) {
24 		dev_err(dev->dev, "%s wait command timeout\n",
25 			lima_ip_name(ip));
26 		return err;
27 	}
28 	return 0;
29 }
30 
lima_l2_cache_flush(struct lima_ip * ip)31 int lima_l2_cache_flush(struct lima_ip *ip)
32 {
33 	int ret;
34 
35 	spin_lock(&ip->data.lock);
36 	l2_cache_write(LIMA_L2_CACHE_COMMAND, LIMA_L2_CACHE_COMMAND_CLEAR_ALL);
37 	ret = lima_l2_cache_wait_idle(ip);
38 	spin_unlock(&ip->data.lock);
39 	return ret;
40 }
41 
lima_l2_cache_hw_init(struct lima_ip * ip)42 static int lima_l2_cache_hw_init(struct lima_ip *ip)
43 {
44 	int err;
45 
46 	err = lima_l2_cache_flush(ip);
47 	if (err)
48 		return err;
49 
50 	l2_cache_write(LIMA_L2_CACHE_ENABLE,
51 		       LIMA_L2_CACHE_ENABLE_ACCESS |
52 		       LIMA_L2_CACHE_ENABLE_READ_ALLOCATE);
53 	l2_cache_write(LIMA_L2_CACHE_MAX_READS, 0x1c);
54 
55 	return 0;
56 }
57 
lima_l2_cache_resume(struct lima_ip * ip)58 int lima_l2_cache_resume(struct lima_ip *ip)
59 {
60 	return lima_l2_cache_hw_init(ip);
61 }
62 
lima_l2_cache_suspend(struct lima_ip * ip)63 void lima_l2_cache_suspend(struct lima_ip *ip)
64 {
65 
66 }
67 
lima_l2_cache_init(struct lima_ip * ip)68 int lima_l2_cache_init(struct lima_ip *ip)
69 {
70 	int i;
71 	u32 size;
72 	struct lima_device *dev = ip->dev;
73 
74 	/* l2_cache2 only exists when one of PP4-7 present */
75 	if (ip->id == lima_ip_l2_cache2) {
76 		for (i = lima_ip_pp4; i <= lima_ip_pp7; i++) {
77 			if (dev->ip[i].present)
78 				break;
79 		}
80 		if (i > lima_ip_pp7)
81 			return -ENODEV;
82 	}
83 
84 	spin_lock_init(&ip->data.lock);
85 
86 	size = l2_cache_read(LIMA_L2_CACHE_SIZE);
87 	dev_info(dev->dev, "%s %uK, %u-way, %ubyte cache line, %ubit external bus\n",
88 		 lima_ip_name(ip),
89 		 1 << (((size >> 16) & 0xff) - 10),
90 		 1 << ((size >> 8) & 0xff),
91 		 1 << (size & 0xff),
92 		 1 << ((size >> 24) & 0xff));
93 
94 	return lima_l2_cache_hw_init(ip);
95 }
96 
lima_l2_cache_fini(struct lima_ip * ip)97 void lima_l2_cache_fini(struct lima_ip *ip)
98 {
99 
100 }
101