1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 28 #include <linux/i2c.h> 29 #include <linux/slab.h> 30 31 #include <drm/drm_atomic_helper.h> 32 #include <drm/drm_crtc.h> 33 34 #include "i915_drv.h" 35 #include "i915_reg.h" 36 #include "intel_connector.h" 37 #include "intel_de.h" 38 #include "intel_display_driver.h" 39 #include "intel_display_types.h" 40 #include "intel_dvo.h" 41 #include "intel_dvo_dev.h" 42 #include "intel_dvo_regs.h" 43 #include "intel_gmbus.h" 44 #include "intel_panel.h" 45 46 #define INTEL_DVO_CHIP_NONE 0 47 #define INTEL_DVO_CHIP_LVDS 1 48 #define INTEL_DVO_CHIP_TMDS 2 49 #define INTEL_DVO_CHIP_TVOUT 4 50 #define INTEL_DVO_CHIP_LVDS_NO_FIXED 5 51 52 #define SIL164_ADDR 0x38 53 #define CH7xxx_ADDR 0x76 54 #define TFP410_ADDR 0x38 55 #define NS2501_ADDR 0x38 56 57 static const struct intel_dvo_device intel_dvo_devices[] = { 58 { 59 .type = INTEL_DVO_CHIP_TMDS, 60 .name = "sil164", 61 .port = PORT_C, 62 .slave_addr = SIL164_ADDR, 63 .dev_ops = &sil164_ops, 64 }, 65 { 66 .type = INTEL_DVO_CHIP_TMDS, 67 .name = "ch7xxx", 68 .port = PORT_C, 69 .slave_addr = CH7xxx_ADDR, 70 .dev_ops = &ch7xxx_ops, 71 }, 72 { 73 .type = INTEL_DVO_CHIP_TMDS, 74 .name = "ch7xxx", 75 .port = PORT_C, 76 .slave_addr = 0x75, /* For some ch7010 */ 77 .dev_ops = &ch7xxx_ops, 78 }, 79 { 80 .type = INTEL_DVO_CHIP_LVDS, 81 .name = "ivch", 82 .port = PORT_A, 83 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 84 .dev_ops = &ivch_ops, 85 }, 86 { 87 .type = INTEL_DVO_CHIP_TMDS, 88 .name = "tfp410", 89 .port = PORT_C, 90 .slave_addr = TFP410_ADDR, 91 .dev_ops = &tfp410_ops, 92 }, 93 { 94 .type = INTEL_DVO_CHIP_LVDS, 95 .name = "ch7017", 96 .port = PORT_C, 97 .slave_addr = 0x75, 98 .gpio = GMBUS_PIN_DPB, 99 .dev_ops = &ch7017_ops, 100 }, 101 { 102 .type = INTEL_DVO_CHIP_LVDS_NO_FIXED, 103 .name = "ns2501", 104 .port = PORT_B, 105 .slave_addr = NS2501_ADDR, 106 .dev_ops = &ns2501_ops, 107 }, 108 }; 109 110 struct intel_dvo { 111 struct intel_encoder base; 112 113 struct intel_dvo_device dev; 114 115 struct intel_connector *attached_connector; 116 }; 117 118 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 119 { 120 return container_of(encoder, struct intel_dvo, base); 121 } 122 123 static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector) 124 { 125 return enc_to_dvo(intel_attached_encoder(connector)); 126 } 127 128 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 129 { 130 struct drm_i915_private *i915 = to_i915(connector->base.dev); 131 struct intel_encoder *encoder = intel_attached_encoder(connector); 132 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 133 enum port port = encoder->port; 134 u32 tmp; 135 136 tmp = intel_de_read(i915, DVO(port)); 137 138 if (!(tmp & DVO_ENABLE)) 139 return false; 140 141 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 142 } 143 144 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 145 enum pipe *pipe) 146 { 147 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 148 enum port port = encoder->port; 149 u32 tmp; 150 151 tmp = intel_de_read(i915, DVO(port)); 152 153 *pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp); 154 155 return tmp & DVO_ENABLE; 156 } 157 158 static void intel_dvo_get_config(struct intel_encoder *encoder, 159 struct intel_crtc_state *pipe_config) 160 { 161 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 162 enum port port = encoder->port; 163 u32 tmp, flags = 0; 164 165 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); 166 167 tmp = intel_de_read(i915, DVO(port)); 168 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 169 flags |= DRM_MODE_FLAG_PHSYNC; 170 else 171 flags |= DRM_MODE_FLAG_NHSYNC; 172 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 173 flags |= DRM_MODE_FLAG_PVSYNC; 174 else 175 flags |= DRM_MODE_FLAG_NVSYNC; 176 177 pipe_config->hw.adjusted_mode.flags |= flags; 178 179 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; 180 } 181 182 static void intel_disable_dvo(struct intel_atomic_state *state, 183 struct intel_encoder *encoder, 184 const struct intel_crtc_state *old_crtc_state, 185 const struct drm_connector_state *old_conn_state) 186 { 187 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 188 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 189 enum port port = encoder->port; 190 191 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 192 193 intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0); 194 intel_de_posting_read(i915, DVO(port)); 195 } 196 197 static void intel_enable_dvo(struct intel_atomic_state *state, 198 struct intel_encoder *encoder, 199 const struct intel_crtc_state *pipe_config, 200 const struct drm_connector_state *conn_state) 201 { 202 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 203 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 204 enum port port = encoder->port; 205 206 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 207 &pipe_config->hw.mode, 208 &pipe_config->hw.adjusted_mode); 209 210 intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE); 211 intel_de_posting_read(i915, DVO(port)); 212 213 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 214 } 215 216 static enum drm_mode_status 217 intel_dvo_mode_valid(struct drm_connector *_connector, 218 struct drm_display_mode *mode) 219 { 220 struct intel_connector *connector = to_intel_connector(_connector); 221 struct drm_i915_private *i915 = to_i915(connector->base.dev); 222 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 223 const struct drm_display_mode *fixed_mode = 224 intel_panel_fixed_mode(connector, mode); 225 int max_dotclk = to_i915(connector->base.dev)->max_dotclk_freq; 226 int target_clock = mode->clock; 227 enum drm_mode_status status; 228 229 status = intel_cpu_transcoder_mode_valid(i915, mode); 230 if (status != MODE_OK) 231 return status; 232 233 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 234 return MODE_NO_DBLESCAN; 235 236 /* XXX: Validate clock range */ 237 238 if (fixed_mode) { 239 enum drm_mode_status status; 240 241 status = intel_panel_mode_valid(connector, mode); 242 if (status != MODE_OK) 243 return status; 244 245 target_clock = fixed_mode->clock; 246 } 247 248 if (target_clock > max_dotclk) 249 return MODE_CLOCK_HIGH; 250 251 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 252 } 253 254 static int intel_dvo_compute_config(struct intel_encoder *encoder, 255 struct intel_crtc_state *pipe_config, 256 struct drm_connector_state *conn_state) 257 { 258 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 259 struct intel_connector *connector = to_intel_connector(conn_state->connector); 260 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 261 const struct drm_display_mode *fixed_mode = 262 intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode); 263 264 /* 265 * If we have timings from the BIOS for the panel, put them in 266 * to the adjusted mode. The CRTC will be set up for this mode, 267 * with the panel scaling set up to source from the H/VDisplay 268 * of the original mode. 269 */ 270 if (fixed_mode) { 271 int ret; 272 273 ret = intel_panel_compute_config(connector, adjusted_mode); 274 if (ret) 275 return ret; 276 } 277 278 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 279 return -EINVAL; 280 281 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; 282 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 283 284 return 0; 285 } 286 287 static void intel_dvo_pre_enable(struct intel_atomic_state *state, 288 struct intel_encoder *encoder, 289 const struct intel_crtc_state *pipe_config, 290 const struct drm_connector_state *conn_state) 291 { 292 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 293 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); 294 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 295 enum port port = encoder->port; 296 enum pipe pipe = crtc->pipe; 297 u32 dvo_val; 298 299 /* Save the active data order, since I don't know what it should be set to. */ 300 dvo_val = intel_de_read(i915, DVO(port)) & 301 (DVO_DEDICATED_INT_ENABLE | 302 DVO_PRESERVE_MASK | DVO_ACT_DATA_ORDER_MASK); 303 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 304 DVO_BLANK_ACTIVE_HIGH; 305 306 dvo_val |= DVO_PIPE_SEL(pipe); 307 dvo_val |= DVO_PIPE_STALL; 308 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 309 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 310 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 311 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 312 313 intel_de_write(i915, DVO_SRCDIM(port), 314 DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) | 315 DVO_SRCDIM_VERTICAL(adjusted_mode->crtc_vdisplay)); 316 intel_de_write(i915, DVO(port), dvo_val); 317 } 318 319 static enum drm_connector_status 320 intel_dvo_detect(struct drm_connector *_connector, bool force) 321 { 322 struct intel_connector *connector = to_intel_connector(_connector); 323 struct drm_i915_private *i915 = to_i915(connector->base.dev); 324 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 325 326 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n", 327 connector->base.base.id, connector->base.name); 328 329 if (!intel_display_device_enabled(i915)) 330 return connector_status_disconnected; 331 332 if (!intel_display_driver_check_access(i915)) 333 return connector->base.status; 334 335 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 336 } 337 338 static int intel_dvo_get_modes(struct drm_connector *_connector) 339 { 340 struct intel_connector *connector = to_intel_connector(_connector); 341 int num_modes; 342 343 /* 344 * We should probably have an i2c driver get_modes function for those 345 * devices which will have a fixed set of modes determined by the chip 346 * (TV-out, for example), but for now with just TMDS and LVDS, 347 * that's not the case. 348 */ 349 num_modes = intel_ddc_get_modes(&connector->base, connector->base.ddc); 350 if (num_modes) 351 return num_modes; 352 353 return intel_panel_get_modes(connector); 354 } 355 356 static const struct drm_connector_funcs intel_dvo_connector_funcs = { 357 .detect = intel_dvo_detect, 358 .late_register = intel_connector_register, 359 .early_unregister = intel_connector_unregister, 360 .destroy = intel_connector_destroy, 361 .fill_modes = drm_helper_probe_single_connector_modes, 362 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 363 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 364 }; 365 366 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 367 .mode_valid = intel_dvo_mode_valid, 368 .get_modes = intel_dvo_get_modes, 369 }; 370 371 static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 372 { 373 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 374 375 if (intel_dvo->dev.dev_ops->destroy) 376 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 377 378 intel_encoder_destroy(encoder); 379 } 380 381 static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 382 .destroy = intel_dvo_enc_destroy, 383 }; 384 385 static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo) 386 { 387 switch (dvo->type) { 388 case INTEL_DVO_CHIP_TMDS: 389 return DRM_MODE_ENCODER_TMDS; 390 case INTEL_DVO_CHIP_LVDS_NO_FIXED: 391 case INTEL_DVO_CHIP_LVDS: 392 return DRM_MODE_ENCODER_LVDS; 393 default: 394 MISSING_CASE(dvo->type); 395 return DRM_MODE_ENCODER_NONE; 396 } 397 } 398 399 static int intel_dvo_connector_type(const struct intel_dvo_device *dvo) 400 { 401 switch (dvo->type) { 402 case INTEL_DVO_CHIP_TMDS: 403 return DRM_MODE_CONNECTOR_DVII; 404 case INTEL_DVO_CHIP_LVDS_NO_FIXED: 405 case INTEL_DVO_CHIP_LVDS: 406 return DRM_MODE_CONNECTOR_LVDS; 407 default: 408 MISSING_CASE(dvo->type); 409 return DRM_MODE_CONNECTOR_Unknown; 410 } 411 } 412 413 static bool intel_dvo_init_dev(struct drm_i915_private *dev_priv, 414 struct intel_dvo *intel_dvo, 415 const struct intel_dvo_device *dvo) 416 { 417 struct i2c_adapter *i2c; 418 u32 dpll[I915_MAX_PIPES]; 419 enum pipe pipe; 420 int gpio; 421 bool ret; 422 423 /* 424 * Allow the I2C driver info to specify the GPIO to be used in 425 * special cases, but otherwise default to what's defined 426 * in the spec. 427 */ 428 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio)) 429 gpio = dvo->gpio; 430 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 431 gpio = GMBUS_PIN_SSC; 432 else 433 gpio = GMBUS_PIN_DPB; 434 435 /* 436 * Set up the I2C bus necessary for the chip we're probing. 437 * It appears that everything is on GPIOE except for panels 438 * on i830 laptops, which are on GPIOB (DVOA). 439 */ 440 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 441 442 intel_dvo->dev = *dvo; 443 444 /* 445 * GMBUS NAK handling seems to be unstable, hence let the 446 * transmitter detection run in bit banging mode for now. 447 */ 448 intel_gmbus_force_bit(i2c, true); 449 450 /* 451 * ns2501 requires the DVO 2x clock before it will 452 * respond to i2c accesses, so make sure we have 453 * the clock enabled before we attempt to initialize 454 * the device. 455 */ 456 for_each_pipe(dev_priv, pipe) 457 dpll[pipe] = intel_de_rmw(dev_priv, DPLL(pipe), 0, DPLL_DVO_2X_MODE); 458 459 ret = dvo->dev_ops->init(&intel_dvo->dev, i2c); 460 461 /* restore the DVO 2x clock state to original */ 462 for_each_pipe(dev_priv, pipe) { 463 intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]); 464 } 465 466 intel_gmbus_force_bit(i2c, false); 467 468 return ret; 469 } 470 471 static bool intel_dvo_probe(struct drm_i915_private *i915, 472 struct intel_dvo *intel_dvo) 473 { 474 int i; 475 476 /* Now, try to find a controller */ 477 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 478 if (intel_dvo_init_dev(i915, intel_dvo, 479 &intel_dvo_devices[i])) 480 return true; 481 } 482 483 return false; 484 } 485 486 void intel_dvo_init(struct drm_i915_private *i915) 487 { 488 struct intel_connector *connector; 489 struct intel_encoder *encoder; 490 struct intel_dvo *intel_dvo; 491 492 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 493 if (!intel_dvo) 494 return; 495 496 connector = intel_connector_alloc(); 497 if (!connector) { 498 kfree(intel_dvo); 499 return; 500 } 501 502 intel_dvo->attached_connector = connector; 503 504 encoder = &intel_dvo->base; 505 506 encoder->disable = intel_disable_dvo; 507 encoder->enable = intel_enable_dvo; 508 encoder->get_hw_state = intel_dvo_get_hw_state; 509 encoder->get_config = intel_dvo_get_config; 510 encoder->compute_config = intel_dvo_compute_config; 511 encoder->pre_enable = intel_dvo_pre_enable; 512 connector->get_hw_state = intel_dvo_connector_get_hw_state; 513 514 if (!intel_dvo_probe(i915, intel_dvo)) { 515 kfree(intel_dvo); 516 intel_connector_free(connector); 517 return; 518 } 519 520 assert_port_valid(i915, intel_dvo->dev.port); 521 522 encoder->type = INTEL_OUTPUT_DVO; 523 encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 524 encoder->port = intel_dvo->dev.port; 525 encoder->pipe_mask = ~0; 526 527 if (intel_dvo->dev.type != INTEL_DVO_CHIP_LVDS) 528 encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) | 529 BIT(INTEL_OUTPUT_DVO); 530 531 drm_encoder_init(&i915->drm, &encoder->base, 532 &intel_dvo_enc_funcs, 533 intel_dvo_encoder_type(&intel_dvo->dev), 534 "DVO %c", port_name(encoder->port)); 535 536 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] detected %s\n", 537 encoder->base.base.id, encoder->base.name, 538 intel_dvo->dev.name); 539 540 if (intel_dvo->dev.type == INTEL_DVO_CHIP_TMDS) 541 connector->polled = DRM_CONNECTOR_POLL_CONNECT | 542 DRM_CONNECTOR_POLL_DISCONNECT; 543 connector->base.polled = connector->polled; 544 545 drm_connector_init_with_ddc(&i915->drm, &connector->base, 546 &intel_dvo_connector_funcs, 547 intel_dvo_connector_type(&intel_dvo->dev), 548 intel_gmbus_get_adapter(i915, GMBUS_PIN_DPC)); 549 550 drm_connector_helper_add(&connector->base, 551 &intel_dvo_connector_helper_funcs); 552 connector->base.display_info.subpixel_order = SubPixelHorizontalRGB; 553 554 intel_connector_attach_encoder(connector, encoder); 555 556 if (intel_dvo->dev.type == INTEL_DVO_CHIP_LVDS) { 557 /* 558 * For our LVDS chipsets, we should hopefully be able 559 * to dig the fixed panel mode out of the BIOS data. 560 * However, it's in a different format from the BIOS 561 * data on chipsets with integrated LVDS (stored in AIM 562 * headers, likely), so for now, just get the current 563 * mode being output through DVO. 564 */ 565 intel_panel_add_encoder_fixed_mode(connector, encoder); 566 567 intel_panel_init(connector, NULL); 568 } 569 } 570