1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 */ 27 28 #include <linux/i2c.h> 29 #include <linux/slab.h> 30 31 #include <drm/drm_atomic_helper.h> 32 #include <drm/drm_crtc.h> 33 34 #include "i915_drv.h" 35 #include "i915_reg.h" 36 #include "intel_connector.h" 37 #include "intel_de.h" 38 #include "intel_display_types.h" 39 #include "intel_dvo.h" 40 #include "intel_dvo_dev.h" 41 #include "intel_dvo_regs.h" 42 #include "intel_gmbus.h" 43 #include "intel_panel.h" 44 45 #define INTEL_DVO_CHIP_NONE 0 46 #define INTEL_DVO_CHIP_LVDS 1 47 #define INTEL_DVO_CHIP_TMDS 2 48 #define INTEL_DVO_CHIP_TVOUT 4 49 #define INTEL_DVO_CHIP_LVDS_NO_FIXED 5 50 51 #define SIL164_ADDR 0x38 52 #define CH7xxx_ADDR 0x76 53 #define TFP410_ADDR 0x38 54 #define NS2501_ADDR 0x38 55 56 static const struct intel_dvo_device intel_dvo_devices[] = { 57 { 58 .type = INTEL_DVO_CHIP_TMDS, 59 .name = "sil164", 60 .port = PORT_C, 61 .slave_addr = SIL164_ADDR, 62 .dev_ops = &sil164_ops, 63 }, 64 { 65 .type = INTEL_DVO_CHIP_TMDS, 66 .name = "ch7xxx", 67 .port = PORT_C, 68 .slave_addr = CH7xxx_ADDR, 69 .dev_ops = &ch7xxx_ops, 70 }, 71 { 72 .type = INTEL_DVO_CHIP_TMDS, 73 .name = "ch7xxx", 74 .port = PORT_C, 75 .slave_addr = 0x75, /* For some ch7010 */ 76 .dev_ops = &ch7xxx_ops, 77 }, 78 { 79 .type = INTEL_DVO_CHIP_LVDS, 80 .name = "ivch", 81 .port = PORT_A, 82 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ 83 .dev_ops = &ivch_ops, 84 }, 85 { 86 .type = INTEL_DVO_CHIP_TMDS, 87 .name = "tfp410", 88 .port = PORT_C, 89 .slave_addr = TFP410_ADDR, 90 .dev_ops = &tfp410_ops, 91 }, 92 { 93 .type = INTEL_DVO_CHIP_LVDS, 94 .name = "ch7017", 95 .port = PORT_C, 96 .slave_addr = 0x75, 97 .gpio = GMBUS_PIN_DPB, 98 .dev_ops = &ch7017_ops, 99 }, 100 { 101 .type = INTEL_DVO_CHIP_LVDS_NO_FIXED, 102 .name = "ns2501", 103 .port = PORT_B, 104 .slave_addr = NS2501_ADDR, 105 .dev_ops = &ns2501_ops, 106 }, 107 }; 108 109 struct intel_dvo { 110 struct intel_encoder base; 111 112 struct intel_dvo_device dev; 113 114 struct intel_connector *attached_connector; 115 }; 116 117 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) 118 { 119 return container_of(encoder, struct intel_dvo, base); 120 } 121 122 static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector) 123 { 124 return enc_to_dvo(intel_attached_encoder(connector)); 125 } 126 127 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) 128 { 129 struct drm_i915_private *i915 = to_i915(connector->base.dev); 130 struct intel_encoder *encoder = intel_attached_encoder(connector); 131 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 132 enum port port = encoder->port; 133 u32 tmp; 134 135 tmp = intel_de_read(i915, DVO(port)); 136 137 if (!(tmp & DVO_ENABLE)) 138 return false; 139 140 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); 141 } 142 143 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, 144 enum pipe *pipe) 145 { 146 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 147 enum port port = encoder->port; 148 u32 tmp; 149 150 tmp = intel_de_read(i915, DVO(port)); 151 152 *pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp); 153 154 return tmp & DVO_ENABLE; 155 } 156 157 static void intel_dvo_get_config(struct intel_encoder *encoder, 158 struct intel_crtc_state *pipe_config) 159 { 160 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 161 enum port port = encoder->port; 162 u32 tmp, flags = 0; 163 164 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); 165 166 tmp = intel_de_read(i915, DVO(port)); 167 if (tmp & DVO_HSYNC_ACTIVE_HIGH) 168 flags |= DRM_MODE_FLAG_PHSYNC; 169 else 170 flags |= DRM_MODE_FLAG_NHSYNC; 171 if (tmp & DVO_VSYNC_ACTIVE_HIGH) 172 flags |= DRM_MODE_FLAG_PVSYNC; 173 else 174 flags |= DRM_MODE_FLAG_NVSYNC; 175 176 pipe_config->hw.adjusted_mode.flags |= flags; 177 178 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; 179 } 180 181 static void intel_disable_dvo(struct intel_atomic_state *state, 182 struct intel_encoder *encoder, 183 const struct intel_crtc_state *old_crtc_state, 184 const struct drm_connector_state *old_conn_state) 185 { 186 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 187 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 188 enum port port = encoder->port; 189 190 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); 191 192 intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0); 193 intel_de_posting_read(i915, DVO(port)); 194 } 195 196 static void intel_enable_dvo(struct intel_atomic_state *state, 197 struct intel_encoder *encoder, 198 const struct intel_crtc_state *pipe_config, 199 const struct drm_connector_state *conn_state) 200 { 201 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 202 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 203 enum port port = encoder->port; 204 205 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, 206 &pipe_config->hw.mode, 207 &pipe_config->hw.adjusted_mode); 208 209 intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE); 210 intel_de_posting_read(i915, DVO(port)); 211 212 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); 213 } 214 215 static enum drm_mode_status 216 intel_dvo_mode_valid(struct drm_connector *_connector, 217 struct drm_display_mode *mode) 218 { 219 struct intel_connector *connector = to_intel_connector(_connector); 220 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 221 const struct drm_display_mode *fixed_mode = 222 intel_panel_fixed_mode(connector, mode); 223 int max_dotclk = to_i915(connector->base.dev)->max_dotclk_freq; 224 int target_clock = mode->clock; 225 226 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 227 return MODE_NO_DBLESCAN; 228 229 /* XXX: Validate clock range */ 230 231 if (fixed_mode) { 232 enum drm_mode_status status; 233 234 status = intel_panel_mode_valid(connector, mode); 235 if (status != MODE_OK) 236 return status; 237 238 target_clock = fixed_mode->clock; 239 } 240 241 if (target_clock > max_dotclk) 242 return MODE_CLOCK_HIGH; 243 244 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); 245 } 246 247 static int intel_dvo_compute_config(struct intel_encoder *encoder, 248 struct intel_crtc_state *pipe_config, 249 struct drm_connector_state *conn_state) 250 { 251 struct intel_dvo *intel_dvo = enc_to_dvo(encoder); 252 struct intel_connector *connector = to_intel_connector(conn_state->connector); 253 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 254 const struct drm_display_mode *fixed_mode = 255 intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode); 256 257 /* 258 * If we have timings from the BIOS for the panel, put them in 259 * to the adjusted mode. The CRTC will be set up for this mode, 260 * with the panel scaling set up to source from the H/VDisplay 261 * of the original mode. 262 */ 263 if (fixed_mode) { 264 int ret; 265 266 ret = intel_panel_compute_config(connector, adjusted_mode); 267 if (ret) 268 return ret; 269 } 270 271 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 272 return -EINVAL; 273 274 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 275 276 return 0; 277 } 278 279 static void intel_dvo_pre_enable(struct intel_atomic_state *state, 280 struct intel_encoder *encoder, 281 const struct intel_crtc_state *pipe_config, 282 const struct drm_connector_state *conn_state) 283 { 284 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 285 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); 286 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 287 enum port port = encoder->port; 288 enum pipe pipe = crtc->pipe; 289 u32 dvo_val; 290 291 /* Save the active data order, since I don't know what it should be set to. */ 292 dvo_val = intel_de_read(i915, DVO(port)) & 293 (DVO_DEDICATED_INT_ENABLE | 294 DVO_PRESERVE_MASK | DVO_ACT_DATA_ORDER_MASK); 295 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | 296 DVO_BLANK_ACTIVE_HIGH; 297 298 dvo_val |= DVO_PIPE_SEL(pipe); 299 dvo_val |= DVO_PIPE_STALL; 300 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 301 dvo_val |= DVO_HSYNC_ACTIVE_HIGH; 302 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 303 dvo_val |= DVO_VSYNC_ACTIVE_HIGH; 304 305 intel_de_write(i915, DVO_SRCDIM(port), 306 DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) | 307 DVO_SRCDIM_VERTICAL(adjusted_mode->crtc_vdisplay)); 308 intel_de_write(i915, DVO(port), dvo_val); 309 } 310 311 static enum drm_connector_status 312 intel_dvo_detect(struct drm_connector *_connector, bool force) 313 { 314 struct intel_connector *connector = to_intel_connector(_connector); 315 struct drm_i915_private *i915 = to_i915(connector->base.dev); 316 struct intel_dvo *intel_dvo = intel_attached_dvo(connector); 317 318 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n", 319 connector->base.base.id, connector->base.name); 320 321 if (!INTEL_DISPLAY_ENABLED(i915)) 322 return connector_status_disconnected; 323 324 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); 325 } 326 327 static int intel_dvo_get_modes(struct drm_connector *_connector) 328 { 329 struct intel_connector *connector = to_intel_connector(_connector); 330 struct drm_i915_private *i915 = to_i915(connector->base.dev); 331 int num_modes; 332 333 /* 334 * We should probably have an i2c driver get_modes function for those 335 * devices which will have a fixed set of modes determined by the chip 336 * (TV-out, for example), but for now with just TMDS and LVDS, 337 * that's not the case. 338 */ 339 num_modes = intel_ddc_get_modes(&connector->base, 340 intel_gmbus_get_adapter(i915, GMBUS_PIN_DPC)); 341 if (num_modes) 342 return num_modes; 343 344 return intel_panel_get_modes(connector); 345 } 346 347 static const struct drm_connector_funcs intel_dvo_connector_funcs = { 348 .detect = intel_dvo_detect, 349 .late_register = intel_connector_register, 350 .early_unregister = intel_connector_unregister, 351 .destroy = intel_connector_destroy, 352 .fill_modes = drm_helper_probe_single_connector_modes, 353 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 354 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 355 }; 356 357 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { 358 .mode_valid = intel_dvo_mode_valid, 359 .get_modes = intel_dvo_get_modes, 360 }; 361 362 static void intel_dvo_enc_destroy(struct drm_encoder *encoder) 363 { 364 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); 365 366 if (intel_dvo->dev.dev_ops->destroy) 367 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); 368 369 intel_encoder_destroy(encoder); 370 } 371 372 static const struct drm_encoder_funcs intel_dvo_enc_funcs = { 373 .destroy = intel_dvo_enc_destroy, 374 }; 375 376 static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo) 377 { 378 switch (dvo->type) { 379 case INTEL_DVO_CHIP_TMDS: 380 return DRM_MODE_ENCODER_TMDS; 381 case INTEL_DVO_CHIP_LVDS_NO_FIXED: 382 case INTEL_DVO_CHIP_LVDS: 383 return DRM_MODE_ENCODER_LVDS; 384 default: 385 MISSING_CASE(dvo->type); 386 return DRM_MODE_ENCODER_NONE; 387 } 388 } 389 390 static int intel_dvo_connector_type(const struct intel_dvo_device *dvo) 391 { 392 switch (dvo->type) { 393 case INTEL_DVO_CHIP_TMDS: 394 return DRM_MODE_CONNECTOR_DVII; 395 case INTEL_DVO_CHIP_LVDS_NO_FIXED: 396 case INTEL_DVO_CHIP_LVDS: 397 return DRM_MODE_CONNECTOR_LVDS; 398 default: 399 MISSING_CASE(dvo->type); 400 return DRM_MODE_CONNECTOR_Unknown; 401 } 402 } 403 404 static bool intel_dvo_init_dev(struct drm_i915_private *dev_priv, 405 struct intel_dvo *intel_dvo, 406 const struct intel_dvo_device *dvo) 407 { 408 struct i2c_adapter *i2c; 409 u32 dpll[I915_MAX_PIPES]; 410 enum pipe pipe; 411 int gpio; 412 bool ret; 413 414 /* 415 * Allow the I2C driver info to specify the GPIO to be used in 416 * special cases, but otherwise default to what's defined 417 * in the spec. 418 */ 419 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio)) 420 gpio = dvo->gpio; 421 else if (dvo->type == INTEL_DVO_CHIP_LVDS) 422 gpio = GMBUS_PIN_SSC; 423 else 424 gpio = GMBUS_PIN_DPB; 425 426 /* 427 * Set up the I2C bus necessary for the chip we're probing. 428 * It appears that everything is on GPIOE except for panels 429 * on i830 laptops, which are on GPIOB (DVOA). 430 */ 431 i2c = intel_gmbus_get_adapter(dev_priv, gpio); 432 433 intel_dvo->dev = *dvo; 434 435 /* 436 * GMBUS NAK handling seems to be unstable, hence let the 437 * transmitter detection run in bit banging mode for now. 438 */ 439 intel_gmbus_force_bit(i2c, true); 440 441 /* 442 * ns2501 requires the DVO 2x clock before it will 443 * respond to i2c accesses, so make sure we have 444 * the clock enabled before we attempt to initialize 445 * the device. 446 */ 447 for_each_pipe(dev_priv, pipe) { 448 dpll[pipe] = intel_de_read(dev_priv, DPLL(pipe)); 449 intel_de_write(dev_priv, DPLL(pipe), 450 dpll[pipe] | DPLL_DVO_2X_MODE); 451 } 452 453 ret = dvo->dev_ops->init(&intel_dvo->dev, i2c); 454 455 /* restore the DVO 2x clock state to original */ 456 for_each_pipe(dev_priv, pipe) { 457 intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]); 458 } 459 460 intel_gmbus_force_bit(i2c, false); 461 462 return ret; 463 } 464 465 static bool intel_dvo_probe(struct drm_i915_private *i915, 466 struct intel_dvo *intel_dvo) 467 { 468 int i; 469 470 /* Now, try to find a controller */ 471 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { 472 if (intel_dvo_init_dev(i915, intel_dvo, 473 &intel_dvo_devices[i])) 474 return true; 475 } 476 477 return false; 478 } 479 480 void intel_dvo_init(struct drm_i915_private *i915) 481 { 482 struct intel_connector *connector; 483 struct intel_encoder *encoder; 484 struct intel_dvo *intel_dvo; 485 486 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); 487 if (!intel_dvo) 488 return; 489 490 connector = intel_connector_alloc(); 491 if (!connector) { 492 kfree(intel_dvo); 493 return; 494 } 495 496 intel_dvo->attached_connector = connector; 497 498 encoder = &intel_dvo->base; 499 500 encoder->disable = intel_disable_dvo; 501 encoder->enable = intel_enable_dvo; 502 encoder->get_hw_state = intel_dvo_get_hw_state; 503 encoder->get_config = intel_dvo_get_config; 504 encoder->compute_config = intel_dvo_compute_config; 505 encoder->pre_enable = intel_dvo_pre_enable; 506 connector->get_hw_state = intel_dvo_connector_get_hw_state; 507 508 if (!intel_dvo_probe(i915, intel_dvo)) { 509 kfree(intel_dvo); 510 intel_connector_free(connector); 511 return; 512 } 513 514 encoder->type = INTEL_OUTPUT_DVO; 515 encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 516 encoder->port = intel_dvo->dev.port; 517 encoder->pipe_mask = ~0; 518 519 if (intel_dvo->dev.type != INTEL_DVO_CHIP_LVDS) 520 encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) | 521 BIT(INTEL_OUTPUT_DVO); 522 523 drm_encoder_init(&i915->drm, &encoder->base, 524 &intel_dvo_enc_funcs, 525 intel_dvo_encoder_type(&intel_dvo->dev), 526 "DVO %c", port_name(encoder->port)); 527 528 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] detected %s\n", 529 encoder->base.base.id, encoder->base.name, 530 intel_dvo->dev.name); 531 532 if (intel_dvo->dev.type == INTEL_DVO_CHIP_TMDS) 533 connector->polled = DRM_CONNECTOR_POLL_CONNECT | 534 DRM_CONNECTOR_POLL_DISCONNECT; 535 536 drm_connector_init(&i915->drm, &connector->base, 537 &intel_dvo_connector_funcs, 538 intel_dvo_connector_type(&intel_dvo->dev)); 539 540 drm_connector_helper_add(&connector->base, 541 &intel_dvo_connector_helper_funcs); 542 connector->base.display_info.subpixel_order = SubPixelHorizontalRGB; 543 544 intel_connector_attach_encoder(connector, encoder); 545 546 if (intel_dvo->dev.type == INTEL_DVO_CHIP_LVDS) { 547 /* 548 * For our LVDS chipsets, we should hopefully be able 549 * to dig the fixed panel mode out of the BIOS data. 550 * However, it's in a different format from the BIOS 551 * data on chipsets with integrated LVDS (stored in AIM 552 * headers, likely), so for now, just get the current 553 * mode being output through DVO. 554 */ 555 intel_panel_add_encoder_fixed_mode(connector, encoder); 556 557 intel_panel_init(connector, NULL); 558 } 559 } 560