1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright 2025 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 #ifndef __RAS_PSP_H__ 25 #define __RAS_PSP_H__ 26 #include "ras.h" 27 #include "ras_ta_if.h" 28 29 struct ras_core_context; 30 struct ras_ta_trigger_error_input; 31 struct ras_ta_query_address_input; 32 struct ras_ta_query_address_output; 33 enum ras_ta_cmd_id; 34 35 struct ras_ta_image_header { 36 uint32_t reserved1[24]; 37 uint32_t image_version; /* [0x60] Off Chip Firmware Version */ 38 uint32_t reserved2[39]; 39 }; 40 41 struct ras_psp_sys_status { 42 bool initialized; 43 uint32_t session_id; 44 void *psp_cmd_mutex; 45 }; 46 47 struct ras_ta_init_param { 48 uint8_t poison_mode_en; 49 uint8_t dgpu_mode; 50 uint16_t xcc_mask; 51 uint8_t channel_dis_num; 52 uint8_t nps_mode; 53 uint32_t active_umc_mask; 54 }; 55 56 struct gpu_mem_block { 57 uint32_t mem_type; 58 void *mem_bo; 59 uint64_t mem_mc_addr; 60 void *mem_cpu_addr; 61 uint32_t mem_size; 62 int ref_count; 63 void *private; 64 }; 65 66 struct ras_psp_ip_func { 67 uint32_t (*psp_ras_ring_wptr_get)(struct ras_core_context *ras_core); 68 int (*psp_ras_ring_wptr_set)(struct ras_core_context *ras_core, uint32_t wptr); 69 }; 70 71 struct ras_psp_ring { 72 struct gpu_mem_block ras_ring_gpu_mem; 73 }; 74 75 struct psp_cmd_resp { 76 uint32_t status; 77 uint32_t session_id; 78 }; 79 80 struct ras_psp_ctx { 81 void *external_mutex; 82 struct mutex internal_mutex; 83 uint64_t in_fence_value; 84 struct gpu_mem_block psp_cmd_gpu_mem; 85 struct gpu_mem_block out_fence_gpu_mem; 86 }; 87 88 struct ras_ta_fw_bin { 89 uint32_t fw_version; 90 uint32_t feature_version; 91 uint32_t bin_size; 92 uint8_t *bin_addr; 93 }; 94 95 struct ras_ta_ctx { 96 bool preload_ras_ta_enabled; 97 bool ras_ta_initialized; 98 uint32_t session_id; 99 uint32_t resp_status; 100 uint32_t ta_version; 101 struct mutex ta_mutex; 102 struct ras_ta_fw_bin fw_bin; 103 struct ras_ta_init_param init_param; 104 struct gpu_mem_block fw_gpu_mem; 105 struct gpu_mem_block cmd_gpu_mem; 106 }; 107 108 struct ras_psp { 109 uint32_t psp_ip_version; 110 struct ras_psp_ring psp_ring; 111 struct ras_psp_ctx psp_ctx; 112 struct ras_ta_ctx ta_ctx; 113 const struct ras_psp_ip_func *ip_func; 114 const struct ras_psp_sys_func *sys_func; 115 }; 116 117 struct ras_psp_ta_load { 118 uint32_t fw_version; 119 uint32_t feature_version; 120 uint32_t bin_size; 121 uint8_t *bin_addr; 122 uint64_t out_session_id; 123 uint32_t out_loaded_ta_version; 124 }; 125 126 struct ras_psp_ta_unload { 127 uint64_t ras_session_id; 128 }; 129 130 int ras_psp_sw_init(struct ras_core_context *ras_core); 131 int ras_psp_sw_fini(struct ras_core_context *ras_core); 132 int ras_psp_hw_init(struct ras_core_context *ras_core); 133 int ras_psp_hw_fini(struct ras_core_context *ras_core); 134 int ras_psp_load_firmware(struct ras_core_context *ras_core, 135 struct ras_psp_ta_load *ras_ta_load); 136 int ras_psp_unload_firmware(struct ras_core_context *ras_core, 137 struct ras_psp_ta_unload *ras_ta_unload); 138 int ras_psp_trigger_error(struct ras_core_context *ras_core, 139 struct ras_ta_trigger_error_input *info, uint32_t instance_mask); 140 int ras_psp_query_address(struct ras_core_context *ras_core, 141 struct ras_ta_query_address_input *addr_in, 142 struct ras_ta_query_address_output *addr_out); 143 bool ras_psp_check_supported_cmd(struct ras_core_context *ras_core, 144 enum ras_ta_cmd_id cmd_id); 145 #endif 146