xref: /linux/drivers/gpu/drm/amd/ras/rascore/ras_process.h (revision 24f171c7e145f43b9f187578e89b0982ce87e54c)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright 2025 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  */
24 #ifndef __RAS_PROCESS_H__
25 #define __RAS_PROCESS_H__
26 
27 struct ras_event_req {
28 	uint64_t seqno;
29 	uint32_t idx_vf;
30 	uint32_t block;
31 	uint16_t pasid;
32 	uint32_t reset;
33 	void *pasid_fn;
34 	void *data;
35 };
36 
37 struct ras_process {
38 	void *dev;
39 	void *ras_process_thread;
40 	wait_queue_head_t ras_process_wq;
41 	atomic_t ras_interrupt_req;
42 	atomic_t umc_interrupt_count;
43 	struct kfifo event_fifo;
44 	spinlock_t fifo_spinlock;
45 };
46 
47 struct ras_core_context;
48 int ras_process_init(struct ras_core_context *ras_core);
49 int ras_process_fini(struct ras_core_context *ras_core);
50 int ras_process_handle_ras_event(struct ras_core_context *ras_core);
51 int ras_process_add_interrupt_req(struct ras_core_context *ras_core,
52 		struct ras_event_req *req, bool is_umc);
53 #endif
54