1 /* 2 * Copyright 2020 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __VANGOGH_PPT_H__ 25 #define __VANGOGH_PPT_H__ 26 27 28 extern void vangogh_set_ppt_funcs(struct smu_context *smu); 29 30 /* UMD PState Vangogh Msg Parameters in MHz */ 31 #define VANGOGH_UMD_PSTATE_STANDARD_GFXCLK 1100 32 #define VANGOGH_UMD_PSTATE_STANDARD_SOCCLK 600 33 #define VANGOGH_UMD_PSTATE_STANDARD_FCLK 800 34 #define VANGOGH_UMD_PSTATE_STANDARD_VCLK 705 35 #define VANGOGH_UMD_PSTATE_STANDARD_DCLK 600 36 37 #define VANGOGH_UMD_PSTATE_PEAK_GFXCLK 1300 38 #define VANGOGH_UMD_PSTATE_PEAK_SOCCLK 600 39 #define VANGOGH_UMD_PSTATE_PEAK_FCLK 800 40 #define VANGOGH_UMD_PSTATE_PEAK_VCLK 705 41 #define VANGOGH_UMD_PSTATE_PEAK_DCLK 600 42 43 #define VANGOGH_UMD_PSTATE_MIN_SCLK_GFXCLK 400 44 #define VANGOGH_UMD_PSTATE_MIN_SCLK_SOCCLK 1000 45 #define VANGOGH_UMD_PSTATE_MIN_SCLK_FCLK 800 46 #define VANGOGH_UMD_PSTATE_MIN_SCLK_VCLK 1000 47 #define VANGOGH_UMD_PSTATE_MIN_SCLK_DCLK 800 48 49 #define VANGOGH_UMD_PSTATE_MIN_MCLK_GFXCLK 1100 50 #define VANGOGH_UMD_PSTATE_MIN_MCLK_SOCCLK 1000 51 #define VANGOGH_UMD_PSTATE_MIN_MCLK_FCLK 400 52 #define VANGOGH_UMD_PSTATE_MIN_MCLK_VCLK 1000 53 #define VANGOGH_UMD_PSTATE_MIN_MCLK_DCLK 800 54 55 /* RLC Power Status */ 56 #define RLC_STATUS_OFF 0 57 #define RLC_STATUS_NORMAL 1 58 59 #endif 60