1 // SPDX-License-Identifier: MIT 2 // 3 // Copyright 2026 Advanced Micro Devices, Inc. 4 5 6 7 #include "dc.h" 8 #include "dcn42_resource_fpu.h" 9 10 #define DC_LOGGER_INIT(logger) 11 12 13 void dcn42_decide_zstate_support(struct dc *dc, struct dc_state *context) 14 { 15 enum dcn_zstate_support_state support = DCN_ZSTATE_SUPPORT_DISALLOW; 16 unsigned int i, plane_count = 0; 17 18 DC_LOGGER_INIT(dc->ctx->logger); 19 20 dc_assert_fp_enabled(); 21 for (i = 0; i < dc->res_pool->pipe_count; i++) { 22 if (context->res_ctx.pipe_ctx[i].plane_state) 23 plane_count++; 24 } 25 /*dcn42 has no z10*/ 26 if (context->stream_count == 0 || plane_count == 0) { 27 support = DCN_ZSTATE_SUPPORT_ALLOW_Z8_ONLY; 28 } else if (context->stream_count == 1 && context->streams[0]->signal == SIGNAL_TYPE_EDP) { 29 struct dc_link *link = context->streams[0]->sink->link; 30 bool is_psr = (link && (link->psr_settings.psr_version == DC_PSR_VERSION_1 || 31 link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) && !link->panel_config.psr.disable_psr); 32 bool is_replay = link && link->replay_settings.replay_feature_enabled; 33 34 if (is_psr || is_replay) 35 support = DCN_ZSTATE_SUPPORT_ALLOW_Z8_ONLY; 36 else { 37 /*here we allow z8 for eDP based on dml21 output*/ 38 support = context->bw_ctx.bw.dcn.clk.zstate_support ? DCN_ZSTATE_SUPPORT_ALLOW_Z8_ONLY : DCN_ZSTATE_SUPPORT_DISALLOW; 39 } 40 41 DC_LOG_SMU("zstate_support: %d, StutterPeriod: %d\n, z8_stutter_efficiency: %d\n", 42 support, (int)context->bw_ctx.bw.dcn.clk.stutter_efficiency.z8_stutter_period, 43 (int)context->bw_ctx.bw.dcn.clk.stutter_efficiency.z8_stutter_efficiency); 44 } 45 context->bw_ctx.bw.dcn.clk.zstate_support = support; 46 47 } 48