xref: /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn60/dcn60_hwseq.h (revision 67f8bc848ee31831336bd478e57d2f993551902e)
1 // SPDX-License-Identifier: MIT
2 //
3 // Copyright 2024 Advanced Micro Devices, Inc.
4 
5 #ifndef __DC_HWSS_DCN60_H__
6 #define __DC_HWSS_DCN60_H__
7 
8 #include "inc/core_types.h"
9 #include "dc.h"
10 #include "dc_stream.h"
11 #include "hw_sequencer_private.h"
12 #include "dcn401/dcn401_dccg.h"
13 
14 struct dc;
15 
16 enum dc_status dcn60_apply_ctx_to_hw(
17 		struct dc *dc,
18 		struct dc_state *context);
19 
20 enum dc_status dcn60_apply_single_controller_ctx_to_hw(
21     struct pipe_ctx *pipe_ctx,
22     struct dc_state *context,
23     struct dc *dc);
24 
25 void dcn60_init_hw(struct dc *dc);
26 void dcn60_set_cursor_attribute(struct pipe_ctx *pipe_ctx);
27 void dcn60_update_cursor_offload_pipe(struct dc *dc, const struct pipe_ctx *pipe);
28 
29 void dcn60_program_perfmon(struct dc *dc, struct dc_state *context);
30 bool dcn60_apply_idle_power_optimizations(struct dc *dc, bool enable);
31 
32 #endif /* __DC_HWSS_DCN60_H__ */
33