xref: /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn50/dcn50_hwseq.h (revision 67f8bc848ee31831336bd478e57d2f993551902e)
1 // SPDX-License-Identifier: MIT
2 //
3 // Copyright 2024 Advanced Micro Devices, Inc.
4 
5 #ifndef __DC_HWSS_DCN50_H__
6 #define __DC_HWSS_DCN50_H__
7 
8 #include "inc/core_types.h"
9 #include "dc.h"
10 #include "dc_stream.h"
11 #include "hw_sequencer_private.h"
12 #include "dcn401/dcn401_dccg.h"
13 
14 struct dc;
15 
16 void dcn50_init_hw(struct dc *dc);
17 
18 void dcn50_update_dchubp_dpp(
19 	struct dc *dc,
20 	struct pipe_ctx *pipe_ctx,
21 	struct dc_state *context);
22 void dcn50_update_dchubp_dpp_sequence(struct dc *dc,
23 	struct pipe_ctx *pipe_ctx,
24 	struct dc_state *context,
25 	struct block_sequence_state *seq_state);
26 void dcn50_update_mpcc_sequence(struct dc *dc,
27 	struct pipe_ctx *pipe_ctx,
28 	struct block_sequence_state *seq_state);
29 void dcn50_program_front_end_for_ctx(struct dc *dc, struct dc_state *context);
30 void dcn50_post_unlock_program_front_end(struct dc *dc, struct dc_state *context);
31 
32 #endif /* __DC_HWSS_DCN50_H__ */
33