xref: /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn50/dcn50_hubp.h (revision 67f8bc848ee31831336bd478e57d2f993551902e)
1 /*
2  * SPDX-License-Identifier: MIT
3  *
4  * Copyright (c) 2026 Advanced Micro Devices, Inc. All rights reserved.
5  */
6 
7 #ifndef __DC_HUBP_DCN50_H__
8 #define __DC_HUBP_DCN50_H__
9 
10 #include "dcn20/dcn20_hubp.h"
11 #include "dcn21/dcn21_hubp.h"
12 #include "dcn30/dcn30_hubp.h"
13 #include "dcn31/dcn31_hubp.h"
14 #include "dcn32/dcn32_hubp.h"
15 #include "dcn401/dcn401_hubp.h"
16 #include "dml2_0/dml21/inc/dml_top_dchub_registers.h"
17 
18 #define HUBP_MASK_SH_LIST_DCN50(mask_sh)\
19 	HUBP_MASK_SH_LIST_DCN401(mask_sh)
20 
21 bool hubp50_program_surface_flip_and_addr(
22 	struct hubp *hubp,
23 	const struct dc_plane_address *address,
24 	bool flip_immediate);
25 
26 void hubp50_program_surface_config(
27 	struct hubp *hubp,
28 	enum surface_pixel_format format,
29 	struct dc_tiling_info *tiling_info,
30 	struct plane_size *plane_size,
31 	enum dc_rotation_angle rotation,
32 	struct dc_plane_dcc_param *dcc,
33 	bool horizontal_mirror,
34 	unsigned int compat_level);
35 
36 
37 void hubp50_read_state(struct hubp *hubp);
38 
39 
40 bool hubp50_construct(
41 	struct dcn20_hubp *hubp2,
42 	struct dc_context *ctx,
43 	uint32_t inst,
44 	const struct dcn_hubp2_registers *hubp_regs,
45 	const struct dcn_hubp2_shift *hubp_shift,
46 	const struct dcn_hubp2_mask *hubp_mask);
47 
48 #endif /* __DC_HUBP_DCN50_H__ */
49