1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright 2026 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: AMD 24 * 25 */ 26 27 #ifndef __AMDGPU_DM_CURSOR_H__ 28 #define __AMDGPU_DM_CURSOR_H__ 29 30 int amdgpu_dm_check_native_cursor_state(struct drm_crtc *new_plane_crtc, 31 struct drm_plane *plane, 32 struct drm_plane_state *new_plane_state, 33 bool enable); 34 35 bool amdgpu_dm_should_update_native_cursor(struct drm_atomic_commit *state, 36 struct drm_crtc *old_plane_crtc, 37 struct drm_crtc *new_plane_crtc, 38 bool enable); 39 40 int amdgpu_dm_crtc_get_cursor_mode(struct amdgpu_device *adev, 41 struct drm_atomic_commit *state, 42 struct dm_crtc_state *dm_crtc_state, 43 enum amdgpu_dm_cursor_mode *cursor_mode); 44 45 #if IS_ENABLED(CONFIG_DRM_AMD_DC_KUNIT_TEST) 46 void dm_get_oriented_plane_size(struct drm_plane_state *plane_state, 47 int *src_w, int *src_h); 48 void dm_get_plane_scale(struct drm_plane_state *plane_state, 49 int *out_plane_scale_w, int *out_plane_scale_h); 50 #endif /* CONFIG_DRM_AMD_DC_KUNIT_TEST */ 51 52 #endif /* __AMDGPU_DM_CURSOR_H__ */ 53