1da9bb1d2SAlan Cox# 2da9bb1d2SAlan Cox# EDAC Kconfig 34577ca55SDoug Thompson# Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com 4da9bb1d2SAlan Cox# Licensed and distributed under the GPL 5da9bb1d2SAlan Cox# 6da9bb1d2SAlan Cox 7751cb5e5SJan Engelhardtmenuconfig EDAC 8e24aca67SGeunSik Lim bool "EDAC (Error Detection And Correction) reporting" 9e25df120SMartin Schwidefsky depends on HAS_IOMEM 104c6a1c13SAndrew Morton depends on X86 || PPC 11da9bb1d2SAlan Cox help 12da9bb1d2SAlan Cox EDAC is designed to report errors in the core system. 13da9bb1d2SAlan Cox These are low-level errors that are reported in the CPU or 148cb2a398SDouglas Thompson supporting chipset or other subsystems: 158cb2a398SDouglas Thompson memory errors, cache errors, PCI errors, thermal throttling, etc.. 168cb2a398SDouglas Thompson If unsure, select 'Y'. 17da9bb1d2SAlan Cox 1857c432b5STim Small If this code is reporting problems on your system, please 1957c432b5STim Small see the EDAC project web pages for more information at: 2057c432b5STim Small 2157c432b5STim Small <http://bluesmoke.sourceforge.net/> 2257c432b5STim Small 2357c432b5STim Small and: 2457c432b5STim Small 2557c432b5STim Small <http://buttersideup.com/edacwiki> 2657c432b5STim Small 2757c432b5STim Small There is also a mailing list for the EDAC project, which can 2857c432b5STim Small be found via the sourceforge page. 2957c432b5STim Small 30751cb5e5SJan Engelhardtif EDAC 31da9bb1d2SAlan Cox 32da9bb1d2SAlan Coxcomment "Reporting subsystems" 33da9bb1d2SAlan Cox 34da9bb1d2SAlan Coxconfig EDAC_DEBUG 35da9bb1d2SAlan Cox bool "Debugging" 36da9bb1d2SAlan Cox help 37da9bb1d2SAlan Cox This turns on debugging information for the entire EDAC 38da9bb1d2SAlan Cox sub-system. You can insert module with "debug_level=x", current 39da9bb1d2SAlan Cox there're four debug levels (x=0,1,2,3 from low to high). 40da9bb1d2SAlan Cox Usually you should select 'N'. 41da9bb1d2SAlan Cox 420d18b2e3SBorislav Petkovconfig EDAC_DECODE_MCE 430d18b2e3SBorislav Petkov tristate "Decode MCEs in human-readable form (only on AMD for now)" 440d18b2e3SBorislav Petkov depends on CPU_SUP_AMD && X86_MCE 450d18b2e3SBorislav Petkov default y 460d18b2e3SBorislav Petkov ---help--- 470d18b2e3SBorislav Petkov Enable this option if you want to decode Machine Check Exceptions 480d18b2e3SBorislav Petkov occuring on your machine in human-readable form. 490d18b2e3SBorislav Petkov 500d18b2e3SBorislav Petkov You should definitely say Y here in case you want to decode MCEs 510d18b2e3SBorislav Petkov which occur really early upon boot, before the module infrastructure 520d18b2e3SBorislav Petkov has been initialized. 530d18b2e3SBorislav Petkov 54*9cdeb404SBorislav Petkovconfig EDAC_MCE_INJ 55*9cdeb404SBorislav Petkov tristate "Simple MCE injection interface over /sysfs" 56*9cdeb404SBorislav Petkov depends on EDAC_DECODE_MCE 57*9cdeb404SBorislav Petkov default n 58*9cdeb404SBorislav Petkov help 59*9cdeb404SBorislav Petkov This is a simple interface to inject MCEs over /sysfs and test 60*9cdeb404SBorislav Petkov the MCE decoding code in EDAC. 61*9cdeb404SBorislav Petkov 62*9cdeb404SBorislav Petkov This is currently AMD-only. 63*9cdeb404SBorislav Petkov 64da9bb1d2SAlan Coxconfig EDAC_MM_EDAC 65da9bb1d2SAlan Cox tristate "Main Memory EDAC (Error Detection And Correction) reporting" 66da9bb1d2SAlan Cox help 67da9bb1d2SAlan Cox Some systems are able to detect and correct errors in main 68da9bb1d2SAlan Cox memory. EDAC can report statistics on memory error 69da9bb1d2SAlan Cox detection and correction (EDAC - or commonly referred to ECC 70da9bb1d2SAlan Cox errors). EDAC will also try to decode where these errors 71da9bb1d2SAlan Cox occurred so that a particular failing memory module can be 72da9bb1d2SAlan Cox replaced. If unsure, select 'Y'. 73da9bb1d2SAlan Cox 74696e409dSMauro Carvalho Chehabconfig EDAC_MCE 75963c5ba3SMauro Carvalho Chehab bool 76696e409dSMauro Carvalho Chehab 777d6034d3SDoug Thompsonconfig EDAC_AMD64 787d6034d3SDoug Thompson tristate "AMD64 (Opteron, Athlon64) K8, F10h, F11h" 790d18b2e3SBorislav Petkov depends on EDAC_MM_EDAC && K8_NB && X86_64 && PCI && EDAC_DECODE_MCE 807d6034d3SDoug Thompson help 817d6034d3SDoug Thompson Support for error detection and correction on the AMD 64 827d6034d3SDoug Thompson Families of Memory Controllers (K8, F10h and F11h) 837d6034d3SDoug Thompson 847d6034d3SDoug Thompsonconfig EDAC_AMD64_ERROR_INJECTION 85*9cdeb404SBorislav Petkov bool "Sysfs HW Error injection facilities" 867d6034d3SDoug Thompson depends on EDAC_AMD64 877d6034d3SDoug Thompson help 887d6034d3SDoug Thompson Recent Opterons (Family 10h and later) provide for Memory Error 897d6034d3SDoug Thompson Injection into the ECC detection circuits. The amd64_edac module 907d6034d3SDoug Thompson allows the operator/user to inject Uncorrectable and Correctable 917d6034d3SDoug Thompson errors into DRAM. 927d6034d3SDoug Thompson 937d6034d3SDoug Thompson When enabled, in each of the respective memory controller directories 947d6034d3SDoug Thompson (/sys/devices/system/edac/mc/mcX), there are 3 input files: 957d6034d3SDoug Thompson 967d6034d3SDoug Thompson - inject_section (0..3, 16-byte section of 64-byte cacheline), 977d6034d3SDoug Thompson - inject_word (0..8, 16-bit word of 16-byte section), 987d6034d3SDoug Thompson - inject_ecc_vector (hex ecc vector: select bits of inject word) 997d6034d3SDoug Thompson 1007d6034d3SDoug Thompson In addition, there are two control files, inject_read and inject_write, 1017d6034d3SDoug Thompson which trigger the DRAM ECC Read and Write respectively. 102da9bb1d2SAlan Cox 103da9bb1d2SAlan Coxconfig EDAC_AMD76X 104da9bb1d2SAlan Cox tristate "AMD 76x (760, 762, 768)" 10590cbc45bSDave Jones depends on EDAC_MM_EDAC && PCI && X86_32 106da9bb1d2SAlan Cox help 107da9bb1d2SAlan Cox Support for error detection and correction on the AMD 76x 108da9bb1d2SAlan Cox series of chipsets used with the Athlon processor. 109da9bb1d2SAlan Cox 110da9bb1d2SAlan Coxconfig EDAC_E7XXX 111da9bb1d2SAlan Cox tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" 11239f1d8d3SDave Peterson depends on EDAC_MM_EDAC && PCI && X86_32 113da9bb1d2SAlan Cox help 114da9bb1d2SAlan Cox Support for error detection and correction on the Intel 115da9bb1d2SAlan Cox E7205, E7500, E7501 and E7505 server chipsets. 116da9bb1d2SAlan Cox 117da9bb1d2SAlan Coxconfig EDAC_E752X 1185135b797SAndrei Konovalov tristate "Intel e752x (e7520, e7525, e7320) and 3100" 119da960a6aSRandy Dunlap depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG 120da9bb1d2SAlan Cox help 121da9bb1d2SAlan Cox Support for error detection and correction on the Intel 122da9bb1d2SAlan Cox E7520, E7525, E7320 server chipsets. 123da9bb1d2SAlan Cox 1245a2c675cSTim Smallconfig EDAC_I82443BXGX 1255a2c675cSTim Small tristate "Intel 82443BX/GX (440BX/GX)" 1265a2c675cSTim Small depends on EDAC_MM_EDAC && PCI && X86_32 12728f96eeaSAndrew Morton depends on BROKEN 1285a2c675cSTim Small help 1295a2c675cSTim Small Support for error detection and correction on the Intel 1305a2c675cSTim Small 82443BX/GX memory controllers (440BX/GX chipsets). 1315a2c675cSTim Small 132da9bb1d2SAlan Coxconfig EDAC_I82875P 133da9bb1d2SAlan Cox tristate "Intel 82875p (D82875P, E7210)" 13439f1d8d3SDave Peterson depends on EDAC_MM_EDAC && PCI && X86_32 135da9bb1d2SAlan Cox help 136da9bb1d2SAlan Cox Support for error detection and correction on the Intel 137da9bb1d2SAlan Cox DP82785P and E7210 server chipsets. 138da9bb1d2SAlan Cox 139420390f0SRanganathan Desikanconfig EDAC_I82975X 140420390f0SRanganathan Desikan tristate "Intel 82975x (D82975x)" 141420390f0SRanganathan Desikan depends on EDAC_MM_EDAC && PCI && X86 142420390f0SRanganathan Desikan help 143420390f0SRanganathan Desikan Support for error detection and correction on the Intel 144420390f0SRanganathan Desikan DP82975x server chipsets. 145420390f0SRanganathan Desikan 146535c6a53SJason Uhlenkottconfig EDAC_I3000 147535c6a53SJason Uhlenkott tristate "Intel 3000/3010" 148f5c0454cSJason Uhlenkott depends on EDAC_MM_EDAC && PCI && X86 149535c6a53SJason Uhlenkott help 150535c6a53SJason Uhlenkott Support for error detection and correction on the Intel 151535c6a53SJason Uhlenkott 3000 and 3010 server chipsets. 152535c6a53SJason Uhlenkott 153dd8ef1dbSJason Uhlenkottconfig EDAC_I3200 154dd8ef1dbSJason Uhlenkott tristate "Intel 3200" 155dd8ef1dbSJason Uhlenkott depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL 156dd8ef1dbSJason Uhlenkott help 157dd8ef1dbSJason Uhlenkott Support for error detection and correction on the Intel 158dd8ef1dbSJason Uhlenkott 3200 and 3210 server chipsets. 159dd8ef1dbSJason Uhlenkott 160df8bc08cSHitoshi Mitakeconfig EDAC_X38 161df8bc08cSHitoshi Mitake tristate "Intel X38" 162df8bc08cSHitoshi Mitake depends on EDAC_MM_EDAC && PCI && X86 163df8bc08cSHitoshi Mitake help 164df8bc08cSHitoshi Mitake Support for error detection and correction on the Intel 165df8bc08cSHitoshi Mitake X38 server chipsets. 166df8bc08cSHitoshi Mitake 167920c8df6SMauro Carvalho Chehabconfig EDAC_I5400 168920c8df6SMauro Carvalho Chehab tristate "Intel 5400 (Seaburg) chipsets" 169920c8df6SMauro Carvalho Chehab depends on EDAC_MM_EDAC && PCI && X86 170920c8df6SMauro Carvalho Chehab help 171920c8df6SMauro Carvalho Chehab Support for error detection and correction the Intel 172920c8df6SMauro Carvalho Chehab i5400 MCH chipset (Seaburg). 173920c8df6SMauro Carvalho Chehab 174a0c36a1fSMauro Carvalho Chehabconfig EDAC_I7CORE 175a0c36a1fSMauro Carvalho Chehab tristate "Intel i7 Core (Nehalem) processors" 176a0c36a1fSMauro Carvalho Chehab depends on EDAC_MM_EDAC && PCI && X86 177696e409dSMauro Carvalho Chehab select EDAC_MCE 178a0c36a1fSMauro Carvalho Chehab help 179a0c36a1fSMauro Carvalho Chehab Support for error detection and correction the Intel 180696e409dSMauro Carvalho Chehab i7 Core (Nehalem) Integrated Memory Controller that exists on 181696e409dSMauro Carvalho Chehab newer processors like i7 Core, i7 Core Extreme, Xeon 35xx 182696e409dSMauro Carvalho Chehab and Xeon 55xx processors. 183a0c36a1fSMauro Carvalho Chehab 184da9bb1d2SAlan Coxconfig EDAC_I82860 185da9bb1d2SAlan Cox tristate "Intel 82860" 18639f1d8d3SDave Peterson depends on EDAC_MM_EDAC && PCI && X86_32 187da9bb1d2SAlan Cox help 188da9bb1d2SAlan Cox Support for error detection and correction on the Intel 189da9bb1d2SAlan Cox 82860 chipset. 190da9bb1d2SAlan Cox 191da9bb1d2SAlan Coxconfig EDAC_R82600 192da9bb1d2SAlan Cox tristate "Radisys 82600 embedded chipset" 19339f1d8d3SDave Peterson depends on EDAC_MM_EDAC && PCI && X86_32 194da9bb1d2SAlan Cox help 195da9bb1d2SAlan Cox Support for error detection and correction on the Radisys 196da9bb1d2SAlan Cox 82600 embedded chipset. 197da9bb1d2SAlan Cox 198eb60705aSEric Wollesenconfig EDAC_I5000 199eb60705aSEric Wollesen tristate "Intel Greencreek/Blackford chipset" 200eb60705aSEric Wollesen depends on EDAC_MM_EDAC && X86 && PCI 201eb60705aSEric Wollesen help 202eb60705aSEric Wollesen Support for error detection and correction the Intel 203eb60705aSEric Wollesen Greekcreek/Blackford chipsets. 204eb60705aSEric Wollesen 2058f421c59SArthur Jonesconfig EDAC_I5100 2068f421c59SArthur Jones tristate "Intel San Clemente MCH" 2078f421c59SArthur Jones depends on EDAC_MM_EDAC && X86 && PCI 2088f421c59SArthur Jones help 2098f421c59SArthur Jones Support for error detection and correction the Intel 2108f421c59SArthur Jones San Clemente MCH. 2118f421c59SArthur Jones 212a9a753d5SDave Jiangconfig EDAC_MPC85XX 213b4846251SIra W. Snyder tristate "Freescale MPC83xx / MPC85xx" 2141cd8521eSAnton Vorontsov depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx) 215a9a753d5SDave Jiang help 216a9a753d5SDave Jiang Support for error detection and correction on the Freescale 217b4846251SIra W. Snyder MPC8349, MPC8560, MPC8540, MPC8548 218a9a753d5SDave Jiang 2194f4aeeabSDave Jiangconfig EDAC_MV64X60 2204f4aeeabSDave Jiang tristate "Marvell MV64x60" 2214f4aeeabSDave Jiang depends on EDAC_MM_EDAC && MV64X60 2224f4aeeabSDave Jiang help 2234f4aeeabSDave Jiang Support for error detection and correction on the Marvell 2244f4aeeabSDave Jiang MV64360 and MV64460 chipsets. 2254f4aeeabSDave Jiang 2267d8536fbSEgor Martovetskyconfig EDAC_PASEMI 2277d8536fbSEgor Martovetsky tristate "PA Semi PWRficient" 2287d8536fbSEgor Martovetsky depends on EDAC_MM_EDAC && PCI 229ddcc3050SDoug Thompson depends on PPC_PASEMI 2307d8536fbSEgor Martovetsky help 2317d8536fbSEgor Martovetsky Support for error detection and correction on PA Semi 2327d8536fbSEgor Martovetsky PWRficient. 2337d8536fbSEgor Martovetsky 23448764e41SBenjamin Herrenschmidtconfig EDAC_CELL 23548764e41SBenjamin Herrenschmidt tristate "Cell Broadband Engine memory controller" 236def434c2SBenjamin Krill depends on EDAC_MM_EDAC && PPC_CELL_COMMON 23748764e41SBenjamin Herrenschmidt help 23848764e41SBenjamin Herrenschmidt Support for error detection and correction on the 23948764e41SBenjamin Herrenschmidt Cell Broadband Engine internal memory controller 24048764e41SBenjamin Herrenschmidt on platform without a hypervisor 2417d8536fbSEgor Martovetsky 242dba7a77cSGrant Ericksonconfig EDAC_PPC4XX 243dba7a77cSGrant Erickson tristate "PPC4xx IBM DDR2 Memory Controller" 244dba7a77cSGrant Erickson depends on EDAC_MM_EDAC && 4xx 245dba7a77cSGrant Erickson help 246dba7a77cSGrant Erickson This enables support for EDAC on the ECC memory used 247dba7a77cSGrant Erickson with the IBM DDR2 memory controller found in various 248dba7a77cSGrant Erickson PowerPC 4xx embedded processors such as the 405EX[r], 249dba7a77cSGrant Erickson 440SP, 440SPe, 460EX, 460GT and 460SX. 250dba7a77cSGrant Erickson 251e8765584SHarry Ciaoconfig EDAC_AMD8131 252e8765584SHarry Ciao tristate "AMD8131 HyperTransport PCI-X Tunnel" 253715fe7afSHarry Ciao depends on EDAC_MM_EDAC && PCI && PPC_MAPLE 254e8765584SHarry Ciao help 255e8765584SHarry Ciao Support for error detection and correction on the 256e8765584SHarry Ciao AMD8131 HyperTransport PCI-X Tunnel chip. 257715fe7afSHarry Ciao Note, add more Kconfig dependency if it's adopted 258715fe7afSHarry Ciao on some machine other than Maple. 259e8765584SHarry Ciao 26058b4ce6fSHarry Ciaoconfig EDAC_AMD8111 26158b4ce6fSHarry Ciao tristate "AMD8111 HyperTransport I/O Hub" 262715fe7afSHarry Ciao depends on EDAC_MM_EDAC && PCI && PPC_MAPLE 26358b4ce6fSHarry Ciao help 26458b4ce6fSHarry Ciao Support for error detection and correction on the 26558b4ce6fSHarry Ciao AMD8111 HyperTransport I/O Hub chip. 266715fe7afSHarry Ciao Note, add more Kconfig dependency if it's adopted 267715fe7afSHarry Ciao on some machine other than Maple. 26858b4ce6fSHarry Ciao 2692a9036afSHarry Ciaoconfig EDAC_CPC925 2702a9036afSHarry Ciao tristate "IBM CPC925 Memory Controller (PPC970FX)" 2712a9036afSHarry Ciao depends on EDAC_MM_EDAC && PPC64 2722a9036afSHarry Ciao help 2732a9036afSHarry Ciao Support for error detection and correction on the 2742a9036afSHarry Ciao IBM CPC925 Bridge and Memory Controller, which is 2752a9036afSHarry Ciao a companion chip to the PowerPC 970 family of 2762a9036afSHarry Ciao processors. 2772a9036afSHarry Ciao 278751cb5e5SJan Engelhardtendif # EDAC 279