1 # SPDX-License-Identifier: GPL-2.0-only 2 # 3 4 config AMD_AE4DMA 5 tristate "AMD AE4DMA Engine" 6 depends on (X86_64 || COMPILE_TEST) && PCI 7 depends on AMD_PTDMA 8 select DMA_ENGINE 9 select DMA_VIRTUAL_CHANNELS 10 help 11 Enable support for the AMD AE4DMA controller. This controller 12 provides DMA capabilities to perform high bandwidth memory to 13 memory and IO copy operations. It performs DMA transfer through 14 queue-based descriptor management. This DMA controller is intended 15 to be used with AMD Non-Transparent Bridge devices and not for 16 general purpose peripheral DMA. 17 18 config AMD_PTDMA 19 tristate "AMD PassThru DMA Engine" 20 depends on X86_64 && PCI 21 select DMA_ENGINE 22 select DMA_VIRTUAL_CHANNELS 23 help 24 Enable support for the AMD PTDMA controller. This controller 25 provides DMA capabilities to perform high bandwidth memory to 26 memory and IO copy operations. It performs DMA transfer through 27 queue-based descriptor management. This DMA controller is intended 28 to be used with AMD Non-Transparent Bridge devices and not for 29 general purpose peripheral DMA. 30 31 config AMD_QDMA 32 tristate "AMD Queue-based DMA" 33 depends on HAS_IOMEM 34 select DMA_ENGINE 35 select DMA_VIRTUAL_CHANNELS 36 select REGMAP_MMIO 37 help 38 Enable support for the AMD Queue-based DMA subsystem. The primary 39 mechanism to transfer data using the QDMA is for the QDMA engine to 40 operate on instructions (descriptors) provided by the host operating 41 system. Using the descriptors, the QDMA can move data in either the 42 Host to Card (H2C) direction or the Card to Host (C2H) direction. 43