xref: /linux/drivers/crypto/intel/qat/qat_6xxx/adf_drv.c (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright(c) 2025 Intel Corporation */
3 #include <linux/array_size.h>
4 #include <linux/device.h>
5 #include <linux/dma-mapping.h>
6 #include <linux/errno.h>
7 #include <linux/list.h>
8 #include <linux/module.h>
9 #include <linux/pci.h>
10 #include <linux/types.h>
11 
12 #include <adf_accel_devices.h>
13 #include <adf_cfg.h>
14 #include <adf_common_drv.h>
15 #include <adf_dbgfs.h>
16 
17 #include "adf_gen6_shared.h"
18 #include "adf_6xxx_hw_data.h"
19 
20 static int bar_map[] = {
21 	0,	/* SRAM */
22 	2,	/* PMISC */
23 	4,	/* ETR */
24 };
25 
26 static void adf_device_down(void *accel_dev)
27 {
28 	adf_dev_down(accel_dev);
29 }
30 
31 static void adf_dbgfs_cleanup(void *accel_dev)
32 {
33 	adf_dbgfs_exit(accel_dev);
34 }
35 
36 static void adf_cfg_device_remove(void *accel_dev)
37 {
38 	adf_cfg_dev_remove(accel_dev);
39 }
40 
41 static void adf_cleanup_hw_data(void *accel_dev)
42 {
43 	struct adf_accel_dev *accel_device = accel_dev;
44 
45 	if (accel_device->hw_device) {
46 		adf_clean_hw_data_6xxx(accel_device->hw_device);
47 		accel_device->hw_device = NULL;
48 	}
49 }
50 
51 static void adf_devmgr_remove(void *accel_dev)
52 {
53 	adf_devmgr_rm_dev(accel_dev, NULL);
54 }
55 
56 static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
57 {
58 	struct adf_accel_pci *accel_pci_dev;
59 	struct adf_hw_device_data *hw_data;
60 	struct device *dev = &pdev->dev;
61 	struct adf_accel_dev *accel_dev;
62 	struct adf_bar *bar;
63 	unsigned int i;
64 	int ret;
65 
66 	if (num_possible_nodes() > 1 && dev_to_node(dev) < 0) {
67 		/*
68 		 * If the accelerator is connected to a node with no memory
69 		 * there is no point in using the accelerator since the remote
70 		 * memory transaction will be very slow.
71 		 */
72 		return dev_err_probe(dev, -EINVAL, "Invalid NUMA configuration.\n");
73 	}
74 
75 	accel_dev = devm_kzalloc(dev, sizeof(*accel_dev), GFP_KERNEL);
76 	if (!accel_dev)
77 		return -ENOMEM;
78 
79 	INIT_LIST_HEAD(&accel_dev->crypto_list);
80 	INIT_LIST_HEAD(&accel_dev->list);
81 	accel_pci_dev = &accel_dev->accel_pci_dev;
82 	accel_pci_dev->pci_dev = pdev;
83 	accel_dev->owner = THIS_MODULE;
84 
85 	hw_data = devm_kzalloc(dev, sizeof(*hw_data), GFP_KERNEL);
86 	if (!hw_data)
87 		return -ENOMEM;
88 
89 	pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);
90 	pci_read_config_dword(pdev, ADF_GEN6_FUSECTL4_OFFSET, &hw_data->fuses[ADF_FUSECTL4]);
91 	pci_read_config_dword(pdev, ADF_GEN6_FUSECTL0_OFFSET, &hw_data->fuses[ADF_FUSECTL0]);
92 	pci_read_config_dword(pdev, ADF_GEN6_FUSECTL1_OFFSET, &hw_data->fuses[ADF_FUSECTL1]);
93 
94 	if (!(hw_data->fuses[ADF_FUSECTL1] & ICP_ACCEL_GEN6_MASK_WCP_WAT_SLICE))
95 		return dev_err_probe(dev, -EFAULT, "Wireless mode is not supported.\n");
96 
97 	/* Enable PCI device */
98 	ret = pcim_enable_device(pdev);
99 	if (ret)
100 		return dev_err_probe(dev, ret, "Cannot enable PCI device.\n");
101 
102 	ret = adf_devmgr_add_dev(accel_dev, NULL);
103 	if (ret)
104 		return dev_err_probe(dev, ret, "Failed to add new accelerator device.\n");
105 
106 	ret = devm_add_action_or_reset(dev, adf_devmgr_remove, accel_dev);
107 	if (ret)
108 		return ret;
109 
110 	accel_dev->hw_device = hw_data;
111 	adf_init_hw_data_6xxx(accel_dev->hw_device);
112 
113 	ret = devm_add_action_or_reset(dev, adf_cleanup_hw_data, accel_dev);
114 	if (ret)
115 		return ret;
116 
117 	/* Get Accelerators and Accelerator Engine masks */
118 	hw_data->accel_mask = hw_data->get_accel_mask(hw_data);
119 	hw_data->ae_mask = hw_data->get_ae_mask(hw_data);
120 	accel_pci_dev->sku = hw_data->get_sku(hw_data);
121 
122 	/* If the device has no acceleration engines then ignore it */
123 	if (!hw_data->accel_mask || !hw_data->ae_mask ||
124 	    (~hw_data->ae_mask & ADF_GEN6_ACCELERATORS_MASK)) {
125 		ret = -EFAULT;
126 		return dev_err_probe(dev, ret, "No acceleration units were found.\n");
127 	}
128 
129 	/* Create device configuration table */
130 	ret = adf_cfg_dev_add(accel_dev);
131 	if (ret)
132 		return ret;
133 
134 	ret = devm_add_action_or_reset(dev, adf_cfg_device_remove, accel_dev);
135 	if (ret)
136 		return ret;
137 
138 	/* Set DMA identifier */
139 	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
140 	if (ret)
141 		return dev_err_probe(dev, ret, "No usable DMA configuration.\n");
142 
143 	ret = adf_gen6_cfg_dev_init(accel_dev);
144 	if (ret)
145 		return dev_err_probe(dev, ret, "Failed to initialize configuration.\n");
146 
147 	/* Get accelerator capability mask */
148 	hw_data->accel_capabilities_mask = hw_data->get_accel_cap(accel_dev);
149 	if (!hw_data->accel_capabilities_mask) {
150 		ret = -EINVAL;
151 		return dev_err_probe(dev, ret, "Failed to get capabilities mask.\n");
152 	}
153 
154 	for (i = 0; i < ARRAY_SIZE(bar_map); i++) {
155 		bar = &accel_pci_dev->pci_bars[i];
156 
157 		/* Map 64-bit PCIe BAR */
158 		bar->virt_addr = pcim_iomap_region(pdev, bar_map[i], pci_name(pdev));
159 		if (IS_ERR(bar->virt_addr)) {
160 			ret = PTR_ERR(bar->virt_addr);
161 			return dev_err_probe(dev, ret, "Failed to ioremap PCI region.\n");
162 		}
163 	}
164 
165 	pci_set_master(pdev);
166 
167 	/*
168 	 * The PCI config space is saved at this point and will be restored
169 	 * after a Function Level Reset (FLR) as the FLR does not completely
170 	 * restore it.
171 	 */
172 	ret = pci_save_state(pdev);
173 	if (ret)
174 		return dev_err_probe(dev, ret, "Failed to save pci state.\n");
175 
176 	accel_dev->ras_errors.enabled = true;
177 
178 	adf_dbgfs_init(accel_dev);
179 
180 	ret = devm_add_action_or_reset(dev, adf_dbgfs_cleanup, accel_dev);
181 	if (ret)
182 		return ret;
183 
184 	ret = adf_dev_up(accel_dev, true);
185 	if (ret)
186 		return ret;
187 
188 	ret = devm_add_action_or_reset(dev, adf_device_down, accel_dev);
189 	if (ret)
190 		return ret;
191 
192 	ret = adf_sysfs_init(accel_dev);
193 
194 	return ret;
195 }
196 
197 static void adf_shutdown(struct pci_dev *pdev)
198 {
199 	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
200 
201 	adf_dev_down(accel_dev);
202 }
203 
204 static const struct pci_device_id adf_pci_tbl[] = {
205 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_6XXX) },
206 	{ }
207 };
208 MODULE_DEVICE_TABLE(pci, adf_pci_tbl);
209 
210 static struct pci_driver adf_driver = {
211 	.id_table = adf_pci_tbl,
212 	.name = ADF_6XXX_DEVICE_NAME,
213 	.probe = adf_probe,
214 	.shutdown = adf_shutdown,
215 	.sriov_configure = adf_sriov_configure,
216 	.err_handler = &adf_err_handler,
217 };
218 module_pci_driver(adf_driver);
219 
220 MODULE_LICENSE("GPL");
221 MODULE_AUTHOR("Intel");
222 MODULE_FIRMWARE(ADF_6XXX_FW);
223 MODULE_FIRMWARE(ADF_6XXX_MMP);
224 MODULE_DESCRIPTION("Intel(R) QuickAssist Technology for GEN6 Devices");
225 MODULE_SOFTDEP("pre: crypto-intel_qat");
226 MODULE_IMPORT_NS("CRYPTO_QAT");
227