1 /* 2 * acpi-cpufreq.c - ACPI Processor P-States Driver 3 * 4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> 7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> 8 * 9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License along 22 * with this program; if not, write to the Free Software Foundation, Inc., 23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 24 * 25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 26 */ 27 28 #include <linux/kernel.h> 29 #include <linux/module.h> 30 #include <linux/init.h> 31 #include <linux/smp.h> 32 #include <linux/sched.h> 33 #include <linux/cpufreq.h> 34 #include <linux/compiler.h> 35 #include <linux/dmi.h> 36 #include <linux/slab.h> 37 38 #include <linux/acpi.h> 39 #include <linux/io.h> 40 #include <linux/delay.h> 41 #include <linux/uaccess.h> 42 43 #include <acpi/processor.h> 44 45 #include <asm/msr.h> 46 #include <asm/processor.h> 47 #include <asm/cpufeature.h> 48 49 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); 50 MODULE_DESCRIPTION("ACPI Processor P-States Driver"); 51 MODULE_LICENSE("GPL"); 52 53 #define PFX "acpi-cpufreq: " 54 55 enum { 56 UNDEFINED_CAPABLE = 0, 57 SYSTEM_INTEL_MSR_CAPABLE, 58 SYSTEM_AMD_MSR_CAPABLE, 59 SYSTEM_IO_CAPABLE, 60 }; 61 62 #define INTEL_MSR_RANGE (0xffff) 63 #define AMD_MSR_RANGE (0x7) 64 65 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25) 66 67 struct acpi_cpufreq_data { 68 struct cpufreq_frequency_table *freq_table; 69 unsigned int resume; 70 unsigned int cpu_feature; 71 unsigned int acpi_perf_cpu; 72 cpumask_var_t freqdomain_cpus; 73 }; 74 75 /* acpi_perf_data is a pointer to percpu data. */ 76 static struct acpi_processor_performance __percpu *acpi_perf_data; 77 78 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data) 79 { 80 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu); 81 } 82 83 static struct cpufreq_driver acpi_cpufreq_driver; 84 85 static unsigned int acpi_pstate_strict; 86 static struct msr __percpu *msrs; 87 88 static bool boost_state(unsigned int cpu) 89 { 90 u32 lo, hi; 91 u64 msr; 92 93 switch (boot_cpu_data.x86_vendor) { 94 case X86_VENDOR_INTEL: 95 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi); 96 msr = lo | ((u64)hi << 32); 97 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); 98 case X86_VENDOR_AMD: 99 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); 100 msr = lo | ((u64)hi << 32); 101 return !(msr & MSR_K7_HWCR_CPB_DIS); 102 } 103 return false; 104 } 105 106 static void boost_set_msrs(bool enable, const struct cpumask *cpumask) 107 { 108 u32 cpu; 109 u32 msr_addr; 110 u64 msr_mask; 111 112 switch (boot_cpu_data.x86_vendor) { 113 case X86_VENDOR_INTEL: 114 msr_addr = MSR_IA32_MISC_ENABLE; 115 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE; 116 break; 117 case X86_VENDOR_AMD: 118 msr_addr = MSR_K7_HWCR; 119 msr_mask = MSR_K7_HWCR_CPB_DIS; 120 break; 121 default: 122 return; 123 } 124 125 rdmsr_on_cpus(cpumask, msr_addr, msrs); 126 127 for_each_cpu(cpu, cpumask) { 128 struct msr *reg = per_cpu_ptr(msrs, cpu); 129 if (enable) 130 reg->q &= ~msr_mask; 131 else 132 reg->q |= msr_mask; 133 } 134 135 wrmsr_on_cpus(cpumask, msr_addr, msrs); 136 } 137 138 static int _store_boost(int val) 139 { 140 get_online_cpus(); 141 boost_set_msrs(val, cpu_online_mask); 142 put_online_cpus(); 143 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis"); 144 145 return 0; 146 } 147 148 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf) 149 { 150 struct acpi_cpufreq_data *data = policy->driver_data; 151 152 if (unlikely(!data)) 153 return -ENODEV; 154 155 return cpufreq_show_cpus(data->freqdomain_cpus, buf); 156 } 157 158 cpufreq_freq_attr_ro(freqdomain_cpus); 159 160 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 161 static ssize_t store_boost(const char *buf, size_t count) 162 { 163 int ret; 164 unsigned long val = 0; 165 166 if (!acpi_cpufreq_driver.boost_supported) 167 return -EINVAL; 168 169 ret = kstrtoul(buf, 10, &val); 170 if (ret || (val > 1)) 171 return -EINVAL; 172 173 _store_boost((int) val); 174 175 return count; 176 } 177 178 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf, 179 size_t count) 180 { 181 return store_boost(buf, count); 182 } 183 184 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf) 185 { 186 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled); 187 } 188 189 cpufreq_freq_attr_rw(cpb); 190 #endif 191 192 static int check_est_cpu(unsigned int cpuid) 193 { 194 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 195 196 return cpu_has(cpu, X86_FEATURE_EST); 197 } 198 199 static int check_amd_hwpstate_cpu(unsigned int cpuid) 200 { 201 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 202 203 return cpu_has(cpu, X86_FEATURE_HW_PSTATE); 204 } 205 206 static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) 207 { 208 struct acpi_processor_performance *perf; 209 int i; 210 211 perf = to_perf_data(data); 212 213 for (i = 0; i < perf->state_count; i++) { 214 if (value == perf->states[i].status) 215 return data->freq_table[i].frequency; 216 } 217 return 0; 218 } 219 220 static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) 221 { 222 struct cpufreq_frequency_table *pos; 223 struct acpi_processor_performance *perf; 224 225 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) 226 msr &= AMD_MSR_RANGE; 227 else 228 msr &= INTEL_MSR_RANGE; 229 230 perf = to_perf_data(data); 231 232 cpufreq_for_each_entry(pos, data->freq_table) 233 if (msr == perf->states[pos->driver_data].status) 234 return pos->frequency; 235 return data->freq_table[0].frequency; 236 } 237 238 static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) 239 { 240 switch (data->cpu_feature) { 241 case SYSTEM_INTEL_MSR_CAPABLE: 242 case SYSTEM_AMD_MSR_CAPABLE: 243 return extract_msr(val, data); 244 case SYSTEM_IO_CAPABLE: 245 return extract_io(val, data); 246 default: 247 return 0; 248 } 249 } 250 251 struct msr_addr { 252 u32 reg; 253 }; 254 255 struct io_addr { 256 u16 port; 257 u8 bit_width; 258 }; 259 260 struct drv_cmd { 261 unsigned int type; 262 const struct cpumask *mask; 263 union { 264 struct msr_addr msr; 265 struct io_addr io; 266 } addr; 267 u32 val; 268 }; 269 270 /* Called via smp_call_function_single(), on the target CPU */ 271 static void do_drv_read(void *_cmd) 272 { 273 struct drv_cmd *cmd = _cmd; 274 u32 h; 275 276 switch (cmd->type) { 277 case SYSTEM_INTEL_MSR_CAPABLE: 278 case SYSTEM_AMD_MSR_CAPABLE: 279 rdmsr(cmd->addr.msr.reg, cmd->val, h); 280 break; 281 case SYSTEM_IO_CAPABLE: 282 acpi_os_read_port((acpi_io_address)cmd->addr.io.port, 283 &cmd->val, 284 (u32)cmd->addr.io.bit_width); 285 break; 286 default: 287 break; 288 } 289 } 290 291 /* Called via smp_call_function_many(), on the target CPUs */ 292 static void do_drv_write(void *_cmd) 293 { 294 struct drv_cmd *cmd = _cmd; 295 u32 lo, hi; 296 297 switch (cmd->type) { 298 case SYSTEM_INTEL_MSR_CAPABLE: 299 rdmsr(cmd->addr.msr.reg, lo, hi); 300 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE); 301 wrmsr(cmd->addr.msr.reg, lo, hi); 302 break; 303 case SYSTEM_AMD_MSR_CAPABLE: 304 wrmsr(cmd->addr.msr.reg, cmd->val, 0); 305 break; 306 case SYSTEM_IO_CAPABLE: 307 acpi_os_write_port((acpi_io_address)cmd->addr.io.port, 308 cmd->val, 309 (u32)cmd->addr.io.bit_width); 310 break; 311 default: 312 break; 313 } 314 } 315 316 static void drv_read(struct drv_cmd *cmd) 317 { 318 int err; 319 cmd->val = 0; 320 321 err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1); 322 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ 323 } 324 325 static void drv_write(struct drv_cmd *cmd) 326 { 327 int this_cpu; 328 329 this_cpu = get_cpu(); 330 if (cpumask_test_cpu(this_cpu, cmd->mask)) 331 do_drv_write(cmd); 332 smp_call_function_many(cmd->mask, do_drv_write, cmd, 1); 333 put_cpu(); 334 } 335 336 static u32 337 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data) 338 { 339 struct acpi_processor_performance *perf; 340 struct drv_cmd cmd; 341 342 if (unlikely(cpumask_empty(mask))) 343 return 0; 344 345 switch (data->cpu_feature) { 346 case SYSTEM_INTEL_MSR_CAPABLE: 347 cmd.type = SYSTEM_INTEL_MSR_CAPABLE; 348 cmd.addr.msr.reg = MSR_IA32_PERF_CTL; 349 break; 350 case SYSTEM_AMD_MSR_CAPABLE: 351 cmd.type = SYSTEM_AMD_MSR_CAPABLE; 352 cmd.addr.msr.reg = MSR_AMD_PERF_CTL; 353 break; 354 case SYSTEM_IO_CAPABLE: 355 cmd.type = SYSTEM_IO_CAPABLE; 356 perf = to_perf_data(data); 357 cmd.addr.io.port = perf->control_register.address; 358 cmd.addr.io.bit_width = perf->control_register.bit_width; 359 break; 360 default: 361 return 0; 362 } 363 364 cmd.mask = mask; 365 drv_read(&cmd); 366 367 pr_debug("get_cur_val = %u\n", cmd.val); 368 369 return cmd.val; 370 } 371 372 static unsigned int get_cur_freq_on_cpu(unsigned int cpu) 373 { 374 struct acpi_cpufreq_data *data; 375 struct cpufreq_policy *policy; 376 unsigned int freq; 377 unsigned int cached_freq; 378 379 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu); 380 381 policy = cpufreq_cpu_get_raw(cpu); 382 if (unlikely(!policy)) 383 return 0; 384 385 data = policy->driver_data; 386 if (unlikely(!data || !data->freq_table)) 387 return 0; 388 389 cached_freq = data->freq_table[to_perf_data(data)->state].frequency; 390 freq = extract_freq(get_cur_val(cpumask_of(cpu), data), data); 391 if (freq != cached_freq) { 392 /* 393 * The dreaded BIOS frequency change behind our back. 394 * Force set the frequency on next target call. 395 */ 396 data->resume = 1; 397 } 398 399 pr_debug("cur freq = %u\n", freq); 400 401 return freq; 402 } 403 404 static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq, 405 struct acpi_cpufreq_data *data) 406 { 407 unsigned int cur_freq; 408 unsigned int i; 409 410 for (i = 0; i < 100; i++) { 411 cur_freq = extract_freq(get_cur_val(mask, data), data); 412 if (cur_freq == freq) 413 return 1; 414 udelay(10); 415 } 416 return 0; 417 } 418 419 static int acpi_cpufreq_target(struct cpufreq_policy *policy, 420 unsigned int index) 421 { 422 struct acpi_cpufreq_data *data = policy->driver_data; 423 struct acpi_processor_performance *perf; 424 struct drv_cmd cmd; 425 unsigned int next_perf_state = 0; /* Index into perf table */ 426 int result = 0; 427 428 if (unlikely(data == NULL || data->freq_table == NULL)) { 429 return -ENODEV; 430 } 431 432 perf = to_perf_data(data); 433 next_perf_state = data->freq_table[index].driver_data; 434 if (perf->state == next_perf_state) { 435 if (unlikely(data->resume)) { 436 pr_debug("Called after resume, resetting to P%d\n", 437 next_perf_state); 438 data->resume = 0; 439 } else { 440 pr_debug("Already at target state (P%d)\n", 441 next_perf_state); 442 goto out; 443 } 444 } 445 446 switch (data->cpu_feature) { 447 case SYSTEM_INTEL_MSR_CAPABLE: 448 cmd.type = SYSTEM_INTEL_MSR_CAPABLE; 449 cmd.addr.msr.reg = MSR_IA32_PERF_CTL; 450 cmd.val = (u32) perf->states[next_perf_state].control; 451 break; 452 case SYSTEM_AMD_MSR_CAPABLE: 453 cmd.type = SYSTEM_AMD_MSR_CAPABLE; 454 cmd.addr.msr.reg = MSR_AMD_PERF_CTL; 455 cmd.val = (u32) perf->states[next_perf_state].control; 456 break; 457 case SYSTEM_IO_CAPABLE: 458 cmd.type = SYSTEM_IO_CAPABLE; 459 cmd.addr.io.port = perf->control_register.address; 460 cmd.addr.io.bit_width = perf->control_register.bit_width; 461 cmd.val = (u32) perf->states[next_perf_state].control; 462 break; 463 default: 464 result = -ENODEV; 465 goto out; 466 } 467 468 /* cpufreq holds the hotplug lock, so we are safe from here on */ 469 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) 470 cmd.mask = policy->cpus; 471 else 472 cmd.mask = cpumask_of(policy->cpu); 473 474 drv_write(&cmd); 475 476 if (acpi_pstate_strict) { 477 if (!check_freqs(cmd.mask, data->freq_table[index].frequency, 478 data)) { 479 pr_debug("acpi_cpufreq_target failed (%d)\n", 480 policy->cpu); 481 result = -EAGAIN; 482 } 483 } 484 485 if (!result) 486 perf->state = next_perf_state; 487 488 out: 489 return result; 490 } 491 492 static unsigned long 493 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) 494 { 495 struct acpi_processor_performance *perf; 496 497 perf = to_perf_data(data); 498 if (cpu_khz) { 499 /* search the closest match to cpu_khz */ 500 unsigned int i; 501 unsigned long freq; 502 unsigned long freqn = perf->states[0].core_frequency * 1000; 503 504 for (i = 0; i < (perf->state_count-1); i++) { 505 freq = freqn; 506 freqn = perf->states[i+1].core_frequency * 1000; 507 if ((2 * cpu_khz) > (freqn + freq)) { 508 perf->state = i; 509 return freq; 510 } 511 } 512 perf->state = perf->state_count-1; 513 return freqn; 514 } else { 515 /* assume CPU is at P0... */ 516 perf->state = 0; 517 return perf->states[0].core_frequency * 1000; 518 } 519 } 520 521 static void free_acpi_perf_data(void) 522 { 523 unsigned int i; 524 525 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ 526 for_each_possible_cpu(i) 527 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) 528 ->shared_cpu_map); 529 free_percpu(acpi_perf_data); 530 } 531 532 static int boost_notify(struct notifier_block *nb, unsigned long action, 533 void *hcpu) 534 { 535 unsigned cpu = (long)hcpu; 536 const struct cpumask *cpumask; 537 538 cpumask = get_cpu_mask(cpu); 539 540 /* 541 * Clear the boost-disable bit on the CPU_DOWN path so that 542 * this cpu cannot block the remaining ones from boosting. On 543 * the CPU_UP path we simply keep the boost-disable flag in 544 * sync with the current global state. 545 */ 546 547 switch (action) { 548 case CPU_UP_PREPARE: 549 case CPU_UP_PREPARE_FROZEN: 550 boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask); 551 break; 552 553 case CPU_DOWN_PREPARE: 554 case CPU_DOWN_PREPARE_FROZEN: 555 boost_set_msrs(1, cpumask); 556 break; 557 558 default: 559 break; 560 } 561 562 return NOTIFY_OK; 563 } 564 565 566 static struct notifier_block boost_nb = { 567 .notifier_call = boost_notify, 568 }; 569 570 /* 571 * acpi_cpufreq_early_init - initialize ACPI P-States library 572 * 573 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) 574 * in order to determine correct frequency and voltage pairings. We can 575 * do _PDC and _PSD and find out the processor dependency for the 576 * actual init that will happen later... 577 */ 578 static int __init acpi_cpufreq_early_init(void) 579 { 580 unsigned int i; 581 pr_debug("acpi_cpufreq_early_init\n"); 582 583 acpi_perf_data = alloc_percpu(struct acpi_processor_performance); 584 if (!acpi_perf_data) { 585 pr_debug("Memory allocation error for acpi_perf_data.\n"); 586 return -ENOMEM; 587 } 588 for_each_possible_cpu(i) { 589 if (!zalloc_cpumask_var_node( 590 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, 591 GFP_KERNEL, cpu_to_node(i))) { 592 593 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ 594 free_acpi_perf_data(); 595 return -ENOMEM; 596 } 597 } 598 599 /* Do initialization in ACPI core */ 600 acpi_processor_preregister_performance(acpi_perf_data); 601 return 0; 602 } 603 604 #ifdef CONFIG_SMP 605 /* 606 * Some BIOSes do SW_ANY coordination internally, either set it up in hw 607 * or do it in BIOS firmware and won't inform about it to OS. If not 608 * detected, this has a side effect of making CPU run at a different speed 609 * than OS intended it to run at. Detect it and handle it cleanly. 610 */ 611 static int bios_with_sw_any_bug; 612 613 static int sw_any_bug_found(const struct dmi_system_id *d) 614 { 615 bios_with_sw_any_bug = 1; 616 return 0; 617 } 618 619 static const struct dmi_system_id sw_any_bug_dmi_table[] = { 620 { 621 .callback = sw_any_bug_found, 622 .ident = "Supermicro Server X6DLP", 623 .matches = { 624 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 625 DMI_MATCH(DMI_BIOS_VERSION, "080010"), 626 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), 627 }, 628 }, 629 { } 630 }; 631 632 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) 633 { 634 /* Intel Xeon Processor 7100 Series Specification Update 635 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf 636 * AL30: A Machine Check Exception (MCE) Occurring during an 637 * Enhanced Intel SpeedStep Technology Ratio Change May Cause 638 * Both Processor Cores to Lock Up. */ 639 if (c->x86_vendor == X86_VENDOR_INTEL) { 640 if ((c->x86 == 15) && 641 (c->x86_model == 6) && 642 (c->x86_mask == 8)) { 643 printk(KERN_INFO "acpi-cpufreq: Intel(R) " 644 "Xeon(R) 7100 Errata AL30, processors may " 645 "lock up on frequency changes: disabling " 646 "acpi-cpufreq.\n"); 647 return -ENODEV; 648 } 649 } 650 return 0; 651 } 652 #endif 653 654 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) 655 { 656 unsigned int i; 657 unsigned int valid_states = 0; 658 unsigned int cpu = policy->cpu; 659 struct acpi_cpufreq_data *data; 660 unsigned int result = 0; 661 struct cpuinfo_x86 *c = &cpu_data(policy->cpu); 662 struct acpi_processor_performance *perf; 663 #ifdef CONFIG_SMP 664 static int blacklisted; 665 #endif 666 667 pr_debug("acpi_cpufreq_cpu_init\n"); 668 669 #ifdef CONFIG_SMP 670 if (blacklisted) 671 return blacklisted; 672 blacklisted = acpi_cpufreq_blacklist(c); 673 if (blacklisted) 674 return blacklisted; 675 #endif 676 677 data = kzalloc(sizeof(*data), GFP_KERNEL); 678 if (!data) 679 return -ENOMEM; 680 681 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) { 682 result = -ENOMEM; 683 goto err_free; 684 } 685 686 perf = per_cpu_ptr(acpi_perf_data, cpu); 687 data->acpi_perf_cpu = cpu; 688 policy->driver_data = data; 689 690 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) 691 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; 692 693 result = acpi_processor_register_performance(perf, cpu); 694 if (result) 695 goto err_free_mask; 696 697 policy->shared_type = perf->shared_type; 698 699 /* 700 * Will let policy->cpus know about dependency only when software 701 * coordination is required. 702 */ 703 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || 704 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { 705 cpumask_copy(policy->cpus, perf->shared_cpu_map); 706 } 707 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map); 708 709 #ifdef CONFIG_SMP 710 dmi_check_system(sw_any_bug_dmi_table); 711 if (bios_with_sw_any_bug && !policy_is_shared(policy)) { 712 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; 713 cpumask_copy(policy->cpus, topology_core_cpumask(cpu)); 714 } 715 716 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) { 717 cpumask_clear(policy->cpus); 718 cpumask_set_cpu(cpu, policy->cpus); 719 cpumask_copy(data->freqdomain_cpus, 720 topology_sibling_cpumask(cpu)); 721 policy->shared_type = CPUFREQ_SHARED_TYPE_HW; 722 pr_info_once(PFX "overriding BIOS provided _PSD data\n"); 723 } 724 #endif 725 726 /* capability check */ 727 if (perf->state_count <= 1) { 728 pr_debug("No P-States\n"); 729 result = -ENODEV; 730 goto err_unreg; 731 } 732 733 if (perf->control_register.space_id != perf->status_register.space_id) { 734 result = -ENODEV; 735 goto err_unreg; 736 } 737 738 switch (perf->control_register.space_id) { 739 case ACPI_ADR_SPACE_SYSTEM_IO: 740 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && 741 boot_cpu_data.x86 == 0xf) { 742 pr_debug("AMD K8 systems must use native drivers.\n"); 743 result = -ENODEV; 744 goto err_unreg; 745 } 746 pr_debug("SYSTEM IO addr space\n"); 747 data->cpu_feature = SYSTEM_IO_CAPABLE; 748 break; 749 case ACPI_ADR_SPACE_FIXED_HARDWARE: 750 pr_debug("HARDWARE addr space\n"); 751 if (check_est_cpu(cpu)) { 752 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; 753 break; 754 } 755 if (check_amd_hwpstate_cpu(cpu)) { 756 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE; 757 break; 758 } 759 result = -ENODEV; 760 goto err_unreg; 761 default: 762 pr_debug("Unknown addr space %d\n", 763 (u32) (perf->control_register.space_id)); 764 result = -ENODEV; 765 goto err_unreg; 766 } 767 768 data->freq_table = kzalloc(sizeof(*data->freq_table) * 769 (perf->state_count+1), GFP_KERNEL); 770 if (!data->freq_table) { 771 result = -ENOMEM; 772 goto err_unreg; 773 } 774 775 /* detect transition latency */ 776 policy->cpuinfo.transition_latency = 0; 777 for (i = 0; i < perf->state_count; i++) { 778 if ((perf->states[i].transition_latency * 1000) > 779 policy->cpuinfo.transition_latency) 780 policy->cpuinfo.transition_latency = 781 perf->states[i].transition_latency * 1000; 782 } 783 784 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ 785 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && 786 policy->cpuinfo.transition_latency > 20 * 1000) { 787 policy->cpuinfo.transition_latency = 20 * 1000; 788 printk_once(KERN_INFO 789 "P-state transition latency capped at 20 uS\n"); 790 } 791 792 /* table init */ 793 for (i = 0; i < perf->state_count; i++) { 794 if (i > 0 && perf->states[i].core_frequency >= 795 data->freq_table[valid_states-1].frequency / 1000) 796 continue; 797 798 data->freq_table[valid_states].driver_data = i; 799 data->freq_table[valid_states].frequency = 800 perf->states[i].core_frequency * 1000; 801 valid_states++; 802 } 803 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; 804 perf->state = 0; 805 806 result = cpufreq_table_validate_and_show(policy, data->freq_table); 807 if (result) 808 goto err_freqfree; 809 810 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq) 811 printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n"); 812 813 switch (perf->control_register.space_id) { 814 case ACPI_ADR_SPACE_SYSTEM_IO: 815 /* 816 * The core will not set policy->cur, because 817 * cpufreq_driver->get is NULL, so we need to set it here. 818 * However, we have to guess it, because the current speed is 819 * unknown and not detectable via IO ports. 820 */ 821 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); 822 break; 823 case ACPI_ADR_SPACE_FIXED_HARDWARE: 824 acpi_cpufreq_driver.get = get_cur_freq_on_cpu; 825 break; 826 default: 827 break; 828 } 829 830 /* notify BIOS that we exist */ 831 acpi_processor_notify_smm(THIS_MODULE); 832 833 pr_debug("CPU%u - ACPI performance management activated.\n", cpu); 834 for (i = 0; i < perf->state_count; i++) 835 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n", 836 (i == perf->state ? '*' : ' '), i, 837 (u32) perf->states[i].core_frequency, 838 (u32) perf->states[i].power, 839 (u32) perf->states[i].transition_latency); 840 841 /* 842 * the first call to ->target() should result in us actually 843 * writing something to the appropriate registers. 844 */ 845 data->resume = 1; 846 847 return result; 848 849 err_freqfree: 850 kfree(data->freq_table); 851 err_unreg: 852 acpi_processor_unregister_performance(cpu); 853 err_free_mask: 854 free_cpumask_var(data->freqdomain_cpus); 855 err_free: 856 kfree(data); 857 policy->driver_data = NULL; 858 859 return result; 860 } 861 862 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) 863 { 864 struct acpi_cpufreq_data *data = policy->driver_data; 865 866 pr_debug("acpi_cpufreq_cpu_exit\n"); 867 868 if (data) { 869 policy->driver_data = NULL; 870 acpi_processor_unregister_performance(data->acpi_perf_cpu); 871 free_cpumask_var(data->freqdomain_cpus); 872 kfree(data->freq_table); 873 kfree(data); 874 } 875 876 return 0; 877 } 878 879 static int acpi_cpufreq_resume(struct cpufreq_policy *policy) 880 { 881 struct acpi_cpufreq_data *data = policy->driver_data; 882 883 pr_debug("acpi_cpufreq_resume\n"); 884 885 data->resume = 1; 886 887 return 0; 888 } 889 890 static struct freq_attr *acpi_cpufreq_attr[] = { 891 &cpufreq_freq_attr_scaling_available_freqs, 892 &freqdomain_cpus, 893 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 894 &cpb, 895 #endif 896 NULL, 897 }; 898 899 static struct cpufreq_driver acpi_cpufreq_driver = { 900 .verify = cpufreq_generic_frequency_table_verify, 901 .target_index = acpi_cpufreq_target, 902 .bios_limit = acpi_processor_get_bios_limit, 903 .init = acpi_cpufreq_cpu_init, 904 .exit = acpi_cpufreq_cpu_exit, 905 .resume = acpi_cpufreq_resume, 906 .name = "acpi-cpufreq", 907 .attr = acpi_cpufreq_attr, 908 .set_boost = _store_boost, 909 }; 910 911 static void __init acpi_cpufreq_boost_init(void) 912 { 913 if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) { 914 msrs = msrs_alloc(); 915 916 if (!msrs) 917 return; 918 919 acpi_cpufreq_driver.boost_supported = true; 920 acpi_cpufreq_driver.boost_enabled = boost_state(0); 921 922 cpu_notifier_register_begin(); 923 924 /* Force all MSRs to the same value */ 925 boost_set_msrs(acpi_cpufreq_driver.boost_enabled, 926 cpu_online_mask); 927 928 __register_cpu_notifier(&boost_nb); 929 930 cpu_notifier_register_done(); 931 } 932 } 933 934 static void acpi_cpufreq_boost_exit(void) 935 { 936 if (msrs) { 937 unregister_cpu_notifier(&boost_nb); 938 939 msrs_free(msrs); 940 msrs = NULL; 941 } 942 } 943 944 static int __init acpi_cpufreq_init(void) 945 { 946 int ret; 947 948 if (acpi_disabled) 949 return -ENODEV; 950 951 /* don't keep reloading if cpufreq_driver exists */ 952 if (cpufreq_get_current_driver()) 953 return -EEXIST; 954 955 pr_debug("acpi_cpufreq_init\n"); 956 957 ret = acpi_cpufreq_early_init(); 958 if (ret) 959 return ret; 960 961 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 962 /* this is a sysfs file with a strange name and an even stranger 963 * semantic - per CPU instantiation, but system global effect. 964 * Lets enable it only on AMD CPUs for compatibility reasons and 965 * only if configured. This is considered legacy code, which 966 * will probably be removed at some point in the future. 967 */ 968 if (!check_amd_hwpstate_cpu(0)) { 969 struct freq_attr **attr; 970 971 pr_debug("CPB unsupported, do not expose it\n"); 972 973 for (attr = acpi_cpufreq_attr; *attr; attr++) 974 if (*attr == &cpb) { 975 *attr = NULL; 976 break; 977 } 978 } 979 #endif 980 acpi_cpufreq_boost_init(); 981 982 ret = cpufreq_register_driver(&acpi_cpufreq_driver); 983 if (ret) { 984 free_acpi_perf_data(); 985 acpi_cpufreq_boost_exit(); 986 } 987 return ret; 988 } 989 990 static void __exit acpi_cpufreq_exit(void) 991 { 992 pr_debug("acpi_cpufreq_exit\n"); 993 994 acpi_cpufreq_boost_exit(); 995 996 cpufreq_unregister_driver(&acpi_cpufreq_driver); 997 998 free_acpi_perf_data(); 999 } 1000 1001 module_param(acpi_pstate_strict, uint, 0644); 1002 MODULE_PARM_DESC(acpi_pstate_strict, 1003 "value 0 or non-zero. non-zero -> strict ACPI checks are " 1004 "performed during frequency changes."); 1005 1006 late_initcall(acpi_cpufreq_init); 1007 module_exit(acpi_cpufreq_exit); 1008 1009 static const struct x86_cpu_id acpi_cpufreq_ids[] = { 1010 X86_FEATURE_MATCH(X86_FEATURE_ACPI), 1011 X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE), 1012 {} 1013 }; 1014 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids); 1015 1016 static const struct acpi_device_id processor_device_ids[] = { 1017 {ACPI_PROCESSOR_OBJECT_HID, }, 1018 {ACPI_PROCESSOR_DEVICE_HID, }, 1019 {}, 1020 }; 1021 MODULE_DEVICE_TABLE(acpi, processor_device_ids); 1022 1023 MODULE_ALIAS("acpi"); 1024