1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * acpi-cpufreq.c - ACPI Processor P-States Driver 4 * 5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 7 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> 8 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> 9 */ 10 11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 12 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/init.h> 16 #include <linux/smp.h> 17 #include <linux/sched.h> 18 #include <linux/cpufreq.h> 19 #include <linux/compiler.h> 20 #include <linux/dmi.h> 21 #include <linux/slab.h> 22 23 #include <linux/acpi.h> 24 #include <linux/io.h> 25 #include <linux/delay.h> 26 #include <linux/uaccess.h> 27 28 #include <acpi/processor.h> 29 #include <acpi/cppc_acpi.h> 30 31 #include <asm/msr.h> 32 #include <asm/processor.h> 33 #include <asm/cpufeature.h> 34 #include <asm/cpu_device_id.h> 35 36 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); 37 MODULE_DESCRIPTION("ACPI Processor P-States Driver"); 38 MODULE_LICENSE("GPL"); 39 40 enum { 41 UNDEFINED_CAPABLE = 0, 42 SYSTEM_INTEL_MSR_CAPABLE, 43 SYSTEM_AMD_MSR_CAPABLE, 44 SYSTEM_IO_CAPABLE, 45 }; 46 47 #define INTEL_MSR_RANGE (0xffff) 48 #define AMD_MSR_RANGE (0x7) 49 #define HYGON_MSR_RANGE (0x7) 50 51 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25) 52 53 struct acpi_cpufreq_data { 54 unsigned int resume; 55 unsigned int cpu_feature; 56 unsigned int acpi_perf_cpu; 57 cpumask_var_t freqdomain_cpus; 58 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val); 59 u32 (*cpu_freq_read)(struct acpi_pct_register *reg); 60 }; 61 62 /* acpi_perf_data is a pointer to percpu data. */ 63 static struct acpi_processor_performance __percpu *acpi_perf_data; 64 65 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data) 66 { 67 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu); 68 } 69 70 static struct cpufreq_driver acpi_cpufreq_driver; 71 72 static unsigned int acpi_pstate_strict; 73 74 static bool boost_state(unsigned int cpu) 75 { 76 u32 lo, hi; 77 u64 msr; 78 79 switch (boot_cpu_data.x86_vendor) { 80 case X86_VENDOR_INTEL: 81 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi); 82 msr = lo | ((u64)hi << 32); 83 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE); 84 case X86_VENDOR_HYGON: 85 case X86_VENDOR_AMD: 86 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); 87 msr = lo | ((u64)hi << 32); 88 return !(msr & MSR_K7_HWCR_CPB_DIS); 89 } 90 return false; 91 } 92 93 static int boost_set_msr(bool enable) 94 { 95 u32 msr_addr; 96 u64 msr_mask, val; 97 98 switch (boot_cpu_data.x86_vendor) { 99 case X86_VENDOR_INTEL: 100 msr_addr = MSR_IA32_MISC_ENABLE; 101 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE; 102 break; 103 case X86_VENDOR_HYGON: 104 case X86_VENDOR_AMD: 105 msr_addr = MSR_K7_HWCR; 106 msr_mask = MSR_K7_HWCR_CPB_DIS; 107 break; 108 default: 109 return -EINVAL; 110 } 111 112 rdmsrl(msr_addr, val); 113 114 if (enable) 115 val &= ~msr_mask; 116 else 117 val |= msr_mask; 118 119 wrmsrl(msr_addr, val); 120 return 0; 121 } 122 123 static void boost_set_msr_each(void *p_en) 124 { 125 bool enable = (bool) p_en; 126 127 boost_set_msr(enable); 128 } 129 130 static int set_boost(struct cpufreq_policy *policy, int val) 131 { 132 on_each_cpu_mask(policy->cpus, boost_set_msr_each, 133 (void *)(long)val, 1); 134 pr_debug("CPU %*pbl: Core Boosting %sabled.\n", 135 cpumask_pr_args(policy->cpus), val ? "en" : "dis"); 136 137 return 0; 138 } 139 140 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf) 141 { 142 struct acpi_cpufreq_data *data = policy->driver_data; 143 144 if (unlikely(!data)) 145 return -ENODEV; 146 147 return cpufreq_show_cpus(data->freqdomain_cpus, buf); 148 } 149 150 cpufreq_freq_attr_ro(freqdomain_cpus); 151 152 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 153 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf, 154 size_t count) 155 { 156 int ret; 157 unsigned int val = 0; 158 159 if (!acpi_cpufreq_driver.set_boost) 160 return -EINVAL; 161 162 ret = kstrtouint(buf, 10, &val); 163 if (ret || val > 1) 164 return -EINVAL; 165 166 cpus_read_lock(); 167 set_boost(policy, val); 168 cpus_read_unlock(); 169 170 return count; 171 } 172 173 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf) 174 { 175 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled); 176 } 177 178 cpufreq_freq_attr_rw(cpb); 179 #endif 180 181 static int check_est_cpu(unsigned int cpuid) 182 { 183 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 184 185 return cpu_has(cpu, X86_FEATURE_EST); 186 } 187 188 static int check_amd_hwpstate_cpu(unsigned int cpuid) 189 { 190 struct cpuinfo_x86 *cpu = &cpu_data(cpuid); 191 192 return cpu_has(cpu, X86_FEATURE_HW_PSTATE); 193 } 194 195 static unsigned extract_io(struct cpufreq_policy *policy, u32 value) 196 { 197 struct acpi_cpufreq_data *data = policy->driver_data; 198 struct acpi_processor_performance *perf; 199 int i; 200 201 perf = to_perf_data(data); 202 203 for (i = 0; i < perf->state_count; i++) { 204 if (value == perf->states[i].status) 205 return policy->freq_table[i].frequency; 206 } 207 return 0; 208 } 209 210 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr) 211 { 212 struct acpi_cpufreq_data *data = policy->driver_data; 213 struct cpufreq_frequency_table *pos; 214 struct acpi_processor_performance *perf; 215 216 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) 217 msr &= AMD_MSR_RANGE; 218 else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) 219 msr &= HYGON_MSR_RANGE; 220 else 221 msr &= INTEL_MSR_RANGE; 222 223 perf = to_perf_data(data); 224 225 cpufreq_for_each_entry(pos, policy->freq_table) 226 if (msr == perf->states[pos->driver_data].status) 227 return pos->frequency; 228 return policy->freq_table[0].frequency; 229 } 230 231 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val) 232 { 233 struct acpi_cpufreq_data *data = policy->driver_data; 234 235 switch (data->cpu_feature) { 236 case SYSTEM_INTEL_MSR_CAPABLE: 237 case SYSTEM_AMD_MSR_CAPABLE: 238 return extract_msr(policy, val); 239 case SYSTEM_IO_CAPABLE: 240 return extract_io(policy, val); 241 default: 242 return 0; 243 } 244 } 245 246 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used) 247 { 248 u32 val, dummy __always_unused; 249 250 rdmsr(MSR_IA32_PERF_CTL, val, dummy); 251 return val; 252 } 253 254 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val) 255 { 256 u32 lo, hi; 257 258 rdmsr(MSR_IA32_PERF_CTL, lo, hi); 259 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE); 260 wrmsr(MSR_IA32_PERF_CTL, lo, hi); 261 } 262 263 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used) 264 { 265 u32 val, dummy __always_unused; 266 267 rdmsr(MSR_AMD_PERF_CTL, val, dummy); 268 return val; 269 } 270 271 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val) 272 { 273 wrmsr(MSR_AMD_PERF_CTL, val, 0); 274 } 275 276 static u32 cpu_freq_read_io(struct acpi_pct_register *reg) 277 { 278 u32 val; 279 280 acpi_os_read_port(reg->address, &val, reg->bit_width); 281 return val; 282 } 283 284 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val) 285 { 286 acpi_os_write_port(reg->address, val, reg->bit_width); 287 } 288 289 struct drv_cmd { 290 struct acpi_pct_register *reg; 291 u32 val; 292 union { 293 void (*write)(struct acpi_pct_register *reg, u32 val); 294 u32 (*read)(struct acpi_pct_register *reg); 295 } func; 296 }; 297 298 /* Called via smp_call_function_single(), on the target CPU */ 299 static void do_drv_read(void *_cmd) 300 { 301 struct drv_cmd *cmd = _cmd; 302 303 cmd->val = cmd->func.read(cmd->reg); 304 } 305 306 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask) 307 { 308 struct acpi_processor_performance *perf = to_perf_data(data); 309 struct drv_cmd cmd = { 310 .reg = &perf->control_register, 311 .func.read = data->cpu_freq_read, 312 }; 313 int err; 314 315 err = smp_call_function_any(mask, do_drv_read, &cmd, 1); 316 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */ 317 return cmd.val; 318 } 319 320 /* Called via smp_call_function_many(), on the target CPUs */ 321 static void do_drv_write(void *_cmd) 322 { 323 struct drv_cmd *cmd = _cmd; 324 325 cmd->func.write(cmd->reg, cmd->val); 326 } 327 328 static void drv_write(struct acpi_cpufreq_data *data, 329 const struct cpumask *mask, u32 val) 330 { 331 struct acpi_processor_performance *perf = to_perf_data(data); 332 struct drv_cmd cmd = { 333 .reg = &perf->control_register, 334 .val = val, 335 .func.write = data->cpu_freq_write, 336 }; 337 int this_cpu; 338 339 this_cpu = get_cpu(); 340 if (cpumask_test_cpu(this_cpu, mask)) 341 do_drv_write(&cmd); 342 343 smp_call_function_many(mask, do_drv_write, &cmd, 1); 344 put_cpu(); 345 } 346 347 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data) 348 { 349 u32 val; 350 351 if (unlikely(cpumask_empty(mask))) 352 return 0; 353 354 val = drv_read(data, mask); 355 356 pr_debug("%s = %u\n", __func__, val); 357 358 return val; 359 } 360 361 static unsigned int get_cur_freq_on_cpu(unsigned int cpu) 362 { 363 struct acpi_cpufreq_data *data; 364 struct cpufreq_policy *policy; 365 unsigned int freq; 366 unsigned int cached_freq; 367 368 pr_debug("%s (%d)\n", __func__, cpu); 369 370 policy = cpufreq_cpu_get_raw(cpu); 371 if (unlikely(!policy)) 372 return 0; 373 374 data = policy->driver_data; 375 if (unlikely(!data || !policy->freq_table)) 376 return 0; 377 378 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency; 379 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data)); 380 if (freq != cached_freq) { 381 /* 382 * The dreaded BIOS frequency change behind our back. 383 * Force set the frequency on next target call. 384 */ 385 data->resume = 1; 386 } 387 388 pr_debug("cur freq = %u\n", freq); 389 390 return freq; 391 } 392 393 static unsigned int check_freqs(struct cpufreq_policy *policy, 394 const struct cpumask *mask, unsigned int freq) 395 { 396 struct acpi_cpufreq_data *data = policy->driver_data; 397 unsigned int cur_freq; 398 unsigned int i; 399 400 for (i = 0; i < 100; i++) { 401 cur_freq = extract_freq(policy, get_cur_val(mask, data)); 402 if (cur_freq == freq) 403 return 1; 404 udelay(10); 405 } 406 return 0; 407 } 408 409 static int acpi_cpufreq_target(struct cpufreq_policy *policy, 410 unsigned int index) 411 { 412 struct acpi_cpufreq_data *data = policy->driver_data; 413 struct acpi_processor_performance *perf; 414 const struct cpumask *mask; 415 unsigned int next_perf_state = 0; /* Index into perf table */ 416 int result = 0; 417 418 if (unlikely(!data)) { 419 return -ENODEV; 420 } 421 422 perf = to_perf_data(data); 423 next_perf_state = policy->freq_table[index].driver_data; 424 if (perf->state == next_perf_state) { 425 if (unlikely(data->resume)) { 426 pr_debug("Called after resume, resetting to P%d\n", 427 next_perf_state); 428 data->resume = 0; 429 } else { 430 pr_debug("Already at target state (P%d)\n", 431 next_perf_state); 432 return 0; 433 } 434 } 435 436 /* 437 * The core won't allow CPUs to go away until the governor has been 438 * stopped, so we can rely on the stability of policy->cpus. 439 */ 440 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ? 441 cpumask_of(policy->cpu) : policy->cpus; 442 443 drv_write(data, mask, perf->states[next_perf_state].control); 444 445 if (acpi_pstate_strict) { 446 if (!check_freqs(policy, mask, 447 policy->freq_table[index].frequency)) { 448 pr_debug("%s (%d)\n", __func__, policy->cpu); 449 result = -EAGAIN; 450 } 451 } 452 453 if (!result) 454 perf->state = next_perf_state; 455 456 return result; 457 } 458 459 static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy, 460 unsigned int target_freq) 461 { 462 struct acpi_cpufreq_data *data = policy->driver_data; 463 struct acpi_processor_performance *perf; 464 struct cpufreq_frequency_table *entry; 465 unsigned int next_perf_state, next_freq, index; 466 467 /* 468 * Find the closest frequency above target_freq. 469 */ 470 if (policy->cached_target_freq == target_freq) 471 index = policy->cached_resolved_idx; 472 else 473 index = cpufreq_table_find_index_dl(policy, target_freq); 474 475 entry = &policy->freq_table[index]; 476 next_freq = entry->frequency; 477 next_perf_state = entry->driver_data; 478 479 perf = to_perf_data(data); 480 if (perf->state == next_perf_state) { 481 if (unlikely(data->resume)) 482 data->resume = 0; 483 else 484 return next_freq; 485 } 486 487 data->cpu_freq_write(&perf->control_register, 488 perf->states[next_perf_state].control); 489 perf->state = next_perf_state; 490 return next_freq; 491 } 492 493 static unsigned long 494 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) 495 { 496 struct acpi_processor_performance *perf; 497 498 perf = to_perf_data(data); 499 if (cpu_khz) { 500 /* search the closest match to cpu_khz */ 501 unsigned int i; 502 unsigned long freq; 503 unsigned long freqn = perf->states[0].core_frequency * 1000; 504 505 for (i = 0; i < (perf->state_count-1); i++) { 506 freq = freqn; 507 freqn = perf->states[i+1].core_frequency * 1000; 508 if ((2 * cpu_khz) > (freqn + freq)) { 509 perf->state = i; 510 return freq; 511 } 512 } 513 perf->state = perf->state_count-1; 514 return freqn; 515 } else { 516 /* assume CPU is at P0... */ 517 perf->state = 0; 518 return perf->states[0].core_frequency * 1000; 519 } 520 } 521 522 static void free_acpi_perf_data(void) 523 { 524 unsigned int i; 525 526 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */ 527 for_each_possible_cpu(i) 528 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i) 529 ->shared_cpu_map); 530 free_percpu(acpi_perf_data); 531 } 532 533 static int cpufreq_boost_online(unsigned int cpu) 534 { 535 /* 536 * On the CPU_UP path we simply keep the boost-disable flag 537 * in sync with the current global state. 538 */ 539 return boost_set_msr(acpi_cpufreq_driver.boost_enabled); 540 } 541 542 static int cpufreq_boost_down_prep(unsigned int cpu) 543 { 544 /* 545 * Clear the boost-disable bit on the CPU_DOWN path so that 546 * this cpu cannot block the remaining ones from boosting. 547 */ 548 return boost_set_msr(1); 549 } 550 551 /* 552 * acpi_cpufreq_early_init - initialize ACPI P-States library 553 * 554 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) 555 * in order to determine correct frequency and voltage pairings. We can 556 * do _PDC and _PSD and find out the processor dependency for the 557 * actual init that will happen later... 558 */ 559 static int __init acpi_cpufreq_early_init(void) 560 { 561 unsigned int i; 562 pr_debug("%s\n", __func__); 563 564 acpi_perf_data = alloc_percpu(struct acpi_processor_performance); 565 if (!acpi_perf_data) { 566 pr_debug("Memory allocation error for acpi_perf_data.\n"); 567 return -ENOMEM; 568 } 569 for_each_possible_cpu(i) { 570 if (!zalloc_cpumask_var_node( 571 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, 572 GFP_KERNEL, cpu_to_node(i))) { 573 574 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */ 575 free_acpi_perf_data(); 576 return -ENOMEM; 577 } 578 } 579 580 /* Do initialization in ACPI core */ 581 acpi_processor_preregister_performance(acpi_perf_data); 582 return 0; 583 } 584 585 #ifdef CONFIG_SMP 586 /* 587 * Some BIOSes do SW_ANY coordination internally, either set it up in hw 588 * or do it in BIOS firmware and won't inform about it to OS. If not 589 * detected, this has a side effect of making CPU run at a different speed 590 * than OS intended it to run at. Detect it and handle it cleanly. 591 */ 592 static int bios_with_sw_any_bug; 593 594 static int sw_any_bug_found(const struct dmi_system_id *d) 595 { 596 bios_with_sw_any_bug = 1; 597 return 0; 598 } 599 600 static const struct dmi_system_id sw_any_bug_dmi_table[] = { 601 { 602 .callback = sw_any_bug_found, 603 .ident = "Supermicro Server X6DLP", 604 .matches = { 605 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 606 DMI_MATCH(DMI_BIOS_VERSION, "080010"), 607 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), 608 }, 609 }, 610 { } 611 }; 612 613 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c) 614 { 615 /* Intel Xeon Processor 7100 Series Specification Update 616 * https://www.intel.com/Assets/PDF/specupdate/314554.pdf 617 * AL30: A Machine Check Exception (MCE) Occurring during an 618 * Enhanced Intel SpeedStep Technology Ratio Change May Cause 619 * Both Processor Cores to Lock Up. */ 620 if (c->x86_vendor == X86_VENDOR_INTEL) { 621 if ((c->x86 == 15) && 622 (c->x86_model == 6) && 623 (c->x86_stepping == 8)) { 624 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n"); 625 return -ENODEV; 626 } 627 } 628 return 0; 629 } 630 #endif 631 632 #ifdef CONFIG_ACPI_CPPC_LIB 633 static u64 get_max_boost_ratio(unsigned int cpu) 634 { 635 struct cppc_perf_caps perf_caps; 636 u64 highest_perf, nominal_perf; 637 int ret; 638 639 if (acpi_pstate_strict) 640 return 0; 641 642 ret = cppc_get_perf_caps(cpu, &perf_caps); 643 if (ret) { 644 pr_debug("CPU%d: Unable to get performance capabilities (%d)\n", 645 cpu, ret); 646 return 0; 647 } 648 649 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) 650 highest_perf = amd_get_highest_perf(); 651 else 652 highest_perf = perf_caps.highest_perf; 653 654 nominal_perf = perf_caps.nominal_perf; 655 656 if (!highest_perf || !nominal_perf) { 657 pr_debug("CPU%d: highest or nominal performance missing\n", cpu); 658 return 0; 659 } 660 661 if (highest_perf < nominal_perf) { 662 pr_debug("CPU%d: nominal performance above highest\n", cpu); 663 return 0; 664 } 665 666 return div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf); 667 } 668 #else 669 static inline u64 get_max_boost_ratio(unsigned int cpu) { return 0; } 670 #endif 671 672 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) 673 { 674 struct cpufreq_frequency_table *freq_table; 675 struct acpi_processor_performance *perf; 676 struct acpi_cpufreq_data *data; 677 unsigned int cpu = policy->cpu; 678 struct cpuinfo_x86 *c = &cpu_data(cpu); 679 unsigned int valid_states = 0; 680 unsigned int result = 0; 681 u64 max_boost_ratio; 682 unsigned int i; 683 #ifdef CONFIG_SMP 684 static int blacklisted; 685 #endif 686 687 pr_debug("%s\n", __func__); 688 689 #ifdef CONFIG_SMP 690 if (blacklisted) 691 return blacklisted; 692 blacklisted = acpi_cpufreq_blacklist(c); 693 if (blacklisted) 694 return blacklisted; 695 #endif 696 697 data = kzalloc(sizeof(*data), GFP_KERNEL); 698 if (!data) 699 return -ENOMEM; 700 701 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) { 702 result = -ENOMEM; 703 goto err_free; 704 } 705 706 perf = per_cpu_ptr(acpi_perf_data, cpu); 707 data->acpi_perf_cpu = cpu; 708 policy->driver_data = data; 709 710 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) 711 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; 712 713 result = acpi_processor_register_performance(perf, cpu); 714 if (result) 715 goto err_free_mask; 716 717 policy->shared_type = perf->shared_type; 718 719 /* 720 * Will let policy->cpus know about dependency only when software 721 * coordination is required. 722 */ 723 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || 724 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { 725 cpumask_copy(policy->cpus, perf->shared_cpu_map); 726 } 727 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map); 728 729 #ifdef CONFIG_SMP 730 dmi_check_system(sw_any_bug_dmi_table); 731 if (bios_with_sw_any_bug && !policy_is_shared(policy)) { 732 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; 733 cpumask_copy(policy->cpus, topology_core_cpumask(cpu)); 734 } 735 736 if (check_amd_hwpstate_cpu(cpu) && boot_cpu_data.x86 < 0x19 && 737 !acpi_pstate_strict) { 738 cpumask_clear(policy->cpus); 739 cpumask_set_cpu(cpu, policy->cpus); 740 cpumask_copy(data->freqdomain_cpus, 741 topology_sibling_cpumask(cpu)); 742 policy->shared_type = CPUFREQ_SHARED_TYPE_HW; 743 pr_info_once("overriding BIOS provided _PSD data\n"); 744 } 745 #endif 746 747 /* capability check */ 748 if (perf->state_count <= 1) { 749 pr_debug("No P-States\n"); 750 result = -ENODEV; 751 goto err_unreg; 752 } 753 754 if (perf->control_register.space_id != perf->status_register.space_id) { 755 result = -ENODEV; 756 goto err_unreg; 757 } 758 759 switch (perf->control_register.space_id) { 760 case ACPI_ADR_SPACE_SYSTEM_IO: 761 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && 762 boot_cpu_data.x86 == 0xf) { 763 pr_debug("AMD K8 systems must use native drivers.\n"); 764 result = -ENODEV; 765 goto err_unreg; 766 } 767 pr_debug("SYSTEM IO addr space\n"); 768 data->cpu_feature = SYSTEM_IO_CAPABLE; 769 data->cpu_freq_read = cpu_freq_read_io; 770 data->cpu_freq_write = cpu_freq_write_io; 771 break; 772 case ACPI_ADR_SPACE_FIXED_HARDWARE: 773 pr_debug("HARDWARE addr space\n"); 774 if (check_est_cpu(cpu)) { 775 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; 776 data->cpu_freq_read = cpu_freq_read_intel; 777 data->cpu_freq_write = cpu_freq_write_intel; 778 break; 779 } 780 if (check_amd_hwpstate_cpu(cpu)) { 781 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE; 782 data->cpu_freq_read = cpu_freq_read_amd; 783 data->cpu_freq_write = cpu_freq_write_amd; 784 break; 785 } 786 result = -ENODEV; 787 goto err_unreg; 788 default: 789 pr_debug("Unknown addr space %d\n", 790 (u32) (perf->control_register.space_id)); 791 result = -ENODEV; 792 goto err_unreg; 793 } 794 795 freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table), 796 GFP_KERNEL); 797 if (!freq_table) { 798 result = -ENOMEM; 799 goto err_unreg; 800 } 801 802 /* detect transition latency */ 803 policy->cpuinfo.transition_latency = 0; 804 for (i = 0; i < perf->state_count; i++) { 805 if ((perf->states[i].transition_latency * 1000) > 806 policy->cpuinfo.transition_latency) 807 policy->cpuinfo.transition_latency = 808 perf->states[i].transition_latency * 1000; 809 } 810 811 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ 812 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && 813 policy->cpuinfo.transition_latency > 20 * 1000) { 814 policy->cpuinfo.transition_latency = 20 * 1000; 815 pr_info_once("P-state transition latency capped at 20 uS\n"); 816 } 817 818 /* table init */ 819 for (i = 0; i < perf->state_count; i++) { 820 if (i > 0 && perf->states[i].core_frequency >= 821 freq_table[valid_states-1].frequency / 1000) 822 continue; 823 824 freq_table[valid_states].driver_data = i; 825 freq_table[valid_states].frequency = 826 perf->states[i].core_frequency * 1000; 827 valid_states++; 828 } 829 freq_table[valid_states].frequency = CPUFREQ_TABLE_END; 830 831 max_boost_ratio = get_max_boost_ratio(cpu); 832 if (max_boost_ratio) { 833 unsigned int freq = freq_table[0].frequency; 834 835 /* 836 * Because the loop above sorts the freq_table entries in the 837 * descending order, freq is the maximum frequency in the table. 838 * Assume that it corresponds to the CPPC nominal frequency and 839 * use it to set cpuinfo.max_freq. 840 */ 841 policy->cpuinfo.max_freq = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT; 842 } else { 843 /* 844 * If the maximum "boost" frequency is unknown, ask the arch 845 * scale-invariance code to use the "nominal" performance for 846 * CPU utilization scaling so as to prevent the schedutil 847 * governor from selecting inadequate CPU frequencies. 848 */ 849 arch_set_max_freq_ratio(true); 850 } 851 852 policy->freq_table = freq_table; 853 perf->state = 0; 854 855 switch (perf->control_register.space_id) { 856 case ACPI_ADR_SPACE_SYSTEM_IO: 857 /* 858 * The core will not set policy->cur, because 859 * cpufreq_driver->get is NULL, so we need to set it here. 860 * However, we have to guess it, because the current speed is 861 * unknown and not detectable via IO ports. 862 */ 863 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); 864 break; 865 case ACPI_ADR_SPACE_FIXED_HARDWARE: 866 acpi_cpufreq_driver.get = get_cur_freq_on_cpu; 867 break; 868 default: 869 break; 870 } 871 872 /* notify BIOS that we exist */ 873 acpi_processor_notify_smm(THIS_MODULE); 874 875 pr_debug("CPU%u - ACPI performance management activated.\n", cpu); 876 for (i = 0; i < perf->state_count; i++) 877 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n", 878 (i == perf->state ? '*' : ' '), i, 879 (u32) perf->states[i].core_frequency, 880 (u32) perf->states[i].power, 881 (u32) perf->states[i].transition_latency); 882 883 /* 884 * the first call to ->target() should result in us actually 885 * writing something to the appropriate registers. 886 */ 887 data->resume = 1; 888 889 policy->fast_switch_possible = !acpi_pstate_strict && 890 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY); 891 892 if (perf->states[0].core_frequency * 1000 != freq_table[0].frequency) 893 pr_warn(FW_WARN "P-state 0 is not max freq\n"); 894 895 return result; 896 897 err_unreg: 898 acpi_processor_unregister_performance(cpu); 899 err_free_mask: 900 free_cpumask_var(data->freqdomain_cpus); 901 err_free: 902 kfree(data); 903 policy->driver_data = NULL; 904 905 return result; 906 } 907 908 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) 909 { 910 struct acpi_cpufreq_data *data = policy->driver_data; 911 912 pr_debug("%s\n", __func__); 913 914 policy->fast_switch_possible = false; 915 policy->driver_data = NULL; 916 acpi_processor_unregister_performance(data->acpi_perf_cpu); 917 free_cpumask_var(data->freqdomain_cpus); 918 kfree(policy->freq_table); 919 kfree(data); 920 921 return 0; 922 } 923 924 static int acpi_cpufreq_resume(struct cpufreq_policy *policy) 925 { 926 struct acpi_cpufreq_data *data = policy->driver_data; 927 928 pr_debug("%s\n", __func__); 929 930 data->resume = 1; 931 932 return 0; 933 } 934 935 static struct freq_attr *acpi_cpufreq_attr[] = { 936 &cpufreq_freq_attr_scaling_available_freqs, 937 &freqdomain_cpus, 938 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 939 &cpb, 940 #endif 941 NULL, 942 }; 943 944 static struct cpufreq_driver acpi_cpufreq_driver = { 945 .verify = cpufreq_generic_frequency_table_verify, 946 .target_index = acpi_cpufreq_target, 947 .fast_switch = acpi_cpufreq_fast_switch, 948 .bios_limit = acpi_processor_get_bios_limit, 949 .init = acpi_cpufreq_cpu_init, 950 .exit = acpi_cpufreq_cpu_exit, 951 .resume = acpi_cpufreq_resume, 952 .name = "acpi-cpufreq", 953 .attr = acpi_cpufreq_attr, 954 }; 955 956 static enum cpuhp_state acpi_cpufreq_online; 957 958 static void __init acpi_cpufreq_boost_init(void) 959 { 960 int ret; 961 962 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) { 963 pr_debug("Boost capabilities not present in the processor\n"); 964 return; 965 } 966 967 acpi_cpufreq_driver.set_boost = set_boost; 968 acpi_cpufreq_driver.boost_enabled = boost_state(0); 969 970 /* 971 * This calls the online callback on all online cpu and forces all 972 * MSRs to the same value. 973 */ 974 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online", 975 cpufreq_boost_online, cpufreq_boost_down_prep); 976 if (ret < 0) { 977 pr_err("acpi_cpufreq: failed to register hotplug callbacks\n"); 978 return; 979 } 980 acpi_cpufreq_online = ret; 981 } 982 983 static void acpi_cpufreq_boost_exit(void) 984 { 985 if (acpi_cpufreq_online > 0) 986 cpuhp_remove_state_nocalls(acpi_cpufreq_online); 987 } 988 989 static int __init acpi_cpufreq_init(void) 990 { 991 int ret; 992 993 if (acpi_disabled) 994 return -ENODEV; 995 996 /* don't keep reloading if cpufreq_driver exists */ 997 if (cpufreq_get_current_driver()) 998 return -EEXIST; 999 1000 pr_debug("%s\n", __func__); 1001 1002 ret = acpi_cpufreq_early_init(); 1003 if (ret) 1004 return ret; 1005 1006 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB 1007 /* this is a sysfs file with a strange name and an even stranger 1008 * semantic - per CPU instantiation, but system global effect. 1009 * Lets enable it only on AMD CPUs for compatibility reasons and 1010 * only if configured. This is considered legacy code, which 1011 * will probably be removed at some point in the future. 1012 */ 1013 if (!check_amd_hwpstate_cpu(0)) { 1014 struct freq_attr **attr; 1015 1016 pr_debug("CPB unsupported, do not expose it\n"); 1017 1018 for (attr = acpi_cpufreq_attr; *attr; attr++) 1019 if (*attr == &cpb) { 1020 *attr = NULL; 1021 break; 1022 } 1023 } 1024 #endif 1025 acpi_cpufreq_boost_init(); 1026 1027 ret = cpufreq_register_driver(&acpi_cpufreq_driver); 1028 if (ret) { 1029 free_acpi_perf_data(); 1030 acpi_cpufreq_boost_exit(); 1031 } 1032 return ret; 1033 } 1034 1035 static void __exit acpi_cpufreq_exit(void) 1036 { 1037 pr_debug("%s\n", __func__); 1038 1039 acpi_cpufreq_boost_exit(); 1040 1041 cpufreq_unregister_driver(&acpi_cpufreq_driver); 1042 1043 free_acpi_perf_data(); 1044 } 1045 1046 module_param(acpi_pstate_strict, uint, 0644); 1047 MODULE_PARM_DESC(acpi_pstate_strict, 1048 "value 0 or non-zero. non-zero -> strict ACPI checks are " 1049 "performed during frequency changes."); 1050 1051 late_initcall(acpi_cpufreq_init); 1052 module_exit(acpi_cpufreq_exit); 1053 1054 static const struct x86_cpu_id __maybe_unused acpi_cpufreq_ids[] = { 1055 X86_MATCH_FEATURE(X86_FEATURE_ACPI, NULL), 1056 X86_MATCH_FEATURE(X86_FEATURE_HW_PSTATE, NULL), 1057 {} 1058 }; 1059 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids); 1060 1061 static const struct acpi_device_id __maybe_unused processor_device_ids[] = { 1062 {ACPI_PROCESSOR_OBJECT_HID, }, 1063 {ACPI_PROCESSOR_DEVICE_HID, }, 1064 {}, 1065 }; 1066 MODULE_DEVICE_TABLE(acpi, processor_device_ids); 1067 1068 MODULE_ALIAS("acpi"); 1069