1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2025 MediaTek Inc. 4 * Guangjie Song <guangjie.song@mediatek.com> 5 * Copyright (c) 2025 Collabora Ltd. 6 * Laura Nao <laura.nao@collabora.com> 7 */ 8 #include <dt-bindings/clock/mediatek,mt8196-clock.h> 9 10 #include <linux/clk-provider.h> 11 #include <linux/module.h> 12 #include <linux/of_device.h> 13 #include <linux/platform_device.h> 14 15 #include "clk-gate.h" 16 #include "clk-mtk.h" 17 18 static const struct mtk_gate_regs imp_cg_regs = { 19 .set_ofs = 0xe08, 20 .clr_ofs = 0xe04, 21 .sta_ofs = 0xe00, 22 }; 23 24 #define GATE_IMP(_id, _name, _parent, _shift) { \ 25 .id = _id, \ 26 .name = _name, \ 27 .parent_name = _parent, \ 28 .regs = &imp_cg_regs, \ 29 .shift = _shift, \ 30 .flags = CLK_OPS_PARENT_ENABLE, \ 31 .ops = &mtk_clk_gate_ops_setclr, \ 32 } 33 34 static const struct mtk_gate impc_clks[] = { 35 GATE_IMP(CLK_IMPC_I2C11, "impc_i2c11", "i2c_p", 0), 36 GATE_IMP(CLK_IMPC_I2C12, "impc_i2c12", "i2c_p", 1), 37 GATE_IMP(CLK_IMPC_I2C13, "impc_i2c13", "i2c_p", 2), 38 GATE_IMP(CLK_IMPC_I2C14, "impc_i2c14", "i2c_p", 3), 39 }; 40 41 static const struct mtk_clk_desc impc_mcd = { 42 .clks = impc_clks, 43 .num_clks = ARRAY_SIZE(impc_clks), 44 }; 45 46 static const struct mtk_gate impe_clks[] = { 47 GATE_IMP(CLK_IMPE_I2C5, "impe_i2c5", "i2c_east", 0), 48 }; 49 50 static const struct mtk_clk_desc impe_mcd = { 51 .clks = impe_clks, 52 .num_clks = ARRAY_SIZE(impe_clks), 53 }; 54 55 static const struct mtk_gate_regs impn_hwv_regs = { 56 .set_ofs = 0x0000, 57 .clr_ofs = 0x0004, 58 .sta_ofs = 0x2c00, 59 }; 60 61 #define GATE_HWV_IMPN(_id, _name, _parent, _shift) { \ 62 .id = _id, \ 63 .name = _name, \ 64 .parent_name = _parent, \ 65 .regs = &imp_cg_regs, \ 66 .hwv_regs = &impn_hwv_regs, \ 67 .shift = _shift, \ 68 .ops = &mtk_clk_gate_hwv_ops_setclr, \ 69 .flags = CLK_OPS_PARENT_ENABLE, \ 70 } 71 72 static const struct mtk_gate impn_clks[] = { 73 GATE_IMP(CLK_IMPN_I2C1, "impn_i2c1", "i2c_north", 0), 74 GATE_IMP(CLK_IMPN_I2C2, "impn_i2c2", "i2c_north", 1), 75 GATE_IMP(CLK_IMPN_I2C4, "impn_i2c4", "i2c_north", 2), 76 GATE_HWV_IMPN(CLK_IMPN_I2C7, "impn_i2c7", "i2c_north", 3), 77 GATE_IMP(CLK_IMPN_I2C8, "impn_i2c8", "i2c_north", 4), 78 GATE_IMP(CLK_IMPN_I2C9, "impn_i2c9", "i2c_north", 5), 79 }; 80 81 static const struct mtk_clk_desc impn_mcd = { 82 .clks = impn_clks, 83 .num_clks = ARRAY_SIZE(impn_clks), 84 }; 85 86 static const struct mtk_gate impw_clks[] = { 87 GATE_IMP(CLK_IMPW_I2C0, "impw_i2c0", "i2c_west", 0), 88 GATE_IMP(CLK_IMPW_I2C3, "impw_i2c3", "i2c_west", 1), 89 GATE_IMP(CLK_IMPW_I2C6, "impw_i2c6", "i2c_west", 2), 90 GATE_IMP(CLK_IMPW_I2C10, "impw_i2c10", "i2c_west", 3), 91 }; 92 93 static const struct mtk_clk_desc impw_mcd = { 94 .clks = impw_clks, 95 .num_clks = ARRAY_SIZE(impw_clks), 96 }; 97 98 static const struct of_device_id of_match_clk_mt8196_imp_iic_wrap[] = { 99 { .compatible = "mediatek,mt8196-imp-iic-wrap-c", .data = &impc_mcd }, 100 { .compatible = "mediatek,mt8196-imp-iic-wrap-e", .data = &impe_mcd }, 101 { .compatible = "mediatek,mt8196-imp-iic-wrap-n", .data = &impn_mcd }, 102 { .compatible = "mediatek,mt8196-imp-iic-wrap-w", .data = &impw_mcd }, 103 { /* sentinel */ } 104 }; 105 MODULE_DEVICE_TABLE(of, of_match_clk_mt8196_imp_iic_wrap); 106 107 static struct platform_driver clk_mt8196_imp_iic_wrap_drv = { 108 .probe = mtk_clk_simple_probe, 109 .remove = mtk_clk_simple_remove, 110 .driver = { 111 .name = "clk-mt8196-imp_iic_wrap", 112 .of_match_table = of_match_clk_mt8196_imp_iic_wrap, 113 }, 114 }; 115 module_platform_driver(clk_mt8196_imp_iic_wrap_drv); 116 117 MODULE_DESCRIPTION("MediaTek MT8196 I2C Wrapper clocks driver"); 118 MODULE_LICENSE("GPL"); 119