xref: /linux/drivers/accel/amdxdna/aie4_pci.h (revision 0eaed89c18aeedf0898baf2dbf5ff027c6795152)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2026, Advanced Micro Devices, Inc.
4  */
5 
6 #ifndef _AIE4_PCI_H_
7 #define _AIE4_PCI_H_
8 
9 #include <linux/device.h>
10 #include <linux/iopoll.h>
11 #include <linux/pci.h>
12 
13 #include "aie.h"
14 #include "amdxdna_mailbox.h"
15 
16 struct cert_comp {
17 	struct amdxdna_dev_hdl          *ndev;
18 	u32                             msix_idx;
19 	int                             irq;
20 	struct kref                     kref;
21 	wait_queue_head_t               waitq;
22 };
23 
24 struct amdxdna_hwctx_priv {
25 	struct amdxdna_gem_obj          *umq_bo;
26 	u64                             *umq_read_index;
27 	u64                             *umq_write_index;
28 
29 	struct cert_comp                *cert_comp;
30 	u32                             hw_ctx_id;
31 };
32 
33 struct amdxdna_dev_priv {
34 	const char              *npufw_path;
35 	const char              *certfw_path;
36 	u32			mbox_bar;
37 	u32			mbox_rbuf_bar;
38 	u64			mbox_info_off;
39 	u32			doorbell_off;
40 
41 	struct aie_bar_off_pair	psp_regs_off[PSP_MAX_REGS];
42 	struct aie_bar_off_pair	smu_regs_off[SMU_MAX_REGS];
43 };
44 
45 struct amdxdna_dev_hdl {
46 	struct aie_device		aie;
47 	const struct amdxdna_dev_priv	*priv;
48 	void			__iomem *mbox_base;
49 	void			__iomem *rbuf_base;
50 
51 	struct mailbox			*mbox;
52 	u32				partition_id;
53 
54 	struct xarray                   cert_comp_xa; /* device level indexed by msix id */
55 	struct mutex                    cert_comp_lock; /* protects cert_comp operations*/
56 
57 	void				*work_buf;
58 	dma_addr_t			work_buf_addr;
59 	u32				work_buf_size;
60 };
61 
62 /* aie4_message.c */
63 int aie4_query_aie_metadata(struct amdxdna_dev_hdl *ndev,
64 			    struct amdxdna_drm_query_aie_metadata *metadata);
65 int aie4_suspend_fw(struct amdxdna_dev_hdl *ndev);
66 int aie4_attach_work_buffer(struct amdxdna_dev_hdl *ndev);
67 
68 /* aie4_ctx.c */
69 int aie4_hwctx_init(struct amdxdna_hwctx *hwctx);
70 void aie4_hwctx_fini(struct amdxdna_hwctx *hwctx);
71 int aie4_cmd_wait(struct amdxdna_hwctx *hwctx, u64 seq, u32 timeout);
72 int aie4_hwctx_valid_doorbell(struct amdxdna_client *client, u32 vm_pgoff);
73 
74 /* aie4_sriov.c */
75 #if IS_ENABLED(CONFIG_PCI_IOV)
76 int aie4_sriov_configure(struct amdxdna_dev *xdna, int num_vfs);
77 int aie4_sriov_stop(struct amdxdna_dev_hdl *ndev);
78 #else
79 #define aie4_sriov_configure NULL
80 static inline int aie4_sriov_stop(struct amdxdna_dev_hdl *ndev)
81 {
82 	return 0;
83 }
84 #endif
85 
86 extern const struct amdxdna_dev_ops aie4_pf_ops;
87 extern const struct amdxdna_dev_ops aie4_vf_ops;
88 
89 #endif /* _AIE4_PCI_H_ */
90