1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 2daa93fabSSam Ravnborg# Select 32 or 64 bit 3daa93fabSSam Ravnborgconfig 64BIT 4104daea1SMasahiro Yamada bool "64-bit kernel" if "$(ARCH)" = "x86" 5104daea1SMasahiro Yamada default "$(ARCH)" != "i386" 6a7f7f624SMasahiro Yamada help 7daa93fabSSam Ravnborg Say yes to build a 64-bit kernel - formerly known as x86_64 8daa93fabSSam Ravnborg Say no to build a 32-bit kernel - formerly known as i386 9daa93fabSSam Ravnborg 10daa93fabSSam Ravnborgconfig X86_32 113120e25eSJan Beulich def_bool y 123120e25eSJan Beulich depends on !64BIT 13341c787eSIngo Molnar # Options that are inherently 32-bit kernel only: 14341c787eSIngo Molnar select ARCH_WANT_IPC_PARSE_VERSION 15341c787eSIngo Molnar select CLKSRC_I8253 16341c787eSIngo Molnar select CLONE_BACKWARDS 17157e118bSThomas Gleixner select GENERIC_VDSO_32 18117ed454SThomas Gleixner select HAVE_DEBUG_STACKOVERFLOW 19157e118bSThomas Gleixner select KMAP_LOCAL 20341c787eSIngo Molnar select MODULES_USE_ELF_REL 21341c787eSIngo Molnar select OLD_SIGACTION 222ca408d9SBrian Gerst select ARCH_SPLIT_ARG64 23daa93fabSSam Ravnborg 24daa93fabSSam Ravnborgconfig X86_64 253120e25eSJan Beulich def_bool y 263120e25eSJan Beulich depends on 64BIT 27d94e0685SIngo Molnar # Options that are inherently 64-bit kernel only: 284eb0716eSAlexandre Ghiti select ARCH_HAS_GIGANTIC_PAGE 29c12d3362SArd Biesheuvel select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 300bff0aaeSSuren Baghdasaryan select ARCH_SUPPORTS_PER_VMA_LOCK 3175182022SPeter Xu select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 32d94e0685SIngo Molnar select HAVE_ARCH_SOFT_DIRTY 33d94e0685SIngo Molnar select MODULES_USE_ELF_RELA 34f616ab59SChristoph Hellwig select NEED_DMA_MAP_STATE 3509230cbcSChristoph Hellwig select SWIOTLB 367facdc42SAl Viro select ARCH_HAS_ELFCORE_COMPAT 3763703f37SKefeng Wang select ZONE_DMA32 3814e56fb2SMike Rapoport (IBM) select EXECMEM if DYNAMIC_FTRACE 391032c0baSSam Ravnborg 40518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE 41518049d9SSteven Rostedt (VMware) def_bool y 42518049d9SSteven Rostedt (VMware) depends on X86_32 43518049d9SSteven Rostedt (VMware) depends on FUNCTION_TRACER 44518049d9SSteven Rostedt (VMware) select DYNAMIC_FTRACE 45518049d9SSteven Rostedt (VMware) help 46518049d9SSteven Rostedt (VMware) We keep the static function tracing (!DYNAMIC_FTRACE) around 47518049d9SSteven Rostedt (VMware) in order to test the non static function tracing in the 48518049d9SSteven Rostedt (VMware) generic code, as other architectures still use it. But we 49518049d9SSteven Rostedt (VMware) only need to keep it around for x86_64. No need to keep it 50518049d9SSteven Rostedt (VMware) for x86_32. For x86_32, force DYNAMIC_FTRACE. 51d94e0685SIngo Molnar# 52d94e0685SIngo Molnar# Arch settings 53d94e0685SIngo Molnar# 54d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be 55d94e0685SIngo Molnar# ported to 32-bit as well. ) 56d94e0685SIngo Molnar# 578d5fffb9SSam Ravnborgconfig X86 583c2362e6SHarvey Harrison def_bool y 59c763ea26SIngo Molnar # 60c763ea26SIngo Molnar # Note: keep this list sorted alphabetically 61c763ea26SIngo Molnar # 626471b825SIngo Molnar select ACPI_LEGACY_TABLES_LOOKUP if ACPI 636e0a0ea1SGraeme Gregory select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 64a02f66bbSJames Morse select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 65942fa985SYury Norov select ARCH_32BIT_OFF_T if X86_32 662a21ad57SThomas Gleixner select ARCH_CLOCKSOURCE_INIT 67fe42754bSSean Christopherson select ARCH_CONFIGURES_CPU_MITIGATIONS 681f6d3a8fSMasami Hiramatsu select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE 691e866974SAnshuman Khandual select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION 705c11f00bSDavid Hildenbrand select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64 7191024b3cSAnshuman Khandual select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 72cebc774fSAnshuman Khandual select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE) 731e866974SAnshuman Khandual select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE 7491dda51aSAleksey Makarov select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 75c2280be8SAnshuman Khandual select ARCH_HAS_CACHE_LINE_SIZE 761156b441SDavidlohr Bueso select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION 777c7077a7SThomas Gleixner select ARCH_HAS_CPU_FINALIZE_INIT 788f23f5dbSJason Gunthorpe select ARCH_HAS_CPU_PASID if IOMMU_SVA 7955d1ecceSEric Biggers select ARCH_HAS_CRC32 80*dbdda1fdSEric Biggers select ARCH_HAS_CRC_T10DIF 812792d84eSKees Cook select ARCH_HAS_CURRENT_STACK_POINTER 82fa5b6ec9SLaura Abbott select ARCH_HAS_DEBUG_VIRTUAL 83399145f9SAnshuman Khandual select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE 8421266be9SDan Williams select ARCH_HAS_DEVMEM_IS_ALLOWED 85de6c85bfSChristoph Hellwig select ARCH_HAS_DMA_OPS if GART_IOMMU || XEN 86b1a57bbfSDouglas Anderson select ARCH_HAS_EARLY_DEBUG if KGDB 876471b825SIngo Molnar select ARCH_HAS_ELF_RANDOMIZE 8872d93104SLinus Torvalds select ARCH_HAS_FAST_MULTIPLIER 896974f0c4SDaniel Micay select ARCH_HAS_FORTIFY_SOURCE 90957e3facSRiku Voipio select ARCH_HAS_GCOV_PROFILE_ALL 91bece04b5SMarco Elver select ARCH_HAS_KCOV if X86_64 92b0b8a15bSSamuel Holland select ARCH_HAS_KERNEL_FPU_SUPPORT 930c9c1d56SThiago Jung Bauermann select ARCH_HAS_MEM_ENCRYPT 9410bcc80eSMathieu Desnoyers select ARCH_HAS_MEMBARRIER_SYNC_CORE 9549f88c70SPaul E. McKenney select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 960ebeea8cSDaniel Borkmann select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 97c763ea26SIngo Molnar select ARCH_HAS_PMEM_API if X86_64 98476e8583SPeter Zijlstra select ARCH_HAS_PREEMPT_LAZY 9917596731SRobin Murphy select ARCH_HAS_PTE_DEVMAP if X86_64 1003010a5eaSLaurent Dufour select ARCH_HAS_PTE_SPECIAL 10171ce1ab5SKinsey Ho select ARCH_HAS_HW_PTE_YOUNG 102eed9a328SYu Zhao select ARCH_HAS_NONLEAF_PMD_YOUNG if PGTABLE_LEVELS > 2 1030aed55afSDan Williams select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64 104ec6347bbSDan Williams select ARCH_HAS_COPY_MC if X86_64 105d2852a22SDaniel Borkmann select ARCH_HAS_SET_MEMORY 106d253ca0cSRick Edgecombe select ARCH_HAS_SET_DIRECT_MAP 107ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_KERNEL_RWX 108ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_MODULE_RWX 109ac1ab12aSMathieu Desnoyers select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 11025c619e5SBrian Gerst select ARCH_HAS_SYSCALL_WRAPPER 111918327e9SKees Cook select ARCH_HAS_UBSAN 1127e01ccb4SZong Li select ARCH_HAS_DEBUG_WX 11363703f37SKefeng Wang select ARCH_HAS_ZONE_DMA_SET if EXPERT 1146471b825SIngo Molnar select ARCH_HAVE_NMI_SAFE_CMPXCHG 115ba386777SVignesh Balasubramanian select ARCH_HAVE_EXTRA_ELF_NOTES 11604d5ea46SAneesh Kumar K.V select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE 1176471b825SIngo Molnar select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI 11877fbbc81SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 1195e2c18c0SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 1203599fe12SThomas Gleixner select ARCH_STACKWALK 1212c870e61SArnd Bergmann select ARCH_SUPPORTS_ACPI 1226471b825SIngo Molnar select ARCH_SUPPORTS_ATOMIC_RMW 1235d6ad668SMike Rapoport select ARCH_SUPPORTS_DEBUG_PAGEALLOC 124d283d422SPasha Tatashin select ARCH_SUPPORTS_PAGE_TABLE_CHECK if X86_64 1256471b825SIngo Molnar select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 12614df3267SThomas Gleixner select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP if NR_CPUS <= 4096 1273c516f89SSami Tolvanen select ARCH_SUPPORTS_CFI_CLANG if X86_64 1283c516f89SSami Tolvanen select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG 129583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG 130583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG_THIN 131d2d6422fSSebastian Andrzej Siewior select ARCH_SUPPORTS_RT 132315ad878SRong Xu select ARCH_SUPPORTS_AUTOFDO_CLANG 133d5dc9583SRong Xu select ARCH_SUPPORTS_PROPELLER_CLANG if X86_64 1346471b825SIngo Molnar select ARCH_USE_BUILTIN_BSWAP 135a432b7c0SUros Bizjak select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64 136dce44566SAnshuman Khandual select ARCH_USE_MEMTEST 1376471b825SIngo Molnar select ARCH_USE_QUEUED_RWLOCKS 1386471b825SIngo Molnar select ARCH_USE_QUEUED_SPINLOCKS 1392ce0d7f9SMark Brown select ARCH_USE_SYM_ANNOTATIONS 140ce4a4e56SAndy Lutomirski select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH 14181c22041SDaniel Borkmann select ARCH_WANT_DEFAULT_BPF_JIT if X86_64 142c763ea26SIngo Molnar select ARCH_WANTS_DYNAMIC_TASK_STRUCT 14351c2ee6dSNick Desaulniers select ARCH_WANTS_NO_INSTR 14407431506SAnshuman Khandual select ARCH_WANT_GENERAL_HUGETLB 1453876d4a3SAlexandre Ghiti select ARCH_WANT_HUGE_PMD_SHARE 14659612b24SNathan Chancellor select ARCH_WANT_LD_ORPHAN_WARN 1470b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64 1480b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64 14938d8b4e6SHuang Ying select ARCH_WANTS_THP_SWAP if X86_64 150b5f06f64SBalbir Singh select ARCH_HAS_PARANOID_L1D_FLUSH 15110916706SShile Zhang select BUILDTIME_TABLE_SORT 1526471b825SIngo Molnar select CLKEVT_I8253 1536471b825SIngo Molnar select CLOCKSOURCE_WATCHDOG 1547cf8f44aSAlexander Potapenko # Word-size accesses may read uninitialized data past the trailing \0 1557cf8f44aSAlexander Potapenko # in strings and cause false KMSAN reports. 1567cf8f44aSAlexander Potapenko select DCACHE_WORD_ACCESS if !KMSAN 1573aac3ebeSThomas Gleixner select DYNAMIC_SIGFRAME 15845471cd9SLinus Torvalds select EDAC_ATOMIC_SCRUB 15945471cd9SLinus Torvalds select EDAC_SUPPORT 1606471b825SIngo Molnar select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC) 161cb81deefSThomas Gleixner select GENERIC_CLOCKEVENTS_BROADCAST_IDLE if GENERIC_CLOCKEVENTS_BROADCAST 1626471b825SIngo Molnar select GENERIC_CLOCKEVENTS_MIN_ADJUST 1636471b825SIngo Molnar select GENERIC_CMOS_UPDATE 1646471b825SIngo Molnar select GENERIC_CPU_AUTOPROBE 1655b95f94cSJames Morse select GENERIC_CPU_DEVICES 16661dc0f55SThomas Gleixner select GENERIC_CPU_VULNERABILITIES 1676471b825SIngo Molnar select GENERIC_EARLY_IOREMAP 16827d6b4d1SThomas Gleixner select GENERIC_ENTRY 1696471b825SIngo Molnar select GENERIC_IOMAP 170c7d6c9ddSThomas Gleixner select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1710fa115daSThomas Gleixner select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC 172ad7a929fSThomas Gleixner select GENERIC_IRQ_MIGRATION if SMP 1736471b825SIngo Molnar select GENERIC_IRQ_PROBE 174c201c917SThomas Gleixner select GENERIC_IRQ_RESERVATION_MODE 1756471b825SIngo Molnar select GENERIC_IRQ_SHOW 1766471b825SIngo Molnar select GENERIC_PENDING_IRQ if SMP 1772ae27137SSteven Price select GENERIC_PTDUMP 1786471b825SIngo Molnar select GENERIC_SMP_IDLE_THREAD 1796471b825SIngo Molnar select GENERIC_TIME_VSYSCALL 1807ac87074SVincenzo Frascino select GENERIC_GETTIMEOFDAY 181550a77a7SDmitry Safonov select GENERIC_VDSO_TIME_NS 1827e90ffb7SAdrian Hunter select GENERIC_VDSO_OVERFLOW_PROTECT 1836ca297d4SPeter Zijlstra select GUP_GET_PXX_LOW_HIGH if X86_PAE 18417e5888eSHans de Goede select HARDIRQS_SW_RESEND 1857edaeb68SThomas Gleixner select HARDLOCKUP_CHECK_TIMESTAMP if X86_64 186fcbfe812SNiklas Schnelle select HAS_IOPORT 1876471b825SIngo Molnar select HAVE_ACPI_APEI if ACPI 1886471b825SIngo Molnar select HAVE_ACPI_APEI_NMI if ACPI 1892a19be61SVlastimil Babka select HAVE_ALIGNED_STRUCT_PAGE 1906471b825SIngo Molnar select HAVE_ARCH_AUDITSYSCALL 1916471b825SIngo Molnar select HAVE_ARCH_HUGE_VMAP if X86_64 || X86_PAE 192eed1fceeSSong Liu select HAVE_ARCH_HUGE_VMALLOC if X86_64 1936471b825SIngo Molnar select HAVE_ARCH_JUMP_LABEL 194b34006c4SArd Biesheuvel select HAVE_ARCH_JUMP_LABEL_RELATIVE 195d17a1d97SAndrey Ryabinin select HAVE_ARCH_KASAN if X86_64 1960609ae01SDaniel Axtens select HAVE_ARCH_KASAN_VMALLOC if X86_64 1971dc0da6eSAlexander Potapenko select HAVE_ARCH_KFENCE 1984ca8cc8dSAlexander Potapenko select HAVE_ARCH_KMSAN if X86_64 1996471b825SIngo Molnar select HAVE_ARCH_KGDB 2009e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_BITS if MMU 2019e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 2021b028f78SDmitry Safonov select HAVE_ARCH_COMPAT_MMAP_BASES if MMU && COMPAT 203271ca788SArd Biesheuvel select HAVE_ARCH_PREL32_RELOCATIONS 2046471b825SIngo Molnar select HAVE_ARCH_SECCOMP_FILTER 205f7d83c1cSKees Cook select HAVE_ARCH_THREAD_STRUCT_WHITELIST 206afaef01cSAlexander Popov select HAVE_ARCH_STACKLEAK 2076471b825SIngo Molnar select HAVE_ARCH_TRACEHOOK 2086471b825SIngo Molnar select HAVE_ARCH_TRANSPARENT_HUGEPAGE 209a00cc7d9SMatthew Wilcox select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 210b64d8d1eSPeter Xu select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD 2117677f7fdSAxel Rasmussen select HAVE_ARCH_USERFAULTFD_MINOR if X86_64 && USERFAULTFD 212e37e43a4SAndy Lutomirski select HAVE_ARCH_VMAP_STACK if X86_64 213fe950f60SKees Cook select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 214c763ea26SIngo Molnar select HAVE_ARCH_WITHIN_STACK_FRAMES 2152ff2b7ecSMasahiro Yamada select HAVE_ASM_MODVERSIONS 2166471b825SIngo Molnar select HAVE_CMPXCHG_DOUBLE 2176471b825SIngo Molnar select HAVE_CMPXCHG_LOCAL 21824a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER if X86_64 21924a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER_OFFSTACK if HAVE_CONTEXT_TRACKING_USER 2206471b825SIngo Molnar select HAVE_C_RECORDMCOUNT 22103f16cd0SJosh Poimboeuf select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL 222280981d6SSathvika Vasireddy select HAVE_OBJTOOL_NOP_MCOUNT if HAVE_OBJTOOL_MCOUNT 2234ed308c4SSteven Rostedt (Google) select HAVE_BUILDTIME_MCOUNT_SORT 2246471b825SIngo Molnar select HAVE_DEBUG_KMEMLEAK 2259c5a3621SAkinobu Mita select HAVE_DMA_CONTIGUOUS 226677aa9f7SSteven Rostedt select HAVE_DYNAMIC_FTRACE 22706aeaaeaSMasami Hiramatsu select HAVE_DYNAMIC_FTRACE_WITH_REGS 22802a474caSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_ARGS if X86_64 229762abbc0SMasami Hiramatsu (Google) select HAVE_FTRACE_REGS_HAVING_PT_REGS if X86_64 230562955feSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 231c316eb44SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT if X86_64 232503e4510SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT_MULTI if X86_64 23303f5781bSWang YanQing select HAVE_EBPF_JIT 23458340a07SJohannes Berg select HAVE_EFFICIENT_UNALIGNED_ACCESS 2356630a8e5SChristoph Hellwig select HAVE_EISA 2365f56a5dfSJiri Slaby select HAVE_EXIT_THREAD 23725176ad0SDavid Hildenbrand select HAVE_GUP_FAST 238644e0e8dSSteven Rostedt (VMware) select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE 239a762e926SMasami Hiramatsu (Google) select HAVE_FTRACE_GRAPH_FUNC if HAVE_FUNCTION_GRAPH_TRACER 2406471b825SIngo Molnar select HAVE_FTRACE_MCOUNT_RECORD 241a3ed4157SMasami Hiramatsu (Google) select HAVE_FUNCTION_GRAPH_FREGS if HAVE_FUNCTION_GRAPH_TRACER 2424a30e4c9SSteven Rostedt (VMware) select HAVE_FUNCTION_GRAPH_TRACER if X86_32 || (X86_64 && DYNAMIC_FTRACE) 2436471b825SIngo Molnar select HAVE_FUNCTION_TRACER 2446b90bd4bSEmese Revfy select HAVE_GCC_PLUGINS 2450067f129SK.Prasad select HAVE_HW_BREAKPOINT 2466471b825SIngo Molnar select HAVE_IOREMAP_PROT 247624db9eaSThomas Gleixner select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64 2486471b825SIngo Molnar select HAVE_IRQ_TIME_ACCOUNTING 2494ab7674fSJosh Poimboeuf select HAVE_JUMP_LABEL_HACK if HAVE_OBJTOOL 2506471b825SIngo Molnar select HAVE_KERNEL_BZIP2 2516471b825SIngo Molnar select HAVE_KERNEL_GZIP 2526471b825SIngo Molnar select HAVE_KERNEL_LZ4 2536471b825SIngo Molnar select HAVE_KERNEL_LZMA 2546471b825SIngo Molnar select HAVE_KERNEL_LZO 2556471b825SIngo Molnar select HAVE_KERNEL_XZ 256fb46d057SNick Terrell select HAVE_KERNEL_ZSTD 2576471b825SIngo Molnar select HAVE_KPROBES 2586471b825SIngo Molnar select HAVE_KPROBES_ON_FTRACE 259540adea3SMasami Hiramatsu select HAVE_FUNCTION_ERROR_INJECTION 2606471b825SIngo Molnar select HAVE_KRETPROBES 261f3a112c0SMasami Hiramatsu select HAVE_RETHOOK 2626471b825SIngo Molnar select HAVE_LIVEPATCH if X86_64 2630102752eSFrederic Weisbecker select HAVE_MIXED_BREAKPOINTS_REGS 264ee9f8fceSJosh Poimboeuf select HAVE_MOD_ARCH_SPECIFIC 2659f132f7eSJoel Fernandes (Google) select HAVE_MOVE_PMD 266be37c98dSKalesh Singh select HAVE_MOVE_PUD 26722102f45SJosh Poimboeuf select HAVE_NOINSTR_HACK if HAVE_OBJTOOL 26842a0bb3fSPetr Mladek select HAVE_NMI 269489e355bSJosh Poimboeuf select HAVE_NOINSTR_VALIDATION if HAVE_OBJTOOL 27003f16cd0SJosh Poimboeuf select HAVE_OBJTOOL if X86_64 2716471b825SIngo Molnar select HAVE_OPTPROBES 2725394f1e9SArnd Bergmann select HAVE_PAGE_SIZE_4KB 2736471b825SIngo Molnar select HAVE_PCSPKR_PLATFORM 2746471b825SIngo Molnar select HAVE_PERF_EVENTS 275c01d4323SFrederic Weisbecker select HAVE_PERF_EVENTS_NMI 27692e5aae4SNicholas Piggin select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI 277eb01d42aSChristoph Hellwig select HAVE_PCI 278c5e63197SJiri Olsa select HAVE_PERF_REGS 279c5ebcedbSJiri Olsa select HAVE_PERF_USER_STACK_DUMP 280ff2e6d72SPeter Zijlstra select MMU_GATHER_RCU_TABLE_FREE if PARAVIRT 2811e9fdf21SPeter Zijlstra select MMU_GATHER_MERGE_VMAS 28200998085SThomas Gleixner select HAVE_POSIX_CPU_TIMERS_TASK_WORK 2836471b825SIngo Molnar select HAVE_REGS_AND_STACK_ACCESS_API 28403f16cd0SJosh Poimboeuf select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC || STACK_VALIDATION 2853c88ee19SMasami Hiramatsu select HAVE_FUNCTION_ARG_ACCESS_API 2867ecd19cfSKefeng Wang select HAVE_SETUP_PER_CPU_AREA 287cd1a41ceSThomas Gleixner select HAVE_SOFTIRQ_ON_OWN_STACK 288d148eac0SMasahiro Yamada select HAVE_STACKPROTECTOR if CC_HAS_SANE_STACKPROTECTOR 28903f16cd0SJosh Poimboeuf select HAVE_STACK_VALIDATION if HAVE_OBJTOOL 290e6d6c071SJosh Poimboeuf select HAVE_STATIC_CALL 29103f16cd0SJosh Poimboeuf select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL 29299cf983cSMark Rutland select HAVE_PREEMPT_DYNAMIC_CALL 293d6761b8fSMathieu Desnoyers select HAVE_RSEQ 29409498135SMiguel Ojeda select HAVE_RUST if X86_64 2956471b825SIngo Molnar select HAVE_SYSCALL_TRACEPOINTS 2965f3da8c0SJosh Poimboeuf select HAVE_UACCESS_VALIDATION if HAVE_OBJTOOL 2976471b825SIngo Molnar select HAVE_UNSTABLE_SCHED_CLOCK 2987c68af6eSAvi Kivity select HAVE_USER_RETURN_NOTIFIER 2997ac87074SVincenzo Frascino select HAVE_GENERIC_VDSO 30033385150SJason A. Donenfeld select VDSO_GETRANDOM if X86_64 3010c7ffa32SThomas Gleixner select HOTPLUG_PARALLEL if SMP && X86_64 30205736e4aSThomas Gleixner select HOTPLUG_SMT if SMP 3030c7ffa32SThomas Gleixner select HOTPLUG_SPLIT_STARTUP if SMP && X86_32 304c0185808SThomas Gleixner select IRQ_FORCED_THREADING 305c2508ec5SLinus Torvalds select LOCK_MM_AND_FIND_VMA 3067ecd19cfSKefeng Wang select NEED_PER_CPU_EMBED_FIRST_CHUNK 3077ecd19cfSKefeng Wang select NEED_PER_CPU_PAGE_FIRST_CHUNK 30886596f0aSChristoph Hellwig select NEED_SG_DMA_LENGTH 30987482708SMike Rapoport (Microsoft) select NUMA_MEMBLKS if NUMA 3102eac9c2dSChristoph Hellwig select PCI_DOMAINS if PCI 311625210cfSSinan Kaya select PCI_LOCKLESS_CONFIG if PCI 3126471b825SIngo Molnar select PERF_EVENTS 3133195ef59SPrarit Bhargava select RTC_LIB 314d6faca40SArnd Bergmann select RTC_MC146818_LIB 3156471b825SIngo Molnar select SPARSE_IRQ 3166471b825SIngo Molnar select SYSCTL_EXCEPTION_TRACE 31715f4eae7SAndy Lutomirski select THREAD_INFO_IN_TASK 3184aae683fSMasahiro Yamada select TRACE_IRQFLAGS_SUPPORT 3194510bffbSMark Rutland select TRACE_IRQFLAGS_NMI_SUPPORT 3206471b825SIngo Molnar select USER_STACKTRACE_SUPPORT 3213b02a051SIngo Molnar select HAVE_ARCH_KCSAN if X86_64 3220c608dadSAubrey Li select PROC_PID_ARCH_STATUS if PROC_FS 32350468e43SJarkko Sakkinen select HAVE_ARCH_NODE_DEV_GROUP if X86_SGX 324d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_16B if X86_64 || X86_ALIGNMENT_16 325d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_4B 3269e2b4be3SNayna Jain imply IMA_SECURE_AND_OR_TRUSTED_BOOT if EFI 327ceea991aSJiri Olsa select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 3284817f70cSQi Zheng select ARCH_SUPPORTS_PT_RECLAIM if X86_64 3297d8330a5SBalbir Singh 330ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER 3313120e25eSJan Beulich def_bool y 3323120e25eSJan Beulich depends on KPROBES || PERF_EVENTS || UPROBES 333ba7e4d13SIngo Molnar 33451b26adaSLinus Torvaldsconfig OUTPUT_FORMAT 33551b26adaSLinus Torvalds string 33651b26adaSLinus Torvalds default "elf32-i386" if X86_32 33751b26adaSLinus Torvalds default "elf64-x86-64" if X86_64 33851b26adaSLinus Torvalds 3398d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT 3403c2362e6SHarvey Harrison def_bool y 3418d5fffb9SSam Ravnborg 3428d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT 3433c2362e6SHarvey Harrison def_bool y 3448d5fffb9SSam Ravnborg 3458d5fffb9SSam Ravnborgconfig MMU 3463c2362e6SHarvey Harrison def_bool y 3478d5fffb9SSam Ravnborg 3489e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN 3499e08f57dSDaniel Cashman default 28 if 64BIT 3509e08f57dSDaniel Cashman default 8 3519e08f57dSDaniel Cashman 3529e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX 3539e08f57dSDaniel Cashman default 32 if 64BIT 3549e08f57dSDaniel Cashman default 16 3559e08f57dSDaniel Cashman 3569e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3579e08f57dSDaniel Cashman default 8 3589e08f57dSDaniel Cashman 3599e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3609e08f57dSDaniel Cashman default 16 3619e08f57dSDaniel Cashman 3628d5fffb9SSam Ravnborgconfig SBUS 3638d5fffb9SSam Ravnborg bool 3648d5fffb9SSam Ravnborg 3658d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA 3663120e25eSJan Beulich def_bool y 3673120e25eSJan Beulich depends on ISA_DMA_API 3688d5fffb9SSam Ravnborg 369d911c67eSAlexander Potapenkoconfig GENERIC_CSUM 370d911c67eSAlexander Potapenko bool 371d911c67eSAlexander Potapenko default y if KMSAN || KASAN 372d911c67eSAlexander Potapenko 3738d5fffb9SSam Ravnborgconfig GENERIC_BUG 3743c2362e6SHarvey Harrison def_bool y 3758d5fffb9SSam Ravnborg depends on BUG 376b93a531eSJan Beulich select GENERIC_BUG_RELATIVE_POINTERS if X86_64 377b93a531eSJan Beulich 378b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS 379b93a531eSJan Beulich bool 3808d5fffb9SSam Ravnborg 3818d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC 3823120e25eSJan Beulich def_bool y 3833120e25eSJan Beulich depends on ISA_DMA_API 3848d5fffb9SSam Ravnborg 3851032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY 3861032c0baSSam Ravnborg def_bool y 3871032c0baSSam Ravnborg 3889a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX 3899a0b8415Svenkatesh.pallipadi@intel.com def_bool y 3908d5fffb9SSam Ravnborg 391801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE 392801e4062SJohannes Berg def_bool y 393801e4062SJohannes Berg 394f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 395f4cb5700SJohannes Berg def_bool y 396f4cb5700SJohannes Berg 3978d5fffb9SSam Ravnborgconfig AUDIT_ARCH 398e0fd24a3SJan Beulich def_bool y if X86_64 3998d5fffb9SSam Ravnborg 400d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET 401d6f2d75aSAndrey Ryabinin hex 402d6f2d75aSAndrey Ryabinin depends on KASAN 403d6f2d75aSAndrey Ryabinin default 0xdffffc0000000000 404d6f2d75aSAndrey Ryabinin 40569575d38SShane Wangconfig HAVE_INTEL_TXT 40669575d38SShane Wang def_bool y 4076ea30386SKees Cook depends on INTEL_IOMMU && ACPI 40869575d38SShane Wang 4096b0c3d44SSam Ravnborgconfig X86_64_SMP 4106b0c3d44SSam Ravnborg def_bool y 4116b0c3d44SSam Ravnborg depends on X86_64 && SMP 4126b0c3d44SSam Ravnborg 4132b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES 4142b144498SSrikar Dronamraju def_bool y 4152b144498SSrikar Dronamraju 416d20642f0SRob Herringconfig FIX_EARLYCON_MEM 417d20642f0SRob Herring def_bool y 418d20642f0SRob Herring 41994d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK 42094d49eb3SKirill A. Shutemov bool 42194d49eb3SKirill A. Shutemov 42298233368SKirill A. Shutemovconfig PGTABLE_LEVELS 42398233368SKirill A. Shutemov int 42477ef56e4SKirill A. Shutemov default 5 if X86_5LEVEL 42598233368SKirill A. Shutemov default 4 if X86_64 42698233368SKirill A. Shutemov default 3 if X86_PAE 42798233368SKirill A. Shutemov default 2 42898233368SKirill A. Shutemov 4292a61f474SMasahiro Yamadaconfig CC_HAS_SANE_STACKPROTECTOR 4302a61f474SMasahiro Yamada bool 4311b866781SNathan Chancellor default $(success,$(srctree)/scripts/gcc-x86_64-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) if 64BIT 4321b866781SNathan Chancellor default $(success,$(srctree)/scripts/gcc-x86_32-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) 4332a61f474SMasahiro Yamada help 4342a61f474SMasahiro Yamada We have to make sure stack protector is unconditionally disabled if 4353fb0fdb3SAndy Lutomirski the compiler produces broken code or if it does not let us control 4363fb0fdb3SAndy Lutomirski the segment on 32-bit kernels. 4372a61f474SMasahiro Yamada 438506f1d07SSam Ravnborgmenu "Processor type and features" 439506f1d07SSam Ravnborg 440506f1d07SSam Ravnborgconfig SMP 441506f1d07SSam Ravnborg bool "Symmetric multi-processing support" 442a7f7f624SMasahiro Yamada help 443506f1d07SSam Ravnborg This enables support for systems with more than one CPU. If you have 4444a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 4454a474157SRobert Graffham than one CPU, say Y. 446506f1d07SSam Ravnborg 4474a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 448506f1d07SSam Ravnborg machines, but will use only one CPU of a multiprocessor machine. If 449506f1d07SSam Ravnborg you say Y here, the kernel will run on many, but not all, 4504a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 451506f1d07SSam Ravnborg will run faster if you say N here. 452506f1d07SSam Ravnborg 453506f1d07SSam Ravnborg Note that if you say Y here and choose architecture "586" or 454506f1d07SSam Ravnborg "Pentium" under "Processor family", the kernel will not work on 486 455506f1d07SSam Ravnborg architectures. Similarly, multiprocessor kernels for the "PPro" 456506f1d07SSam Ravnborg architecture may not work on all Pentium based boards. 457506f1d07SSam Ravnborg 458506f1d07SSam Ravnborg People using multiprocessor machines who say Y here should also say 459506f1d07SSam Ravnborg Y to "Enhanced Real Time Clock Support", below. The "Advanced Power 460506f1d07SSam Ravnborg Management" code will be disabled if you say Y here. 461506f1d07SSam Ravnborg 462ff61f079SJonathan Corbet See also <file:Documentation/arch/x86/i386/IO-APIC.rst>, 4634f4cfa6cSMauro Carvalho Chehab <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at 464506f1d07SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 465506f1d07SSam Ravnborg 466506f1d07SSam Ravnborg If you don't know what to do here, say N. 467506f1d07SSam Ravnborg 46806cd9a7dSYinghai Luconfig X86_X2APIC 46906cd9a7dSYinghai Lu bool "Support x2apic" 47019e3d60dSJan Kiszka depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) 471a7f7f624SMasahiro Yamada help 47206cd9a7dSYinghai Lu This enables x2apic support on CPUs that have this feature. 47306cd9a7dSYinghai Lu 47406cd9a7dSYinghai Lu This allows 32-bit apic IDs (so it can support very large systems), 47506cd9a7dSYinghai Lu and accesses the local apic via MSRs not via mmio. 47606cd9a7dSYinghai Lu 477b8d1d163SDaniel Sneddon Some Intel systems circa 2022 and later are locked into x2APIC mode 478b8d1d163SDaniel Sneddon and can not fall back to the legacy APIC modes if SGX or TDX are 479e3998434SMateusz Jończyk enabled in the BIOS. They will boot with very reduced functionality 480e3998434SMateusz Jończyk without enabling this option. 481b8d1d163SDaniel Sneddon 48206cd9a7dSYinghai Lu If you don't know what to do here, say N. 48306cd9a7dSYinghai Lu 4847fec07fdSJacob Panconfig X86_POSTED_MSI 4857fec07fdSJacob Pan bool "Enable MSI and MSI-x delivery by posted interrupts" 4867fec07fdSJacob Pan depends on X86_64 && IRQ_REMAP 4877fec07fdSJacob Pan help 4887fec07fdSJacob Pan This enables MSIs that are under interrupt remapping to be delivered as 4897fec07fdSJacob Pan posted interrupts to the host kernel. Interrupt throughput can 4907fec07fdSJacob Pan potentially be improved by coalescing CPU notifications during high 4917fec07fdSJacob Pan frequency bursts. 4927fec07fdSJacob Pan 4937fec07fdSJacob Pan If you don't know what to do here, say N. 4947fec07fdSJacob Pan 4956695c85bSYinghai Luconfig X86_MPPARSE 4964590d98fSAndy Shevchenko bool "Enable MPS table" if ACPI 4977a527688SJan Beulich default y 4985ab74722SIngo Molnar depends on X86_LOCAL_APIC 499a7f7f624SMasahiro Yamada help 5006695c85bSYinghai Lu For old smp systems that do not have proper acpi support. Newer systems 5016695c85bSYinghai Lu (esp with 64bit cpus) with acpi support, MADT and DSDT will override it 5026695c85bSYinghai Lu 503e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL 504e6d42931SJohannes Weiner bool "x86 CPU resource control support" 5056fe07ce3SBabu Moger depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD) 50659fe5a77SThomas Gleixner select KERNFS 507e79f15a4SChen Yu select PROC_CPU_RESCTRL if PROC_FS 50878e99b4aSFenghua Yu help 509e6d42931SJohannes Weiner Enable x86 CPU resource control support. 5106fe07ce3SBabu Moger 5116fe07ce3SBabu Moger Provide support for the allocation and monitoring of system resources 5126fe07ce3SBabu Moger usage by the CPU. 5136fe07ce3SBabu Moger 5146fe07ce3SBabu Moger Intel calls this Intel Resource Director Technology 5156fe07ce3SBabu Moger (Intel(R) RDT). More information about RDT can be found in the 5166fe07ce3SBabu Moger Intel x86 Architecture Software Developer Manual. 5176fe07ce3SBabu Moger 5186fe07ce3SBabu Moger AMD calls this AMD Platform Quality of Service (AMD QoS). 5196fe07ce3SBabu Moger More information about AMD QoS can be found in the AMD64 Technology 5206fe07ce3SBabu Moger Platform Quality of Service Extensions manual. 52178e99b4aSFenghua Yu 52278e99b4aSFenghua Yu Say N if unsure. 52378e99b4aSFenghua Yu 5242cce9591SH. Peter Anvin (Intel)config X86_FRED 5252cce9591SH. Peter Anvin (Intel) bool "Flexible Return and Event Delivery" 5262cce9591SH. Peter Anvin (Intel) depends on X86_64 5272cce9591SH. Peter Anvin (Intel) help 5282cce9591SH. Peter Anvin (Intel) When enabled, try to use Flexible Return and Event Delivery 5292cce9591SH. Peter Anvin (Intel) instead of the legacy SYSCALL/SYSENTER/IDT architecture for 5302cce9591SH. Peter Anvin (Intel) ring transitions and exception/interrupt handling if the 5313c41786cSPaul Menzel system supports it. 5322cce9591SH. Peter Anvin (Intel) 533a0d0bb4dSRandy Dunlapconfig X86_BIGSMP 534a0d0bb4dSRandy Dunlap bool "Support for big SMP systems with more than 8 CPUs" 53571d99ea4SMasahiro Yamada depends on SMP && X86_32 536a7f7f624SMasahiro Yamada help 537e133f6eaSRandy Dunlap This option is needed for the systems that have more than 8 CPUs. 538a0d0bb4dSRandy Dunlap 539c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM 540c5c606d9SRavikiran G Thirumalai bool "Support for extended (non-PC) x86 platforms" 541c5c606d9SRavikiran G Thirumalai default y 542a7f7f624SMasahiro Yamada help 54306ac8346SIngo Molnar If you disable this option then the kernel will only support 54406ac8346SIngo Molnar standard PC platforms. (which covers the vast majority of 54506ac8346SIngo Molnar systems out there.) 54606ac8346SIngo Molnar 5478425091fSRavikiran G Thirumalai If you enable this option then you'll be able to select support 54871d99ea4SMasahiro Yamada for the following non-PC x86 platforms, depending on the value of 54971d99ea4SMasahiro Yamada CONFIG_64BIT. 55071d99ea4SMasahiro Yamada 55171d99ea4SMasahiro Yamada 32-bit platforms (CONFIG_64BIT=n): 552cb7b8023SBen Hutchings Goldfish (Android emulator) 5538425091fSRavikiran G Thirumalai AMD Elan 5548425091fSRavikiran G Thirumalai RDC R-321x SoC 5558425091fSRavikiran G Thirumalai SGI 320/540 (Visual Workstation) 55683125a3aSAlessandro Rubini STA2X11-based (e.g. Northville) 5573f4110a4SThomas Gleixner Moorestown MID devices 55806ac8346SIngo Molnar 55971d99ea4SMasahiro Yamada 64-bit platforms (CONFIG_64BIT=y): 56044b111b5SSteffen Persvold Numascale NumaChip 5618425091fSRavikiran G Thirumalai ScaleMP vSMP 5628425091fSRavikiran G Thirumalai SGI Ultraviolet 5638425091fSRavikiran G Thirumalai 5648425091fSRavikiran G Thirumalai If you have one of these systems, or if you want to build a 5658425091fSRavikiran G Thirumalai generic distribution kernel, say Y here - otherwise say N. 56671d99ea4SMasahiro Yamada 567c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms 568c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 56944b111b5SSteffen Persvoldconfig X86_NUMACHIP 57044b111b5SSteffen Persvold bool "Numascale NumaChip" 57144b111b5SSteffen Persvold depends on X86_64 57244b111b5SSteffen Persvold depends on X86_EXTENDED_PLATFORM 57344b111b5SSteffen Persvold depends on NUMA 57444b111b5SSteffen Persvold depends on SMP 57544b111b5SSteffen Persvold depends on X86_X2APIC 576f9726bfdSDaniel J Blueman depends on PCI_MMCONFIG 577a7f7f624SMasahiro Yamada help 57844b111b5SSteffen Persvold Adds support for Numascale NumaChip large-SMP systems. Needed to 57944b111b5SSteffen Persvold enable more than ~168 cores. 58044b111b5SSteffen Persvold If you don't have one of these, you should say N here. 58103b48632SNick Piggin 5826a48565eSIngo Molnarconfig X86_VSMP 583c5c606d9SRavikiran G Thirumalai bool "ScaleMP vSMP" 5846276a074SBorislav Petkov select HYPERVISOR_GUEST 5856a48565eSIngo Molnar select PARAVIRT 5866a48565eSIngo Molnar depends on X86_64 && PCI 587c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 588ead91d4bSShai Fultheim depends on SMP 589a7f7f624SMasahiro Yamada help 5906a48565eSIngo Molnar Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is 5916a48565eSIngo Molnar supposed to run on these EM64T-based machines. Only choose this option 5926a48565eSIngo Molnar if you have one of these machines. 5936a48565eSIngo Molnar 594c5c606d9SRavikiran G Thirumalaiconfig X86_UV 595c5c606d9SRavikiran G Thirumalai bool "SGI Ultraviolet" 596c5c606d9SRavikiran G Thirumalai depends on X86_64 597c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 59854c28d29SJack Steiner depends on NUMA 5991ecb4ae5SAndrew Morton depends on EFI 600c2209ea5SIngo Molnar depends on KEXEC_CORE 6019d6c26e7SSuresh Siddha depends on X86_X2APIC 6021222e564SIngo Molnar depends on PCI 603a7f7f624SMasahiro Yamada help 604c5c606d9SRavikiran G Thirumalai This option is needed in order to support SGI Ultraviolet systems. 605c5c606d9SRavikiran G Thirumalai If you don't have one of these, you should say N here. 606c5c606d9SRavikiran G Thirumalai 607c5c606d9SRavikiran G Thirumalai# Following is an alphabetically sorted list of 32 bit extended platforms 608c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 609506f1d07SSam Ravnborg 610ddd70cf9SJun Nakajimaconfig X86_GOLDFISH 611ddd70cf9SJun Nakajima bool "Goldfish (Virtual Platform)" 612cb7b8023SBen Hutchings depends on X86_EXTENDED_PLATFORM 613a7f7f624SMasahiro Yamada help 614ddd70cf9SJun Nakajima Enable support for the Goldfish virtual platform used primarily 615ddd70cf9SJun Nakajima for Android development. Unless you are building for the Android 616ddd70cf9SJun Nakajima Goldfish emulator say N here. 617ddd70cf9SJun Nakajima 618c751e17bSThomas Gleixnerconfig X86_INTEL_CE 619c751e17bSThomas Gleixner bool "CE4100 TV platform" 620c751e17bSThomas Gleixner depends on PCI 621c751e17bSThomas Gleixner depends on PCI_GODIRECT 6226084a6e2SJiang Liu depends on X86_IO_APIC 623c751e17bSThomas Gleixner depends on X86_32 624c751e17bSThomas Gleixner depends on X86_EXTENDED_PLATFORM 62537bc9f50SDirk Brandewie select X86_REBOOTFIXUPS 626da6b737bSSebastian Andrzej Siewior select OF 627da6b737bSSebastian Andrzej Siewior select OF_EARLY_FLATTREE 628a7f7f624SMasahiro Yamada help 629c751e17bSThomas Gleixner Select for the Intel CE media processor (CE4100) SOC. 630c751e17bSThomas Gleixner This option compiles in support for the CE4100 SOC for settop 631c751e17bSThomas Gleixner boxes and media devices. 632c751e17bSThomas Gleixner 6334cb9b00fSDavid Cohenconfig X86_INTEL_MID 63443605ef1SAlan Cox bool "Intel MID platform support" 63543605ef1SAlan Cox depends on X86_EXTENDED_PLATFORM 636edc6bc78SDavid Cohen depends on X86_PLATFORM_DEVICES 6371ea7c673SAlan Cox depends on PCI 6383fda5bb4SAndy Shevchenko depends on X86_64 || (PCI_GOANY && X86_32) 6391ea7c673SAlan Cox depends on X86_IO_APIC 6404cb9b00fSDavid Cohen select I2C 6417c9c3a1eSAlan Cox select DW_APB_TIMER 64254b34aa0SMika Westerberg select INTEL_SCU_PCI 643a7f7f624SMasahiro Yamada help 6444cb9b00fSDavid Cohen Select to build a kernel capable of supporting Intel MID (Mobile 6454cb9b00fSDavid Cohen Internet Device) platform systems which do not have the PCI legacy 6464cb9b00fSDavid Cohen interfaces. If you are building for a PC class system say N here. 6471ea7c673SAlan Cox 6484cb9b00fSDavid Cohen Intel MID platforms are based on an Intel processor and chipset which 6494cb9b00fSDavid Cohen consume less power than most of the x86 derivatives. 65043605ef1SAlan Cox 6518bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK 6528bbc2a13SBryan O'Donoghue bool "Intel Quark platform support" 6538bbc2a13SBryan O'Donoghue depends on X86_32 6548bbc2a13SBryan O'Donoghue depends on X86_EXTENDED_PLATFORM 6558bbc2a13SBryan O'Donoghue depends on X86_PLATFORM_DEVICES 6568bbc2a13SBryan O'Donoghue depends on X86_TSC 6578bbc2a13SBryan O'Donoghue depends on PCI 6588bbc2a13SBryan O'Donoghue depends on PCI_GOANY 6598bbc2a13SBryan O'Donoghue depends on X86_IO_APIC 6608bbc2a13SBryan O'Donoghue select IOSF_MBI 6618bbc2a13SBryan O'Donoghue select INTEL_IMR 6629ab6eb51SAndy Shevchenko select COMMON_CLK 663a7f7f624SMasahiro Yamada help 6648bbc2a13SBryan O'Donoghue Select to include support for Quark X1000 SoC. 6658bbc2a13SBryan O'Donoghue Say Y here if you have a Quark based system such as the Arduino 6668bbc2a13SBryan O'Donoghue compatible Intel Galileo. 6678bbc2a13SBryan O'Donoghue 6683d48aab1SMika Westerbergconfig X86_INTEL_LPSS 6693d48aab1SMika Westerberg bool "Intel Low Power Subsystem Support" 6705962dd22SSinan Kaya depends on X86 && ACPI && PCI 6713d48aab1SMika Westerberg select COMMON_CLK 6720f531431SMathias Nyman select PINCTRL 673eebb3e8dSAndy Shevchenko select IOSF_MBI 674a7f7f624SMasahiro Yamada help 6753d48aab1SMika Westerberg Select to build support for Intel Low Power Subsystem such as 6763d48aab1SMika Westerberg found on Intel Lynxpoint PCH. Selecting this option enables 6770f531431SMathias Nyman things like clock tree (common clock framework) and pincontrol 6780f531431SMathias Nyman which are needed by the LPSS peripheral drivers. 6793d48aab1SMika Westerberg 68092082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE 68192082a88SKen Xue bool "AMD ACPI2Platform devices support" 68292082a88SKen Xue depends on ACPI 68392082a88SKen Xue select COMMON_CLK 68492082a88SKen Xue select PINCTRL 685a7f7f624SMasahiro Yamada help 68692082a88SKen Xue Select to interpret AMD specific ACPI device to platform device 68792082a88SKen Xue such as I2C, UART, GPIO found on AMD Carrizo and later chipsets. 68892082a88SKen Xue I2C and UART depend on COMMON_CLK to set clock. GPIO driver is 68992082a88SKen Xue implemented under PINCTRL subsystem. 69092082a88SKen Xue 691ced3ce76SDavid E. Boxconfig IOSF_MBI 692ced3ce76SDavid E. Box tristate "Intel SoC IOSF Sideband support for SoC platforms" 693ced3ce76SDavid E. Box depends on PCI 694a7f7f624SMasahiro Yamada help 695ced3ce76SDavid E. Box This option enables sideband register access support for Intel SoC 696ced3ce76SDavid E. Box platforms. On these platforms the IOSF sideband is used in lieu of 697ced3ce76SDavid E. Box MSR's for some register accesses, mostly but not limited to thermal 698ced3ce76SDavid E. Box and power. Drivers may query the availability of this device to 699ced3ce76SDavid E. Box determine if they need the sideband in order to work on these 700ced3ce76SDavid E. Box platforms. The sideband is available on the following SoC products. 701ced3ce76SDavid E. Box This list is not meant to be exclusive. 702ced3ce76SDavid E. Box - BayTrail 703ced3ce76SDavid E. Box - Braswell 704ced3ce76SDavid E. Box - Quark 705ced3ce76SDavid E. Box 706ced3ce76SDavid E. Box You should say Y if you are running a kernel on one of these SoC's. 707ced3ce76SDavid E. Box 708ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG 709ed2226bdSDavid E. Box bool "Enable IOSF sideband access through debugfs" 710ed2226bdSDavid E. Box depends on IOSF_MBI && DEBUG_FS 711a7f7f624SMasahiro Yamada help 712ed2226bdSDavid E. Box Select this option to expose the IOSF sideband access registers (MCR, 713ed2226bdSDavid E. Box MDR, MCRX) through debugfs to write and read register information from 714ed2226bdSDavid E. Box different units on the SoC. This is most useful for obtaining device 715ed2226bdSDavid E. Box state information for debug and analysis. As this is a general access 716ed2226bdSDavid E. Box mechanism, users of this option would have specific knowledge of the 717ed2226bdSDavid E. Box device they want to access. 718ed2226bdSDavid E. Box 719ed2226bdSDavid E. Box If you don't require the option or are in doubt, say N. 720ed2226bdSDavid E. Box 721c5c606d9SRavikiran G Thirumalaiconfig X86_RDC321X 722c5c606d9SRavikiran G Thirumalai bool "RDC R-321x SoC" 723506f1d07SSam Ravnborg depends on X86_32 724c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 725c5c606d9SRavikiran G Thirumalai select M486 726c5c606d9SRavikiran G Thirumalai select X86_REBOOTFIXUPS 727a7f7f624SMasahiro Yamada help 728c5c606d9SRavikiran G Thirumalai This option is needed for RDC R-321x system-on-chip, also known 729c5c606d9SRavikiran G Thirumalai as R-8610-(G). 730c5c606d9SRavikiran G Thirumalai If you don't have one of these chips, you should say N here. 731c5c606d9SRavikiran G Thirumalai 732e0c7ae37SIngo Molnarconfig X86_32_NON_STANDARD 7339c398017SIngo Molnar bool "Support non-standard 32-bit SMP architectures" 7349c398017SIngo Molnar depends on X86_32 && SMP 735c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 736a7f7f624SMasahiro Yamada help 737b5660ba7SH. Peter Anvin This option compiles in the bigsmp and STA2X11 default 738b5660ba7SH. Peter Anvin subarchitectures. It is intended for a generic binary 739b5660ba7SH. Peter Anvin kernel. If you select them all, kernel will probe it one by 740b5660ba7SH. Peter Anvin one and will fallback to default. 741d49c4288SYinghai Lu 742c5c606d9SRavikiran G Thirumalai# Alphabetically sorted list of Non standard 32 bit platforms 743d49c4288SYinghai Lu 744d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE 7456fc108a0SJan Beulich def_bool y 746d949f36fSLinus Torvalds # MCE code calls memory_failure(): 747d949f36fSLinus Torvalds depends on X86_MCE 748d949f36fSLinus Torvalds # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags: 749d949f36fSLinus Torvalds # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH: 750d949f36fSLinus Torvalds depends on X86_64 || !SPARSEMEM 751d949f36fSLinus Torvalds select ARCH_SUPPORTS_MEMORY_FAILURE 752d949f36fSLinus Torvalds 75383125a3aSAlessandro Rubiniconfig STA2X11 75483125a3aSAlessandro Rubini bool "STA2X11 Companion Chip Support" 75583125a3aSAlessandro Rubini depends on X86_32_NON_STANDARD && PCI 75683125a3aSAlessandro Rubini select SWIOTLB 75783125a3aSAlessandro Rubini select MFD_STA2X11 7580145071bSLinus Walleij select GPIOLIB 759a7f7f624SMasahiro Yamada help 76083125a3aSAlessandro Rubini This adds support for boards based on the STA2X11 IO-Hub, 76183125a3aSAlessandro Rubini a.k.a. "ConneXt". The chip is used in place of the standard 76283125a3aSAlessandro Rubini PC chipset, so all "standard" peripherals are missing. If this 76383125a3aSAlessandro Rubini option is selected the kernel will still be able to boot on 76483125a3aSAlessandro Rubini standard PC machines. 76583125a3aSAlessandro Rubini 76682148d1dSShérabconfig X86_32_IRIS 76782148d1dSShérab tristate "Eurobraille/Iris poweroff module" 76882148d1dSShérab depends on X86_32 769a7f7f624SMasahiro Yamada help 77082148d1dSShérab The Iris machines from EuroBraille do not have APM or ACPI support 77182148d1dSShérab to shut themselves down properly. A special I/O sequence is 77282148d1dSShérab needed to do so, which is what this module does at 77382148d1dSShérab kernel shutdown. 77482148d1dSShérab 77582148d1dSShérab This is only for Iris machines from EuroBraille. 77682148d1dSShérab 77782148d1dSShérab If unused, say N. 77882148d1dSShérab 779ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 7803c2362e6SHarvey Harrison def_bool y 7813c2362e6SHarvey Harrison prompt "Single-depth WCHAN output" 782a87d0914SKen Chen depends on X86 783a7f7f624SMasahiro Yamada help 784506f1d07SSam Ravnborg Calculate simpler /proc/<PID>/wchan values. If this option 785506f1d07SSam Ravnborg is disabled then wchan values will recurse back to the 786506f1d07SSam Ravnborg caller function. This provides more accurate wchan values, 787506f1d07SSam Ravnborg at the expense of slightly more scheduling overhead. 788506f1d07SSam Ravnborg 789506f1d07SSam Ravnborg If in doubt, say "Y". 790506f1d07SSam Ravnborg 7916276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST 7926276a074SBorislav Petkov bool "Linux guest support" 793a7f7f624SMasahiro Yamada help 7946276a074SBorislav Petkov Say Y here to enable options for running Linux under various hyper- 7956276a074SBorislav Petkov visors. This option enables basic hypervisor detection and platform 7966276a074SBorislav Petkov setup. 797506f1d07SSam Ravnborg 7986276a074SBorislav Petkov If you say N, all options in this submenu will be skipped and 7996276a074SBorislav Petkov disabled, and Linux guest support won't be built in. 800506f1d07SSam Ravnborg 8016276a074SBorislav Petkovif HYPERVISOR_GUEST 802506f1d07SSam Ravnborg 803e61bd94aSEduardo Pereira Habkostconfig PARAVIRT 804e61bd94aSEduardo Pereira Habkost bool "Enable paravirtualization code" 805a0e2bf7cSJuergen Gross depends on HAVE_STATIC_CALL 806a7f7f624SMasahiro Yamada help 807e61bd94aSEduardo Pereira Habkost This changes the kernel so it can modify itself when it is run 808e61bd94aSEduardo Pereira Habkost under a hypervisor, potentially improving performance significantly 809e61bd94aSEduardo Pereira Habkost over full virtualization. However, when run without a hypervisor 810e61bd94aSEduardo Pereira Habkost the kernel is theoretically slower and slightly larger. 811e61bd94aSEduardo Pereira Habkost 812c00a280aSJuergen Grossconfig PARAVIRT_XXL 813c00a280aSJuergen Gross bool 814c00a280aSJuergen Gross 8156276a074SBorislav Petkovconfig PARAVIRT_DEBUG 8166276a074SBorislav Petkov bool "paravirt-ops debugging" 8176276a074SBorislav Petkov depends on PARAVIRT && DEBUG_KERNEL 818a7f7f624SMasahiro Yamada help 8196276a074SBorislav Petkov Enable to debug paravirt_ops internals. Specifically, BUG if 8206276a074SBorislav Petkov a paravirt_op is missing when it is called. 8216276a074SBorislav Petkov 822b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS 823b4ecc126SJeremy Fitzhardinge bool "Paravirtualization layer for spinlocks" 8246ea30386SKees Cook depends on PARAVIRT && SMP 825a7f7f624SMasahiro Yamada help 826b4ecc126SJeremy Fitzhardinge Paravirtualized spinlocks allow a pvops backend to replace the 827b4ecc126SJeremy Fitzhardinge spinlock implementation with something virtualization-friendly 828b4ecc126SJeremy Fitzhardinge (for example, block the virtual CPU rather than spinning). 829b4ecc126SJeremy Fitzhardinge 8304c4e4f61SRaghavendra K T It has a minimal impact on native kernels and gives a nice performance 8314c4e4f61SRaghavendra K T benefit on paravirtualized KVM / Xen kernels. 832b4ecc126SJeremy Fitzhardinge 8334c4e4f61SRaghavendra K T If you are unsure how to answer this question, answer Y. 834b4ecc126SJeremy Fitzhardinge 835ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR 836ecca2502SZhao Yakui def_bool n 837ecca2502SZhao Yakui 8386276a074SBorislav Petkovsource "arch/x86/xen/Kconfig" 8396276a074SBorislav Petkov 8406276a074SBorislav Petkovconfig KVM_GUEST 8416276a074SBorislav Petkov bool "KVM Guest support (including kvmclock)" 8426276a074SBorislav Petkov depends on PARAVIRT 8436276a074SBorislav Petkov select PARAVIRT_CLOCK 844a1c4423bSMarcelo Tosatti select ARCH_CPUIDLE_HALTPOLL 845b1d40575SVitaly Kuznetsov select X86_HV_CALLBACK_VECTOR 8466276a074SBorislav Petkov default y 847a7f7f624SMasahiro Yamada help 8486276a074SBorislav Petkov This option enables various optimizations for running under the KVM 8496276a074SBorislav Petkov hypervisor. It includes a paravirtualized clock, so that instead 8506276a074SBorislav Petkov of relying on a PIT (or probably other) emulation by the 8516276a074SBorislav Petkov underlying device model, the host provides the guest with 8526276a074SBorislav Petkov timing infrastructure such as time of day, and system time 8536276a074SBorislav Petkov 854a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL 855a1c4423bSMarcelo Tosatti def_bool n 856a1c4423bSMarcelo Tosatti prompt "Disable host haltpoll when loading haltpoll driver" 857a1c4423bSMarcelo Tosatti help 858a1c4423bSMarcelo Tosatti If virtualized under KVM, disable host haltpoll. 859a1c4423bSMarcelo Tosatti 8607733607fSMaran Wilsonconfig PVH 8617733607fSMaran Wilson bool "Support for running PVH guests" 862a7f7f624SMasahiro Yamada help 8637733607fSMaran Wilson This option enables the PVH entry point for guest virtual machines 8647733607fSMaran Wilson as specified in the x86/HVM direct boot ABI. 8657733607fSMaran Wilson 8666276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING 8676276a074SBorislav Petkov bool "Paravirtual steal time accounting" 8686276a074SBorislav Petkov depends on PARAVIRT 869a7f7f624SMasahiro Yamada help 8706276a074SBorislav Petkov Select this option to enable fine granularity task steal time 8716276a074SBorislav Petkov accounting. Time spent executing other tasks in parallel with 8726276a074SBorislav Petkov the current vCPU is discounted from the vCPU power. To account for 8736276a074SBorislav Petkov that, there can be a small performance impact. 8746276a074SBorislav Petkov 8756276a074SBorislav Petkov If in doubt, say N here. 8766276a074SBorislav Petkov 8777af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK 8787af192c9SGerd Hoffmann bool 8797af192c9SGerd Hoffmann 8804a362601SJan Kiszkaconfig JAILHOUSE_GUEST 8814a362601SJan Kiszka bool "Jailhouse non-root cell support" 882abde587bSArnd Bergmann depends on X86_64 && PCI 88387e65d05SJan Kiszka select X86_PM_TIMER 884a7f7f624SMasahiro Yamada help 8854a362601SJan Kiszka This option allows to run Linux as guest in a Jailhouse non-root 8864a362601SJan Kiszka cell. You can leave this option disabled if you only want to start 8874a362601SJan Kiszka Jailhouse and run Linux afterwards in the root cell. 8884a362601SJan Kiszka 889ec7972c9SZhao Yakuiconfig ACRN_GUEST 890ec7972c9SZhao Yakui bool "ACRN Guest support" 891ec7972c9SZhao Yakui depends on X86_64 892498ad393SZhao Yakui select X86_HV_CALLBACK_VECTOR 893ec7972c9SZhao Yakui help 894ec7972c9SZhao Yakui This option allows to run Linux as guest in the ACRN hypervisor. ACRN is 895ec7972c9SZhao Yakui a flexible, lightweight reference open-source hypervisor, built with 896ec7972c9SZhao Yakui real-time and safety-criticality in mind. It is built for embedded 897ec7972c9SZhao Yakui IOT with small footprint and real-time features. More details can be 898ec7972c9SZhao Yakui found in https://projectacrn.org/. 899ec7972c9SZhao Yakui 90059bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST 90159bd54a8SKuppuswamy Sathyanarayanan bool "Intel TDX (Trust Domain Extensions) - Guest Support" 90259bd54a8SKuppuswamy Sathyanarayanan depends on X86_64 && CPU_SUP_INTEL 90359bd54a8SKuppuswamy Sathyanarayanan depends on X86_X2APIC 90475d090fdSKirill A. Shutemov depends on EFI_STUB 90541394e33SKirill A. Shutemov select ARCH_HAS_CC_PLATFORM 906968b4931SKirill A. Shutemov select X86_MEM_ENCRYPT 90777a512e3SSean Christopherson select X86_MCE 90875d090fdSKirill A. Shutemov select UNACCEPTED_MEMORY 90959bd54a8SKuppuswamy Sathyanarayanan help 91059bd54a8SKuppuswamy Sathyanarayanan Support running as a guest under Intel TDX. Without this support, 91159bd54a8SKuppuswamy Sathyanarayanan the guest kernel can not boot or run under TDX. 91259bd54a8SKuppuswamy Sathyanarayanan TDX includes memory encryption and integrity capabilities 91359bd54a8SKuppuswamy Sathyanarayanan which protect the confidentiality and integrity of guest 91459bd54a8SKuppuswamy Sathyanarayanan memory contents and CPU state. TDX guests are protected from 91559bd54a8SKuppuswamy Sathyanarayanan some attacks from the VMM. 91659bd54a8SKuppuswamy Sathyanarayanan 9176276a074SBorislav Petkovendif # HYPERVISOR_GUEST 91897349135SJeremy Fitzhardinge 919506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu" 920506f1d07SSam Ravnborg 921506f1d07SSam Ravnborgconfig HPET_TIMER 9223c2362e6SHarvey Harrison def_bool X86_64 923506f1d07SSam Ravnborg prompt "HPET Timer Support" if X86_32 924a7f7f624SMasahiro Yamada help 925506f1d07SSam Ravnborg Use the IA-PC HPET (High Precision Event Timer) to manage 926506f1d07SSam Ravnborg time in preference to the PIT and RTC, if a HPET is 927506f1d07SSam Ravnborg present. 928506f1d07SSam Ravnborg HPET is the next generation timer replacing legacy 8254s. 929506f1d07SSam Ravnborg The HPET provides a stable time base on SMP 930506f1d07SSam Ravnborg systems, unlike the TSC, but it is more expensive to access, 9314e7f9df2SMichael S. Tsirkin as it is off-chip. The interface used is documented 9324e7f9df2SMichael S. Tsirkin in the HPET spec, revision 1. 933506f1d07SSam Ravnborg 934506f1d07SSam Ravnborg You can safely choose Y here. However, HPET will only be 935506f1d07SSam Ravnborg activated if the platform and the BIOS support this feature. 936506f1d07SSam Ravnborg Otherwise the 8254 will be used for timing services. 937506f1d07SSam Ravnborg 938506f1d07SSam Ravnborg Choose N to continue using the legacy 8254 timer. 939506f1d07SSam Ravnborg 940506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC 9413c2362e6SHarvey Harrison def_bool y 9423228e1dcSAnand K Mistry depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 943506f1d07SSam Ravnborg 9446a108a14SDavid Rientjes# Mark as expert because too many people got it wrong. 945506f1d07SSam Ravnborg# The code disables itself when not needed. 9467ae9392cSThomas Petazzoniconfig DMI 9477ae9392cSThomas Petazzoni default y 948cf074402SArd Biesheuvel select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 9496a108a14SDavid Rientjes bool "Enable DMI scanning" if EXPERT 950a7f7f624SMasahiro Yamada help 9517ae9392cSThomas Petazzoni Enabled scanning of DMI to identify machine quirks. Say Y 9527ae9392cSThomas Petazzoni here unless you have verified that your setup is not 9537ae9392cSThomas Petazzoni affected by entries in the DMI blacklist. Required by PNP 9547ae9392cSThomas Petazzoni BIOS code. 9557ae9392cSThomas Petazzoni 956506f1d07SSam Ravnborgconfig GART_IOMMU 95738901f1cSAndi Kleen bool "Old AMD GART IOMMU support" 958a4ce5a48SChristoph Hellwig select IOMMU_HELPER 959506f1d07SSam Ravnborg select SWIOTLB 96023ac4ae8SAndreas Herrmann depends on X86_64 && PCI && AMD_NB 961a7f7f624SMasahiro Yamada help 962ced3c42cSIngo Molnar Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron 963ced3c42cSIngo Molnar GART based hardware IOMMUs. 964ced3c42cSIngo Molnar 965ced3c42cSIngo Molnar The GART supports full DMA access for devices with 32-bit access 966ced3c42cSIngo Molnar limitations, on systems with more than 3 GB. This is usually needed 967ced3c42cSIngo Molnar for USB, sound, many IDE/SATA chipsets and some other devices. 968ced3c42cSIngo Molnar 969ced3c42cSIngo Molnar Newer systems typically have a modern AMD IOMMU, supported via 970ced3c42cSIngo Molnar the CONFIG_AMD_IOMMU=y config option. 971ced3c42cSIngo Molnar 972ced3c42cSIngo Molnar In normal configurations this driver is only active when needed: 973ced3c42cSIngo Molnar there's more than 3 GB of memory and the system contains a 974ced3c42cSIngo Molnar 32-bit limited device. 975ced3c42cSIngo Molnar 976ced3c42cSIngo Molnar If unsure, say Y. 977506f1d07SSam Ravnborg 9788b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT 9798b766b0fSMichal Suchanek bool 9808b766b0fSMichal Suchanek help 9818b766b0fSMichal Suchanek If true, at least one selected framebuffer driver can take advantage 9828b766b0fSMichal Suchanek of VESA video modes set at an early boot stage via the vga= parameter. 9838b766b0fSMichal Suchanek 9841184dc2fSMike Travisconfig MAXSMP 985ddb0c5a6SSamuel Thibault bool "Enable Maximum number of SMP Processors and NUMA Nodes" 9866ea30386SKees Cook depends on X86_64 && SMP && DEBUG_KERNEL 98736f5101aSMike Travis select CPUMASK_OFFSTACK 988a7f7f624SMasahiro Yamada help 989ddb0c5a6SSamuel Thibault Enable maximum number of CPUS and NUMA Nodes for this architecture. 9901184dc2fSMike Travis If unsure, say N. 991506f1d07SSam Ravnborg 992aec6487eSIngo Molnar# 993aec6487eSIngo Molnar# The maximum number of CPUs supported: 994aec6487eSIngo Molnar# 995aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT, 996aec6487eSIngo Molnar# and which can be configured interactively in the 997aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range. 998aec6487eSIngo Molnar# 999aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on 1000aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel. 1001aec6487eSIngo Molnar# 1002aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable 1003aec6487eSIngo Molnar# interactive configuration. ) 1004aec6487eSIngo Molnar# 1005a0d0bb4dSRandy Dunlap 1006aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN 1007a0d0bb4dSRandy Dunlap int 1008aec6487eSIngo Molnar default NR_CPUS_RANGE_END if MAXSMP 1009a0d0bb4dSRandy Dunlap default 1 if !SMP 1010a0d0bb4dSRandy Dunlap default 2 1011a0d0bb4dSRandy Dunlap 1012aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1013a0d0bb4dSRandy Dunlap int 1014a0d0bb4dSRandy Dunlap depends on X86_32 1015aec6487eSIngo Molnar default 64 if SMP && X86_BIGSMP 1016aec6487eSIngo Molnar default 8 if SMP && !X86_BIGSMP 1017a0d0bb4dSRandy Dunlap default 1 if !SMP 1018a0d0bb4dSRandy Dunlap 1019aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1020a0d0bb4dSRandy Dunlap int 1021a0d0bb4dSRandy Dunlap depends on X86_64 10221edae1aeSScott Wood default 8192 if SMP && CPUMASK_OFFSTACK 10231edae1aeSScott Wood default 512 if SMP && !CPUMASK_OFFSTACK 1024a0d0bb4dSRandy Dunlap default 1 if !SMP 1025aec6487eSIngo Molnar 1026aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1027aec6487eSIngo Molnar int 1028aec6487eSIngo Molnar depends on X86_32 1029aec6487eSIngo Molnar default 32 if X86_BIGSMP 1030aec6487eSIngo Molnar default 8 if SMP 1031aec6487eSIngo Molnar default 1 if !SMP 1032aec6487eSIngo Molnar 1033aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1034aec6487eSIngo Molnar int 1035aec6487eSIngo Molnar depends on X86_64 1036a0d0bb4dSRandy Dunlap default 8192 if MAXSMP 1037a0d0bb4dSRandy Dunlap default 64 if SMP 1038aec6487eSIngo Molnar default 1 if !SMP 1039a0d0bb4dSRandy Dunlap 1040506f1d07SSam Ravnborgconfig NR_CPUS 104136f5101aSMike Travis int "Maximum number of CPUs" if SMP && !MAXSMP 1042aec6487eSIngo Molnar range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END 1043aec6487eSIngo Molnar default NR_CPUS_DEFAULT 1044a7f7f624SMasahiro Yamada help 1045506f1d07SSam Ravnborg This allows you to specify the maximum number of CPUs which this 1046bb61ccc7SJosh Boyer kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum 1047cad14bb9SKirill A. Shutemov supported value is 8192, otherwise the maximum value is 512. The 1048506f1d07SSam Ravnborg minimum value which makes sense is 2. 1049506f1d07SSam Ravnborg 1050aec6487eSIngo Molnar This is purely to save memory: each supported CPU adds about 8KB 1051aec6487eSIngo Molnar to the kernel image. 1052506f1d07SSam Ravnborg 105366558b73STim Chenconfig SCHED_CLUSTER 105466558b73STim Chen bool "Cluster scheduler support" 105566558b73STim Chen depends on SMP 105666558b73STim Chen default y 105766558b73STim Chen help 105866558b73STim Chen Cluster scheduler support improves the CPU scheduler's decision 105966558b73STim Chen making when dealing with machines that have clusters of CPUs. 106066558b73STim Chen Cluster usually means a couple of CPUs which are placed closely 106166558b73STim Chen by sharing mid-level caches, last-level cache tags or internal 106266558b73STim Chen busses. 106366558b73STim Chen 1064506f1d07SSam Ravnborgconfig SCHED_SMT 1065dbe73364SThomas Gleixner def_bool y if SMP 1066506f1d07SSam Ravnborg 1067506f1d07SSam Ravnborgconfig SCHED_MC 10683c2362e6SHarvey Harrison def_bool y 10693c2362e6SHarvey Harrison prompt "Multi-core scheduler support" 1070c8e56d20SBorislav Petkov depends on SMP 1071a7f7f624SMasahiro Yamada help 1072506f1d07SSam Ravnborg Multi-core scheduler support improves the CPU scheduler's decision 1073506f1d07SSam Ravnborg making when dealing with multi-core CPU chips at a cost of slightly 1074506f1d07SSam Ravnborg increased overhead in some places. If unsure say N here. 1075506f1d07SSam Ravnborg 1076de966cf4STim Chenconfig SCHED_MC_PRIO 1077de966cf4STim Chen bool "CPU core priorities scheduler support" 10783598e577SMeng Li depends on SCHED_MC 10793598e577SMeng Li select X86_INTEL_PSTATE if CPU_SUP_INTEL 10803598e577SMeng Li select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI 10810a21fc12SIngo Molnar select CPU_FREQ 1082de966cf4STim Chen default y 1083a7f7f624SMasahiro Yamada help 1084de966cf4STim Chen Intel Turbo Boost Max Technology 3.0 enabled CPUs have a 1085de966cf4STim Chen core ordering determined at manufacturing time, which allows 1086de966cf4STim Chen certain cores to reach higher turbo frequencies (when running 1087de966cf4STim Chen single threaded workloads) than others. 1088de966cf4STim Chen 1089de966cf4STim Chen Enabling this kernel feature teaches the scheduler about 1090de966cf4STim Chen the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the 1091de966cf4STim Chen scheduler's CPU selection logic accordingly, so that higher 1092de966cf4STim Chen overall system performance can be achieved. 1093de966cf4STim Chen 1094de966cf4STim Chen This feature will have no effect on CPUs without this feature. 1095de966cf4STim Chen 1096de966cf4STim Chen If unsure say Y here. 10975e76b2abSTim Chen 109830b8b006SThomas Gleixnerconfig UP_LATE_INIT 109930b8b006SThomas Gleixner def_bool y 1100ba360f88SThomas Gleixner depends on !SMP && X86_LOCAL_APIC 110130b8b006SThomas Gleixner 1102506f1d07SSam Ravnborgconfig X86_UP_APIC 110350849eefSJan Beulich bool "Local APIC support on uniprocessors" if !PCI_MSI 110450849eefSJan Beulich default PCI_MSI 110538a1dfdaSBryan O'Donoghue depends on X86_32 && !SMP && !X86_32_NON_STANDARD 1106a7f7f624SMasahiro Yamada help 1107506f1d07SSam Ravnborg A local APIC (Advanced Programmable Interrupt Controller) is an 1108506f1d07SSam Ravnborg integrated interrupt controller in the CPU. If you have a single-CPU 1109506f1d07SSam Ravnborg system which has a processor with a local APIC, you can say Y here to 1110506f1d07SSam Ravnborg enable and use it. If you say Y here even though your machine doesn't 1111506f1d07SSam Ravnborg have a local APIC, then the kernel will still run with no slowdown at 1112506f1d07SSam Ravnborg all. The local APIC supports CPU-generated self-interrupts (timer, 1113506f1d07SSam Ravnborg performance counters), and the NMI watchdog which detects hard 1114506f1d07SSam Ravnborg lockups. 1115506f1d07SSam Ravnborg 1116506f1d07SSam Ravnborgconfig X86_UP_IOAPIC 1117506f1d07SSam Ravnborg bool "IO-APIC support on uniprocessors" 1118506f1d07SSam Ravnborg depends on X86_UP_APIC 1119a7f7f624SMasahiro Yamada help 1120506f1d07SSam Ravnborg An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an 1121506f1d07SSam Ravnborg SMP-capable replacement for PC-style interrupt controllers. Most 1122506f1d07SSam Ravnborg SMP systems and many recent uniprocessor systems have one. 1123506f1d07SSam Ravnborg 1124506f1d07SSam Ravnborg If you have a single-CPU system with an IO-APIC, you can say Y here 1125506f1d07SSam Ravnborg to use it. If you say Y here even though your machine doesn't have 1126506f1d07SSam Ravnborg an IO-APIC, then the kernel will still run with no slowdown at all. 1127506f1d07SSam Ravnborg 1128506f1d07SSam Ravnborgconfig X86_LOCAL_APIC 11293c2362e6SHarvey Harrison def_bool y 11300dbc6078SThomas Petazzoni depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI 1131b5dc8e6cSJiang Liu select IRQ_DOMAIN_HIERARCHY 1132506f1d07SSam Ravnborg 11332b5e22afSKirill A. Shutemovconfig ACPI_MADT_WAKEUP 11342b5e22afSKirill A. Shutemov def_bool y 11352b5e22afSKirill A. Shutemov depends on X86_64 11362b5e22afSKirill A. Shutemov depends on ACPI 11372b5e22afSKirill A. Shutemov depends on SMP 11382b5e22afSKirill A. Shutemov depends on X86_LOCAL_APIC 11392b5e22afSKirill A. Shutemov 1140506f1d07SSam Ravnborgconfig X86_IO_APIC 1141b1da1e71SJan Beulich def_bool y 1142b1da1e71SJan Beulich depends on X86_LOCAL_APIC || X86_UP_IOAPIC 1143506f1d07SSam Ravnborg 114441b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS 114541b9eb26SStefan Assmann bool "Reroute for broken boot IRQs" 114641b9eb26SStefan Assmann depends on X86_IO_APIC 1147a7f7f624SMasahiro Yamada help 114841b9eb26SStefan Assmann This option enables a workaround that fixes a source of 114941b9eb26SStefan Assmann spurious interrupts. This is recommended when threaded 115041b9eb26SStefan Assmann interrupt handling is used on systems where the generation of 115141b9eb26SStefan Assmann superfluous "boot interrupts" cannot be disabled. 115241b9eb26SStefan Assmann 115341b9eb26SStefan Assmann Some chipsets generate a legacy INTx "boot IRQ" when the IRQ 115441b9eb26SStefan Assmann entry in the chipset's IO-APIC is masked (as, e.g. the RT 115541b9eb26SStefan Assmann kernel does during interrupt handling). On chipsets where this 115641b9eb26SStefan Assmann boot IRQ generation cannot be disabled, this workaround keeps 115741b9eb26SStefan Assmann the original IRQ line masked so that only the equivalent "boot 115841b9eb26SStefan Assmann IRQ" is delivered to the CPUs. The workaround also tells the 115941b9eb26SStefan Assmann kernel to set up the IRQ handler on the boot IRQ line. In this 116041b9eb26SStefan Assmann way only one interrupt is delivered to the kernel. Otherwise 116141b9eb26SStefan Assmann the spurious second interrupt may cause the kernel to bring 116241b9eb26SStefan Assmann down (vital) interrupt lines. 116341b9eb26SStefan Assmann 116441b9eb26SStefan Assmann Only affects "broken" chipsets. Interrupt sharing may be 116541b9eb26SStefan Assmann increased on these systems. 116641b9eb26SStefan Assmann 1167506f1d07SSam Ravnborgconfig X86_MCE 1168bab9bc65SAndi Kleen bool "Machine Check / overheating reporting" 1169648ed940SChen, Gong select GENERIC_ALLOCATOR 1170e57dbaf7SBorislav Petkov default y 1171a7f7f624SMasahiro Yamada help 1172bab9bc65SAndi Kleen Machine Check support allows the processor to notify the 1173bab9bc65SAndi Kleen kernel if it detects a problem (e.g. overheating, data corruption). 1174506f1d07SSam Ravnborg The action the kernel takes depends on the severity of the problem, 1175bab9bc65SAndi Kleen ranging from warning messages to halting the machine. 11764efc0670SAndi Kleen 11775de97c9fSTony Luckconfig X86_MCELOG_LEGACY 11785de97c9fSTony Luck bool "Support for deprecated /dev/mcelog character device" 11795de97c9fSTony Luck depends on X86_MCE 1180a7f7f624SMasahiro Yamada help 11815de97c9fSTony Luck Enable support for /dev/mcelog which is needed by the old mcelog 11825de97c9fSTony Luck userspace logging daemon. Consider switching to the new generation 11835de97c9fSTony Luck rasdaemon solution. 11845de97c9fSTony Luck 1185506f1d07SSam Ravnborgconfig X86_MCE_INTEL 11863c2362e6SHarvey Harrison def_bool y 11873c2362e6SHarvey Harrison prompt "Intel MCE features" 1188c1ebf835SAndi Kleen depends on X86_MCE && X86_LOCAL_APIC 1189a7f7f624SMasahiro Yamada help 1190506f1d07SSam Ravnborg Additional support for intel specific MCE features such as 1191506f1d07SSam Ravnborg the thermal monitor. 1192506f1d07SSam Ravnborg 1193506f1d07SSam Ravnborgconfig X86_MCE_AMD 11943c2362e6SHarvey Harrison def_bool y 11953c2362e6SHarvey Harrison prompt "AMD MCE features" 1196d35fb312SYazen Ghannam depends on X86_MCE && X86_LOCAL_APIC 1197a7f7f624SMasahiro Yamada help 1198506f1d07SSam Ravnborg Additional support for AMD specific MCE features such as 1199506f1d07SSam Ravnborg the DRAM Error Threshold. 1200506f1d07SSam Ravnborg 12014efc0670SAndi Kleenconfig X86_ANCIENT_MCE 12026fc108a0SJan Beulich bool "Support for old Pentium 5 / WinChip machine checks" 1203c31d9633SAndi Kleen depends on X86_32 && X86_MCE 1204a7f7f624SMasahiro Yamada help 12054efc0670SAndi Kleen Include support for machine check handling on old Pentium 5 or WinChip 12065065a706SMasanari Iida systems. These typically need to be enabled explicitly on the command 12074efc0670SAndi Kleen line. 12084efc0670SAndi Kleen 1209b2762686SAndi Kleenconfig X86_MCE_THRESHOLD 1210b2762686SAndi Kleen depends on X86_MCE_AMD || X86_MCE_INTEL 12116fc108a0SJan Beulich def_bool y 1212b2762686SAndi Kleen 1213ea149b36SAndi Kleenconfig X86_MCE_INJECT 1214bc8e80d5SBorislav Petkov depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS 1215ea149b36SAndi Kleen tristate "Machine check injector support" 1216a7f7f624SMasahiro Yamada help 1217ea149b36SAndi Kleen Provide support for injecting machine checks for testing purposes. 1218ea149b36SAndi Kleen If you don't know what a machine check is and you don't do kernel 1219ea149b36SAndi Kleen QA it is safe to say n. 1220ea149b36SAndi Kleen 122107dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig" 1222e633c65aSKan Liang 12235aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86 12241e642812SIngo Molnar bool "Legacy VM86 support" 1225506f1d07SSam Ravnborg depends on X86_32 1226a7f7f624SMasahiro Yamada help 12275aef51c3SAndy Lutomirski This option allows user programs to put the CPU into V8086 12285aef51c3SAndy Lutomirski mode, which is an 80286-era approximation of 16-bit real mode. 12295aef51c3SAndy Lutomirski 12305aef51c3SAndy Lutomirski Some very old versions of X and/or vbetool require this option 12315aef51c3SAndy Lutomirski for user mode setting. Similarly, DOSEMU will use it if 12325aef51c3SAndy Lutomirski available to accelerate real mode DOS programs. However, any 12335aef51c3SAndy Lutomirski recent version of DOSEMU, X, or vbetool should be fully 12345aef51c3SAndy Lutomirski functional even without kernel VM86 support, as they will all 12351e642812SIngo Molnar fall back to software emulation. Nevertheless, if you are using 12361e642812SIngo Molnar a 16-bit DOS program where 16-bit performance matters, vm86 12371e642812SIngo Molnar mode might be faster than emulation and you might want to 12381e642812SIngo Molnar enable this option. 12395aef51c3SAndy Lutomirski 12401e642812SIngo Molnar Note that any app that works on a 64-bit kernel is unlikely to 12411e642812SIngo Molnar need this option, as 64-bit kernels don't, and can't, support 12421e642812SIngo Molnar V8086 mode. This option is also unrelated to 16-bit protected 12431e642812SIngo Molnar mode and is not needed to run most 16-bit programs under Wine. 12445aef51c3SAndy Lutomirski 12451e642812SIngo Molnar Enabling this option increases the complexity of the kernel 12461e642812SIngo Molnar and slows down exception handling a tiny bit. 12475aef51c3SAndy Lutomirski 12481e642812SIngo Molnar If unsure, say N here. 12495aef51c3SAndy Lutomirski 12505aef51c3SAndy Lutomirskiconfig VM86 12515aef51c3SAndy Lutomirski bool 12525aef51c3SAndy Lutomirski default X86_LEGACY_VM86 125334273f41SH. Peter Anvin 125434273f41SH. Peter Anvinconfig X86_16BIT 125534273f41SH. Peter Anvin bool "Enable support for 16-bit segments" if EXPERT 125634273f41SH. Peter Anvin default y 1257a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 1258a7f7f624SMasahiro Yamada help 125934273f41SH. Peter Anvin This option is required by programs like Wine to run 16-bit 126034273f41SH. Peter Anvin protected mode legacy code on x86 processors. Disabling 126134273f41SH. Peter Anvin this option saves about 300 bytes on i386, or around 6K text 126234273f41SH. Peter Anvin plus 16K runtime memory on x86-64, 126334273f41SH. Peter Anvin 126434273f41SH. Peter Anvinconfig X86_ESPFIX32 126534273f41SH. Peter Anvin def_bool y 126634273f41SH. Peter Anvin depends on X86_16BIT && X86_32 1267506f1d07SSam Ravnborg 1268197725deSH. Peter Anvinconfig X86_ESPFIX64 1269197725deSH. Peter Anvin def_bool y 127034273f41SH. Peter Anvin depends on X86_16BIT && X86_64 1271506f1d07SSam Ravnborg 12721ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION 12731ad83c85SAndy Lutomirski bool "Enable vsyscall emulation" if EXPERT 12741ad83c85SAndy Lutomirski default y 12751ad83c85SAndy Lutomirski depends on X86_64 1276a7f7f624SMasahiro Yamada help 12771ad83c85SAndy Lutomirski This enables emulation of the legacy vsyscall page. Disabling 12781ad83c85SAndy Lutomirski it is roughly equivalent to booting with vsyscall=none, except 12791ad83c85SAndy Lutomirski that it will also disable the helpful warning if a program 12801ad83c85SAndy Lutomirski tries to use a vsyscall. With this option set to N, offending 12811ad83c85SAndy Lutomirski programs will just segfault, citing addresses of the form 12821ad83c85SAndy Lutomirski 0xffffffffff600?00. 12831ad83c85SAndy Lutomirski 12841ad83c85SAndy Lutomirski This option is required by many programs built before 2013, and 12851ad83c85SAndy Lutomirski care should be used even with newer programs if set to N. 12861ad83c85SAndy Lutomirski 12871ad83c85SAndy Lutomirski Disabling this option saves about 7K of kernel size and 12881ad83c85SAndy Lutomirski possibly 4K of additional runtime pagetable memory. 12891ad83c85SAndy Lutomirski 1290111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM 1291111e7b15SThomas Gleixner bool "IOPERM and IOPL Emulation" 1292a24ca997SThomas Gleixner default y 1293a7f7f624SMasahiro Yamada help 1294111e7b15SThomas Gleixner This enables the ioperm() and iopl() syscalls which are necessary 1295111e7b15SThomas Gleixner for legacy applications. 1296111e7b15SThomas Gleixner 1297c8137aceSThomas Gleixner Legacy IOPL support is an overbroad mechanism which allows user 1298c8137aceSThomas Gleixner space aside of accessing all 65536 I/O ports also to disable 1299c8137aceSThomas Gleixner interrupts. To gain this access the caller needs CAP_SYS_RAWIO 1300c8137aceSThomas Gleixner capabilities and permission from potentially active security 1301c8137aceSThomas Gleixner modules. 1302c8137aceSThomas Gleixner 1303c8137aceSThomas Gleixner The emulation restricts the functionality of the syscall to 1304c8137aceSThomas Gleixner only allowing the full range I/O port access, but prevents the 1305a24ca997SThomas Gleixner ability to disable interrupts from user space which would be 1306a24ca997SThomas Gleixner granted if the hardware IOPL mechanism would be used. 1307c8137aceSThomas Gleixner 1308506f1d07SSam Ravnborgconfig TOSHIBA 1309506f1d07SSam Ravnborg tristate "Toshiba Laptop support" 1310506f1d07SSam Ravnborg depends on X86_32 1311a7f7f624SMasahiro Yamada help 1312506f1d07SSam Ravnborg This adds a driver to safely access the System Management Mode of 1313506f1d07SSam Ravnborg the CPU on Toshiba portables with a genuine Toshiba BIOS. It does 1314506f1d07SSam Ravnborg not work on models with a Phoenix BIOS. The System Management Mode 1315506f1d07SSam Ravnborg is used to set the BIOS and power saving options on Toshiba portables. 1316506f1d07SSam Ravnborg 1317506f1d07SSam Ravnborg For information on utilities to make use of this driver see the 1318506f1d07SSam Ravnborg Toshiba Linux utilities web site at: 1319506f1d07SSam Ravnborg <http://www.buzzard.org.uk/toshiba/>. 1320506f1d07SSam Ravnborg 1321506f1d07SSam Ravnborg Say Y if you intend to run this kernel on a Toshiba portable. 1322506f1d07SSam Ravnborg Say N otherwise. 1323506f1d07SSam Ravnborg 1324506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS 13259ba16087SJan Beulich bool "Enable X86 board specific fixups for reboot" 13269ba16087SJan Beulich depends on X86_32 1327a7f7f624SMasahiro Yamada help 1328506f1d07SSam Ravnborg This enables chipset and/or board specific fixups to be done 1329506f1d07SSam Ravnborg in order to get reboot to work correctly. This is only needed on 1330506f1d07SSam Ravnborg some combinations of hardware and BIOS. The symptom, for which 1331506f1d07SSam Ravnborg this config is intended, is when reboot ends with a stalled/hung 1332506f1d07SSam Ravnborg system. 1333506f1d07SSam Ravnborg 1334506f1d07SSam Ravnborg Currently, the only fixup is for the Geode machines using 13355e3a77e9SFlorian Fainelli CS5530A and CS5536 chipsets and the RDC R-321x SoC. 1336506f1d07SSam Ravnborg 1337506f1d07SSam Ravnborg Say Y if you want to enable the fixup. Currently, it's safe to 1338506f1d07SSam Ravnborg enable this option even if you don't need it. 1339506f1d07SSam Ravnborg Say N otherwise. 1340506f1d07SSam Ravnborg 1341506f1d07SSam Ravnborgconfig MICROCODE 1342e6bcfdd7SThomas Gleixner def_bool y 134380030e3dSBorislav Petkov depends on CPU_SUP_AMD || CPU_SUP_INTEL 134480cc9f10SPeter Oruba 1345fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32 1346fdbd4381SThomas Gleixner def_bool y 1347fdbd4381SThomas Gleixner depends on MICROCODE && X86_32 && BLK_DEV_INITRD 1348fdbd4381SThomas Gleixner 1349a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING 1350a77a94f8SBorislav Petkov bool "Late microcode loading (DANGEROUS)" 1351c02f48e0SBorislav Petkov default n 1352634ac23aSThomas Gleixner depends on MICROCODE && SMP 1353a7f7f624SMasahiro Yamada help 1354a77a94f8SBorislav Petkov Loading microcode late, when the system is up and executing instructions 1355a77a94f8SBorislav Petkov is a tricky business and should be avoided if possible. Just the sequence 1356a77a94f8SBorislav Petkov of synchronizing all cores and SMT threads is one fragile dance which does 1357a77a94f8SBorislav Petkov not guarantee that cores might not softlock after the loading. Therefore, 13589407bda8SThomas Gleixner use this at your own risk. Late loading taints the kernel unless the 13599407bda8SThomas Gleixner microcode header indicates that it is safe for late loading via the 13609407bda8SThomas Gleixner minimal revision check. This minimal revision check can be enforced on 13619407bda8SThomas Gleixner the kernel command line with "microcode.minrev=Y". 13629407bda8SThomas Gleixner 13639407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV 13649407bda8SThomas Gleixner bool "Enforce late microcode loading minimal revision check" 13659407bda8SThomas Gleixner default n 13669407bda8SThomas Gleixner depends on MICROCODE_LATE_LOADING 13679407bda8SThomas Gleixner help 13689407bda8SThomas Gleixner To prevent that users load microcode late which modifies already 13699407bda8SThomas Gleixner in use features, newer microcode patches have a minimum revision field 13709407bda8SThomas Gleixner in the microcode header, which tells the kernel which minimum 13719407bda8SThomas Gleixner revision must be active in the CPU to safely load that new microcode 13729407bda8SThomas Gleixner late into the running system. If disabled the check will not 13739407bda8SThomas Gleixner be enforced but the kernel will be tainted when the minimal 13749407bda8SThomas Gleixner revision check fails. 13759407bda8SThomas Gleixner 13769407bda8SThomas Gleixner This minimal revision check can also be controlled via the 13779407bda8SThomas Gleixner "microcode.minrev" parameter on the kernel command line. 13789407bda8SThomas Gleixner 13799407bda8SThomas Gleixner If unsure say Y. 1380506f1d07SSam Ravnborg 1381506f1d07SSam Ravnborgconfig X86_MSR 1382506f1d07SSam Ravnborg tristate "/dev/cpu/*/msr - Model-specific register support" 1383a7f7f624SMasahiro Yamada help 1384506f1d07SSam Ravnborg This device gives privileged processes access to the x86 1385506f1d07SSam Ravnborg Model-Specific Registers (MSRs). It is a character device with 1386506f1d07SSam Ravnborg major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. 1387506f1d07SSam Ravnborg MSR accesses are directed to a specific CPU on multi-processor 1388506f1d07SSam Ravnborg systems. 1389506f1d07SSam Ravnborg 1390506f1d07SSam Ravnborgconfig X86_CPUID 1391506f1d07SSam Ravnborg tristate "/dev/cpu/*/cpuid - CPU information support" 1392a7f7f624SMasahiro Yamada help 1393506f1d07SSam Ravnborg This device gives processes access to the x86 CPUID instruction to 1394506f1d07SSam Ravnborg be executed on a specific processor. It is a character device 1395506f1d07SSam Ravnborg with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to 1396506f1d07SSam Ravnborg /dev/cpu/31/cpuid. 1397506f1d07SSam Ravnborg 1398506f1d07SSam Ravnborgchoice 1399506f1d07SSam Ravnborg prompt "High Memory Support" 14006fc108a0SJan Beulich default HIGHMEM4G 1401506f1d07SSam Ravnborg depends on X86_32 1402506f1d07SSam Ravnborg 1403506f1d07SSam Ravnborgconfig NOHIGHMEM 1404506f1d07SSam Ravnborg bool "off" 1405a7f7f624SMasahiro Yamada help 1406506f1d07SSam Ravnborg Linux can use up to 64 Gigabytes of physical memory on x86 systems. 1407506f1d07SSam Ravnborg However, the address space of 32-bit x86 processors is only 4 1408506f1d07SSam Ravnborg Gigabytes large. That means that, if you have a large amount of 1409506f1d07SSam Ravnborg physical memory, not all of it can be "permanently mapped" by the 1410506f1d07SSam Ravnborg kernel. The physical memory that's not permanently mapped is called 1411506f1d07SSam Ravnborg "high memory". 1412506f1d07SSam Ravnborg 1413506f1d07SSam Ravnborg If you are compiling a kernel which will never run on a machine with 1414506f1d07SSam Ravnborg more than 1 Gigabyte total physical RAM, answer "off" here (default 1415506f1d07SSam Ravnborg choice and suitable for most users). This will result in a "3GB/1GB" 1416506f1d07SSam Ravnborg split: 3GB are mapped so that each process sees a 3GB virtual memory 1417506f1d07SSam Ravnborg space and the remaining part of the 4GB virtual memory space is used 1418506f1d07SSam Ravnborg by the kernel to permanently map as much physical memory as 1419506f1d07SSam Ravnborg possible. 1420506f1d07SSam Ravnborg 1421506f1d07SSam Ravnborg If the machine has between 1 and 4 Gigabytes physical RAM, then 1422506f1d07SSam Ravnborg answer "4GB" here. 1423506f1d07SSam Ravnborg 1424506f1d07SSam Ravnborg If more than 4 Gigabytes is used then answer "64GB" here. This 1425506f1d07SSam Ravnborg selection turns Intel PAE (Physical Address Extension) mode on. 1426506f1d07SSam Ravnborg PAE implements 3-level paging on IA32 processors. PAE is fully 1427506f1d07SSam Ravnborg supported by Linux, PAE mode is implemented on all recent Intel 1428506f1d07SSam Ravnborg processors (Pentium Pro and better). NOTE: If you say "64GB" here, 1429506f1d07SSam Ravnborg then the kernel will not boot on CPUs that don't support PAE! 1430506f1d07SSam Ravnborg 1431506f1d07SSam Ravnborg The actual amount of total physical memory will either be 1432506f1d07SSam Ravnborg auto detected or can be forced by using a kernel command line option 1433506f1d07SSam Ravnborg such as "mem=256M". (Try "man bootparam" or see the documentation of 1434506f1d07SSam Ravnborg your boot loader (lilo or loadlin) about how to pass options to the 1435506f1d07SSam Ravnborg kernel at boot time.) 1436506f1d07SSam Ravnborg 1437506f1d07SSam Ravnborg If unsure, say "off". 1438506f1d07SSam Ravnborg 1439506f1d07SSam Ravnborgconfig HIGHMEM4G 1440506f1d07SSam Ravnborg bool "4GB" 1441a7f7f624SMasahiro Yamada help 1442506f1d07SSam Ravnborg Select this if you have a 32-bit processor and between 1 and 4 1443506f1d07SSam Ravnborg gigabytes of physical RAM. 1444506f1d07SSam Ravnborg 1445506f1d07SSam Ravnborgconfig HIGHMEM64G 1446506f1d07SSam Ravnborg bool "64GB" 144788a2b4edSArnd Bergmann depends on X86_HAVE_PAE 1448506f1d07SSam Ravnborg select X86_PAE 1449a7f7f624SMasahiro Yamada help 1450506f1d07SSam Ravnborg Select this if you have a 32-bit processor and more than 4 1451506f1d07SSam Ravnborg gigabytes of physical RAM. 1452506f1d07SSam Ravnborg 1453506f1d07SSam Ravnborgendchoice 1454506f1d07SSam Ravnborg 1455506f1d07SSam Ravnborgchoice 14566a108a14SDavid Rientjes prompt "Memory split" if EXPERT 1457506f1d07SSam Ravnborg default VMSPLIT_3G 1458506f1d07SSam Ravnborg depends on X86_32 1459a7f7f624SMasahiro Yamada help 1460506f1d07SSam Ravnborg Select the desired split between kernel and user memory. 1461506f1d07SSam Ravnborg 1462506f1d07SSam Ravnborg If the address range available to the kernel is less than the 1463506f1d07SSam Ravnborg physical memory installed, the remaining memory will be available 1464506f1d07SSam Ravnborg as "high memory". Accessing high memory is a little more costly 1465506f1d07SSam Ravnborg than low memory, as it needs to be mapped into the kernel first. 1466506f1d07SSam Ravnborg Note that increasing the kernel address space limits the range 1467506f1d07SSam Ravnborg available to user programs, making the address space there 1468506f1d07SSam Ravnborg tighter. Selecting anything other than the default 3G/1G split 1469506f1d07SSam Ravnborg will also likely make your kernel incompatible with binary-only 1470506f1d07SSam Ravnborg kernel modules. 1471506f1d07SSam Ravnborg 1472506f1d07SSam Ravnborg If you are not absolutely sure what you are doing, leave this 1473506f1d07SSam Ravnborg option alone! 1474506f1d07SSam Ravnborg 1475506f1d07SSam Ravnborg config VMSPLIT_3G 1476506f1d07SSam Ravnborg bool "3G/1G user/kernel split" 1477506f1d07SSam Ravnborg config VMSPLIT_3G_OPT 1478506f1d07SSam Ravnborg depends on !X86_PAE 1479506f1d07SSam Ravnborg bool "3G/1G user/kernel split (for full 1G low memory)" 1480506f1d07SSam Ravnborg config VMSPLIT_2G 1481506f1d07SSam Ravnborg bool "2G/2G user/kernel split" 1482506f1d07SSam Ravnborg config VMSPLIT_2G_OPT 1483506f1d07SSam Ravnborg depends on !X86_PAE 1484506f1d07SSam Ravnborg bool "2G/2G user/kernel split (for full 2G low memory)" 1485506f1d07SSam Ravnborg config VMSPLIT_1G 1486506f1d07SSam Ravnborg bool "1G/3G user/kernel split" 1487506f1d07SSam Ravnborgendchoice 1488506f1d07SSam Ravnborg 1489506f1d07SSam Ravnborgconfig PAGE_OFFSET 1490506f1d07SSam Ravnborg hex 1491506f1d07SSam Ravnborg default 0xB0000000 if VMSPLIT_3G_OPT 1492506f1d07SSam Ravnborg default 0x80000000 if VMSPLIT_2G 1493506f1d07SSam Ravnborg default 0x78000000 if VMSPLIT_2G_OPT 1494506f1d07SSam Ravnborg default 0x40000000 if VMSPLIT_1G 1495506f1d07SSam Ravnborg default 0xC0000000 1496506f1d07SSam Ravnborg depends on X86_32 1497506f1d07SSam Ravnborg 1498506f1d07SSam Ravnborgconfig HIGHMEM 14993c2362e6SHarvey Harrison def_bool y 1500506f1d07SSam Ravnborg depends on X86_32 && (HIGHMEM64G || HIGHMEM4G) 1501506f1d07SSam Ravnborg 1502506f1d07SSam Ravnborgconfig X86_PAE 15039ba16087SJan Beulich bool "PAE (Physical Address Extension) Support" 150488a2b4edSArnd Bergmann depends on X86_32 && X86_HAVE_PAE 1505d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 15069d99c712SChristian Melki select SWIOTLB 1507a7f7f624SMasahiro Yamada help 1508506f1d07SSam Ravnborg PAE is required for NX support, and furthermore enables 1509506f1d07SSam Ravnborg larger swapspace support for non-overcommit purposes. It 1510506f1d07SSam Ravnborg has the cost of more pagetable lookup overhead, and also 1511506f1d07SSam Ravnborg consumes more pagetable space per process. 1512506f1d07SSam Ravnborg 151377ef56e4SKirill A. Shutemovconfig X86_5LEVEL 151477ef56e4SKirill A. Shutemov bool "Enable 5-level page tables support" 151518ec1eafSKirill A. Shutemov default y 1516eedb92abSKirill A. Shutemov select DYNAMIC_MEMORY_LAYOUT 1517162434e7SKirill A. Shutemov select SPARSEMEM_VMEMMAP 151877ef56e4SKirill A. Shutemov depends on X86_64 1519a7f7f624SMasahiro Yamada help 152077ef56e4SKirill A. Shutemov 5-level paging enables access to larger address space: 152177ef56e4SKirill A. Shutemov up to 128 PiB of virtual address space and 4 PiB of 152277ef56e4SKirill A. Shutemov physical address space. 152377ef56e4SKirill A. Shutemov 152477ef56e4SKirill A. Shutemov It will be supported by future Intel CPUs. 152577ef56e4SKirill A. Shutemov 15266657fca0SKirill A. Shutemov A kernel with the option enabled can be booted on machines that 15276657fca0SKirill A. Shutemov support 4- or 5-level paging. 152877ef56e4SKirill A. Shutemov 1529ff61f079SJonathan Corbet See Documentation/arch/x86/x86_64/5level-paging.rst for more 153077ef56e4SKirill A. Shutemov information. 153177ef56e4SKirill A. Shutemov 153277ef56e4SKirill A. Shutemov Say N if unsure. 153377ef56e4SKirill A. Shutemov 153410971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES 1535e5008abeSLuis R. Rodriguez def_bool y 15362e1da13fSVlastimil Babka depends on X86_64 1537a7f7f624SMasahiro Yamada help 153810971ab2SIngo Molnar Certain kernel features effectively disable kernel 153910971ab2SIngo Molnar linear 1 GB mappings (even if the CPU otherwise 154010971ab2SIngo Molnar supports them), so don't confuse the user by printing 154110971ab2SIngo Molnar that we have them enabled. 15429e899816SNick Piggin 15435c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS 15445c280cf6SThomas Gleixner bool "Enable statistic for Change Page Attribute" 15455c280cf6SThomas Gleixner depends on DEBUG_FS 1546a7f7f624SMasahiro Yamada help 1547b75baaf3SIngo Molnar Expose statistics about the Change Page Attribute mechanism, which 1548a943245aSColin Ian King helps to determine the effectiveness of preserving large and huge 15495c280cf6SThomas Gleixner page mappings when mapping protections are changed. 15505c280cf6SThomas Gleixner 155120f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT 155220f07a04SKirill A. Shutemov select ARCH_HAS_FORCE_DMA_UNENCRYPTED 155320f07a04SKirill A. Shutemov select DYNAMIC_PHYSICAL_MASK 155420f07a04SKirill A. Shutemov def_bool n 155520f07a04SKirill A. Shutemov 15567744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT 15577744ccdbSTom Lendacky bool "AMD Secure Memory Encryption (SME) support" 15587744ccdbSTom Lendacky depends on X86_64 && CPU_SUP_AMD 15596c321179STom Lendacky depends on EFI_STUB 156082fef0adSDavid Rientjes select DMA_COHERENT_POOL 1561ce9084baSArd Biesheuvel select ARCH_USE_MEMREMAP_PROT 1562597cfe48SJoerg Roedel select INSTRUCTION_DECODER 1563aa5a4611STom Lendacky select ARCH_HAS_CC_PLATFORM 156420f07a04SKirill A. Shutemov select X86_MEM_ENCRYPT 15656c321179STom Lendacky select UNACCEPTED_MEMORY 1566c5529418SNikunj A Dadhania select CRYPTO_LIB_AESGCM 1567a7f7f624SMasahiro Yamada help 15687744ccdbSTom Lendacky Say yes to enable support for the encryption of system memory. 15697744ccdbSTom Lendacky This requires an AMD processor that supports Secure Memory 15707744ccdbSTom Lendacky Encryption (SME). 15717744ccdbSTom Lendacky 1572506f1d07SSam Ravnborg# Common NUMA Features 1573506f1d07SSam Ravnborgconfig NUMA 1574e133f6eaSRandy Dunlap bool "NUMA Memory Allocation and Scheduler Support" 1575506f1d07SSam Ravnborg depends on SMP 1576b5660ba7SH. Peter Anvin depends on X86_64 || (X86_32 && HIGHMEM64G && X86_BIGSMP) 1577b5660ba7SH. Peter Anvin default y if X86_BIGSMP 15787ecd19cfSKefeng Wang select USE_PERCPU_NUMA_NODE_ID 15790c436a58SSaurabh Sengar select OF_NUMA if OF 1580a7f7f624SMasahiro Yamada help 1581e133f6eaSRandy Dunlap Enable NUMA (Non-Uniform Memory Access) support. 1582fd51b2d7SKOSAKI Motohiro 1583506f1d07SSam Ravnborg The kernel will try to allocate memory used by a CPU on the 1584506f1d07SSam Ravnborg local memory controller of the CPU and add some more 1585506f1d07SSam Ravnborg NUMA awareness to the kernel. 1586506f1d07SSam Ravnborg 1587c280ea5eSIngo Molnar For 64-bit this is recommended if the system is Intel Core i7 1588fd51b2d7SKOSAKI Motohiro (or later), AMD Opteron, or EM64T NUMA. 1589fd51b2d7SKOSAKI Motohiro 1590b5660ba7SH. Peter Anvin For 32-bit this is only needed if you boot a 32-bit 15917cf6c945SDavid Rientjes kernel on a 64-bit NUMA platform. 1592fd51b2d7SKOSAKI Motohiro 1593fd51b2d7SKOSAKI Motohiro Otherwise, you should say N. 1594506f1d07SSam Ravnborg 1595eec1d4faSHans Rosenfeldconfig AMD_NUMA 15963c2362e6SHarvey Harrison def_bool y 15973c2362e6SHarvey Harrison prompt "Old style AMD Opteron NUMA detection" 15985da0ef9aSTejun Heo depends on X86_64 && NUMA && PCI 1599a7f7f624SMasahiro Yamada help 1600eec1d4faSHans Rosenfeld Enable AMD NUMA node topology detection. You should say Y here if 1601eec1d4faSHans Rosenfeld you have a multi processor AMD system. This uses an old method to 1602eec1d4faSHans Rosenfeld read the NUMA configuration directly from the builtin Northbridge 1603eec1d4faSHans Rosenfeld of Opteron. It is recommended to use X86_64_ACPI_NUMA instead, 1604eec1d4faSHans Rosenfeld which also takes priority if both are compiled in. 1605506f1d07SSam Ravnborg 1606506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA 16073c2362e6SHarvey Harrison def_bool y 16083c2362e6SHarvey Harrison prompt "ACPI NUMA detection" 1609506f1d07SSam Ravnborg depends on X86_64 && NUMA && ACPI && PCI 1610506f1d07SSam Ravnborg select ACPI_NUMA 1611a7f7f624SMasahiro Yamada help 1612506f1d07SSam Ravnborg Enable ACPI SRAT based node topology detection. 1613506f1d07SSam Ravnborg 1614506f1d07SSam Ravnborgconfig NODES_SHIFT 1615d25e26b6SLinus Torvalds int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP 161651591e31SDavid Rientjes range 1 10 161751591e31SDavid Rientjes default "10" if MAXSMP 1618506f1d07SSam Ravnborg default "6" if X86_64 1619506f1d07SSam Ravnborg default "3" 1620a9ee6cf5SMike Rapoport depends on NUMA 1621a7f7f624SMasahiro Yamada help 16221184dc2fSMike Travis Specify the maximum number of NUMA Nodes available on the target 1623692105b8SMatt LaPlante system. Increases memory reserved to accommodate various tables. 1624506f1d07SSam Ravnborg 1625506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE 1626506f1d07SSam Ravnborg def_bool y 16273b16651fSTejun Heo depends on X86_32 && !NUMA 1628506f1d07SSam Ravnborg 1629506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE 1630506f1d07SSam Ravnborg def_bool y 16316ea30386SKees Cook depends on X86_64 || NUMA || X86_32 || X86_32_NON_STANDARD 1632506f1d07SSam Ravnborg select SPARSEMEM_STATIC if X86_32 1633506f1d07SSam Ravnborg select SPARSEMEM_VMEMMAP_ENABLE if X86_64 1634506f1d07SSam Ravnborg 16353b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT 16366ad57f7fSMike Rapoport def_bool X86_64 || (NUMA && X86_32) 16373b16651fSTejun Heo 1638506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL 1639506f1d07SSam Ravnborg def_bool y 16404eda2bc3SDavid Hildenbrand depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE 1641506f1d07SSam Ravnborg 1642506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE 1643a0842b70SToshi Kani bool "Enable sysfs memory/probe interface" 16445c11f00bSDavid Hildenbrand depends on MEMORY_HOTPLUG 1645a0842b70SToshi Kani help 1646a0842b70SToshi Kani This option enables a sysfs memory/probe interface for testing. 1647cb1aaebeSMauro Carvalho Chehab See Documentation/admin-guide/mm/memory-hotplug.rst for more information. 1648a0842b70SToshi Kani If you are unsure how to answer this question, answer N. 1649506f1d07SSam Ravnborg 16503b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT 16513b16651fSTejun Heo def_bool y 16523b16651fSTejun Heo depends on X86_64 && PROC_KCORE 16533b16651fSTejun Heo 1654a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE 1655a29815a3SAvi Kivity hex 1656a29815a3SAvi Kivity default 0 if X86_32 1657a29815a3SAvi Kivity default 0xdead000000000000 if X86_64 1658a29815a3SAvi Kivity 16597a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE 16607a67832cSDan Williams bool 16617a67832cSDan Williams 1662ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY 16637a67832cSDan Williams tristate "Support non-standard NVDIMMs and ADR protected memory" 16649f53f9faSDan Williams depends on PHYS_ADDR_T_64BIT 16659f53f9faSDan Williams depends on BLK_DEV 16667a67832cSDan Williams select X86_PMEM_LEGACY_DEVICE 16677b27a862SDan Williams select NUMA_KEEP_MEMINFO if NUMA 16689f53f9faSDan Williams select LIBNVDIMM 1669ec776ef6SChristoph Hellwig help 1670ec776ef6SChristoph Hellwig Treat memory marked using the non-standard e820 type of 12 as used 1671ec776ef6SChristoph Hellwig by the Intel Sandy Bridge-EP reference BIOS as protected memory. 1672ec776ef6SChristoph Hellwig The kernel will offer these regions to the 'pmem' driver so 1673ec776ef6SChristoph Hellwig they can be used for persistent storage. 1674ec776ef6SChristoph Hellwig 1675ec776ef6SChristoph Hellwig Say Y if unsure. 1676ec776ef6SChristoph Hellwig 1677506f1d07SSam Ravnborgconfig HIGHPTE 1678506f1d07SSam Ravnborg bool "Allocate 3rd-level pagetables from highmem" 16796fc108a0SJan Beulich depends on HIGHMEM 1680a7f7f624SMasahiro Yamada help 1681506f1d07SSam Ravnborg The VM uses one page table entry for each page of physical memory. 1682506f1d07SSam Ravnborg For systems with a lot of RAM, this can be wasteful of precious 1683506f1d07SSam Ravnborg low memory. Setting this option will put user-space page table 1684506f1d07SSam Ravnborg entries in high memory. 1685506f1d07SSam Ravnborg 16869f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION 16879f077871SJeremy Fitzhardinge bool "Check for low memory corruption" 1688a7f7f624SMasahiro Yamada help 16899f077871SJeremy Fitzhardinge Periodically check for memory corruption in low memory, which 16909f077871SJeremy Fitzhardinge is suspected to be caused by BIOS. Even when enabled in the 16919f077871SJeremy Fitzhardinge configuration, it is disabled at runtime. Enable it by 16929f077871SJeremy Fitzhardinge setting "memory_corruption_check=1" on the kernel command 16939f077871SJeremy Fitzhardinge line. By default it scans the low 64k of memory every 60 16949f077871SJeremy Fitzhardinge seconds; see the memory_corruption_check_size and 16959f077871SJeremy Fitzhardinge memory_corruption_check_period parameters in 16968c27ceffSMauro Carvalho Chehab Documentation/admin-guide/kernel-parameters.rst to adjust this. 16979f077871SJeremy Fitzhardinge 16989f077871SJeremy Fitzhardinge When enabled with the default parameters, this option has 16999f077871SJeremy Fitzhardinge almost no overhead, as it reserves a relatively small amount 17009f077871SJeremy Fitzhardinge of memory and scans it infrequently. It both detects corruption 17019f077871SJeremy Fitzhardinge and prevents it from affecting the running system. 17029f077871SJeremy Fitzhardinge 17039f077871SJeremy Fitzhardinge It is, however, intended as a diagnostic tool; if repeatable 17049f077871SJeremy Fitzhardinge BIOS-originated corruption always affects the same memory, 17059f077871SJeremy Fitzhardinge you can use memmap= to prevent the kernel from using that 17069f077871SJeremy Fitzhardinge memory. 17079f077871SJeremy Fitzhardinge 1708c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK 1709c885df50SJeremy Fitzhardinge bool "Set the default setting of memory_corruption_check" 1710c885df50SJeremy Fitzhardinge depends on X86_CHECK_BIOS_CORRUPTION 1711c885df50SJeremy Fitzhardinge default y 1712a7f7f624SMasahiro Yamada help 1713c885df50SJeremy Fitzhardinge Set whether the default state of memory_corruption_check is 1714c885df50SJeremy Fitzhardinge on or off. 1715c885df50SJeremy Fitzhardinge 1716506f1d07SSam Ravnborgconfig MATH_EMULATION 1717506f1d07SSam Ravnborg bool 1718a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 171987d6021bSArnd Bergmann prompt "Math emulation" if X86_32 && (M486SX || MELAN) 1720a7f7f624SMasahiro Yamada help 1721506f1d07SSam Ravnborg Linux can emulate a math coprocessor (used for floating point 1722506f1d07SSam Ravnborg operations) if you don't have one. 486DX and Pentium processors have 1723506f1d07SSam Ravnborg a math coprocessor built in, 486SX and 386 do not, unless you added 1724506f1d07SSam Ravnborg a 487DX or 387, respectively. (The messages during boot time can 1725506f1d07SSam Ravnborg give you some hints here ["man dmesg"].) Everyone needs either a 1726506f1d07SSam Ravnborg coprocessor or this emulation. 1727506f1d07SSam Ravnborg 1728506f1d07SSam Ravnborg If you don't have a math coprocessor, you need to say Y here; if you 1729506f1d07SSam Ravnborg say Y here even though you have a coprocessor, the coprocessor will 1730506f1d07SSam Ravnborg be used nevertheless. (This behavior can be changed with the kernel 1731506f1d07SSam Ravnborg command line option "no387", which comes handy if your coprocessor 1732506f1d07SSam Ravnborg is broken. Try "man bootparam" or see the documentation of your boot 1733506f1d07SSam Ravnborg loader (lilo or loadlin) about how to pass options to the kernel at 1734506f1d07SSam Ravnborg boot time.) This means that it is a good idea to say Y here if you 1735506f1d07SSam Ravnborg intend to use this kernel on different machines. 1736506f1d07SSam Ravnborg 1737506f1d07SSam Ravnborg More information about the internals of the Linux math coprocessor 1738506f1d07SSam Ravnborg emulation can be found in <file:arch/x86/math-emu/README>. 1739506f1d07SSam Ravnborg 1740506f1d07SSam Ravnborg If you are not sure, say Y; apart from resulting in a 66 KB bigger 1741506f1d07SSam Ravnborg kernel, it won't hurt. 1742506f1d07SSam Ravnborg 1743506f1d07SSam Ravnborgconfig MTRR 17446fc108a0SJan Beulich def_bool y 17456a108a14SDavid Rientjes prompt "MTRR (Memory Type Range Register) support" if EXPERT 1746a7f7f624SMasahiro Yamada help 1747506f1d07SSam Ravnborg On Intel P6 family processors (Pentium Pro, Pentium II and later) 1748506f1d07SSam Ravnborg the Memory Type Range Registers (MTRRs) may be used to control 1749506f1d07SSam Ravnborg processor access to memory ranges. This is most useful if you have 1750506f1d07SSam Ravnborg a video (VGA) card on a PCI or AGP bus. Enabling write-combining 1751506f1d07SSam Ravnborg allows bus write transfers to be combined into a larger transfer 1752506f1d07SSam Ravnborg before bursting over the PCI/AGP bus. This can increase performance 1753506f1d07SSam Ravnborg of image write operations 2.5 times or more. Saying Y here creates a 1754506f1d07SSam Ravnborg /proc/mtrr file which may be used to manipulate your processor's 1755506f1d07SSam Ravnborg MTRRs. Typically the X server should use this. 1756506f1d07SSam Ravnborg 1757506f1d07SSam Ravnborg This code has a reasonably generic interface so that similar 1758506f1d07SSam Ravnborg control registers on other processors can be easily supported 1759506f1d07SSam Ravnborg as well: 1760506f1d07SSam Ravnborg 1761506f1d07SSam Ravnborg The Cyrix 6x86, 6x86MX and M II processors have Address Range 1762506f1d07SSam Ravnborg Registers (ARRs) which provide a similar functionality to MTRRs. For 1763506f1d07SSam Ravnborg these, the ARRs are used to emulate the MTRRs. 1764506f1d07SSam Ravnborg The AMD K6-2 (stepping 8 and above) and K6-3 processors have two 1765506f1d07SSam Ravnborg MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing 1766506f1d07SSam Ravnborg write-combining. All of these processors are supported by this code 1767506f1d07SSam Ravnborg and it makes sense to say Y here if you have one of them. 1768506f1d07SSam Ravnborg 1769506f1d07SSam Ravnborg Saying Y here also fixes a problem with buggy SMP BIOSes which only 1770506f1d07SSam Ravnborg set the MTRRs for the boot CPU and not for the secondary CPUs. This 1771506f1d07SSam Ravnborg can lead to all sorts of problems, so it's good to say Y here. 1772506f1d07SSam Ravnborg 1773506f1d07SSam Ravnborg You can safely say Y even if your machine doesn't have MTRRs, you'll 1774506f1d07SSam Ravnborg just add about 9 KB to your kernel. 1775506f1d07SSam Ravnborg 1776ff61f079SJonathan Corbet See <file:Documentation/arch/x86/mtrr.rst> for more information. 1777506f1d07SSam Ravnborg 177895ffa243SYinghai Luconfig MTRR_SANITIZER 17792ffb3501SYinghai Lu def_bool y 178095ffa243SYinghai Lu prompt "MTRR cleanup support" 178195ffa243SYinghai Lu depends on MTRR 1782a7f7f624SMasahiro Yamada help 1783aba3728cSThomas Gleixner Convert MTRR layout from continuous to discrete, so X drivers can 1784aba3728cSThomas Gleixner add writeback entries. 178595ffa243SYinghai Lu 1786aba3728cSThomas Gleixner Can be disabled with disable_mtrr_cleanup on the kernel command line. 1787692105b8SMatt LaPlante The largest mtrr entry size for a continuous block can be set with 1788aba3728cSThomas Gleixner mtrr_chunk_size. 178995ffa243SYinghai Lu 17902ffb3501SYinghai Lu If unsure, say Y. 179195ffa243SYinghai Lu 179295ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT 1793f5098d62SYinghai Lu int "MTRR cleanup enable value (0-1)" 1794f5098d62SYinghai Lu range 0 1 1795f5098d62SYinghai Lu default "0" 179695ffa243SYinghai Lu depends on MTRR_SANITIZER 1797a7f7f624SMasahiro Yamada help 1798f5098d62SYinghai Lu Enable mtrr cleanup default value 179995ffa243SYinghai Lu 180012031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT 180112031a62SYinghai Lu int "MTRR cleanup spare reg num (0-7)" 180212031a62SYinghai Lu range 0 7 180312031a62SYinghai Lu default "1" 180412031a62SYinghai Lu depends on MTRR_SANITIZER 1805a7f7f624SMasahiro Yamada help 180612031a62SYinghai Lu mtrr cleanup spare entries default, it can be changed via 1807aba3728cSThomas Gleixner mtrr_spare_reg_nr=N on the kernel command line. 180812031a62SYinghai Lu 18092e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT 18106fc108a0SJan Beulich def_bool y 18116a108a14SDavid Rientjes prompt "x86 PAT support" if EXPERT 18122a8a2719SIngo Molnar depends on MTRR 18137a87225aSMatthew Wilcox (Oracle) select ARCH_USES_PG_ARCH_2 1814a7f7f624SMasahiro Yamada help 18152e5d9c85Svenkatesh.pallipadi@intel.com Use PAT attributes to setup page level cache control. 1816042b78e4SVenki Pallipadi 18172e5d9c85Svenkatesh.pallipadi@intel.com PATs are the modern equivalents of MTRRs and are much more 18182e5d9c85Svenkatesh.pallipadi@intel.com flexible than MTRRs. 18192e5d9c85Svenkatesh.pallipadi@intel.com 18202e5d9c85Svenkatesh.pallipadi@intel.com Say N here if you see bootup problems (boot crash, boot hang, 1821042b78e4SVenki Pallipadi spontaneous reboots) or a non-working video driver. 18222e5d9c85Svenkatesh.pallipadi@intel.com 18232e5d9c85Svenkatesh.pallipadi@intel.com If unsure, say Y. 18242e5d9c85Svenkatesh.pallipadi@intel.com 1825b971880fSBabu Mogerconfig X86_UMIP 1826796ebc81SRicardo Neri def_bool y 1827b971880fSBabu Moger prompt "User Mode Instruction Prevention" if EXPERT 1828a7f7f624SMasahiro Yamada help 1829b971880fSBabu Moger User Mode Instruction Prevention (UMIP) is a security feature in 1830b971880fSBabu Moger some x86 processors. If enabled, a general protection fault is 1831b971880fSBabu Moger issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are 1832b971880fSBabu Moger executed in user mode. These instructions unnecessarily expose 1833b971880fSBabu Moger information about the hardware state. 1834796ebc81SRicardo Neri 1835796ebc81SRicardo Neri The vast majority of applications do not use these instructions. 1836796ebc81SRicardo Neri For the very few that do, software emulation is provided in 1837796ebc81SRicardo Neri specific cases in protected and virtual-8086 modes. Emulated 1838796ebc81SRicardo Neri results are dummy. 1839aa35f896SRicardo Neri 1840156ff4a5SPeter Zijlstraconfig CC_HAS_IBT 1841156ff4a5SPeter Zijlstra # GCC >= 9 and binutils >= 2.29 1842156ff4a5SPeter Zijlstra # Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654 1843156ff4a5SPeter Zijlstra # Clang/LLVM >= 14 1844262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f 1845262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332 1846156ff4a5SPeter Zijlstra def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \ 1847262448f3SNathan Chancellor (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \ 1848156ff4a5SPeter Zijlstra $(as-instr,endbr64) 1849156ff4a5SPeter Zijlstra 185018e66b69SRick Edgecombeconfig X86_CET 185118e66b69SRick Edgecombe def_bool n 185218e66b69SRick Edgecombe help 185318e66b69SRick Edgecombe CET features configured (Shadow stack or IBT) 185418e66b69SRick Edgecombe 1855156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT 1856156ff4a5SPeter Zijlstra prompt "Indirect Branch Tracking" 18574fd5f70cSKees Cook def_bool y 185803f16cd0SJosh Poimboeuf depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL 1859f6a2c2b2SNathan Chancellor # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f 1860f6a2c2b2SNathan Chancellor depends on !LD_IS_LLD || LLD_VERSION >= 140000 186103f16cd0SJosh Poimboeuf select OBJTOOL 186218e66b69SRick Edgecombe select X86_CET 1863156ff4a5SPeter Zijlstra help 1864156ff4a5SPeter Zijlstra Build the kernel with support for Indirect Branch Tracking, a 1865156ff4a5SPeter Zijlstra hardware support course-grain forward-edge Control Flow Integrity 1866156ff4a5SPeter Zijlstra protection. It enforces that all indirect calls must land on 1867156ff4a5SPeter Zijlstra an ENDBR instruction, as such, the compiler will instrument the 1868156ff4a5SPeter Zijlstra code with them to make this happen. 1869156ff4a5SPeter Zijlstra 1870ed53a0d9SPeter Zijlstra In addition to building the kernel with IBT, seal all functions that 18714cdfc11bSNur Hussein are not indirect call targets, avoiding them ever becoming one. 1872ed53a0d9SPeter Zijlstra 1873ed53a0d9SPeter Zijlstra This requires LTO like objtool runs and will slow down the build. It 1874ed53a0d9SPeter Zijlstra does significantly reduce the number of ENDBR instructions in the 1875ed53a0d9SPeter Zijlstra kernel image. 1876ed53a0d9SPeter Zijlstra 187735e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS 187838f3e775SBabu Moger prompt "Memory Protection Keys" 187935e97790SDave Hansen def_bool y 1880284244a9SDave Hansen # Note: only available in 64-bit mode 188138f3e775SBabu Moger depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD) 188252c8e601SIngo Molnar select ARCH_USES_HIGH_VMA_FLAGS 188352c8e601SIngo Molnar select ARCH_HAS_PKEYS 1884a7f7f624SMasahiro Yamada help 1885284244a9SDave Hansen Memory Protection Keys provides a mechanism for enforcing 1886284244a9SDave Hansen page-based protections, but without requiring modification of the 1887284244a9SDave Hansen page tables when an application changes protection domains. 1888284244a9SDave Hansen 18891eecbcdcSMauro Carvalho Chehab For details, see Documentation/core-api/protection-keys.rst 1890284244a9SDave Hansen 1891284244a9SDave Hansen If unsure, say y. 189235e97790SDave Hansen 18935626f8d4SJoey Goulyconfig ARCH_PKEY_BITS 18945626f8d4SJoey Gouly int 18955626f8d4SJoey Gouly default 4 18965626f8d4SJoey Gouly 1897db616173SMichal Hockochoice 1898db616173SMichal Hocko prompt "TSX enable mode" 1899db616173SMichal Hocko depends on CPU_SUP_INTEL 1900db616173SMichal Hocko default X86_INTEL_TSX_MODE_OFF 1901db616173SMichal Hocko help 1902db616173SMichal Hocko Intel's TSX (Transactional Synchronization Extensions) feature 1903db616173SMichal Hocko allows to optimize locking protocols through lock elision which 1904db616173SMichal Hocko can lead to a noticeable performance boost. 1905db616173SMichal Hocko 1906db616173SMichal Hocko On the other hand it has been shown that TSX can be exploited 1907db616173SMichal Hocko to form side channel attacks (e.g. TAA) and chances are there 1908db616173SMichal Hocko will be more of those attacks discovered in the future. 1909db616173SMichal Hocko 1910db616173SMichal Hocko Therefore TSX is not enabled by default (aka tsx=off). An admin 1911db616173SMichal Hocko might override this decision by tsx=on the command line parameter. 1912db616173SMichal Hocko Even with TSX enabled, the kernel will attempt to enable the best 1913db616173SMichal Hocko possible TAA mitigation setting depending on the microcode available 1914db616173SMichal Hocko for the particular machine. 1915db616173SMichal Hocko 1916db616173SMichal Hocko This option allows to set the default tsx mode between tsx=on, =off 1917db616173SMichal Hocko and =auto. See Documentation/admin-guide/kernel-parameters.txt for more 1918db616173SMichal Hocko details. 1919db616173SMichal Hocko 1920db616173SMichal Hocko Say off if not sure, auto if TSX is in use but it should be used on safe 1921db616173SMichal Hocko platforms or on if TSX is in use and the security aspect of tsx is not 1922db616173SMichal Hocko relevant. 1923db616173SMichal Hocko 1924db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF 1925db616173SMichal Hocko bool "off" 1926db616173SMichal Hocko help 1927db616173SMichal Hocko TSX is disabled if possible - equals to tsx=off command line parameter. 1928db616173SMichal Hocko 1929db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON 1930db616173SMichal Hocko bool "on" 1931db616173SMichal Hocko help 1932db616173SMichal Hocko TSX is always enabled on TSX capable HW - equals the tsx=on command 1933db616173SMichal Hocko line parameter. 1934db616173SMichal Hocko 1935db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO 1936db616173SMichal Hocko bool "auto" 1937db616173SMichal Hocko help 1938db616173SMichal Hocko TSX is enabled on TSX capable HW that is believed to be safe against 1939db616173SMichal Hocko side channel attacks- equals the tsx=auto command line parameter. 1940db616173SMichal Hockoendchoice 1941db616173SMichal Hocko 1942e7e05452SSean Christophersonconfig X86_SGX 1943e7e05452SSean Christopherson bool "Software Guard eXtensions (SGX)" 1944b8d1d163SDaniel Sneddon depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC 1945e7e05452SSean Christopherson depends on CRYPTO=y 1946e7e05452SSean Christopherson depends on CRYPTO_SHA256=y 1947e7e05452SSean Christopherson select MMU_NOTIFIER 1948901ddbb9SJarkko Sakkinen select NUMA_KEEP_MEMINFO if NUMA 194940e0e784STony Luck select XARRAY_MULTI 1950e7e05452SSean Christopherson help 1951e7e05452SSean Christopherson Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions 1952e7e05452SSean Christopherson that can be used by applications to set aside private regions of code 1953e7e05452SSean Christopherson and data, referred to as enclaves. An enclave's private memory can 1954e7e05452SSean Christopherson only be accessed by code running within the enclave. Accesses from 1955e7e05452SSean Christopherson outside the enclave, including other enclaves, are disallowed by 1956e7e05452SSean Christopherson hardware. 1957e7e05452SSean Christopherson 1958e7e05452SSean Christopherson If unsure, say N. 1959e7e05452SSean Christopherson 196018e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK 196118e66b69SRick Edgecombe bool "X86 userspace shadow stack" 196218e66b69SRick Edgecombe depends on AS_WRUSS 196318e66b69SRick Edgecombe depends on X86_64 196418e66b69SRick Edgecombe select ARCH_USES_HIGH_VMA_FLAGS 1965bcc9d04eSMark Brown select ARCH_HAS_USER_SHADOW_STACK 196618e66b69SRick Edgecombe select X86_CET 196718e66b69SRick Edgecombe help 196818e66b69SRick Edgecombe Shadow stack protection is a hardware feature that detects function 196918e66b69SRick Edgecombe return address corruption. This helps mitigate ROP attacks. 197018e66b69SRick Edgecombe Applications must be enabled to use it, and old userspace does not 197118e66b69SRick Edgecombe get protection "for free". 197218e66b69SRick Edgecombe 197318e66b69SRick Edgecombe CPUs supporting shadow stacks were first released in 2020. 197418e66b69SRick Edgecombe 197554acee60SDave Hansen See Documentation/arch/x86/shstk.rst for more information. 197618e66b69SRick Edgecombe 197718e66b69SRick Edgecombe If unsure, say N. 197818e66b69SRick Edgecombe 1979c33621b4SKai Huangconfig INTEL_TDX_HOST 1980c33621b4SKai Huang bool "Intel Trust Domain Extensions (TDX) host support" 1981c33621b4SKai Huang depends on CPU_SUP_INTEL 1982c33621b4SKai Huang depends on X86_64 1983c33621b4SKai Huang depends on KVM_INTEL 19843115cabdSKai Huang depends on X86_X2APIC 1985abe8dbabSKai Huang select ARCH_KEEP_MEMBLOCK 1986ac3a2208SKai Huang depends on CONTIG_ALLOC 1987cb8eb06dSDave Hansen depends on !KEXEC_CORE 198883e1bdc9SKai Huang depends on X86_MCE 1989c33621b4SKai Huang help 1990c33621b4SKai Huang Intel Trust Domain Extensions (TDX) protects guest VMs from malicious 1991c33621b4SKai Huang host and certain physical attacks. This option enables necessary TDX 1992c33621b4SKai Huang support in the host kernel to run confidential VMs. 1993c33621b4SKai Huang 1994c33621b4SKai Huang If unsure, say N. 1995c33621b4SKai Huang 1996506f1d07SSam Ravnborgconfig EFI 19979ba16087SJan Beulich bool "EFI runtime service support" 19985b83683fSHuang, Ying depends on ACPI 1999f6ce5002SSergey Vlasov select UCS2_STRING 2000022ee6c5SArd Biesheuvel select EFI_RUNTIME_WRAPPERS 20011ff2fc02STom Lendacky select ARCH_USE_MEMREMAP_PROT 2002aba7e066SArd Biesheuvel select EFI_RUNTIME_MAP if KEXEC_CORE 2003a7f7f624SMasahiro Yamada help 20048b2cb7a8SHuang, Ying This enables the kernel to use EFI runtime services that are 2005506f1d07SSam Ravnborg available (such as the EFI variable services). 2006506f1d07SSam Ravnborg 20078b2cb7a8SHuang, Ying This option is only useful on systems that have EFI firmware. 20088b2cb7a8SHuang, Ying In addition, you should use the latest ELILO loader available 20098b2cb7a8SHuang, Ying at <http://elilo.sourceforge.net> in order to take advantage 20108b2cb7a8SHuang, Ying of EFI runtime services. However, even with this option, the 20118b2cb7a8SHuang, Ying resultant kernel should continue to boot on existing non-EFI 20128b2cb7a8SHuang, Ying platforms. 2013506f1d07SSam Ravnborg 2014291f3632SMatt Flemingconfig EFI_STUB 2015291f3632SMatt Fleming bool "EFI stub support" 2016c6dbd3e5SPeter Zijlstra depends on EFI 20177b2a583aSMatt Fleming select RELOCATABLE 2018a7f7f624SMasahiro Yamada help 2019291f3632SMatt Fleming This kernel feature allows a bzImage to be loaded directly 2020291f3632SMatt Fleming by EFI firmware without the use of a bootloader. 2021291f3632SMatt Fleming 20224f4cfa6cSMauro Carvalho Chehab See Documentation/admin-guide/efi-stub.rst for more information. 20230c759662SMatt Fleming 2024cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL 2025cc3fdda2SArd Biesheuvel bool "EFI handover protocol (DEPRECATED)" 2026cc3fdda2SArd Biesheuvel depends on EFI_STUB 2027cc3fdda2SArd Biesheuvel default y 2028cc3fdda2SArd Biesheuvel help 2029cc3fdda2SArd Biesheuvel Select this in order to include support for the deprecated EFI 2030cc3fdda2SArd Biesheuvel handover protocol, which defines alternative entry points into the 2031cc3fdda2SArd Biesheuvel EFI stub. This is a practice that has no basis in the UEFI 2032cc3fdda2SArd Biesheuvel specification, and requires a priori knowledge on the part of the 2033cc3fdda2SArd Biesheuvel bootloader about Linux/x86 specific ways of passing the command line 2034cc3fdda2SArd Biesheuvel and initrd, and where in memory those assets may be loaded. 2035cc3fdda2SArd Biesheuvel 2036cc3fdda2SArd Biesheuvel If in doubt, say Y. Even though the corresponding support is not 2037cc3fdda2SArd Biesheuvel present in upstream GRUB or other bootloaders, most distros build 2038cc3fdda2SArd Biesheuvel GRUB with numerous downstream patches applied, and may rely on the 2039cc3fdda2SArd Biesheuvel handover protocol as as result. 2040cc3fdda2SArd Biesheuvel 20417d453eeeSMatt Flemingconfig EFI_MIXED 20427d453eeeSMatt Fleming bool "EFI mixed-mode support" 20437d453eeeSMatt Fleming depends on EFI_STUB && X86_64 2044a7f7f624SMasahiro Yamada help 20457d453eeeSMatt Fleming Enabling this feature allows a 64-bit kernel to be booted 20467d453eeeSMatt Fleming on a 32-bit firmware, provided that your CPU supports 64-bit 20477d453eeeSMatt Fleming mode. 20487d453eeeSMatt Fleming 20497d453eeeSMatt Fleming Note that it is not possible to boot a mixed-mode enabled 20507d453eeeSMatt Fleming kernel via the EFI boot stub - a bootloader that supports 20517d453eeeSMatt Fleming the EFI handover protocol must be used. 20527d453eeeSMatt Fleming 20537d453eeeSMatt Fleming If unsure, say N. 20547d453eeeSMatt Fleming 20551fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP 20561fff234dSArd Biesheuvel bool "Export EFI runtime maps to sysfs" if EXPERT 20571fff234dSArd Biesheuvel depends on EFI 20581fff234dSArd Biesheuvel help 20591fff234dSArd Biesheuvel Export EFI runtime memory regions to /sys/firmware/efi/runtime-map. 20601fff234dSArd Biesheuvel That memory map is required by the 2nd kernel to set up EFI virtual 20611fff234dSArd Biesheuvel mappings after kexec, but can also be used for debugging purposes. 20621fff234dSArd Biesheuvel 20631fff234dSArd Biesheuvel See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map. 20641fff234dSArd Biesheuvel 20658636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz" 2066506f1d07SSam Ravnborg 20676af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC 20686af51380SEric DeVolder def_bool y 2069506f1d07SSam Ravnborg 20706af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE 2071c1ad12eeSArnd Bergmann def_bool X86_64 2072506f1d07SSam Ravnborg 20736af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE 20746af51380SEric DeVolder def_bool y 20756af51380SEric DeVolder depends on KEXEC_FILE 2076b69a2afdSJonathan McDowell select HAVE_IMA_KEXEC if IMA 207774ca317cSVivek Goyal 2078e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY 2079c1ad12eeSArnd Bergmann def_bool y 2080b799a09fSAKASHI Takahiro 20816af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG 20826af51380SEric DeVolder def_bool y 208399d5cadfSJiri Bohac 20846af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE 20856af51380SEric DeVolder def_bool y 208699d5cadfSJiri Bohac 20876af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG 20886af51380SEric DeVolder def_bool y 208999d5cadfSJiri Bohac 20906af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP 20916af51380SEric DeVolder def_bool y 20928e7d8381SVivek Goyal 20936af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP 20946af51380SEric DeVolder def_bool X86_64 || (X86_32 && HIGHMEM) 20958e7d8381SVivek Goyal 209631daa343SDave Vasilevskyconfig ARCH_DEFAULT_CRASH_DUMP 209731daa343SDave Vasilevsky def_bool y 209831daa343SDave Vasilevsky 2099ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG 2100ea53ad9cSEric DeVolder def_bool y 21013ab83521SHuang Ying 21029c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 210385fcde40SBaoquan He def_bool CRASH_RESERVE 21049c08a2a1SBaoquan He 2105506f1d07SSam Ravnborgconfig PHYSICAL_START 21066a108a14SDavid Rientjes hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 2107ceefccc9SH. Peter Anvin default "0x1000000" 2108a7f7f624SMasahiro Yamada help 2109506f1d07SSam Ravnborg This gives the physical address where the kernel is loaded. 2110506f1d07SSam Ravnborg 211143b1d3e6SChris Koch If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage 211243b1d3e6SChris Koch will decompress itself to above physical address and run from there. 211343b1d3e6SChris Koch Otherwise, bzImage will run from the address where it has been loaded 211443b1d3e6SChris Koch by the boot loader. The only exception is if it is loaded below the 211543b1d3e6SChris Koch above physical address, in which case it will relocate itself there. 2116506f1d07SSam Ravnborg 2117506f1d07SSam Ravnborg In normal kdump cases one does not have to set/change this option 2118506f1d07SSam Ravnborg as now bzImage can be compiled as a completely relocatable image 2119506f1d07SSam Ravnborg (CONFIG_RELOCATABLE=y) and be used to load and run from a different 2120506f1d07SSam Ravnborg address. This option is mainly useful for the folks who don't want 2121506f1d07SSam Ravnborg to use a bzImage for capturing the crash dump and want to use a 2122506f1d07SSam Ravnborg vmlinux instead. vmlinux is not relocatable hence a kernel needs 2123506f1d07SSam Ravnborg to be specifically compiled to run from a specific memory area 2124506f1d07SSam Ravnborg (normally a reserved region) and this option comes handy. 2125506f1d07SSam Ravnborg 2126ceefccc9SH. Peter Anvin So if you are using bzImage for capturing the crash dump, 2127ceefccc9SH. Peter Anvin leave the value here unchanged to 0x1000000 and set 2128ceefccc9SH. Peter Anvin CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux 2129ceefccc9SH. Peter Anvin for capturing the crash dump change this value to start of 2130ceefccc9SH. Peter Anvin the reserved region. In other words, it can be set based on 2131ceefccc9SH. Peter Anvin the "X" value as specified in the "crashkernel=YM@XM" 2132ceefccc9SH. Peter Anvin command line boot parameter passed to the panic-ed 2133330d4810SMauro Carvalho Chehab kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst 2134ceefccc9SH. Peter Anvin for more details about crash dumps. 2135506f1d07SSam Ravnborg 2136506f1d07SSam Ravnborg Usage of bzImage for capturing the crash dump is recommended as 2137506f1d07SSam Ravnborg one does not have to build two kernels. Same kernel can be used 2138506f1d07SSam Ravnborg as production kernel and capture kernel. Above option should have 2139506f1d07SSam Ravnborg gone away after relocatable bzImage support is introduced. But it 2140506f1d07SSam Ravnborg is present because there are users out there who continue to use 2141506f1d07SSam Ravnborg vmlinux for dump capture. This option should go away down the 2142506f1d07SSam Ravnborg line. 2143506f1d07SSam Ravnborg 2144506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2145506f1d07SSam Ravnborg 2146506f1d07SSam Ravnborgconfig RELOCATABLE 214726717808SH. Peter Anvin bool "Build a relocatable kernel" 214826717808SH. Peter Anvin default y 2149a7f7f624SMasahiro Yamada help 2150506f1d07SSam Ravnborg This builds a kernel image that retains relocation information 2151506f1d07SSam Ravnborg so it can be loaded someplace besides the default 1MB. 2152506f1d07SSam Ravnborg The relocations tend to make the kernel binary about 10% larger, 2153506f1d07SSam Ravnborg but are discarded at runtime. 2154506f1d07SSam Ravnborg 2155506f1d07SSam Ravnborg One use is for the kexec on panic case where the recovery kernel 2156506f1d07SSam Ravnborg must live at a different physical address than the primary 2157506f1d07SSam Ravnborg kernel. 2158506f1d07SSam Ravnborg 2159506f1d07SSam Ravnborg Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address 2160506f1d07SSam Ravnborg it has been loaded at and the compile time physical address 21618ab3820fSKees Cook (CONFIG_PHYSICAL_START) is used as the minimum location. 2162506f1d07SSam Ravnborg 21638ab3820fSKees Cookconfig RANDOMIZE_BASE 2164e8581e3dSBaoquan He bool "Randomize the address of the kernel image (KASLR)" 21658ab3820fSKees Cook depends on RELOCATABLE 21666807c846SIngo Molnar default y 2167a7f7f624SMasahiro Yamada help 2168e8581e3dSBaoquan He In support of Kernel Address Space Layout Randomization (KASLR), 2169e8581e3dSBaoquan He this randomizes the physical address at which the kernel image 2170e8581e3dSBaoquan He is decompressed and the virtual address where the kernel 2171e8581e3dSBaoquan He image is mapped, as a security feature that deters exploit 2172e8581e3dSBaoquan He attempts relying on knowledge of the location of kernel 2173e8581e3dSBaoquan He code internals. 2174e8581e3dSBaoquan He 2175ed9f007eSKees Cook On 64-bit, the kernel physical and virtual addresses are 2176ed9f007eSKees Cook randomized separately. The physical address will be anywhere 2177ed9f007eSKees Cook between 16MB and the top of physical memory (up to 64TB). The 2178ed9f007eSKees Cook virtual address will be randomized from 16MB up to 1GB (9 bits 2179ed9f007eSKees Cook of entropy). Note that this also reduces the memory space 2180ed9f007eSKees Cook available to kernel modules from 1.5GB to 1GB. 2181ed9f007eSKees Cook 2182ed9f007eSKees Cook On 32-bit, the kernel physical and virtual addresses are 2183ed9f007eSKees Cook randomized together. They will be randomized from 16MB up to 2184ed9f007eSKees Cook 512MB (8 bits of entropy). 21858ab3820fSKees Cook 2186a653f356SKees Cook Entropy is generated using the RDRAND instruction if it is 2187e8581e3dSBaoquan He supported. If RDTSC is supported, its value is mixed into 2188e8581e3dSBaoquan He the entropy pool as well. If neither RDRAND nor RDTSC are 2189ed9f007eSKees Cook supported, then entropy is read from the i8254 timer. The 2190ed9f007eSKees Cook usable entropy is limited by the kernel being built using 2191ed9f007eSKees Cook 2GB addressing, and that PHYSICAL_ALIGN must be at a 2192ed9f007eSKees Cook minimum of 2MB. As a result, only 10 bits of entropy are 2193ed9f007eSKees Cook theoretically possible, but the implementations are further 2194ed9f007eSKees Cook limited due to memory layouts. 2195e8581e3dSBaoquan He 21966807c846SIngo Molnar If unsure, say Y. 2197da2b6fb9SKees Cook 21988ab3820fSKees Cook# Relocation on x86 needs some additional build support 2199845adf72SH. Peter Anvinconfig X86_NEED_RELOCS 2200845adf72SH. Peter Anvin def_bool y 22018ab3820fSKees Cook depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE) 2202845adf72SH. Peter Anvin 2203506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN 2204a0215061SKees Cook hex "Alignment value to which kernel should be aligned" 22058ab3820fSKees Cook default "0x200000" 2206a0215061SKees Cook range 0x2000 0x1000000 if X86_32 2207a0215061SKees Cook range 0x200000 0x1000000 if X86_64 2208a7f7f624SMasahiro Yamada help 2209506f1d07SSam Ravnborg This value puts the alignment restrictions on physical address 2210506f1d07SSam Ravnborg where kernel is loaded and run from. Kernel is compiled for an 2211506f1d07SSam Ravnborg address which meets above alignment restriction. 2212506f1d07SSam Ravnborg 2213506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2214506f1d07SSam Ravnborg CONFIG_RELOCATABLE is set, kernel will move itself to nearest 2215506f1d07SSam Ravnborg address aligned to above value and run from there. 2216506f1d07SSam Ravnborg 2217506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2218506f1d07SSam Ravnborg CONFIG_RELOCATABLE is not set, kernel will ignore the run time 2219506f1d07SSam Ravnborg load address and decompress itself to the address it has been 2220506f1d07SSam Ravnborg compiled for and run from there. The address for which kernel is 2221506f1d07SSam Ravnborg compiled already meets above alignment restrictions. Hence the 2222506f1d07SSam Ravnborg end result is that kernel runs from a physical address meeting 2223506f1d07SSam Ravnborg above alignment restrictions. 2224506f1d07SSam Ravnborg 2225a0215061SKees Cook On 32-bit this value must be a multiple of 0x2000. On 64-bit 2226a0215061SKees Cook this value must be a multiple of 0x200000. 2227a0215061SKees Cook 2228506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2229506f1d07SSam Ravnborg 2230eedb92abSKirill A. Shutemovconfig DYNAMIC_MEMORY_LAYOUT 2231eedb92abSKirill A. Shutemov bool 2232a7f7f624SMasahiro Yamada help 2233eedb92abSKirill A. Shutemov This option makes base addresses of vmalloc and vmemmap as well as 2234eedb92abSKirill A. Shutemov __PAGE_OFFSET movable during boot. 2235eedb92abSKirill A. Shutemov 22360483e1faSThomas Garnierconfig RANDOMIZE_MEMORY 22370483e1faSThomas Garnier bool "Randomize the kernel memory sections" 22380483e1faSThomas Garnier depends on X86_64 22390483e1faSThomas Garnier depends on RANDOMIZE_BASE 2240eedb92abSKirill A. Shutemov select DYNAMIC_MEMORY_LAYOUT 22410483e1faSThomas Garnier default RANDOMIZE_BASE 2242a7f7f624SMasahiro Yamada help 22430483e1faSThomas Garnier Randomizes the base virtual address of kernel memory sections 22440483e1faSThomas Garnier (physical memory mapping, vmalloc & vmemmap). This security feature 22450483e1faSThomas Garnier makes exploits relying on predictable memory locations less reliable. 22460483e1faSThomas Garnier 22470483e1faSThomas Garnier The order of allocations remains unchanged. Entropy is generated in 22480483e1faSThomas Garnier the same way as RANDOMIZE_BASE. Current implementation in the optimal 22490483e1faSThomas Garnier configuration have in average 30,000 different possible virtual 22500483e1faSThomas Garnier addresses for each memory section. 22510483e1faSThomas Garnier 22526807c846SIngo Molnar If unsure, say Y. 22530483e1faSThomas Garnier 225490397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING 225590397a41SThomas Garnier hex "Physical memory mapping padding" if EXPERT 225690397a41SThomas Garnier depends on RANDOMIZE_MEMORY 225790397a41SThomas Garnier default "0xa" if MEMORY_HOTPLUG 225890397a41SThomas Garnier default "0x0" 225990397a41SThomas Garnier range 0x1 0x40 if MEMORY_HOTPLUG 226090397a41SThomas Garnier range 0x0 0x40 2261a7f7f624SMasahiro Yamada help 226290397a41SThomas Garnier Define the padding in terabytes added to the existing physical 226390397a41SThomas Garnier memory size during kernel memory randomization. It is useful 226490397a41SThomas Garnier for memory hotplug support but reduces the entropy available for 226590397a41SThomas Garnier address randomization. 226690397a41SThomas Garnier 226790397a41SThomas Garnier If unsure, leave at the default value. 226890397a41SThomas Garnier 22696449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING 22706449dcb0SKirill A. Shutemov bool "Linear Address Masking support" 22716449dcb0SKirill A. Shutemov depends on X86_64 22723267cb6dSPawan Gupta depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS 22736449dcb0SKirill A. Shutemov help 22746449dcb0SKirill A. Shutemov Linear Address Masking (LAM) modifies the checking that is applied 22756449dcb0SKirill A. Shutemov to 64-bit linear addresses, allowing software to use of the 22766449dcb0SKirill A. Shutemov untranslated address bits for metadata. 22776449dcb0SKirill A. Shutemov 22786449dcb0SKirill A. Shutemov The capability can be used for efficient address sanitizers (ASAN) 22796449dcb0SKirill A. Shutemov implementation and for optimizations in JITs. 22806449dcb0SKirill A. Shutemov 2281506f1d07SSam Ravnborgconfig HOTPLUG_CPU 2282bebd024eSThomas Gleixner def_bool y 228340b31360SStephen Rothwell depends on SMP 2284506f1d07SSam Ravnborg 2285506f1d07SSam Ravnborgconfig COMPAT_VDSO 2286b0b49f26SAndy Lutomirski def_bool n 2287b0b49f26SAndy Lutomirski prompt "Disable the 32-bit vDSO (needed for glibc 2.3.3)" 2288953fee1dSIngo Molnar depends on COMPAT_32 2289a7f7f624SMasahiro Yamada help 2290b0b49f26SAndy Lutomirski Certain buggy versions of glibc will crash if they are 2291b0b49f26SAndy Lutomirski presented with a 32-bit vDSO that is not mapped at the address 2292b0b49f26SAndy Lutomirski indicated in its segment table. 2293e84446deSRandy Dunlap 2294b0b49f26SAndy Lutomirski The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a 2295b0b49f26SAndy Lutomirski and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and 2296b0b49f26SAndy Lutomirski 49ad572a70b8aeb91e57483a11dd1b77e31c4468. Glibc 2.3.3 is 2297b0b49f26SAndy Lutomirski the only released version with the bug, but OpenSUSE 9 2298b0b49f26SAndy Lutomirski contains a buggy "glibc 2.3.2". 2299506f1d07SSam Ravnborg 2300b0b49f26SAndy Lutomirski The symptom of the bug is that everything crashes on startup, saying: 2301b0b49f26SAndy Lutomirski dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed! 2302b0b49f26SAndy Lutomirski 2303b0b49f26SAndy Lutomirski Saying Y here changes the default value of the vdso32 boot 2304b0b49f26SAndy Lutomirski option from 1 to 0, which turns off the 32-bit vDSO entirely. 2305b0b49f26SAndy Lutomirski This works around the glibc bug but hurts performance. 2306b0b49f26SAndy Lutomirski 2307b0b49f26SAndy Lutomirski If unsure, say N: if you are compiling your own kernel, you 2308b0b49f26SAndy Lutomirski are unlikely to be using a buggy version of glibc. 2309506f1d07SSam Ravnborg 23103dc33bd3SKees Cookchoice 23113dc33bd3SKees Cook prompt "vsyscall table for legacy applications" 23123dc33bd3SKees Cook depends on X86_64 2313625b7b7fSAndy Lutomirski default LEGACY_VSYSCALL_XONLY 23143dc33bd3SKees Cook help 23153dc33bd3SKees Cook Legacy user code that does not know how to find the vDSO expects 23163dc33bd3SKees Cook to be able to issue three syscalls by calling fixed addresses in 23173dc33bd3SKees Cook kernel space. Since this location is not randomized with ASLR, 23183dc33bd3SKees Cook it can be used to assist security vulnerability exploitation. 23193dc33bd3SKees Cook 23203dc33bd3SKees Cook This setting can be changed at boot time via the kernel command 2321bf00745eSAndy Lutomirski line parameter vsyscall=[emulate|xonly|none]. Emulate mode 2322bf00745eSAndy Lutomirski is deprecated and can only be enabled using the kernel command 2323bf00745eSAndy Lutomirski line. 23243dc33bd3SKees Cook 23253dc33bd3SKees Cook On a system with recent enough glibc (2.14 or newer) and no 23263dc33bd3SKees Cook static binaries, you can say None without a performance penalty 23273dc33bd3SKees Cook to improve security. 23283dc33bd3SKees Cook 2329bd49e16eSAndy Lutomirski If unsure, select "Emulate execution only". 23303dc33bd3SKees Cook 2331bd49e16eSAndy Lutomirski config LEGACY_VSYSCALL_XONLY 2332bd49e16eSAndy Lutomirski bool "Emulate execution only" 2333bd49e16eSAndy Lutomirski help 2334bd49e16eSAndy Lutomirski The kernel traps and emulates calls into the fixed vsyscall 2335bd49e16eSAndy Lutomirski address mapping and does not allow reads. This 2336bd49e16eSAndy Lutomirski configuration is recommended when userspace might use the 2337bd49e16eSAndy Lutomirski legacy vsyscall area but support for legacy binary 2338bd49e16eSAndy Lutomirski instrumentation of legacy code is not needed. It mitigates 2339bd49e16eSAndy Lutomirski certain uses of the vsyscall area as an ASLR-bypassing 2340bd49e16eSAndy Lutomirski buffer. 23413dc33bd3SKees Cook 23423dc33bd3SKees Cook config LEGACY_VSYSCALL_NONE 23433dc33bd3SKees Cook bool "None" 23443dc33bd3SKees Cook help 23453dc33bd3SKees Cook There will be no vsyscall mapping at all. This will 23463dc33bd3SKees Cook eliminate any risk of ASLR bypass due to the vsyscall 23473dc33bd3SKees Cook fixed address mapping. Attempts to use the vsyscalls 23483dc33bd3SKees Cook will be reported to dmesg, so that either old or 23493dc33bd3SKees Cook malicious userspace programs can be identified. 23503dc33bd3SKees Cook 23513dc33bd3SKees Cookendchoice 23523dc33bd3SKees Cook 2353516cbf37STim Birdconfig CMDLINE_BOOL 2354516cbf37STim Bird bool "Built-in kernel command line" 2355a7f7f624SMasahiro Yamada help 2356516cbf37STim Bird Allow for specifying boot arguments to the kernel at 2357516cbf37STim Bird build time. On some systems (e.g. embedded ones), it is 2358516cbf37STim Bird necessary or convenient to provide some or all of the 2359516cbf37STim Bird kernel boot arguments with the kernel itself (that is, 2360516cbf37STim Bird to not rely on the boot loader to provide them.) 2361516cbf37STim Bird 2362516cbf37STim Bird To compile command line arguments into the kernel, 2363516cbf37STim Bird set this option to 'Y', then fill in the 236469711ca1SSébastien Hinderer boot arguments in CONFIG_CMDLINE. 2365516cbf37STim Bird 2366516cbf37STim Bird Systems with fully functional boot loaders (i.e. non-embedded) 2367516cbf37STim Bird should leave this option set to 'N'. 2368516cbf37STim Bird 2369516cbf37STim Birdconfig CMDLINE 2370516cbf37STim Bird string "Built-in kernel command string" 2371516cbf37STim Bird depends on CMDLINE_BOOL 2372516cbf37STim Bird default "" 2373a7f7f624SMasahiro Yamada help 2374516cbf37STim Bird Enter arguments here that should be compiled into the kernel 2375516cbf37STim Bird image and used at boot time. If the boot loader provides a 2376516cbf37STim Bird command line at boot time, it is appended to this string to 2377516cbf37STim Bird form the full kernel command line, when the system boots. 2378516cbf37STim Bird 2379516cbf37STim Bird However, you can use the CONFIG_CMDLINE_OVERRIDE option to 2380516cbf37STim Bird change this behavior. 2381516cbf37STim Bird 2382516cbf37STim Bird In most cases, the command line (whether built-in or provided 2383516cbf37STim Bird by the boot loader) should specify the device for the root 2384516cbf37STim Bird file system. 2385516cbf37STim Bird 2386516cbf37STim Birdconfig CMDLINE_OVERRIDE 2387516cbf37STim Bird bool "Built-in command line overrides boot loader arguments" 2388645e6466SAnders Roxell depends on CMDLINE_BOOL && CMDLINE != "" 2389a7f7f624SMasahiro Yamada help 2390516cbf37STim Bird Set this option to 'Y' to have the kernel ignore the boot loader 2391516cbf37STim Bird command line, and use ONLY the built-in command line. 2392516cbf37STim Bird 2393516cbf37STim Bird This is used to work around broken boot loaders. This should 2394516cbf37STim Bird be set to 'N' under normal conditions. 2395516cbf37STim Bird 2396a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL 2397a5b9e5a2SAndy Lutomirski bool "Enable the LDT (local descriptor table)" if EXPERT 2398a5b9e5a2SAndy Lutomirski default y 2399a7f7f624SMasahiro Yamada help 2400a5b9e5a2SAndy Lutomirski Linux can allow user programs to install a per-process x86 2401a5b9e5a2SAndy Lutomirski Local Descriptor Table (LDT) using the modify_ldt(2) system 2402a5b9e5a2SAndy Lutomirski call. This is required to run 16-bit or segmented code such as 2403a5b9e5a2SAndy Lutomirski DOSEMU or some Wine programs. It is also used by some very old 2404a5b9e5a2SAndy Lutomirski threading libraries. 2405a5b9e5a2SAndy Lutomirski 2406a5b9e5a2SAndy Lutomirski Enabling this feature adds a small amount of overhead to 2407a5b9e5a2SAndy Lutomirski context switches and increases the low-level kernel attack 2408a5b9e5a2SAndy Lutomirski surface. Disabling it removes the modify_ldt(2) system call. 2409a5b9e5a2SAndy Lutomirski 2410a5b9e5a2SAndy Lutomirski Saying 'N' here may make sense for embedded or server kernels. 2411a5b9e5a2SAndy Lutomirski 24123aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE 24133aac3ebeSThomas Gleixner bool "Enforce strict size checking for sigaltstack" 24143aac3ebeSThomas Gleixner depends on DYNAMIC_SIGFRAME 24153aac3ebeSThomas Gleixner help 24163aac3ebeSThomas Gleixner For historical reasons MINSIGSTKSZ is a constant which became 24173aac3ebeSThomas Gleixner already too small with AVX512 support. Add a mechanism to 24183aac3ebeSThomas Gleixner enforce strict checking of the sigaltstack size against the 24193aac3ebeSThomas Gleixner real size of the FPU frame. This option enables the check 24203aac3ebeSThomas Gleixner by default. It can also be controlled via the kernel command 24213aac3ebeSThomas Gleixner line option 'strict_sas_size' independent of this config 24223aac3ebeSThomas Gleixner switch. Enabling it might break existing applications which 24233aac3ebeSThomas Gleixner allocate a too small sigaltstack but 'work' because they 24243aac3ebeSThomas Gleixner never get a signal delivered. 24253aac3ebeSThomas Gleixner 24263aac3ebeSThomas Gleixner Say 'N' unless you want to really enforce this check. 24273aac3ebeSThomas Gleixner 2428d6f635bcSKees Cookconfig CFI_AUTO_DEFAULT 2429d6f635bcSKees Cook bool "Attempt to use FineIBT by default at boot time" 2430d6f635bcSKees Cook depends on FINEIBT 2431d6f635bcSKees Cook default y 2432d6f635bcSKees Cook help 2433d6f635bcSKees Cook Attempt to use FineIBT by default at boot time. If enabled, 2434d6f635bcSKees Cook this is the same as booting with "cfi=auto". If disabled, 2435d6f635bcSKees Cook this is the same as booting with "cfi=kcfi". 2436d6f635bcSKees Cook 2437b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig" 2438b700e7f0SSeth Jennings 2439350afa8aSRavi Bangoriaconfig X86_BUS_LOCK_DETECT 2440350afa8aSRavi Bangoria bool "Split Lock Detect and Bus Lock Detect support" 2441408eb741SRavi Bangoria depends on CPU_SUP_INTEL || CPU_SUP_AMD 2442350afa8aSRavi Bangoria default y 2443350afa8aSRavi Bangoria help 2444350afa8aSRavi Bangoria Enable Split Lock Detect and Bus Lock Detect functionalities. 2445350afa8aSRavi Bangoria See <file:Documentation/arch/x86/buslock.rst> for more information. 2446350afa8aSRavi Bangoria 2447506f1d07SSam Ravnborgendmenu 2448506f1d07SSam Ravnborg 24491ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS 245047ff30ccSUros Bizjak def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null) 245147ff30ccSUros Bizjak depends on CC_IS_GCC 24521ca3683cSUros Bizjak 24539ebe5500SUros Bizjakconfig CC_HAS_NAMED_AS_FIXED_SANITIZERS 2454f61f02d1SUros Bizjak def_bool CC_IS_GCC && GCC_VERSION >= 130300 24551ca3683cSUros Bizjak 24561ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT 24571ca3683cSUros Bizjak def_bool y 2458e29aad08SUros Bizjak depends on CC_HAS_NAMED_AS 2459e29aad08SUros Bizjak # 24609ebe5500SUros Bizjak # -fsanitize=kernel-address (KASAN) and -fsanitize=thread 24619ebe5500SUros Bizjak # (KCSAN) are incompatible with named address spaces with 24629ebe5500SUros Bizjak # GCC < 13.3 - see GCC PR sanitizer/111736. 2463e29aad08SUros Bizjak # 24649ebe5500SUros Bizjak depends on !(KASAN || KCSAN) || CC_HAS_NAMED_AS_FIXED_SANITIZERS 24651ca3683cSUros Bizjak 2466f43b9876SPeter Zijlstraconfig CC_HAS_SLS 2467f43b9876SPeter Zijlstra def_bool $(cc-option,-mharden-sls=all) 2468f43b9876SPeter Zijlstra 2469f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK 2470f43b9876SPeter Zijlstra def_bool $(cc-option,-mfunction-return=thunk-extern) 2471f43b9876SPeter Zijlstra 2472bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING 2473bea75b33SThomas Gleixner def_bool $(cc-option,-fpatchable-function-entry=16,16) 2474bea75b33SThomas Gleixner 2475bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI 2476bea75b33SThomas Gleixner int 2477bea75b33SThomas Gleixner default 59 if FUNCTION_ALIGNMENT_64B 2478bea75b33SThomas Gleixner default 27 if FUNCTION_ALIGNMENT_32B 2479bea75b33SThomas Gleixner default 11 if FUNCTION_ALIGNMENT_16B 2480bea75b33SThomas Gleixner default 3 if FUNCTION_ALIGNMENT_8B 2481bea75b33SThomas Gleixner default 0 2482bea75b33SThomas Gleixner 2483bea75b33SThomas Gleixner# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG 2484bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/ 2485bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES 2486bea75b33SThomas Gleixner int 2487bea75b33SThomas Gleixner default FUNCTION_PADDING_CFI if CFI_CLANG 2488bea75b33SThomas Gleixner default FUNCTION_ALIGNMENT 2489bea75b33SThomas Gleixner 2490931ab636SPeter Zijlstraconfig CALL_PADDING 2491931ab636SPeter Zijlstra def_bool n 2492931ab636SPeter Zijlstra depends on CC_HAS_ENTRY_PADDING && OBJTOOL 2493931ab636SPeter Zijlstra select FUNCTION_ALIGNMENT_16B 2494931ab636SPeter Zijlstra 2495931ab636SPeter Zijlstraconfig FINEIBT 2496931ab636SPeter Zijlstra def_bool y 2497aefb2f2eSBreno Leitao depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE 2498931ab636SPeter Zijlstra select CALL_PADDING 2499931ab636SPeter Zijlstra 25008f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS 25018f7c0d8bSThomas Gleixner def_bool y 25020911b8c5SBreno Leitao depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL 25038f7c0d8bSThomas Gleixner 25048f7c0d8bSThomas Gleixnerconfig CALL_THUNKS 25058f7c0d8bSThomas Gleixner def_bool n 2506931ab636SPeter Zijlstra select CALL_PADDING 25078f7c0d8bSThomas Gleixner 2508b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS 2509b341b20dSPeter Zijlstra def_bool y 2510931ab636SPeter Zijlstra depends on CALL_PADDING && !CFI_CLANG 2511b341b20dSPeter Zijlstra 2512fe42754bSSean Christophersonmenuconfig CPU_MITIGATIONS 2513fe42754bSSean Christopherson bool "Mitigations for CPU vulnerabilities" 2514f43b9876SPeter Zijlstra default y 2515f43b9876SPeter Zijlstra help 2516fe42754bSSean Christopherson Say Y here to enable options which enable mitigations for hardware 2517fe42754bSSean Christopherson vulnerabilities (usually related to speculative execution). 2518ce0abef6SSean Christopherson Mitigations can be disabled or restricted to SMT systems at runtime 2519ce0abef6SSean Christopherson via the "mitigations" kernel parameter. 2520f43b9876SPeter Zijlstra 2521ce0abef6SSean Christopherson If you say N, all mitigations will be disabled. This CANNOT be 2522ce0abef6SSean Christopherson overridden at runtime. 2523ce0abef6SSean Christopherson 2524ce0abef6SSean Christopherson Say 'Y', unless you really know what you are doing. 2525f43b9876SPeter Zijlstra 2526fe42754bSSean Christophersonif CPU_MITIGATIONS 2527f43b9876SPeter Zijlstra 2528ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION 2529f43b9876SPeter Zijlstra bool "Remove the kernel mapping in user mode" 2530f43b9876SPeter Zijlstra default y 2531f43b9876SPeter Zijlstra depends on (X86_64 || X86_PAE) 2532f43b9876SPeter Zijlstra help 2533f43b9876SPeter Zijlstra This feature reduces the number of hardware side channels by 2534f43b9876SPeter Zijlstra ensuring that the majority of kernel addresses are not mapped 2535f43b9876SPeter Zijlstra into userspace. 2536f43b9876SPeter Zijlstra 2537ff61f079SJonathan Corbet See Documentation/arch/x86/pti.rst for more details. 2538f43b9876SPeter Zijlstra 2539aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE 2540f43b9876SPeter Zijlstra bool "Avoid speculative indirect branches in kernel" 2541f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2542f43b9876SPeter Zijlstra default y 2543f43b9876SPeter Zijlstra help 2544f43b9876SPeter Zijlstra Compile kernel with the retpoline compiler options to guard against 2545f43b9876SPeter Zijlstra kernel-to-user data leaks by avoiding speculative indirect 2546f43b9876SPeter Zijlstra branches. Requires a compiler with -mindirect-branch=thunk-extern 2547f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2548f43b9876SPeter Zijlstra 25490911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK 2550f43b9876SPeter Zijlstra bool "Enable return-thunks" 2551aefb2f2eSBreno Leitao depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK 2552f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2553b648ab48SBen Hutchings default y if X86_64 2554f43b9876SPeter Zijlstra help 2555f43b9876SPeter Zijlstra Compile the kernel with the return-thunks compiler option to guard 2556f43b9876SPeter Zijlstra against kernel-to-user data leaks by avoiding return speculation. 2557f43b9876SPeter Zijlstra Requires a compiler with -mfunction-return=thunk-extern 2558f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2559f43b9876SPeter Zijlstra 2560ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY 2561f43b9876SPeter Zijlstra bool "Enable UNRET on kernel entry" 25620911b8c5SBreno Leitao depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64 2563f43b9876SPeter Zijlstra default y 2564f43b9876SPeter Zijlstra help 2565f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=unret mitigation. 2566f43b9876SPeter Zijlstra 25675fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING 256880e4c1cdSThomas Gleixner bool "Mitigate RSB underflow with call depth tracking" 256980e4c1cdSThomas Gleixner depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS 257080e4c1cdSThomas Gleixner select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 257180e4c1cdSThomas Gleixner select CALL_THUNKS 257280e4c1cdSThomas Gleixner default y 257380e4c1cdSThomas Gleixner help 257480e4c1cdSThomas Gleixner Compile the kernel with call depth tracking to mitigate the Intel 257586e39b94SBreno Leitao SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off 257686e39b94SBreno Leitao by default and needs to be enabled on the kernel command line via the 257786e39b94SBreno Leitao retbleed=stuff option. For non-affected systems the overhead of this 257886e39b94SBreno Leitao option is marginal as the call depth tracking is using run-time 257986e39b94SBreno Leitao generated call thunks in a compiler generated padding area and call 258086e39b94SBreno Leitao patching. This increases text size by ~5%. For non affected systems 258186e39b94SBreno Leitao this space is unused. On affected SKL systems this results in a 258286e39b94SBreno Leitao significant performance gain over the IBRS mitigation. 258380e4c1cdSThomas Gleixner 2584e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG 2585e81dc127SThomas Gleixner bool "Enable call thunks and call depth tracking debugging" 25865fa31af3SBreno Leitao depends on MITIGATION_CALL_DEPTH_TRACKING 2587e81dc127SThomas Gleixner select FUNCTION_ALIGNMENT_32B 2588e81dc127SThomas Gleixner default n 2589e81dc127SThomas Gleixner help 2590e81dc127SThomas Gleixner Enable call/ret counters for imbalance detection and build in 2591e81dc127SThomas Gleixner a noisy dmesg about callthunks generation and call patching for 2592e81dc127SThomas Gleixner trouble shooting. The debug prints need to be enabled on the 2593e81dc127SThomas Gleixner kernel command line with 'debug-callthunks'. 259454628de6SRandy Dunlap Only enable this when you are debugging call thunks as this 259554628de6SRandy Dunlap creates a noticeable runtime overhead. If unsure say N. 259680e4c1cdSThomas Gleixner 2597e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY 2598f43b9876SPeter Zijlstra bool "Enable IBPB on kernel entry" 2599b648ab48SBen Hutchings depends on CPU_SUP_AMD && X86_64 2600f43b9876SPeter Zijlstra default y 2601f43b9876SPeter Zijlstra help 2602f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=ibpb mitigation. 2603f43b9876SPeter Zijlstra 26041da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY 2605f43b9876SPeter Zijlstra bool "Enable IBRS on kernel entry" 2606b648ab48SBen Hutchings depends on CPU_SUP_INTEL && X86_64 2607f43b9876SPeter Zijlstra default y 2608f43b9876SPeter Zijlstra help 2609f43b9876SPeter Zijlstra Compile the kernel with support for the spectre_v2=ibrs mitigation. 2610f43b9876SPeter Zijlstra This mitigates both spectre_v2 and retbleed at great cost to 2611f43b9876SPeter Zijlstra performance. 2612f43b9876SPeter Zijlstra 2613a033eec9SBreno Leitaoconfig MITIGATION_SRSO 2614fb3bd914SBorislav Petkov (AMD) bool "Mitigate speculative RAS overflow on AMD" 26150911b8c5SBreno Leitao depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK 2616fb3bd914SBorislav Petkov (AMD) default y 2617fb3bd914SBorislav Petkov (AMD) help 2618fb3bd914SBorislav Petkov (AMD) Enable the SRSO mitigation needed on AMD Zen1-4 machines. 2619fb3bd914SBorislav Petkov (AMD) 26207b75782fSBreno Leitaoconfig MITIGATION_SLS 2621f43b9876SPeter Zijlstra bool "Mitigate Straight-Line-Speculation" 2622f43b9876SPeter Zijlstra depends on CC_HAS_SLS && X86_64 2623f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2624f43b9876SPeter Zijlstra default n 2625f43b9876SPeter Zijlstra help 2626f43b9876SPeter Zijlstra Compile the kernel with straight-line-speculation options to guard 2627f43b9876SPeter Zijlstra against straight line speculation. The kernel image might be slightly 2628f43b9876SPeter Zijlstra larger. 2629f43b9876SPeter Zijlstra 2630225f2bd0SBreno Leitaoconfig MITIGATION_GDS 2631225f2bd0SBreno Leitao bool "Mitigate Gather Data Sampling" 2632225f2bd0SBreno Leitao depends on CPU_SUP_INTEL 2633225f2bd0SBreno Leitao default y 2634225f2bd0SBreno Leitao help 2635225f2bd0SBreno Leitao Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware 2636225f2bd0SBreno Leitao vulnerability which allows unprivileged speculative access to data 2637225f2bd0SBreno Leitao which was previously stored in vector registers. The attacker uses gather 2638225f2bd0SBreno Leitao instructions to infer the stale vector register data. 2639225f2bd0SBreno Leitao 26408076fcdeSPawan Guptaconfig MITIGATION_RFDS 26418076fcdeSPawan Gupta bool "RFDS Mitigation" 26428076fcdeSPawan Gupta depends on CPU_SUP_INTEL 26438076fcdeSPawan Gupta default y 26448076fcdeSPawan Gupta help 26458076fcdeSPawan Gupta Enable mitigation for Register File Data Sampling (RFDS) by default. 26468076fcdeSPawan Gupta RFDS is a hardware vulnerability which affects Intel Atom CPUs. It 26478076fcdeSPawan Gupta allows unprivileged speculative access to stale data previously 26488076fcdeSPawan Gupta stored in floating point, vector and integer registers. 26498076fcdeSPawan Gupta See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst> 26508076fcdeSPawan Gupta 26514f511739SJosh Poimboeufconfig MITIGATION_SPECTRE_BHI 26524f511739SJosh Poimboeuf bool "Mitigate Spectre-BHB (Branch History Injection)" 2653ec9404e4SPawan Gupta depends on CPU_SUP_INTEL 26544f511739SJosh Poimboeuf default y 2655ec9404e4SPawan Gupta help 2656ec9404e4SPawan Gupta Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks 2657ec9404e4SPawan Gupta where the branch history buffer is poisoned to speculatively steer 2658ec9404e4SPawan Gupta indirect branches. 2659ec9404e4SPawan Gupta See <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2660ec9404e4SPawan Gupta 266194045568SBreno Leitaoconfig MITIGATION_MDS 266294045568SBreno Leitao bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug" 266394045568SBreno Leitao depends on CPU_SUP_INTEL 266494045568SBreno Leitao default y 266594045568SBreno Leitao help 266694045568SBreno Leitao Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is 266794045568SBreno Leitao a hardware vulnerability which allows unprivileged speculative access 266894045568SBreno Leitao to data which is available in various CPU internal buffers. 266994045568SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/mds.rst> 2670b8da0b33SBreno Leitao 2671b8da0b33SBreno Leitaoconfig MITIGATION_TAA 2672b8da0b33SBreno Leitao bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug" 2673b8da0b33SBreno Leitao depends on CPU_SUP_INTEL 2674b8da0b33SBreno Leitao default y 2675b8da0b33SBreno Leitao help 2676b8da0b33SBreno Leitao Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware 2677b8da0b33SBreno Leitao vulnerability that allows unprivileged speculative access to data 2678b8da0b33SBreno Leitao which is available in various CPU internal buffers by using 2679b8da0b33SBreno Leitao asynchronous aborts within an Intel TSX transactional region. 2680b8da0b33SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst> 2681163f9fe6SBreno Leitao 2682163f9fe6SBreno Leitaoconfig MITIGATION_MMIO_STALE_DATA 2683163f9fe6SBreno Leitao bool "Mitigate MMIO Stale Data hardware bug" 2684163f9fe6SBreno Leitao depends on CPU_SUP_INTEL 2685163f9fe6SBreno Leitao default y 2686163f9fe6SBreno Leitao help 2687163f9fe6SBreno Leitao Enable mitigation for MMIO Stale Data hardware bugs. Processor MMIO 2688163f9fe6SBreno Leitao Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO) 2689163f9fe6SBreno Leitao vulnerabilities that can expose data. The vulnerabilities require the 2690163f9fe6SBreno Leitao attacker to have access to MMIO. 2691163f9fe6SBreno Leitao See also 2692163f9fe6SBreno Leitao <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst> 26933a4ee4ffSBreno Leitao 26943a4ee4ffSBreno Leitaoconfig MITIGATION_L1TF 26953a4ee4ffSBreno Leitao bool "Mitigate L1 Terminal Fault (L1TF) hardware bug" 26963a4ee4ffSBreno Leitao depends on CPU_SUP_INTEL 26973a4ee4ffSBreno Leitao default y 26983a4ee4ffSBreno Leitao help 26993a4ee4ffSBreno Leitao Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a 27003a4ee4ffSBreno Leitao hardware vulnerability which allows unprivileged speculative access to data 27013a4ee4ffSBreno Leitao available in the Level 1 Data Cache. 27023a4ee4ffSBreno Leitao See <file:Documentation/admin-guide/hw-vuln/l1tf.rst 2703894e2885SBreno Leitao 2704894e2885SBreno Leitaoconfig MITIGATION_RETBLEED 2705894e2885SBreno Leitao bool "Mitigate RETBleed hardware bug" 2706894e2885SBreno Leitao depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY 2707894e2885SBreno Leitao default y 2708894e2885SBreno Leitao help 2709894e2885SBreno Leitao Enable mitigation for RETBleed (Arbitrary Speculative Code Execution 2710894e2885SBreno Leitao with Return Instructions) vulnerability. RETBleed is a speculative 2711894e2885SBreno Leitao execution attack which takes advantage of microarchitectural behavior 2712894e2885SBreno Leitao in many modern microprocessors, similar to Spectre v2. An 2713894e2885SBreno Leitao unprivileged attacker can use these flaws to bypass conventional 2714894e2885SBreno Leitao memory security restrictions to gain read access to privileged memory 2715894e2885SBreno Leitao that would otherwise be inaccessible. 2716ca01c0d8SBreno Leitao 2717ca01c0d8SBreno Leitaoconfig MITIGATION_SPECTRE_V1 2718ca01c0d8SBreno Leitao bool "Mitigate SPECTRE V1 hardware bug" 2719ca01c0d8SBreno Leitao default y 2720ca01c0d8SBreno Leitao help 2721ca01c0d8SBreno Leitao Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a 2722ca01c0d8SBreno Leitao class of side channel attacks that takes advantage of speculative 2723ca01c0d8SBreno Leitao execution that bypasses conditional branch instructions used for 2724ca01c0d8SBreno Leitao memory access bounds check. 2725ca01c0d8SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2726a0b02e3fSBreno Leitao 272772c70f48SBreno Leitaoconfig MITIGATION_SPECTRE_V2 272872c70f48SBreno Leitao bool "Mitigate SPECTRE V2 hardware bug" 272972c70f48SBreno Leitao default y 273072c70f48SBreno Leitao help 273172c70f48SBreno Leitao Enable mitigation for Spectre V2 (Branch Target Injection). Spectre 273272c70f48SBreno Leitao V2 is a class of side channel attacks that takes advantage of 273372c70f48SBreno Leitao indirect branch predictors inside the processor. In Spectre variant 2 273472c70f48SBreno Leitao attacks, the attacker can steer speculative indirect branches in the 273572c70f48SBreno Leitao victim to gadget code by poisoning the branch target buffer of a CPU 273672c70f48SBreno Leitao used for predicting indirect branch addresses. 273772c70f48SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 273872c70f48SBreno Leitao 2739a0b02e3fSBreno Leitaoconfig MITIGATION_SRBDS 2740a0b02e3fSBreno Leitao bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug" 2741a0b02e3fSBreno Leitao depends on CPU_SUP_INTEL 2742a0b02e3fSBreno Leitao default y 2743a0b02e3fSBreno Leitao help 2744a0b02e3fSBreno Leitao Enable mitigation for Special Register Buffer Data Sampling (SRBDS). 2745a0b02e3fSBreno Leitao SRBDS is a hardware vulnerability that allows Microarchitectural Data 2746a0b02e3fSBreno Leitao Sampling (MDS) techniques to infer values returned from special 2747a0b02e3fSBreno Leitao register accesses. An unprivileged user can extract values returned 2748a0b02e3fSBreno Leitao from RDRAND and RDSEED executed on another core or sibling thread 2749a0b02e3fSBreno Leitao using MDS techniques. 2750a0b02e3fSBreno Leitao See also 2751a0b02e3fSBreno Leitao <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst> 2752b908cdabSBreno Leitao 2753b908cdabSBreno Leitaoconfig MITIGATION_SSB 2754b908cdabSBreno Leitao bool "Mitigate Speculative Store Bypass (SSB) hardware bug" 2755b908cdabSBreno Leitao default y 2756b908cdabSBreno Leitao help 2757b908cdabSBreno Leitao Enable mitigation for Speculative Store Bypass (SSB). SSB is a 2758b908cdabSBreno Leitao hardware security vulnerability and its exploitation takes advantage 2759b908cdabSBreno Leitao of speculative execution in a similar way to the Meltdown and Spectre 2760b908cdabSBreno Leitao security vulnerabilities. 2761b908cdabSBreno Leitao 2762f43b9876SPeter Zijlstraendif 2763f43b9876SPeter Zijlstra 27643072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES 27653072e413SMichal Hocko def_bool y 27665c11f00bSDavid Hildenbrand depends on ARCH_ENABLE_MEMORY_HOTPLUG 27673072e413SMichal Hocko 2768da85f865SBjorn Helgaasmenu "Power management and ACPI options" 2769e279b6c1SSam Ravnborg 2770e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER 27713c2362e6SHarvey Harrison def_bool y 277244556530SZhimin Gu depends on HIBERNATION 2773e279b6c1SSam Ravnborg 2774e279b6c1SSam Ravnborgsource "kernel/power/Kconfig" 2775e279b6c1SSam Ravnborg 2776e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig" 2777e279b6c1SSam Ravnborg 2778a6b68076SAndi Kleenconfig X86_APM_BOOT 27796fc108a0SJan Beulich def_bool y 2780282e5aabSPaul Bolle depends on APM 2781a6b68076SAndi Kleen 2782e279b6c1SSam Ravnborgmenuconfig APM 2783e279b6c1SSam Ravnborg tristate "APM (Advanced Power Management) BIOS support" 2784efefa6f6SIngo Molnar depends on X86_32 && PM_SLEEP 2785a7f7f624SMasahiro Yamada help 2786e279b6c1SSam Ravnborg APM is a BIOS specification for saving power using several different 2787e279b6c1SSam Ravnborg techniques. This is mostly useful for battery powered laptops with 2788e279b6c1SSam Ravnborg APM compliant BIOSes. If you say Y here, the system time will be 2789e279b6c1SSam Ravnborg reset after a RESUME operation, the /proc/apm device will provide 2790e279b6c1SSam Ravnborg battery status information, and user-space programs will receive 2791e279b6c1SSam Ravnborg notification of APM "events" (e.g. battery status change). 2792e279b6c1SSam Ravnborg 2793e279b6c1SSam Ravnborg If you select "Y" here, you can disable actual use of the APM 2794e279b6c1SSam Ravnborg BIOS by passing the "apm=off" option to the kernel at boot time. 2795e279b6c1SSam Ravnborg 2796e279b6c1SSam Ravnborg Note that the APM support is almost completely disabled for 2797e279b6c1SSam Ravnborg machines with more than one CPU. 2798e279b6c1SSam Ravnborg 2799e279b6c1SSam Ravnborg In order to use APM, you will need supporting software. For location 2800151f4e2bSMauro Carvalho Chehab and more information, read <file:Documentation/power/apm-acpi.rst> 28012dc98fd3SMichael Witten and the Battery Powered Linux mini-HOWTO, available from 2802e279b6c1SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 2803e279b6c1SSam Ravnborg 2804e279b6c1SSam Ravnborg This driver does not spin down disk drives (see the hdparm(8) 2805e279b6c1SSam Ravnborg manpage ("man 8 hdparm") for that), and it doesn't turn off 2806e279b6c1SSam Ravnborg VESA-compliant "green" monitors. 2807e279b6c1SSam Ravnborg 2808e279b6c1SSam Ravnborg This driver does not support the TI 4000M TravelMate and the ACER 2809e279b6c1SSam Ravnborg 486/DX4/75 because they don't have compliant BIOSes. Many "green" 2810e279b6c1SSam Ravnborg desktop machines also don't have compliant BIOSes, and this driver 2811e279b6c1SSam Ravnborg may cause those machines to panic during the boot phase. 2812e279b6c1SSam Ravnborg 2813e279b6c1SSam Ravnborg Generally, if you don't have a battery in your machine, there isn't 2814e279b6c1SSam Ravnborg much point in using this driver and you should say N. If you get 2815e279b6c1SSam Ravnborg random kernel OOPSes or reboots that don't seem to be related to 2816e279b6c1SSam Ravnborg anything, try disabling/enabling this option (or disabling/enabling 2817e279b6c1SSam Ravnborg APM in your BIOS). 2818e279b6c1SSam Ravnborg 2819e279b6c1SSam Ravnborg Some other things you should try when experiencing seemingly random, 2820e279b6c1SSam Ravnborg "weird" problems: 2821e279b6c1SSam Ravnborg 2822e279b6c1SSam Ravnborg 1) make sure that you have enough swap space and that it is 2823e279b6c1SSam Ravnborg enabled. 28247987448fSStephen Kitt 2) pass the "idle=poll" option to the kernel 2825e279b6c1SSam Ravnborg 3) switch on floating point emulation in the kernel and pass 2826e279b6c1SSam Ravnborg the "no387" option to the kernel 2827e279b6c1SSam Ravnborg 4) pass the "floppy=nodma" option to the kernel 2828e279b6c1SSam Ravnborg 5) pass the "mem=4M" option to the kernel (thereby disabling 2829e279b6c1SSam Ravnborg all but the first 4 MB of RAM) 2830e279b6c1SSam Ravnborg 6) make sure that the CPU is not over clocked. 2831e279b6c1SSam Ravnborg 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/> 2832e279b6c1SSam Ravnborg 8) disable the cache from your BIOS settings 2833e279b6c1SSam Ravnborg 9) install a fan for the video card or exchange video RAM 2834e279b6c1SSam Ravnborg 10) install a better fan for the CPU 2835e279b6c1SSam Ravnborg 11) exchange RAM chips 2836e279b6c1SSam Ravnborg 12) exchange the motherboard. 2837e279b6c1SSam Ravnborg 2838e279b6c1SSam Ravnborg To compile this driver as a module, choose M here: the 2839e279b6c1SSam Ravnborg module will be called apm. 2840e279b6c1SSam Ravnborg 2841e279b6c1SSam Ravnborgif APM 2842e279b6c1SSam Ravnborg 2843e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND 2844e279b6c1SSam Ravnborg bool "Ignore USER SUSPEND" 2845a7f7f624SMasahiro Yamada help 2846e279b6c1SSam Ravnborg This option will ignore USER SUSPEND requests. On machines with a 2847e279b6c1SSam Ravnborg compliant APM BIOS, you want to say N. However, on the NEC Versa M 2848e279b6c1SSam Ravnborg series notebooks, it is necessary to say Y because of a BIOS bug. 2849e279b6c1SSam Ravnborg 2850e279b6c1SSam Ravnborgconfig APM_DO_ENABLE 2851e279b6c1SSam Ravnborg bool "Enable PM at boot time" 2852a7f7f624SMasahiro Yamada help 2853e279b6c1SSam Ravnborg Enable APM features at boot time. From page 36 of the APM BIOS 2854e279b6c1SSam Ravnborg specification: "When disabled, the APM BIOS does not automatically 2855e279b6c1SSam Ravnborg power manage devices, enter the Standby State, enter the Suspend 2856e279b6c1SSam Ravnborg State, or take power saving steps in response to CPU Idle calls." 2857e279b6c1SSam Ravnborg This driver will make CPU Idle calls when Linux is idle (unless this 2858e279b6c1SSam Ravnborg feature is turned off -- see "Do CPU IDLE calls", below). This 2859e279b6c1SSam Ravnborg should always save battery power, but more complicated APM features 2860e279b6c1SSam Ravnborg will be dependent on your BIOS implementation. You may need to turn 2861e279b6c1SSam Ravnborg this option off if your computer hangs at boot time when using APM 2862e279b6c1SSam Ravnborg support, or if it beeps continuously instead of suspending. Turn 2863e279b6c1SSam Ravnborg this off if you have a NEC UltraLite Versa 33/C or a Toshiba 2864e279b6c1SSam Ravnborg T400CDT. This is off by default since most machines do fine without 2865e279b6c1SSam Ravnborg this feature. 2866e279b6c1SSam Ravnborg 2867e279b6c1SSam Ravnborgconfig APM_CPU_IDLE 2868dd8af076SLen Brown depends on CPU_IDLE 2869e279b6c1SSam Ravnborg bool "Make CPU Idle calls when idle" 2870a7f7f624SMasahiro Yamada help 2871e279b6c1SSam Ravnborg Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. 2872e279b6c1SSam Ravnborg On some machines, this can activate improved power savings, such as 2873e279b6c1SSam Ravnborg a slowed CPU clock rate, when the machine is idle. These idle calls 2874e279b6c1SSam Ravnborg are made after the idle loop has run for some length of time (e.g., 2875e279b6c1SSam Ravnborg 333 mS). On some machines, this will cause a hang at boot time or 2876e279b6c1SSam Ravnborg whenever the CPU becomes idle. (On machines with more than one CPU, 2877e279b6c1SSam Ravnborg this option does nothing.) 2878e279b6c1SSam Ravnborg 2879e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK 2880e279b6c1SSam Ravnborg bool "Enable console blanking using APM" 2881a7f7f624SMasahiro Yamada help 2882e279b6c1SSam Ravnborg Enable console blanking using the APM. Some laptops can use this to 2883e279b6c1SSam Ravnborg turn off the LCD backlight when the screen blanker of the Linux 2884e279b6c1SSam Ravnborg virtual console blanks the screen. Note that this is only used by 2885e279b6c1SSam Ravnborg the virtual console screen blanker, and won't turn off the backlight 2886e279b6c1SSam Ravnborg when using the X Window system. This also doesn't have anything to 2887e279b6c1SSam Ravnborg do with your VESA-compliant power-saving monitor. Further, this 2888e279b6c1SSam Ravnborg option doesn't work for all laptops -- it might not turn off your 2889e279b6c1SSam Ravnborg backlight at all, or it might print a lot of errors to the console, 2890e279b6c1SSam Ravnborg especially if you are using gpm. 2891e279b6c1SSam Ravnborg 2892e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS 2893e279b6c1SSam Ravnborg bool "Allow interrupts during APM BIOS calls" 2894a7f7f624SMasahiro Yamada help 2895e279b6c1SSam Ravnborg Normally we disable external interrupts while we are making calls to 2896e279b6c1SSam Ravnborg the APM BIOS as a measure to lessen the effects of a badly behaving 2897e279b6c1SSam Ravnborg BIOS implementation. The BIOS should reenable interrupts if it 2898e279b6c1SSam Ravnborg needs to. Unfortunately, some BIOSes do not -- especially those in 2899e279b6c1SSam Ravnborg many of the newer IBM Thinkpads. If you experience hangs when you 2900e279b6c1SSam Ravnborg suspend, try setting this to Y. Otherwise, say N. 2901e279b6c1SSam Ravnborg 2902e279b6c1SSam Ravnborgendif # APM 2903e279b6c1SSam Ravnborg 2904bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig" 2905e279b6c1SSam Ravnborg 2906e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig" 2907e279b6c1SSam Ravnborg 290827471fdbSAndy Henroidsource "drivers/idle/Kconfig" 290927471fdbSAndy Henroid 2910e279b6c1SSam Ravnborgendmenu 2911e279b6c1SSam Ravnborg 2912e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)" 2913e279b6c1SSam Ravnborg 2914e279b6c1SSam Ravnborgchoice 2915e279b6c1SSam Ravnborg prompt "PCI access mode" 2916efefa6f6SIngo Molnar depends on X86_32 && PCI 2917e279b6c1SSam Ravnborg default PCI_GOANY 2918a7f7f624SMasahiro Yamada help 2919e279b6c1SSam Ravnborg On PCI systems, the BIOS can be used to detect the PCI devices and 2920e279b6c1SSam Ravnborg determine their configuration. However, some old PCI motherboards 2921e279b6c1SSam Ravnborg have BIOS bugs and may crash if this is done. Also, some embedded 2922e279b6c1SSam Ravnborg PCI-based systems don't have any BIOS at all. Linux can also try to 2923e279b6c1SSam Ravnborg detect the PCI hardware directly without using the BIOS. 2924e279b6c1SSam Ravnborg 2925e279b6c1SSam Ravnborg With this option, you can specify how Linux should detect the 2926e279b6c1SSam Ravnborg PCI devices. If you choose "BIOS", the BIOS will be used, 2927e279b6c1SSam Ravnborg if you choose "Direct", the BIOS won't be used, and if you 2928e279b6c1SSam Ravnborg choose "MMConfig", then PCI Express MMCONFIG will be used. 2929e279b6c1SSam Ravnborg If you choose "Any", the kernel will try MMCONFIG, then the 2930e279b6c1SSam Ravnborg direct access method and falls back to the BIOS if that doesn't 2931e279b6c1SSam Ravnborg work. If unsure, go with the default, which is "Any". 2932e279b6c1SSam Ravnborg 2933e279b6c1SSam Ravnborgconfig PCI_GOBIOS 2934e279b6c1SSam Ravnborg bool "BIOS" 2935e279b6c1SSam Ravnborg 2936e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG 2937e279b6c1SSam Ravnborg bool "MMConfig" 2938e279b6c1SSam Ravnborg 2939e279b6c1SSam Ravnborgconfig PCI_GODIRECT 2940e279b6c1SSam Ravnborg bool "Direct" 2941e279b6c1SSam Ravnborg 29423ef0e1f8SAndres Salomonconfig PCI_GOOLPC 294376fb6570SDaniel Drake bool "OLPC XO-1" 29443ef0e1f8SAndres Salomon depends on OLPC 29453ef0e1f8SAndres Salomon 29462bdd1b03SAndres Salomonconfig PCI_GOANY 29472bdd1b03SAndres Salomon bool "Any" 29482bdd1b03SAndres Salomon 2949e279b6c1SSam Ravnborgendchoice 2950e279b6c1SSam Ravnborg 2951e279b6c1SSam Ravnborgconfig PCI_BIOS 29523c2362e6SHarvey Harrison def_bool y 2953efefa6f6SIngo Molnar depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY) 2954e279b6c1SSam Ravnborg 2955e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct. 2956e279b6c1SSam Ravnborgconfig PCI_DIRECT 29573c2362e6SHarvey Harrison def_bool y 29580aba496fSShaohua Li depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG)) 2959e279b6c1SSam Ravnborg 2960e279b6c1SSam Ravnborgconfig PCI_MMCONFIG 2961b45c9f36SJan Kiszka bool "Support mmconfig PCI config space access" if X86_64 2962b45c9f36SJan Kiszka default y 29634590d98fSAndy Shevchenko depends on PCI && (ACPI || JAILHOUSE_GUEST) 2964b45c9f36SJan Kiszka depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG) 2965e279b6c1SSam Ravnborg 29663ef0e1f8SAndres Salomonconfig PCI_OLPC 29672bdd1b03SAndres Salomon def_bool y 29682bdd1b03SAndres Salomon depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY) 29693ef0e1f8SAndres Salomon 2970b5401a96SAlex Nixonconfig PCI_XEN 2971b5401a96SAlex Nixon def_bool y 2972b5401a96SAlex Nixon depends on PCI && XEN 2973b5401a96SAlex Nixon 29748364e1f8SJan Kiszkaconfig MMCONF_FAM10H 29758364e1f8SJan Kiszka def_bool y 29768364e1f8SJan Kiszka depends on X86_64 && PCI_MMCONFIG && ACPI 2977e279b6c1SSam Ravnborg 29783f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK 29796a108a14SDavid Rientjes bool "Read CNB20LE Host Bridge Windows" if EXPERT 29806ea30386SKees Cook depends on PCI 29813f6ea84aSIra W. Snyder help 29823f6ea84aSIra W. Snyder Read the PCI windows out of the CNB20LE host bridge. This allows 29833f6ea84aSIra W. Snyder PCI hotplug to work on systems with the CNB20LE chipset which do 29843f6ea84aSIra W. Snyder not have ACPI. 29853f6ea84aSIra W. Snyder 298664a5fed6SBjorn Helgaas There's no public spec for this chipset, and this functionality 298764a5fed6SBjorn Helgaas is known to be incomplete. 298864a5fed6SBjorn Helgaas 298964a5fed6SBjorn Helgaas You should say N unless you know you need this. 299064a5fed6SBjorn Helgaas 29913a495511SWilliam Breathitt Grayconfig ISA_BUS 299217a2a129SWilliam Breathitt Gray bool "ISA bus support on modern systems" if EXPERT 29933a495511SWilliam Breathitt Gray help 299417a2a129SWilliam Breathitt Gray Expose ISA bus device drivers and options available for selection and 299517a2a129SWilliam Breathitt Gray configuration. Enable this option if your target machine has an ISA 299617a2a129SWilliam Breathitt Gray bus. ISA is an older system, displaced by PCI and newer bus 299717a2a129SWilliam Breathitt Gray architectures -- if your target machine is modern, it probably does 299817a2a129SWilliam Breathitt Gray not have an ISA bus. 29993a495511SWilliam Breathitt Gray 30003a495511SWilliam Breathitt Gray If unsure, say N. 30013a495511SWilliam Breathitt Gray 30021c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA. 3003e279b6c1SSam Ravnborgconfig ISA_DMA_API 30041c00f016SDavid Rientjes bool "ISA-style DMA support" if (X86_64 && EXPERT) 30051c00f016SDavid Rientjes default y 30061c00f016SDavid Rientjes help 30071c00f016SDavid Rientjes Enables ISA-style DMA support for devices requiring such controllers. 30081c00f016SDavid Rientjes If unsure, say Y. 3009e279b6c1SSam Ravnborg 301051e68d05SLinus Torvaldsif X86_32 301151e68d05SLinus Torvalds 3012e279b6c1SSam Ravnborgconfig ISA 3013e279b6c1SSam Ravnborg bool "ISA support" 3014a7f7f624SMasahiro Yamada help 3015e279b6c1SSam Ravnborg Find out whether you have ISA slots on your motherboard. ISA is the 3016e279b6c1SSam Ravnborg name of a bus system, i.e. the way the CPU talks to the other stuff 3017e279b6c1SSam Ravnborg inside your box. Other bus systems are PCI, EISA, MicroChannel 3018e279b6c1SSam Ravnborg (MCA) or VESA. ISA is an older system, now being displaced by PCI; 3019e279b6c1SSam Ravnborg newer boards don't support it. If you have ISA, say Y, otherwise N. 3020e279b6c1SSam Ravnborg 3021e279b6c1SSam Ravnborgconfig SCx200 3022e279b6c1SSam Ravnborg tristate "NatSemi SCx200 support" 3023a7f7f624SMasahiro Yamada help 3024e279b6c1SSam Ravnborg This provides basic support for National Semiconductor's 3025e279b6c1SSam Ravnborg (now AMD's) Geode processors. The driver probes for the 3026e279b6c1SSam Ravnborg PCI-IDs of several on-chip devices, so its a good dependency 3027e279b6c1SSam Ravnborg for other scx200_* drivers. 3028e279b6c1SSam Ravnborg 3029e279b6c1SSam Ravnborg If compiled as a module, the driver is named scx200. 3030e279b6c1SSam Ravnborg 3031e279b6c1SSam Ravnborgconfig SCx200HR_TIMER 3032e279b6c1SSam Ravnborg tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" 3033592913ecSJohn Stultz depends on SCx200 3034e279b6c1SSam Ravnborg default y 3035a7f7f624SMasahiro Yamada help 3036e279b6c1SSam Ravnborg This driver provides a clocksource built upon the on-chip 3037e279b6c1SSam Ravnborg 27MHz high-resolution timer. Its also a workaround for 3038e279b6c1SSam Ravnborg NSC Geode SC-1100's buggy TSC, which loses time when the 3039e279b6c1SSam Ravnborg processor goes idle (as is done by the scheduler). The 3040e279b6c1SSam Ravnborg other workaround is idle=poll boot option. 3041e279b6c1SSam Ravnborg 30423ef0e1f8SAndres Salomonconfig OLPC 30433ef0e1f8SAndres Salomon bool "One Laptop Per Child support" 304454008979SThomas Gleixner depends on !X86_PAE 30453c554946SAndres Salomon select GPIOLIB 3046dc3119e7SThomas Gleixner select OF 304745bb1674SDaniel Drake select OF_PROMTREE 3048b4e51854SGrant Likely select IRQ_DOMAIN 30490c3d931bSLubomir Rintel select OLPC_EC 3050a7f7f624SMasahiro Yamada help 30513ef0e1f8SAndres Salomon Add support for detecting the unique features of the OLPC 30523ef0e1f8SAndres Salomon XO hardware. 30533ef0e1f8SAndres Salomon 3054a3128588SDaniel Drakeconfig OLPC_XO1_PM 3055a3128588SDaniel Drake bool "OLPC XO-1 Power Management" 3056fa112cf1SBorislav Petkov depends on OLPC && MFD_CS5535=y && PM_SLEEP 3057a7f7f624SMasahiro Yamada help 305897c4cb71SDaniel Drake Add support for poweroff and suspend of the OLPC XO-1 laptop. 3059bf1ebf00SDaniel Drake 3060cfee9597SDaniel Drakeconfig OLPC_XO1_RTC 3061cfee9597SDaniel Drake bool "OLPC XO-1 Real Time Clock" 3062cfee9597SDaniel Drake depends on OLPC_XO1_PM && RTC_DRV_CMOS 3063a7f7f624SMasahiro Yamada help 3064cfee9597SDaniel Drake Add support for the XO-1 real time clock, which can be used as a 3065cfee9597SDaniel Drake programmable wakeup source. 3066cfee9597SDaniel Drake 30677feda8e9SDaniel Drakeconfig OLPC_XO1_SCI 30687feda8e9SDaniel Drake bool "OLPC XO-1 SCI extras" 306992e830f2SArnd Bergmann depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y 3070ed8e47feSRandy Dunlap depends on INPUT=y 3071d8d01a63SDaniel Drake select POWER_SUPPLY 3072a7f7f624SMasahiro Yamada help 30737feda8e9SDaniel Drake Add support for SCI-based features of the OLPC XO-1 laptop: 30747bc74b3dSDaniel Drake - EC-driven system wakeups 30757feda8e9SDaniel Drake - Power button 30767bc74b3dSDaniel Drake - Ebook switch 30772cf2baeaSDaniel Drake - Lid switch 3078e1040ac6SDaniel Drake - AC adapter status updates 3079e1040ac6SDaniel Drake - Battery status updates 30807feda8e9SDaniel Drake 3081a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI 3082a0f30f59SDaniel Drake bool "OLPC XO-1.5 SCI extras" 3083d8d01a63SDaniel Drake depends on OLPC && ACPI 3084d8d01a63SDaniel Drake select POWER_SUPPLY 3085a7f7f624SMasahiro Yamada help 3086a0f30f59SDaniel Drake Add support for SCI-based features of the OLPC XO-1.5 laptop: 3087a0f30f59SDaniel Drake - EC-driven system wakeups 3088a0f30f59SDaniel Drake - AC adapter status updates 3089a0f30f59SDaniel Drake - Battery status updates 3090e279b6c1SSam Ravnborg 3091298c9babSDmitry Torokhovconfig GEODE_COMMON 3092298c9babSDmitry Torokhov bool 3093298c9babSDmitry Torokhov 3094d4f3e350SEd Wildgooseconfig ALIX 3095d4f3e350SEd Wildgoose bool "PCEngines ALIX System Support (LED setup)" 3096d4f3e350SEd Wildgoose select GPIOLIB 3097298c9babSDmitry Torokhov select GEODE_COMMON 3098a7f7f624SMasahiro Yamada help 3099d4f3e350SEd Wildgoose This option enables system support for the PCEngines ALIX. 3100d4f3e350SEd Wildgoose At present this just sets up LEDs for GPIO control on 3101d4f3e350SEd Wildgoose ALIX2/3/6 boards. However, other system specific setup should 3102d4f3e350SEd Wildgoose get added here. 3103d4f3e350SEd Wildgoose 3104d4f3e350SEd Wildgoose Note: You must still enable the drivers for GPIO and LED support 3105d4f3e350SEd Wildgoose (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs 3106d4f3e350SEd Wildgoose 3107d4f3e350SEd Wildgoose Note: You have to set alix.force=1 for boards with Award BIOS. 3108d4f3e350SEd Wildgoose 3109da4e3302SPhilip Prindevilleconfig NET5501 3110da4e3302SPhilip Prindeville bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)" 3111da4e3302SPhilip Prindeville select GPIOLIB 3112298c9babSDmitry Torokhov select GEODE_COMMON 3113a7f7f624SMasahiro Yamada help 3114da4e3302SPhilip Prindeville This option enables system support for the Soekris Engineering net5501. 3115da4e3302SPhilip Prindeville 31163197059aSPhilip A. Prindevilleconfig GEOS 31173197059aSPhilip A. Prindeville bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)" 31183197059aSPhilip A. Prindeville select GPIOLIB 3119298c9babSDmitry Torokhov select GEODE_COMMON 31203197059aSPhilip A. Prindeville depends on DMI 3121a7f7f624SMasahiro Yamada help 31223197059aSPhilip A. Prindeville This option enables system support for the Traverse Technologies GEOS. 31233197059aSPhilip A. Prindeville 31247d029125SVivien Didelotconfig TS5500 31257d029125SVivien Didelot bool "Technologic Systems TS-5500 platform support" 31267d029125SVivien Didelot depends on MELAN 31277d029125SVivien Didelot select CHECK_SIGNATURE 31287d029125SVivien Didelot select NEW_LEDS 31297d029125SVivien Didelot select LEDS_CLASS 3130a7f7f624SMasahiro Yamada help 31317d029125SVivien Didelot This option enables system support for the Technologic Systems TS-5500. 31327d029125SVivien Didelot 3133e279b6c1SSam Ravnborgendif # X86_32 3134e279b6c1SSam Ravnborg 313523ac4ae8SAndreas Herrmannconfig AMD_NB 3136e279b6c1SSam Ravnborg def_bool y 3137e6e6e5e8SYazen Ghannam depends on AMD_NODE 3138e6e6e5e8SYazen Ghannam 3139e6e6e5e8SYazen Ghannamconfig AMD_NODE 3140e6e6e5e8SYazen Ghannam def_bool y 31410e152cd7SBorislav Petkov depends on CPU_SUP_AMD && PCI 3142e279b6c1SSam Ravnborg 3143e279b6c1SSam Ravnborgendmenu 3144e279b6c1SSam Ravnborg 31451572497cSChristoph Hellwigmenu "Binary Emulations" 3146e279b6c1SSam Ravnborg 3147e279b6c1SSam Ravnborgconfig IA32_EMULATION 3148e279b6c1SSam Ravnborg bool "IA32 Emulation" 3149e279b6c1SSam Ravnborg depends on X86_64 315039f88911SIngo Molnar select ARCH_WANT_OLD_COMPAT_IPC 3151d1603990SRandy Dunlap select BINFMT_ELF 315239f88911SIngo Molnar select COMPAT_OLD_SIGACTION 3153a7f7f624SMasahiro Yamada help 31545fd92e65SH. J. Lu Include code to run legacy 32-bit programs under a 31555fd92e65SH. J. Lu 64-bit kernel. You should likely turn this on, unless you're 31565fd92e65SH. J. Lu 100% sure that you don't have any 32-bit programs left. 3157e279b6c1SSam Ravnborg 3158a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED 3159a11e0975SNikolay Borisov bool "IA32 emulation disabled by default" 3160a11e0975SNikolay Borisov default n 3161a11e0975SNikolay Borisov depends on IA32_EMULATION 3162a11e0975SNikolay Borisov help 3163a11e0975SNikolay Borisov Make IA32 emulation disabled by default. This prevents loading 32-bit 3164a11e0975SNikolay Borisov processes and access to 32-bit syscalls. If unsure, leave it to its 3165a11e0975SNikolay Borisov default value. 3166a11e0975SNikolay Borisov 316783a44a4fSMasahiro Yamadaconfig X86_X32_ABI 31686ea30386SKees Cook bool "x32 ABI for 64-bit mode" 31699b54050bSBrian Gerst depends on X86_64 3170aaeed6ecSNathan Chancellor # llvm-objcopy does not convert x86_64 .note.gnu.property or 3171aaeed6ecSNathan Chancellor # compressed debug sections to x86_x32 properly: 3172aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/514 3173aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/1141 3174aaeed6ecSNathan Chancellor depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm) 3175a7f7f624SMasahiro Yamada help 31765fd92e65SH. J. Lu Include code to run binaries for the x32 native 32-bit ABI 31775fd92e65SH. J. Lu for 64-bit processors. An x32 process gets access to the 31785fd92e65SH. J. Lu full 64-bit register file and wide data path while leaving 31795fd92e65SH. J. Lu pointers at 32 bits for smaller memory footprint. 31805fd92e65SH. J. Lu 3181953fee1dSIngo Molnarconfig COMPAT_32 3182953fee1dSIngo Molnar def_bool y 3183953fee1dSIngo Molnar depends on IA32_EMULATION || X86_32 3184953fee1dSIngo Molnar select HAVE_UID16 3185953fee1dSIngo Molnar select OLD_SIGSUSPEND3 3186953fee1dSIngo Molnar 3187e279b6c1SSam Ravnborgconfig COMPAT 31883c2362e6SHarvey Harrison def_bool y 318983a44a4fSMasahiro Yamada depends on IA32_EMULATION || X86_X32_ABI 3190e279b6c1SSam Ravnborg 3191e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT 31923120e25eSJan Beulich def_bool y 3193a9251280SLinus Torvalds depends on COMPAT 3194ee009e4aSDavid Howells 3195e279b6c1SSam Ravnborgendmenu 3196e279b6c1SSam Ravnborg 3197e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP 3198e5beae16SKeith Packard def_bool y 3199e5beae16SKeith Packard depends on X86_32 3200e5beae16SKeith Packard 3201edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig" 32025e8ebd84SJason A. Donenfeld 32035e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler" 3204