xref: /linux/arch/x86/Kconfig (revision 976ba8da2f3c2f1e997f4f620da83ae65c0e3728)
1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0
2daa93fabSSam Ravnborg# Select 32 or 64 bit
3daa93fabSSam Ravnborgconfig 64BIT
4104daea1SMasahiro Yamada	bool "64-bit kernel" if "$(ARCH)" = "x86"
5104daea1SMasahiro Yamada	default "$(ARCH)" != "i386"
6a7f7f624SMasahiro Yamada	help
7daa93fabSSam Ravnborg	  Say yes to build a 64-bit kernel - formerly known as x86_64
8daa93fabSSam Ravnborg	  Say no to build a 32-bit kernel - formerly known as i386
9daa93fabSSam Ravnborg
10daa93fabSSam Ravnborgconfig X86_32
113120e25eSJan Beulich	def_bool y
123120e25eSJan Beulich	depends on !64BIT
13341c787eSIngo Molnar	# Options that are inherently 32-bit kernel only:
14341c787eSIngo Molnar	select ARCH_WANT_IPC_PARSE_VERSION
15341c787eSIngo Molnar	select CLKSRC_I8253
16341c787eSIngo Molnar	select CLONE_BACKWARDS
17157e118bSThomas Gleixner	select GENERIC_VDSO_32
18117ed454SThomas Gleixner	select HAVE_DEBUG_STACKOVERFLOW
19157e118bSThomas Gleixner	select KMAP_LOCAL
20341c787eSIngo Molnar	select MODULES_USE_ELF_REL
21341c787eSIngo Molnar	select OLD_SIGACTION
222ca408d9SBrian Gerst	select ARCH_SPLIT_ARG64
23daa93fabSSam Ravnborg
24daa93fabSSam Ravnborgconfig X86_64
253120e25eSJan Beulich	def_bool y
263120e25eSJan Beulich	depends on 64BIT
27d94e0685SIngo Molnar	# Options that are inherently 64-bit kernel only:
284eb0716eSAlexandre Ghiti	select ARCH_HAS_GIGANTIC_PAGE
29c12d3362SArd Biesheuvel	select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
300bff0aaeSSuren Baghdasaryan	select ARCH_SUPPORTS_PER_VMA_LOCK
3175182022SPeter Xu	select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE
32d94e0685SIngo Molnar	select HAVE_ARCH_SOFT_DIRTY
33d94e0685SIngo Molnar	select MODULES_USE_ELF_RELA
34f616ab59SChristoph Hellwig	select NEED_DMA_MAP_STATE
3509230cbcSChristoph Hellwig	select SWIOTLB
367facdc42SAl Viro	select ARCH_HAS_ELFCORE_COMPAT
3763703f37SKefeng Wang	select ZONE_DMA32
3814e56fb2SMike Rapoport (IBM)	select EXECMEM if DYNAMIC_FTRACE
391032c0baSSam Ravnborg
40518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE
41518049d9SSteven Rostedt (VMware)	def_bool y
42518049d9SSteven Rostedt (VMware)	depends on X86_32
43518049d9SSteven Rostedt (VMware)	depends on FUNCTION_TRACER
44518049d9SSteven Rostedt (VMware)	select DYNAMIC_FTRACE
45518049d9SSteven Rostedt (VMware)	help
46518049d9SSteven Rostedt (VMware)	  We keep the static function tracing (!DYNAMIC_FTRACE) around
47518049d9SSteven Rostedt (VMware)	  in order to test the non static function tracing in the
48518049d9SSteven Rostedt (VMware)	  generic code, as other architectures still use it. But we
49518049d9SSteven Rostedt (VMware)	  only need to keep it around for x86_64. No need to keep it
50518049d9SSteven Rostedt (VMware)	  for x86_32. For x86_32, force DYNAMIC_FTRACE.
51d94e0685SIngo Molnar#
52d94e0685SIngo Molnar# Arch settings
53d94e0685SIngo Molnar#
54d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be
55d94e0685SIngo Molnar#   ported to 32-bit as well. )
56d94e0685SIngo Molnar#
578d5fffb9SSam Ravnborgconfig X86
583c2362e6SHarvey Harrison	def_bool y
59c763ea26SIngo Molnar	#
60c763ea26SIngo Molnar	# Note: keep this list sorted alphabetically
61c763ea26SIngo Molnar	#
626471b825SIngo Molnar	select ACPI_LEGACY_TABLES_LOOKUP	if ACPI
636e0a0ea1SGraeme Gregory	select ACPI_SYSTEM_POWER_STATES_SUPPORT	if ACPI
64a02f66bbSJames Morse	select ACPI_HOTPLUG_CPU			if ACPI_PROCESSOR && HOTPLUG_CPU
65942fa985SYury Norov	select ARCH_32BIT_OFF_T			if X86_32
662a21ad57SThomas Gleixner	select ARCH_CLOCKSOURCE_INIT
67fe42754bSSean Christopherson	select ARCH_CONFIGURES_CPU_MITIGATIONS
681f6d3a8fSMasami Hiramatsu	select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE
691e866974SAnshuman Khandual	select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION
705c11f00bSDavid Hildenbrand	select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64
7191024b3cSAnshuman Khandual	select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
72cebc774fSAnshuman Khandual	select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE)
731e866974SAnshuman Khandual	select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE
7491dda51aSAleksey Makarov	select ARCH_HAS_ACPI_TABLE_UPGRADE	if ACPI
75c2280be8SAnshuman Khandual	select ARCH_HAS_CACHE_LINE_SIZE
761156b441SDavidlohr Bueso	select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
777c7077a7SThomas Gleixner	select ARCH_HAS_CPU_FINALIZE_INIT
788f23f5dbSJason Gunthorpe	select ARCH_HAS_CPU_PASID		if IOMMU_SVA
7955d1ecceSEric Biggers	select ARCH_HAS_CRC32
80ed4bc981SEric Biggers	select ARCH_HAS_CRC_T10DIF		if X86_64
812792d84eSKees Cook	select ARCH_HAS_CURRENT_STACK_POINTER
82fa5b6ec9SLaura Abbott	select ARCH_HAS_DEBUG_VIRTUAL
83399145f9SAnshuman Khandual	select ARCH_HAS_DEBUG_VM_PGTABLE	if !X86_PAE
8421266be9SDan Williams	select ARCH_HAS_DEVMEM_IS_ALLOWED
85de6c85bfSChristoph Hellwig	select ARCH_HAS_DMA_OPS			if GART_IOMMU || XEN
86b1a57bbfSDouglas Anderson	select ARCH_HAS_EARLY_DEBUG		if KGDB
876471b825SIngo Molnar	select ARCH_HAS_ELF_RANDOMIZE
8864f6a4e1SMike Rapoport (Microsoft)	select ARCH_HAS_EXECMEM_ROX		if X86_64
8972d93104SLinus Torvalds	select ARCH_HAS_FAST_MULTIPLIER
906974f0c4SDaniel Micay	select ARCH_HAS_FORTIFY_SOURCE
91957e3facSRiku Voipio	select ARCH_HAS_GCOV_PROFILE_ALL
92bece04b5SMarco Elver	select ARCH_HAS_KCOV			if X86_64
93b0b8a15bSSamuel Holland	select ARCH_HAS_KERNEL_FPU_SUPPORT
940c9c1d56SThiago Jung Bauermann	select ARCH_HAS_MEM_ENCRYPT
9510bcc80eSMathieu Desnoyers	select ARCH_HAS_MEMBARRIER_SYNC_CORE
9649f88c70SPaul E. McKenney	select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
970ebeea8cSDaniel Borkmann	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
98c763ea26SIngo Molnar	select ARCH_HAS_PMEM_API		if X86_64
99476e8583SPeter Zijlstra	select ARCH_HAS_PREEMPT_LAZY
10017596731SRobin Murphy	select ARCH_HAS_PTE_DEVMAP		if X86_64
1013010a5eaSLaurent Dufour	select ARCH_HAS_PTE_SPECIAL
10271ce1ab5SKinsey Ho	select ARCH_HAS_HW_PTE_YOUNG
103eed9a328SYu Zhao	select ARCH_HAS_NONLEAF_PMD_YOUNG	if PGTABLE_LEVELS > 2
1040aed55afSDan Williams	select ARCH_HAS_UACCESS_FLUSHCACHE	if X86_64
105ec6347bbSDan Williams	select ARCH_HAS_COPY_MC			if X86_64
106d2852a22SDaniel Borkmann	select ARCH_HAS_SET_MEMORY
107d253ca0cSRick Edgecombe	select ARCH_HAS_SET_DIRECT_MAP
108ad21fc4fSLaura Abbott	select ARCH_HAS_STRICT_KERNEL_RWX
109ad21fc4fSLaura Abbott	select ARCH_HAS_STRICT_MODULE_RWX
110ac1ab12aSMathieu Desnoyers	select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE
11125c619e5SBrian Gerst	select ARCH_HAS_SYSCALL_WRAPPER
112918327e9SKees Cook	select ARCH_HAS_UBSAN
1137e01ccb4SZong Li	select ARCH_HAS_DEBUG_WX
11463703f37SKefeng Wang	select ARCH_HAS_ZONE_DMA_SET if EXPERT
1156471b825SIngo Molnar	select ARCH_HAVE_NMI_SAFE_CMPXCHG
116ba386777SVignesh Balasubramanian	select ARCH_HAVE_EXTRA_ELF_NOTES
11704d5ea46SAneesh Kumar K.V	select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE
1186471b825SIngo Molnar	select ARCH_MIGHT_HAVE_ACPI_PDC		if ACPI
11977fbbc81SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
1205e2c18c0SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
1213599fe12SThomas Gleixner	select ARCH_STACKWALK
1222c870e61SArnd Bergmann	select ARCH_SUPPORTS_ACPI
1236471b825SIngo Molnar	select ARCH_SUPPORTS_ATOMIC_RMW
1245d6ad668SMike Rapoport	select ARCH_SUPPORTS_DEBUG_PAGEALLOC
125d283d422SPasha Tatashin	select ARCH_SUPPORTS_PAGE_TABLE_CHECK	if X86_64
1266471b825SIngo Molnar	select ARCH_SUPPORTS_NUMA_BALANCING	if X86_64
12714df3267SThomas Gleixner	select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP	if NR_CPUS <= 4096
1283c516f89SSami Tolvanen	select ARCH_SUPPORTS_CFI_CLANG		if X86_64
1293c516f89SSami Tolvanen	select ARCH_USES_CFI_TRAPS		if X86_64 && CFI_CLANG
130583bfd48SNathan Chancellor	select ARCH_SUPPORTS_LTO_CLANG
131583bfd48SNathan Chancellor	select ARCH_SUPPORTS_LTO_CLANG_THIN
132d2d6422fSSebastian Andrzej Siewior	select ARCH_SUPPORTS_RT
133315ad878SRong Xu	select ARCH_SUPPORTS_AUTOFDO_CLANG
134d5dc9583SRong Xu	select ARCH_SUPPORTS_PROPELLER_CLANG    if X86_64
1356471b825SIngo Molnar	select ARCH_USE_BUILTIN_BSWAP
136a432b7c0SUros Bizjak	select ARCH_USE_CMPXCHG_LOCKREF		if X86_CMPXCHG64
137dce44566SAnshuman Khandual	select ARCH_USE_MEMTEST
1386471b825SIngo Molnar	select ARCH_USE_QUEUED_RWLOCKS
1396471b825SIngo Molnar	select ARCH_USE_QUEUED_SPINLOCKS
1402ce0d7f9SMark Brown	select ARCH_USE_SYM_ANNOTATIONS
141ce4a4e56SAndy Lutomirski	select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
14281c22041SDaniel Borkmann	select ARCH_WANT_DEFAULT_BPF_JIT	if X86_64
143c763ea26SIngo Molnar	select ARCH_WANTS_DYNAMIC_TASK_STRUCT
14451c2ee6dSNick Desaulniers	select ARCH_WANTS_NO_INSTR
14507431506SAnshuman Khandual	select ARCH_WANT_GENERAL_HUGETLB
1463876d4a3SAlexandre Ghiti	select ARCH_WANT_HUGE_PMD_SHARE
14759612b24SNathan Chancellor	select ARCH_WANT_LD_ORPHAN_WARN
1480b6f1582SAneesh Kumar K.V	select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP	if X86_64
1490b6f1582SAneesh Kumar K.V	select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP	if X86_64
15038d8b4e6SHuang Ying	select ARCH_WANTS_THP_SWAP		if X86_64
151b5f06f64SBalbir Singh	select ARCH_HAS_PARANOID_L1D_FLUSH
15210916706SShile Zhang	select BUILDTIME_TABLE_SORT
1536471b825SIngo Molnar	select CLKEVT_I8253
1546471b825SIngo Molnar	select CLOCKSOURCE_WATCHDOG
1557cf8f44aSAlexander Potapenko	# Word-size accesses may read uninitialized data past the trailing \0
1567cf8f44aSAlexander Potapenko	# in strings and cause false KMSAN reports.
1577cf8f44aSAlexander Potapenko	select DCACHE_WORD_ACCESS		if !KMSAN
1583aac3ebeSThomas Gleixner	select DYNAMIC_SIGFRAME
15945471cd9SLinus Torvalds	select EDAC_ATOMIC_SCRUB
16045471cd9SLinus Torvalds	select EDAC_SUPPORT
1616471b825SIngo Molnar	select GENERIC_CLOCKEVENTS_BROADCAST	if X86_64 || (X86_32 && X86_LOCAL_APIC)
162cb81deefSThomas Gleixner	select GENERIC_CLOCKEVENTS_BROADCAST_IDLE	if GENERIC_CLOCKEVENTS_BROADCAST
1636471b825SIngo Molnar	select GENERIC_CLOCKEVENTS_MIN_ADJUST
1646471b825SIngo Molnar	select GENERIC_CMOS_UPDATE
1656471b825SIngo Molnar	select GENERIC_CPU_AUTOPROBE
1665b95f94cSJames Morse	select GENERIC_CPU_DEVICES
16761dc0f55SThomas Gleixner	select GENERIC_CPU_VULNERABILITIES
1686471b825SIngo Molnar	select GENERIC_EARLY_IOREMAP
16927d6b4d1SThomas Gleixner	select GENERIC_ENTRY
1706471b825SIngo Molnar	select GENERIC_IOMAP
171c7d6c9ddSThomas Gleixner	select GENERIC_IRQ_EFFECTIVE_AFF_MASK	if SMP
1720fa115daSThomas Gleixner	select GENERIC_IRQ_MATRIX_ALLOCATOR	if X86_LOCAL_APIC
173ad7a929fSThomas Gleixner	select GENERIC_IRQ_MIGRATION		if SMP
1746471b825SIngo Molnar	select GENERIC_IRQ_PROBE
175c201c917SThomas Gleixner	select GENERIC_IRQ_RESERVATION_MODE
1766471b825SIngo Molnar	select GENERIC_IRQ_SHOW
1776471b825SIngo Molnar	select GENERIC_PENDING_IRQ		if SMP
1782ae27137SSteven Price	select GENERIC_PTDUMP
1796471b825SIngo Molnar	select GENERIC_SMP_IDLE_THREAD
1806471b825SIngo Molnar	select GENERIC_TIME_VSYSCALL
1817ac87074SVincenzo Frascino	select GENERIC_GETTIMEOFDAY
182550a77a7SDmitry Safonov	select GENERIC_VDSO_TIME_NS
1837e90ffb7SAdrian Hunter	select GENERIC_VDSO_OVERFLOW_PROTECT
1846ca297d4SPeter Zijlstra	select GUP_GET_PXX_LOW_HIGH		if X86_PAE
18517e5888eSHans de Goede	select HARDIRQS_SW_RESEND
1867edaeb68SThomas Gleixner	select HARDLOCKUP_CHECK_TIMESTAMP	if X86_64
187fcbfe812SNiklas Schnelle	select HAS_IOPORT
1886471b825SIngo Molnar	select HAVE_ACPI_APEI			if ACPI
1896471b825SIngo Molnar	select HAVE_ACPI_APEI_NMI		if ACPI
1902a19be61SVlastimil Babka	select HAVE_ALIGNED_STRUCT_PAGE
1916471b825SIngo Molnar	select HAVE_ARCH_AUDITSYSCALL
1926471b825SIngo Molnar	select HAVE_ARCH_HUGE_VMAP		if X86_64 || X86_PAE
193eed1fceeSSong Liu	select HAVE_ARCH_HUGE_VMALLOC		if X86_64
1946471b825SIngo Molnar	select HAVE_ARCH_JUMP_LABEL
195b34006c4SArd Biesheuvel	select HAVE_ARCH_JUMP_LABEL_RELATIVE
196d17a1d97SAndrey Ryabinin	select HAVE_ARCH_KASAN			if X86_64
1970609ae01SDaniel Axtens	select HAVE_ARCH_KASAN_VMALLOC		if X86_64
1981dc0da6eSAlexander Potapenko	select HAVE_ARCH_KFENCE
1994ca8cc8dSAlexander Potapenko	select HAVE_ARCH_KMSAN			if X86_64
2006471b825SIngo Molnar	select HAVE_ARCH_KGDB
2019e08f57dSDaniel Cashman	select HAVE_ARCH_MMAP_RND_BITS		if MMU
2029e08f57dSDaniel Cashman	select HAVE_ARCH_MMAP_RND_COMPAT_BITS	if MMU && COMPAT
2031b028f78SDmitry Safonov	select HAVE_ARCH_COMPAT_MMAP_BASES	if MMU && COMPAT
204271ca788SArd Biesheuvel	select HAVE_ARCH_PREL32_RELOCATIONS
2056471b825SIngo Molnar	select HAVE_ARCH_SECCOMP_FILTER
206f7d83c1cSKees Cook	select HAVE_ARCH_THREAD_STRUCT_WHITELIST
207afaef01cSAlexander Popov	select HAVE_ARCH_STACKLEAK
2086471b825SIngo Molnar	select HAVE_ARCH_TRACEHOOK
2096471b825SIngo Molnar	select HAVE_ARCH_TRANSPARENT_HUGEPAGE
210a00cc7d9SMatthew Wilcox	select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64
211b64d8d1eSPeter Xu	select HAVE_ARCH_USERFAULTFD_WP         if X86_64 && USERFAULTFD
2127677f7fdSAxel Rasmussen	select HAVE_ARCH_USERFAULTFD_MINOR	if X86_64 && USERFAULTFD
213e37e43a4SAndy Lutomirski	select HAVE_ARCH_VMAP_STACK		if X86_64
214fe950f60SKees Cook	select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
215c763ea26SIngo Molnar	select HAVE_ARCH_WITHIN_STACK_FRAMES
2162ff2b7ecSMasahiro Yamada	select HAVE_ASM_MODVERSIONS
2176471b825SIngo Molnar	select HAVE_CMPXCHG_DOUBLE
2186471b825SIngo Molnar	select HAVE_CMPXCHG_LOCAL
21924a9c541SFrederic Weisbecker	select HAVE_CONTEXT_TRACKING_USER		if X86_64
22024a9c541SFrederic Weisbecker	select HAVE_CONTEXT_TRACKING_USER_OFFSTACK	if HAVE_CONTEXT_TRACKING_USER
2216471b825SIngo Molnar	select HAVE_C_RECORDMCOUNT
22203f16cd0SJosh Poimboeuf	select HAVE_OBJTOOL_MCOUNT		if HAVE_OBJTOOL
223280981d6SSathvika Vasireddy	select HAVE_OBJTOOL_NOP_MCOUNT		if HAVE_OBJTOOL_MCOUNT
2244ed308c4SSteven Rostedt (Google)	select HAVE_BUILDTIME_MCOUNT_SORT
2256471b825SIngo Molnar	select HAVE_DEBUG_KMEMLEAK
2269c5a3621SAkinobu Mita	select HAVE_DMA_CONTIGUOUS
227677aa9f7SSteven Rostedt	select HAVE_DYNAMIC_FTRACE
22806aeaaeaSMasami Hiramatsu	select HAVE_DYNAMIC_FTRACE_WITH_REGS
22902a474caSSteven Rostedt (VMware)	select HAVE_DYNAMIC_FTRACE_WITH_ARGS	if X86_64
230762abbc0SMasami Hiramatsu (Google)	select HAVE_FTRACE_REGS_HAVING_PT_REGS	if X86_64
231562955feSSteven Rostedt (VMware)	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
232c316eb44SHeiko Carstens	select HAVE_SAMPLE_FTRACE_DIRECT	if X86_64
233503e4510SHeiko Carstens	select HAVE_SAMPLE_FTRACE_DIRECT_MULTI	if X86_64
23403f5781bSWang YanQing	select HAVE_EBPF_JIT
23558340a07SJohannes Berg	select HAVE_EFFICIENT_UNALIGNED_ACCESS
236*976ba8daSArnd Bergmann	select HAVE_EISA			if X86_32
2375f56a5dfSJiri Slaby	select HAVE_EXIT_THREAD
23825176ad0SDavid Hildenbrand	select HAVE_GUP_FAST
239644e0e8dSSteven Rostedt (VMware)	select HAVE_FENTRY			if X86_64 || DYNAMIC_FTRACE
240a762e926SMasami Hiramatsu (Google)	select HAVE_FTRACE_GRAPH_FUNC		if HAVE_FUNCTION_GRAPH_TRACER
2416471b825SIngo Molnar	select HAVE_FTRACE_MCOUNT_RECORD
242a3ed4157SMasami Hiramatsu (Google)	select HAVE_FUNCTION_GRAPH_FREGS	if HAVE_FUNCTION_GRAPH_TRACER
2434a30e4c9SSteven Rostedt (VMware)	select HAVE_FUNCTION_GRAPH_TRACER	if X86_32 || (X86_64 && DYNAMIC_FTRACE)
2446471b825SIngo Molnar	select HAVE_FUNCTION_TRACER
2456b90bd4bSEmese Revfy	select HAVE_GCC_PLUGINS
2460067f129SK.Prasad	select HAVE_HW_BREAKPOINT
2476471b825SIngo Molnar	select HAVE_IOREMAP_PROT
248624db9eaSThomas Gleixner	select HAVE_IRQ_EXIT_ON_IRQ_STACK	if X86_64
2496471b825SIngo Molnar	select HAVE_IRQ_TIME_ACCOUNTING
2504ab7674fSJosh Poimboeuf	select HAVE_JUMP_LABEL_HACK		if HAVE_OBJTOOL
2516471b825SIngo Molnar	select HAVE_KERNEL_BZIP2
2526471b825SIngo Molnar	select HAVE_KERNEL_GZIP
2536471b825SIngo Molnar	select HAVE_KERNEL_LZ4
2546471b825SIngo Molnar	select HAVE_KERNEL_LZMA
2556471b825SIngo Molnar	select HAVE_KERNEL_LZO
2566471b825SIngo Molnar	select HAVE_KERNEL_XZ
257fb46d057SNick Terrell	select HAVE_KERNEL_ZSTD
2586471b825SIngo Molnar	select HAVE_KPROBES
2596471b825SIngo Molnar	select HAVE_KPROBES_ON_FTRACE
260540adea3SMasami Hiramatsu	select HAVE_FUNCTION_ERROR_INJECTION
2616471b825SIngo Molnar	select HAVE_KRETPROBES
262f3a112c0SMasami Hiramatsu	select HAVE_RETHOOK
2636471b825SIngo Molnar	select HAVE_LIVEPATCH			if X86_64
2640102752eSFrederic Weisbecker	select HAVE_MIXED_BREAKPOINTS_REGS
265ee9f8fceSJosh Poimboeuf	select HAVE_MOD_ARCH_SPECIFIC
2669f132f7eSJoel Fernandes (Google)	select HAVE_MOVE_PMD
267be37c98dSKalesh Singh	select HAVE_MOVE_PUD
26822102f45SJosh Poimboeuf	select HAVE_NOINSTR_HACK		if HAVE_OBJTOOL
26942a0bb3fSPetr Mladek	select HAVE_NMI
270489e355bSJosh Poimboeuf	select HAVE_NOINSTR_VALIDATION		if HAVE_OBJTOOL
27103f16cd0SJosh Poimboeuf	select HAVE_OBJTOOL			if X86_64
2726471b825SIngo Molnar	select HAVE_OPTPROBES
2735394f1e9SArnd Bergmann	select HAVE_PAGE_SIZE_4KB
2746471b825SIngo Molnar	select HAVE_PCSPKR_PLATFORM
2756471b825SIngo Molnar	select HAVE_PERF_EVENTS
276c01d4323SFrederic Weisbecker	select HAVE_PERF_EVENTS_NMI
27792e5aae4SNicholas Piggin	select HAVE_HARDLOCKUP_DETECTOR_PERF	if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
278eb01d42aSChristoph Hellwig	select HAVE_PCI
279c5e63197SJiri Olsa	select HAVE_PERF_REGS
280c5ebcedbSJiri Olsa	select HAVE_PERF_USER_STACK_DUMP
281a3725973SRik van Riel	select MMU_GATHER_RCU_TABLE_FREE
2821e9fdf21SPeter Zijlstra	select MMU_GATHER_MERGE_VMAS
28300998085SThomas Gleixner	select HAVE_POSIX_CPU_TIMERS_TASK_WORK
2846471b825SIngo Molnar	select HAVE_REGS_AND_STACK_ACCESS_API
28503f16cd0SJosh Poimboeuf	select HAVE_RELIABLE_STACKTRACE		if UNWINDER_ORC || STACK_VALIDATION
2863c88ee19SMasami Hiramatsu	select HAVE_FUNCTION_ARG_ACCESS_API
2877ecd19cfSKefeng Wang	select HAVE_SETUP_PER_CPU_AREA
288cd1a41ceSThomas Gleixner	select HAVE_SOFTIRQ_ON_OWN_STACK
289d148eac0SMasahiro Yamada	select HAVE_STACKPROTECTOR		if CC_HAS_SANE_STACKPROTECTOR
29003f16cd0SJosh Poimboeuf	select HAVE_STACK_VALIDATION		if HAVE_OBJTOOL
291e6d6c071SJosh Poimboeuf	select HAVE_STATIC_CALL
29203f16cd0SJosh Poimboeuf	select HAVE_STATIC_CALL_INLINE		if HAVE_OBJTOOL
29399cf983cSMark Rutland	select HAVE_PREEMPT_DYNAMIC_CALL
294d6761b8fSMathieu Desnoyers	select HAVE_RSEQ
29509498135SMiguel Ojeda	select HAVE_RUST			if X86_64
2966471b825SIngo Molnar	select HAVE_SYSCALL_TRACEPOINTS
2975f3da8c0SJosh Poimboeuf	select HAVE_UACCESS_VALIDATION		if HAVE_OBJTOOL
2986471b825SIngo Molnar	select HAVE_UNSTABLE_SCHED_CLOCK
2997c68af6eSAvi Kivity	select HAVE_USER_RETURN_NOTIFIER
3007ac87074SVincenzo Frascino	select HAVE_GENERIC_VDSO
30133385150SJason A. Donenfeld	select VDSO_GETRANDOM			if X86_64
3020c7ffa32SThomas Gleixner	select HOTPLUG_PARALLEL			if SMP && X86_64
30305736e4aSThomas Gleixner	select HOTPLUG_SMT			if SMP
3040c7ffa32SThomas Gleixner	select HOTPLUG_SPLIT_STARTUP		if SMP && X86_32
305c0185808SThomas Gleixner	select IRQ_FORCED_THREADING
306c2508ec5SLinus Torvalds	select LOCK_MM_AND_FIND_VMA
3077ecd19cfSKefeng Wang	select NEED_PER_CPU_EMBED_FIRST_CHUNK
3087ecd19cfSKefeng Wang	select NEED_PER_CPU_PAGE_FIRST_CHUNK
30986596f0aSChristoph Hellwig	select NEED_SG_DMA_LENGTH
31087482708SMike Rapoport (Microsoft)	select NUMA_MEMBLKS			if NUMA
3112eac9c2dSChristoph Hellwig	select PCI_DOMAINS			if PCI
312625210cfSSinan Kaya	select PCI_LOCKLESS_CONFIG		if PCI
3136471b825SIngo Molnar	select PERF_EVENTS
3143195ef59SPrarit Bhargava	select RTC_LIB
315d6faca40SArnd Bergmann	select RTC_MC146818_LIB
3166471b825SIngo Molnar	select SPARSE_IRQ
3176471b825SIngo Molnar	select SYSCTL_EXCEPTION_TRACE
31815f4eae7SAndy Lutomirski	select THREAD_INFO_IN_TASK
3194aae683fSMasahiro Yamada	select TRACE_IRQFLAGS_SUPPORT
3204510bffbSMark Rutland	select TRACE_IRQFLAGS_NMI_SUPPORT
3216471b825SIngo Molnar	select USER_STACKTRACE_SUPPORT
3223b02a051SIngo Molnar	select HAVE_ARCH_KCSAN			if X86_64
3230c608dadSAubrey Li	select PROC_PID_ARCH_STATUS		if PROC_FS
32450468e43SJarkko Sakkinen	select HAVE_ARCH_NODE_DEV_GROUP		if X86_SGX
325d49a0626SPeter Zijlstra	select FUNCTION_ALIGNMENT_16B		if X86_64 || X86_ALIGNMENT_16
326d49a0626SPeter Zijlstra	select FUNCTION_ALIGNMENT_4B
3279e2b4be3SNayna Jain	imply IMA_SECURE_AND_OR_TRUSTED_BOOT    if EFI
328ceea991aSJiri Olsa	select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE
3294817f70cSQi Zheng	select ARCH_SUPPORTS_PT_RECLAIM		if X86_64
3307d8330a5SBalbir Singh
331ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER
3323120e25eSJan Beulich	def_bool y
3333120e25eSJan Beulich	depends on KPROBES || PERF_EVENTS || UPROBES
334ba7e4d13SIngo Molnar
33551b26adaSLinus Torvaldsconfig OUTPUT_FORMAT
33651b26adaSLinus Torvalds	string
33751b26adaSLinus Torvalds	default "elf32-i386" if X86_32
33851b26adaSLinus Torvalds	default "elf64-x86-64" if X86_64
33951b26adaSLinus Torvalds
3408d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT
3413c2362e6SHarvey Harrison	def_bool y
3428d5fffb9SSam Ravnborg
3438d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT
3443c2362e6SHarvey Harrison	def_bool y
3458d5fffb9SSam Ravnborg
3468d5fffb9SSam Ravnborgconfig MMU
3473c2362e6SHarvey Harrison	def_bool y
3488d5fffb9SSam Ravnborg
3499e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN
3509e08f57dSDaniel Cashman	default 28 if 64BIT
3519e08f57dSDaniel Cashman	default 8
3529e08f57dSDaniel Cashman
3539e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX
3549e08f57dSDaniel Cashman	default 32 if 64BIT
3559e08f57dSDaniel Cashman	default 16
3569e08f57dSDaniel Cashman
3579e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN
3589e08f57dSDaniel Cashman	default 8
3599e08f57dSDaniel Cashman
3609e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX
3619e08f57dSDaniel Cashman	default 16
3629e08f57dSDaniel Cashman
3638d5fffb9SSam Ravnborgconfig SBUS
3648d5fffb9SSam Ravnborg	bool
3658d5fffb9SSam Ravnborg
3668d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA
3673120e25eSJan Beulich	def_bool y
3683120e25eSJan Beulich	depends on ISA_DMA_API
3698d5fffb9SSam Ravnborg
370d911c67eSAlexander Potapenkoconfig GENERIC_CSUM
371d911c67eSAlexander Potapenko	bool
372d911c67eSAlexander Potapenko	default y if KMSAN || KASAN
373d911c67eSAlexander Potapenko
3748d5fffb9SSam Ravnborgconfig GENERIC_BUG
3753c2362e6SHarvey Harrison	def_bool y
3768d5fffb9SSam Ravnborg	depends on BUG
377b93a531eSJan Beulich	select GENERIC_BUG_RELATIVE_POINTERS if X86_64
378b93a531eSJan Beulich
379b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS
380b93a531eSJan Beulich	bool
3818d5fffb9SSam Ravnborg
3828d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC
3833120e25eSJan Beulich	def_bool y
3843120e25eSJan Beulich	depends on ISA_DMA_API
3858d5fffb9SSam Ravnborg
3861032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY
3871032c0baSSam Ravnborg	def_bool y
3881032c0baSSam Ravnborg
3899a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX
3909a0b8415Svenkatesh.pallipadi@intel.com	def_bool y
3918d5fffb9SSam Ravnborg
392801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE
393801e4062SJohannes Berg	def_bool y
394801e4062SJohannes Berg
395f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
396f4cb5700SJohannes Berg	def_bool y
397f4cb5700SJohannes Berg
3988d5fffb9SSam Ravnborgconfig AUDIT_ARCH
399e0fd24a3SJan Beulich	def_bool y if X86_64
4008d5fffb9SSam Ravnborg
401d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET
402d6f2d75aSAndrey Ryabinin	hex
403d6f2d75aSAndrey Ryabinin	depends on KASAN
404d6f2d75aSAndrey Ryabinin	default 0xdffffc0000000000
405d6f2d75aSAndrey Ryabinin
40669575d38SShane Wangconfig HAVE_INTEL_TXT
40769575d38SShane Wang	def_bool y
4086ea30386SKees Cook	depends on INTEL_IOMMU && ACPI
40969575d38SShane Wang
4106b0c3d44SSam Ravnborgconfig X86_64_SMP
4116b0c3d44SSam Ravnborg	def_bool y
4126b0c3d44SSam Ravnborg	depends on X86_64 && SMP
4136b0c3d44SSam Ravnborg
4142b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES
4152b144498SSrikar Dronamraju	def_bool y
4162b144498SSrikar Dronamraju
417d20642f0SRob Herringconfig FIX_EARLYCON_MEM
418d20642f0SRob Herring	def_bool y
419d20642f0SRob Herring
42094d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK
42194d49eb3SKirill A. Shutemov	bool
42294d49eb3SKirill A. Shutemov
42398233368SKirill A. Shutemovconfig PGTABLE_LEVELS
42498233368SKirill A. Shutemov	int
42577ef56e4SKirill A. Shutemov	default 5 if X86_5LEVEL
42698233368SKirill A. Shutemov	default 4 if X86_64
42798233368SKirill A. Shutemov	default 3 if X86_PAE
42898233368SKirill A. Shutemov	default 2
42998233368SKirill A. Shutemov
4302a61f474SMasahiro Yamadaconfig CC_HAS_SANE_STACKPROTECTOR
4312a61f474SMasahiro Yamada	bool
4321b866781SNathan Chancellor	default $(success,$(srctree)/scripts/gcc-x86_64-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) if 64BIT
4331b866781SNathan Chancellor	default $(success,$(srctree)/scripts/gcc-x86_32-has-stack-protector.sh $(CC) $(CLANG_FLAGS))
4342a61f474SMasahiro Yamada	help
4352a61f474SMasahiro Yamada	  We have to make sure stack protector is unconditionally disabled if
4363fb0fdb3SAndy Lutomirski	  the compiler produces broken code or if it does not let us control
4373fb0fdb3SAndy Lutomirski	  the segment on 32-bit kernels.
4382a61f474SMasahiro Yamada
439506f1d07SSam Ravnborgmenu "Processor type and features"
440506f1d07SSam Ravnborg
441506f1d07SSam Ravnborgconfig SMP
442506f1d07SSam Ravnborg	bool "Symmetric multi-processing support"
443a7f7f624SMasahiro Yamada	help
444506f1d07SSam Ravnborg	  This enables support for systems with more than one CPU. If you have
4454a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
4464a474157SRobert Graffham	  than one CPU, say Y.
447506f1d07SSam Ravnborg
4484a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
449506f1d07SSam Ravnborg	  machines, but will use only one CPU of a multiprocessor machine. If
450506f1d07SSam Ravnborg	  you say Y here, the kernel will run on many, but not all,
4514a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
452506f1d07SSam Ravnborg	  will run faster if you say N here.
453506f1d07SSam Ravnborg
454506f1d07SSam Ravnborg	  Note that if you say Y here and choose architecture "586" or
455506f1d07SSam Ravnborg	  "Pentium" under "Processor family", the kernel will not work on 486
456506f1d07SSam Ravnborg	  architectures. Similarly, multiprocessor kernels for the "PPro"
457506f1d07SSam Ravnborg	  architecture may not work on all Pentium based boards.
458506f1d07SSam Ravnborg
459506f1d07SSam Ravnborg	  People using multiprocessor machines who say Y here should also say
460506f1d07SSam Ravnborg	  Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
461506f1d07SSam Ravnborg	  Management" code will be disabled if you say Y here.
462506f1d07SSam Ravnborg
463ff61f079SJonathan Corbet	  See also <file:Documentation/arch/x86/i386/IO-APIC.rst>,
4644f4cfa6cSMauro Carvalho Chehab	  <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
465506f1d07SSam Ravnborg	  <http://www.tldp.org/docs.html#howto>.
466506f1d07SSam Ravnborg
467506f1d07SSam Ravnborg	  If you don't know what to do here, say N.
468506f1d07SSam Ravnborg
46906cd9a7dSYinghai Luconfig X86_X2APIC
47006cd9a7dSYinghai Lu	bool "Support x2apic"
47119e3d60dSJan Kiszka	depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
472a7f7f624SMasahiro Yamada	help
47306cd9a7dSYinghai Lu	  This enables x2apic support on CPUs that have this feature.
47406cd9a7dSYinghai Lu
47506cd9a7dSYinghai Lu	  This allows 32-bit apic IDs (so it can support very large systems),
47606cd9a7dSYinghai Lu	  and accesses the local apic via MSRs not via mmio.
47706cd9a7dSYinghai Lu
478b8d1d163SDaniel Sneddon	  Some Intel systems circa 2022 and later are locked into x2APIC mode
479b8d1d163SDaniel Sneddon	  and can not fall back to the legacy APIC modes if SGX or TDX are
480e3998434SMateusz Jończyk	  enabled in the BIOS. They will boot with very reduced functionality
481e3998434SMateusz Jończyk	  without enabling this option.
482b8d1d163SDaniel Sneddon
48306cd9a7dSYinghai Lu	  If you don't know what to do here, say N.
48406cd9a7dSYinghai Lu
4857fec07fdSJacob Panconfig X86_POSTED_MSI
4867fec07fdSJacob Pan	bool "Enable MSI and MSI-x delivery by posted interrupts"
4877fec07fdSJacob Pan	depends on X86_64 && IRQ_REMAP
4887fec07fdSJacob Pan	help
4897fec07fdSJacob Pan	  This enables MSIs that are under interrupt remapping to be delivered as
4907fec07fdSJacob Pan	  posted interrupts to the host kernel. Interrupt throughput can
4917fec07fdSJacob Pan	  potentially be improved by coalescing CPU notifications during high
4927fec07fdSJacob Pan	  frequency bursts.
4937fec07fdSJacob Pan
4947fec07fdSJacob Pan	  If you don't know what to do here, say N.
4957fec07fdSJacob Pan
4966695c85bSYinghai Luconfig X86_MPPARSE
4974590d98fSAndy Shevchenko	bool "Enable MPS table" if ACPI
4987a527688SJan Beulich	default y
4995ab74722SIngo Molnar	depends on X86_LOCAL_APIC
500a7f7f624SMasahiro Yamada	help
5016695c85bSYinghai Lu	  For old smp systems that do not have proper acpi support. Newer systems
5026695c85bSYinghai Lu	  (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
5036695c85bSYinghai Lu
504e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL
505e6d42931SJohannes Weiner	bool "x86 CPU resource control support"
5066fe07ce3SBabu Moger	depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD)
50759fe5a77SThomas Gleixner	select KERNFS
508e79f15a4SChen Yu	select PROC_CPU_RESCTRL		if PROC_FS
50978e99b4aSFenghua Yu	help
510e6d42931SJohannes Weiner	  Enable x86 CPU resource control support.
5116fe07ce3SBabu Moger
5126fe07ce3SBabu Moger	  Provide support for the allocation and monitoring of system resources
5136fe07ce3SBabu Moger	  usage by the CPU.
5146fe07ce3SBabu Moger
5156fe07ce3SBabu Moger	  Intel calls this Intel Resource Director Technology
5166fe07ce3SBabu Moger	  (Intel(R) RDT). More information about RDT can be found in the
5176fe07ce3SBabu Moger	  Intel x86 Architecture Software Developer Manual.
5186fe07ce3SBabu Moger
5196fe07ce3SBabu Moger	  AMD calls this AMD Platform Quality of Service (AMD QoS).
5206fe07ce3SBabu Moger	  More information about AMD QoS can be found in the AMD64 Technology
5216fe07ce3SBabu Moger	  Platform Quality of Service Extensions manual.
52278e99b4aSFenghua Yu
52378e99b4aSFenghua Yu	  Say N if unsure.
52478e99b4aSFenghua Yu
5252cce9591SH. Peter Anvin (Intel)config X86_FRED
5262cce9591SH. Peter Anvin (Intel)	bool "Flexible Return and Event Delivery"
5272cce9591SH. Peter Anvin (Intel)	depends on X86_64
5282cce9591SH. Peter Anvin (Intel)	help
5292cce9591SH. Peter Anvin (Intel)	  When enabled, try to use Flexible Return and Event Delivery
5302cce9591SH. Peter Anvin (Intel)	  instead of the legacy SYSCALL/SYSENTER/IDT architecture for
5312cce9591SH. Peter Anvin (Intel)	  ring transitions and exception/interrupt handling if the
5323c41786cSPaul Menzel	  system supports it.
5332cce9591SH. Peter Anvin (Intel)
534c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM
535c5c606d9SRavikiran G Thirumalai	bool "Support for extended (non-PC) x86 platforms"
536c5c606d9SRavikiran G Thirumalai	default y
537a7f7f624SMasahiro Yamada	help
53806ac8346SIngo Molnar	  If you disable this option then the kernel will only support
53906ac8346SIngo Molnar	  standard PC platforms. (which covers the vast majority of
54006ac8346SIngo Molnar	  systems out there.)
54106ac8346SIngo Molnar
5428425091fSRavikiran G Thirumalai	  If you enable this option then you'll be able to select support
54371d99ea4SMasahiro Yamada	  for the following non-PC x86 platforms, depending on the value of
54471d99ea4SMasahiro Yamada	  CONFIG_64BIT.
54571d99ea4SMasahiro Yamada
54671d99ea4SMasahiro Yamada	  32-bit platforms (CONFIG_64BIT=n):
547cb7b8023SBen Hutchings		Goldfish (Android emulator)
5488425091fSRavikiran G Thirumalai		AMD Elan
5498425091fSRavikiran G Thirumalai		RDC R-321x SoC
5508425091fSRavikiran G Thirumalai		SGI 320/540 (Visual Workstation)
55106ac8346SIngo Molnar
55271d99ea4SMasahiro Yamada	  64-bit platforms (CONFIG_64BIT=y):
55344b111b5SSteffen Persvold		Numascale NumaChip
5548425091fSRavikiran G Thirumalai		ScaleMP vSMP
5558425091fSRavikiran G Thirumalai		SGI Ultraviolet
556ca5955ddSArnd Bergmann		Merrifield/Moorefield MID devices
5578425091fSRavikiran G Thirumalai
5588425091fSRavikiran G Thirumalai	  If you have one of these systems, or if you want to build a
5598425091fSRavikiran G Thirumalai	  generic distribution kernel, say Y here - otherwise say N.
56071d99ea4SMasahiro Yamada
561c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms
562c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions
56344b111b5SSteffen Persvoldconfig X86_NUMACHIP
56444b111b5SSteffen Persvold	bool "Numascale NumaChip"
56544b111b5SSteffen Persvold	depends on X86_64
56644b111b5SSteffen Persvold	depends on X86_EXTENDED_PLATFORM
56744b111b5SSteffen Persvold	depends on NUMA
56844b111b5SSteffen Persvold	depends on SMP
56944b111b5SSteffen Persvold	depends on X86_X2APIC
570f9726bfdSDaniel J Blueman	depends on PCI_MMCONFIG
571a7f7f624SMasahiro Yamada	help
57244b111b5SSteffen Persvold	  Adds support for Numascale NumaChip large-SMP systems. Needed to
57344b111b5SSteffen Persvold	  enable more than ~168 cores.
57444b111b5SSteffen Persvold	  If you don't have one of these, you should say N here.
57503b48632SNick Piggin
5766a48565eSIngo Molnarconfig X86_VSMP
577c5c606d9SRavikiran G Thirumalai	bool "ScaleMP vSMP"
5786276a074SBorislav Petkov	select HYPERVISOR_GUEST
5796a48565eSIngo Molnar	select PARAVIRT
5806a48565eSIngo Molnar	depends on X86_64 && PCI
581c5c606d9SRavikiran G Thirumalai	depends on X86_EXTENDED_PLATFORM
582ead91d4bSShai Fultheim	depends on SMP
583a7f7f624SMasahiro Yamada	help
5846a48565eSIngo Molnar	  Support for ScaleMP vSMP systems.  Say 'Y' here if this kernel is
5856a48565eSIngo Molnar	  supposed to run on these EM64T-based machines.  Only choose this option
5866a48565eSIngo Molnar	  if you have one of these machines.
5876a48565eSIngo Molnar
588c5c606d9SRavikiran G Thirumalaiconfig X86_UV
589c5c606d9SRavikiran G Thirumalai	bool "SGI Ultraviolet"
590c5c606d9SRavikiran G Thirumalai	depends on X86_64
591c5c606d9SRavikiran G Thirumalai	depends on X86_EXTENDED_PLATFORM
59254c28d29SJack Steiner	depends on NUMA
5931ecb4ae5SAndrew Morton	depends on EFI
594c2209ea5SIngo Molnar	depends on KEXEC_CORE
5959d6c26e7SSuresh Siddha	depends on X86_X2APIC
5961222e564SIngo Molnar	depends on PCI
597a7f7f624SMasahiro Yamada	help
598c5c606d9SRavikiran G Thirumalai	  This option is needed in order to support SGI Ultraviolet systems.
599c5c606d9SRavikiran G Thirumalai	  If you don't have one of these, you should say N here.
600c5c606d9SRavikiran G Thirumalai
601ca5955ddSArnd Bergmannconfig X86_INTEL_MID
602ca5955ddSArnd Bergmann	bool "Intel Z34xx/Z35xx MID platform support"
603ca5955ddSArnd Bergmann	depends on X86_EXTENDED_PLATFORM
604ca5955ddSArnd Bergmann	depends on X86_PLATFORM_DEVICES
605ca5955ddSArnd Bergmann	depends on PCI
606ca5955ddSArnd Bergmann	depends on X86_64 || (EXPERT && PCI_GOANY)
607ca5955ddSArnd Bergmann	depends on X86_IO_APIC
608ca5955ddSArnd Bergmann	select I2C
609ca5955ddSArnd Bergmann	select DW_APB_TIMER
610ca5955ddSArnd Bergmann	select INTEL_SCU_PCI
611ca5955ddSArnd Bergmann	help
612ca5955ddSArnd Bergmann	  Select to build a kernel capable of supporting 64-bit Intel MID
613ca5955ddSArnd Bergmann	  (Mobile Internet Device) platform systems which do not have
614ca5955ddSArnd Bergmann	  the PCI legacy interfaces.
615ca5955ddSArnd Bergmann
616ca5955ddSArnd Bergmann	  The only supported devices are the 22nm Merrified (Z34xx)
617ca5955ddSArnd Bergmann	  and Moorefield (Z35xx) SoC used in the Intel Edison board and
618ca5955ddSArnd Bergmann	  a small number of Android devices such as the Asus Zenfone 2,
619ca5955ddSArnd Bergmann	  Asus FonePad 8 and Dell Venue 7.
620ca5955ddSArnd Bergmann
621ca5955ddSArnd Bergmann	  If you are building for a PC class system or non-MID tablet
622ca5955ddSArnd Bergmann	  SoCs like Bay Trail (Z36xx/Z37xx), say N here.
623ca5955ddSArnd Bergmann
624ca5955ddSArnd Bergmann	  Intel MID platforms are based on an Intel processor and chipset which
625ca5955ddSArnd Bergmann	  consume less power than most of the x86 derivatives.
626506f1d07SSam Ravnborg
627ddd70cf9SJun Nakajimaconfig X86_GOLDFISH
628ddd70cf9SJun Nakajima	bool "Goldfish (Virtual Platform)"
629cb7b8023SBen Hutchings	depends on X86_EXTENDED_PLATFORM
630a7f7f624SMasahiro Yamada	help
631ddd70cf9SJun Nakajima	  Enable support for the Goldfish virtual platform used primarily
632ddd70cf9SJun Nakajima	  for Android development. Unless you are building for the Android
633ddd70cf9SJun Nakajima	  Goldfish emulator say N here.
634ddd70cf9SJun Nakajima
635ca5955ddSArnd Bergmann# Following is an alphabetically sorted list of 32 bit extended platforms
636ca5955ddSArnd Bergmann# Please maintain the alphabetic order if and when there are additions
637ca5955ddSArnd Bergmann
638c751e17bSThomas Gleixnerconfig X86_INTEL_CE
639c751e17bSThomas Gleixner	bool "CE4100 TV platform"
640c751e17bSThomas Gleixner	depends on PCI
641c751e17bSThomas Gleixner	depends on PCI_GODIRECT
6426084a6e2SJiang Liu	depends on X86_IO_APIC
643c751e17bSThomas Gleixner	depends on X86_32
644c751e17bSThomas Gleixner	depends on X86_EXTENDED_PLATFORM
64537bc9f50SDirk Brandewie	select X86_REBOOTFIXUPS
646da6b737bSSebastian Andrzej Siewior	select OF
647da6b737bSSebastian Andrzej Siewior	select OF_EARLY_FLATTREE
648a7f7f624SMasahiro Yamada	help
649c751e17bSThomas Gleixner	  Select for the Intel CE media processor (CE4100) SOC.
650c751e17bSThomas Gleixner	  This option compiles in support for the CE4100 SOC for settop
651c751e17bSThomas Gleixner	  boxes and media devices.
652c751e17bSThomas Gleixner
6538bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK
6548bbc2a13SBryan O'Donoghue	bool "Intel Quark platform support"
6558bbc2a13SBryan O'Donoghue	depends on X86_32
6568bbc2a13SBryan O'Donoghue	depends on X86_EXTENDED_PLATFORM
6578bbc2a13SBryan O'Donoghue	depends on X86_PLATFORM_DEVICES
6588bbc2a13SBryan O'Donoghue	depends on X86_TSC
6598bbc2a13SBryan O'Donoghue	depends on PCI
6608bbc2a13SBryan O'Donoghue	depends on PCI_GOANY
6618bbc2a13SBryan O'Donoghue	depends on X86_IO_APIC
6628bbc2a13SBryan O'Donoghue	select IOSF_MBI
6638bbc2a13SBryan O'Donoghue	select INTEL_IMR
6649ab6eb51SAndy Shevchenko	select COMMON_CLK
665a7f7f624SMasahiro Yamada	help
6668bbc2a13SBryan O'Donoghue	  Select to include support for Quark X1000 SoC.
6678bbc2a13SBryan O'Donoghue	  Say Y here if you have a Quark based system such as the Arduino
6688bbc2a13SBryan O'Donoghue	  compatible Intel Galileo.
6698bbc2a13SBryan O'Donoghue
6703d48aab1SMika Westerbergconfig X86_INTEL_LPSS
6713d48aab1SMika Westerberg	bool "Intel Low Power Subsystem Support"
6725962dd22SSinan Kaya	depends on X86 && ACPI && PCI
6733d48aab1SMika Westerberg	select COMMON_CLK
6740f531431SMathias Nyman	select PINCTRL
675eebb3e8dSAndy Shevchenko	select IOSF_MBI
676a7f7f624SMasahiro Yamada	help
6773d48aab1SMika Westerberg	  Select to build support for Intel Low Power Subsystem such as
6783d48aab1SMika Westerberg	  found on Intel Lynxpoint PCH. Selecting this option enables
6790f531431SMathias Nyman	  things like clock tree (common clock framework) and pincontrol
6800f531431SMathias Nyman	  which are needed by the LPSS peripheral drivers.
6813d48aab1SMika Westerberg
68292082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE
68392082a88SKen Xue	bool "AMD ACPI2Platform devices support"
68492082a88SKen Xue	depends on ACPI
68592082a88SKen Xue	select COMMON_CLK
68692082a88SKen Xue	select PINCTRL
687a7f7f624SMasahiro Yamada	help
68892082a88SKen Xue	  Select to interpret AMD specific ACPI device to platform device
68992082a88SKen Xue	  such as I2C, UART, GPIO found on AMD Carrizo and later chipsets.
69092082a88SKen Xue	  I2C and UART depend on COMMON_CLK to set clock. GPIO driver is
69192082a88SKen Xue	  implemented under PINCTRL subsystem.
69292082a88SKen Xue
693ced3ce76SDavid E. Boxconfig IOSF_MBI
694ced3ce76SDavid E. Box	tristate "Intel SoC IOSF Sideband support for SoC platforms"
695ced3ce76SDavid E. Box	depends on PCI
696a7f7f624SMasahiro Yamada	help
697ced3ce76SDavid E. Box	  This option enables sideband register access support for Intel SoC
698ced3ce76SDavid E. Box	  platforms. On these platforms the IOSF sideband is used in lieu of
699ced3ce76SDavid E. Box	  MSR's for some register accesses, mostly but not limited to thermal
700ced3ce76SDavid E. Box	  and power. Drivers may query the availability of this device to
701ced3ce76SDavid E. Box	  determine if they need the sideband in order to work on these
702ced3ce76SDavid E. Box	  platforms. The sideband is available on the following SoC products.
703ced3ce76SDavid E. Box	  This list is not meant to be exclusive.
704ced3ce76SDavid E. Box	   - BayTrail
705ced3ce76SDavid E. Box	   - Braswell
706ced3ce76SDavid E. Box	   - Quark
707ced3ce76SDavid E. Box
708ced3ce76SDavid E. Box	  You should say Y if you are running a kernel on one of these SoC's.
709ced3ce76SDavid E. Box
710ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG
711ed2226bdSDavid E. Box	bool "Enable IOSF sideband access through debugfs"
712ed2226bdSDavid E. Box	depends on IOSF_MBI && DEBUG_FS
713a7f7f624SMasahiro Yamada	help
714ed2226bdSDavid E. Box	  Select this option to expose the IOSF sideband access registers (MCR,
715ed2226bdSDavid E. Box	  MDR, MCRX) through debugfs to write and read register information from
716ed2226bdSDavid E. Box	  different units on the SoC. This is most useful for obtaining device
717ed2226bdSDavid E. Box	  state information for debug and analysis. As this is a general access
718ed2226bdSDavid E. Box	  mechanism, users of this option would have specific knowledge of the
719ed2226bdSDavid E. Box	  device they want to access.
720ed2226bdSDavid E. Box
721ed2226bdSDavid E. Box	  If you don't require the option or are in doubt, say N.
722ed2226bdSDavid E. Box
723c5c606d9SRavikiran G Thirumalaiconfig X86_RDC321X
724c5c606d9SRavikiran G Thirumalai	bool "RDC R-321x SoC"
725506f1d07SSam Ravnborg	depends on X86_32
726c5c606d9SRavikiran G Thirumalai	depends on X86_EXTENDED_PLATFORM
727c5c606d9SRavikiran G Thirumalai	select M486
728c5c606d9SRavikiran G Thirumalai	select X86_REBOOTFIXUPS
729a7f7f624SMasahiro Yamada	help
730c5c606d9SRavikiran G Thirumalai	  This option is needed for RDC R-321x system-on-chip, also known
731c5c606d9SRavikiran G Thirumalai	  as R-8610-(G).
732c5c606d9SRavikiran G Thirumalai	  If you don't have one of these chips, you should say N here.
733c5c606d9SRavikiran G Thirumalai
734d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE
7356fc108a0SJan Beulich	def_bool y
736d949f36fSLinus Torvalds	# MCE code calls memory_failure():
737d949f36fSLinus Torvalds	depends on X86_MCE
738d949f36fSLinus Torvalds	# On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
739d949f36fSLinus Torvalds	# On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
740d949f36fSLinus Torvalds	depends on X86_64 || !SPARSEMEM
741d949f36fSLinus Torvalds	select ARCH_SUPPORTS_MEMORY_FAILURE
742d949f36fSLinus Torvalds
74382148d1dSShérabconfig X86_32_IRIS
74482148d1dSShérab	tristate "Eurobraille/Iris poweroff module"
74582148d1dSShérab	depends on X86_32
746a7f7f624SMasahiro Yamada	help
74782148d1dSShérab	  The Iris machines from EuroBraille do not have APM or ACPI support
74882148d1dSShérab	  to shut themselves down properly.  A special I/O sequence is
74982148d1dSShérab	  needed to do so, which is what this module does at
75082148d1dSShérab	  kernel shutdown.
75182148d1dSShérab
75282148d1dSShérab	  This is only for Iris machines from EuroBraille.
75382148d1dSShérab
75482148d1dSShérab	  If unused, say N.
75582148d1dSShérab
756ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
7573c2362e6SHarvey Harrison	def_bool y
7583c2362e6SHarvey Harrison	prompt "Single-depth WCHAN output"
759a87d0914SKen Chen	depends on X86
760a7f7f624SMasahiro Yamada	help
761506f1d07SSam Ravnborg	  Calculate simpler /proc/<PID>/wchan values. If this option
762506f1d07SSam Ravnborg	  is disabled then wchan values will recurse back to the
763506f1d07SSam Ravnborg	  caller function. This provides more accurate wchan values,
764506f1d07SSam Ravnborg	  at the expense of slightly more scheduling overhead.
765506f1d07SSam Ravnborg
766506f1d07SSam Ravnborg	  If in doubt, say "Y".
767506f1d07SSam Ravnborg
7686276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST
7696276a074SBorislav Petkov	bool "Linux guest support"
770a7f7f624SMasahiro Yamada	help
7716276a074SBorislav Petkov	  Say Y here to enable options for running Linux under various hyper-
7726276a074SBorislav Petkov	  visors. This option enables basic hypervisor detection and platform
7736276a074SBorislav Petkov	  setup.
774506f1d07SSam Ravnborg
7756276a074SBorislav Petkov	  If you say N, all options in this submenu will be skipped and
7766276a074SBorislav Petkov	  disabled, and Linux guest support won't be built in.
777506f1d07SSam Ravnborg
7786276a074SBorislav Petkovif HYPERVISOR_GUEST
779506f1d07SSam Ravnborg
780e61bd94aSEduardo Pereira Habkostconfig PARAVIRT
781e61bd94aSEduardo Pereira Habkost	bool "Enable paravirtualization code"
782a0e2bf7cSJuergen Gross	depends on HAVE_STATIC_CALL
783a7f7f624SMasahiro Yamada	help
784e61bd94aSEduardo Pereira Habkost	  This changes the kernel so it can modify itself when it is run
785e61bd94aSEduardo Pereira Habkost	  under a hypervisor, potentially improving performance significantly
786e61bd94aSEduardo Pereira Habkost	  over full virtualization.  However, when run without a hypervisor
787e61bd94aSEduardo Pereira Habkost	  the kernel is theoretically slower and slightly larger.
788e61bd94aSEduardo Pereira Habkost
789c00a280aSJuergen Grossconfig PARAVIRT_XXL
790c00a280aSJuergen Gross	bool
791c00a280aSJuergen Gross
7926276a074SBorislav Petkovconfig PARAVIRT_DEBUG
7936276a074SBorislav Petkov	bool "paravirt-ops debugging"
7946276a074SBorislav Petkov	depends on PARAVIRT && DEBUG_KERNEL
795a7f7f624SMasahiro Yamada	help
7966276a074SBorislav Petkov	  Enable to debug paravirt_ops internals.  Specifically, BUG if
7976276a074SBorislav Petkov	  a paravirt_op is missing when it is called.
7986276a074SBorislav Petkov
799b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS
800b4ecc126SJeremy Fitzhardinge	bool "Paravirtualization layer for spinlocks"
8016ea30386SKees Cook	depends on PARAVIRT && SMP
802a7f7f624SMasahiro Yamada	help
803b4ecc126SJeremy Fitzhardinge	  Paravirtualized spinlocks allow a pvops backend to replace the
804b4ecc126SJeremy Fitzhardinge	  spinlock implementation with something virtualization-friendly
805b4ecc126SJeremy Fitzhardinge	  (for example, block the virtual CPU rather than spinning).
806b4ecc126SJeremy Fitzhardinge
8074c4e4f61SRaghavendra K T	  It has a minimal impact on native kernels and gives a nice performance
8084c4e4f61SRaghavendra K T	  benefit on paravirtualized KVM / Xen kernels.
809b4ecc126SJeremy Fitzhardinge
8104c4e4f61SRaghavendra K T	  If you are unsure how to answer this question, answer Y.
811b4ecc126SJeremy Fitzhardinge
812ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR
813ecca2502SZhao Yakui	def_bool n
814ecca2502SZhao Yakui
8156276a074SBorislav Petkovsource "arch/x86/xen/Kconfig"
8166276a074SBorislav Petkov
8176276a074SBorislav Petkovconfig KVM_GUEST
8186276a074SBorislav Petkov	bool "KVM Guest support (including kvmclock)"
8196276a074SBorislav Petkov	depends on PARAVIRT
8206276a074SBorislav Petkov	select PARAVIRT_CLOCK
821a1c4423bSMarcelo Tosatti	select ARCH_CPUIDLE_HALTPOLL
822b1d40575SVitaly Kuznetsov	select X86_HV_CALLBACK_VECTOR
8236276a074SBorislav Petkov	default y
824a7f7f624SMasahiro Yamada	help
8256276a074SBorislav Petkov	  This option enables various optimizations for running under the KVM
8266276a074SBorislav Petkov	  hypervisor. It includes a paravirtualized clock, so that instead
8276276a074SBorislav Petkov	  of relying on a PIT (or probably other) emulation by the
8286276a074SBorislav Petkov	  underlying device model, the host provides the guest with
8296276a074SBorislav Petkov	  timing infrastructure such as time of day, and system time
8306276a074SBorislav Petkov
831a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL
832a1c4423bSMarcelo Tosatti	def_bool n
833a1c4423bSMarcelo Tosatti	prompt "Disable host haltpoll when loading haltpoll driver"
834a1c4423bSMarcelo Tosatti	help
835a1c4423bSMarcelo Tosatti	  If virtualized under KVM, disable host haltpoll.
836a1c4423bSMarcelo Tosatti
8377733607fSMaran Wilsonconfig PVH
8387733607fSMaran Wilson	bool "Support for running PVH guests"
839a7f7f624SMasahiro Yamada	help
8407733607fSMaran Wilson	  This option enables the PVH entry point for guest virtual machines
8417733607fSMaran Wilson	  as specified in the x86/HVM direct boot ABI.
8427733607fSMaran Wilson
8436276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING
8446276a074SBorislav Petkov	bool "Paravirtual steal time accounting"
8456276a074SBorislav Petkov	depends on PARAVIRT
846a7f7f624SMasahiro Yamada	help
8476276a074SBorislav Petkov	  Select this option to enable fine granularity task steal time
8486276a074SBorislav Petkov	  accounting. Time spent executing other tasks in parallel with
8496276a074SBorislav Petkov	  the current vCPU is discounted from the vCPU power. To account for
8506276a074SBorislav Petkov	  that, there can be a small performance impact.
8516276a074SBorislav Petkov
8526276a074SBorislav Petkov	  If in doubt, say N here.
8536276a074SBorislav Petkov
8547af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK
8557af192c9SGerd Hoffmann	bool
8567af192c9SGerd Hoffmann
8574a362601SJan Kiszkaconfig JAILHOUSE_GUEST
8584a362601SJan Kiszka	bool "Jailhouse non-root cell support"
859abde587bSArnd Bergmann	depends on X86_64 && PCI
86087e65d05SJan Kiszka	select X86_PM_TIMER
861a7f7f624SMasahiro Yamada	help
8624a362601SJan Kiszka	  This option allows to run Linux as guest in a Jailhouse non-root
8634a362601SJan Kiszka	  cell. You can leave this option disabled if you only want to start
8644a362601SJan Kiszka	  Jailhouse and run Linux afterwards in the root cell.
8654a362601SJan Kiszka
866ec7972c9SZhao Yakuiconfig ACRN_GUEST
867ec7972c9SZhao Yakui	bool "ACRN Guest support"
868ec7972c9SZhao Yakui	depends on X86_64
869498ad393SZhao Yakui	select X86_HV_CALLBACK_VECTOR
870ec7972c9SZhao Yakui	help
871ec7972c9SZhao Yakui	  This option allows to run Linux as guest in the ACRN hypervisor. ACRN is
872ec7972c9SZhao Yakui	  a flexible, lightweight reference open-source hypervisor, built with
873ec7972c9SZhao Yakui	  real-time and safety-criticality in mind. It is built for embedded
874ec7972c9SZhao Yakui	  IOT with small footprint and real-time features. More details can be
875ec7972c9SZhao Yakui	  found in https://projectacrn.org/.
876ec7972c9SZhao Yakui
87759bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST
87859bd54a8SKuppuswamy Sathyanarayanan	bool "Intel TDX (Trust Domain Extensions) - Guest Support"
87959bd54a8SKuppuswamy Sathyanarayanan	depends on X86_64 && CPU_SUP_INTEL
88059bd54a8SKuppuswamy Sathyanarayanan	depends on X86_X2APIC
88175d090fdSKirill A. Shutemov	depends on EFI_STUB
88241394e33SKirill A. Shutemov	select ARCH_HAS_CC_PLATFORM
883968b4931SKirill A. Shutemov	select X86_MEM_ENCRYPT
88477a512e3SSean Christopherson	select X86_MCE
88575d090fdSKirill A. Shutemov	select UNACCEPTED_MEMORY
88659bd54a8SKuppuswamy Sathyanarayanan	help
88759bd54a8SKuppuswamy Sathyanarayanan	  Support running as a guest under Intel TDX.  Without this support,
88859bd54a8SKuppuswamy Sathyanarayanan	  the guest kernel can not boot or run under TDX.
88959bd54a8SKuppuswamy Sathyanarayanan	  TDX includes memory encryption and integrity capabilities
89059bd54a8SKuppuswamy Sathyanarayanan	  which protect the confidentiality and integrity of guest
89159bd54a8SKuppuswamy Sathyanarayanan	  memory contents and CPU state. TDX guests are protected from
89259bd54a8SKuppuswamy Sathyanarayanan	  some attacks from the VMM.
89359bd54a8SKuppuswamy Sathyanarayanan
8946276a074SBorislav Petkovendif # HYPERVISOR_GUEST
89597349135SJeremy Fitzhardinge
896506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu"
897506f1d07SSam Ravnborg
898506f1d07SSam Ravnborgconfig HPET_TIMER
8993c2362e6SHarvey Harrison	def_bool X86_64
900506f1d07SSam Ravnborg	prompt "HPET Timer Support" if X86_32
901a7f7f624SMasahiro Yamada	help
902506f1d07SSam Ravnborg	  Use the IA-PC HPET (High Precision Event Timer) to manage
903506f1d07SSam Ravnborg	  time in preference to the PIT and RTC, if a HPET is
904506f1d07SSam Ravnborg	  present.
905506f1d07SSam Ravnborg	  HPET is the next generation timer replacing legacy 8254s.
906506f1d07SSam Ravnborg	  The HPET provides a stable time base on SMP
907506f1d07SSam Ravnborg	  systems, unlike the TSC, but it is more expensive to access,
9084e7f9df2SMichael S. Tsirkin	  as it is off-chip.  The interface used is documented
9094e7f9df2SMichael S. Tsirkin	  in the HPET spec, revision 1.
910506f1d07SSam Ravnborg
911506f1d07SSam Ravnborg	  You can safely choose Y here.  However, HPET will only be
912506f1d07SSam Ravnborg	  activated if the platform and the BIOS support this feature.
913506f1d07SSam Ravnborg	  Otherwise the 8254 will be used for timing services.
914506f1d07SSam Ravnborg
915506f1d07SSam Ravnborg	  Choose N to continue using the legacy 8254 timer.
916506f1d07SSam Ravnborg
917506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC
9183c2362e6SHarvey Harrison	def_bool y
9193228e1dcSAnand K Mistry	depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
920506f1d07SSam Ravnborg
9216a108a14SDavid Rientjes# Mark as expert because too many people got it wrong.
922506f1d07SSam Ravnborg# The code disables itself when not needed.
9237ae9392cSThomas Petazzoniconfig DMI
9247ae9392cSThomas Petazzoni	default y
925cf074402SArd Biesheuvel	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
9266a108a14SDavid Rientjes	bool "Enable DMI scanning" if EXPERT
927a7f7f624SMasahiro Yamada	help
9287ae9392cSThomas Petazzoni	  Enabled scanning of DMI to identify machine quirks. Say Y
9297ae9392cSThomas Petazzoni	  here unless you have verified that your setup is not
9307ae9392cSThomas Petazzoni	  affected by entries in the DMI blacklist. Required by PNP
9317ae9392cSThomas Petazzoni	  BIOS code.
9327ae9392cSThomas Petazzoni
933506f1d07SSam Ravnborgconfig GART_IOMMU
93438901f1cSAndi Kleen	bool "Old AMD GART IOMMU support"
935a4ce5a48SChristoph Hellwig	select IOMMU_HELPER
936506f1d07SSam Ravnborg	select SWIOTLB
93723ac4ae8SAndreas Herrmann	depends on X86_64 && PCI && AMD_NB
938a7f7f624SMasahiro Yamada	help
939ced3c42cSIngo Molnar	  Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron
940ced3c42cSIngo Molnar	  GART based hardware IOMMUs.
941ced3c42cSIngo Molnar
942ced3c42cSIngo Molnar	  The GART supports full DMA access for devices with 32-bit access
943ced3c42cSIngo Molnar	  limitations, on systems with more than 3 GB. This is usually needed
944ced3c42cSIngo Molnar	  for USB, sound, many IDE/SATA chipsets and some other devices.
945ced3c42cSIngo Molnar
946ced3c42cSIngo Molnar	  Newer systems typically have a modern AMD IOMMU, supported via
947ced3c42cSIngo Molnar	  the CONFIG_AMD_IOMMU=y config option.
948ced3c42cSIngo Molnar
949ced3c42cSIngo Molnar	  In normal configurations this driver is only active when needed:
950ced3c42cSIngo Molnar	  there's more than 3 GB of memory and the system contains a
951ced3c42cSIngo Molnar	  32-bit limited device.
952ced3c42cSIngo Molnar
953ced3c42cSIngo Molnar	  If unsure, say Y.
954506f1d07SSam Ravnborg
9558b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT
9568b766b0fSMichal Suchanek	bool
9578b766b0fSMichal Suchanek	help
9588b766b0fSMichal Suchanek	  If true, at least one selected framebuffer driver can take advantage
9598b766b0fSMichal Suchanek	  of VESA video modes set at an early boot stage via the vga= parameter.
9608b766b0fSMichal Suchanek
9611184dc2fSMike Travisconfig MAXSMP
962ddb0c5a6SSamuel Thibault	bool "Enable Maximum number of SMP Processors and NUMA Nodes"
9636ea30386SKees Cook	depends on X86_64 && SMP && DEBUG_KERNEL
96436f5101aSMike Travis	select CPUMASK_OFFSTACK
965a7f7f624SMasahiro Yamada	help
966ddb0c5a6SSamuel Thibault	  Enable maximum number of CPUS and NUMA Nodes for this architecture.
9671184dc2fSMike Travis	  If unsure, say N.
968506f1d07SSam Ravnborg
969aec6487eSIngo Molnar#
970aec6487eSIngo Molnar# The maximum number of CPUs supported:
971aec6487eSIngo Molnar#
972aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT,
973aec6487eSIngo Molnar# and which can be configured interactively in the
974aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range.
975aec6487eSIngo Molnar#
976aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on
977aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel.
978aec6487eSIngo Molnar#
979aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable
980aec6487eSIngo Molnar#   interactive configuration. )
981aec6487eSIngo Molnar#
982a0d0bb4dSRandy Dunlap
983aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN
984a0d0bb4dSRandy Dunlap	int
985aec6487eSIngo Molnar	default NR_CPUS_RANGE_END if MAXSMP
986a0d0bb4dSRandy Dunlap	default    1 if !SMP
987a0d0bb4dSRandy Dunlap	default    2
988a0d0bb4dSRandy Dunlap
989aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END
990a0d0bb4dSRandy Dunlap	int
991a0d0bb4dSRandy Dunlap	depends on X86_32
9920abf5086SArnd Bergmann	default    8 if  SMP
993a0d0bb4dSRandy Dunlap	default    1 if !SMP
994a0d0bb4dSRandy Dunlap
995aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END
996a0d0bb4dSRandy Dunlap	int
997a0d0bb4dSRandy Dunlap	depends on X86_64
9981edae1aeSScott Wood	default 8192 if  SMP && CPUMASK_OFFSTACK
9991edae1aeSScott Wood	default  512 if  SMP && !CPUMASK_OFFSTACK
1000a0d0bb4dSRandy Dunlap	default    1 if !SMP
1001aec6487eSIngo Molnar
1002aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT
1003aec6487eSIngo Molnar	int
1004aec6487eSIngo Molnar	depends on X86_32
1005aec6487eSIngo Molnar	default    8 if  SMP
1006aec6487eSIngo Molnar	default    1 if !SMP
1007aec6487eSIngo Molnar
1008aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT
1009aec6487eSIngo Molnar	int
1010aec6487eSIngo Molnar	depends on X86_64
1011a0d0bb4dSRandy Dunlap	default 8192 if  MAXSMP
1012a0d0bb4dSRandy Dunlap	default   64 if  SMP
1013aec6487eSIngo Molnar	default    1 if !SMP
1014a0d0bb4dSRandy Dunlap
1015506f1d07SSam Ravnborgconfig NR_CPUS
101636f5101aSMike Travis	int "Maximum number of CPUs" if SMP && !MAXSMP
1017aec6487eSIngo Molnar	range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END
1018aec6487eSIngo Molnar	default NR_CPUS_DEFAULT
1019a7f7f624SMasahiro Yamada	help
1020506f1d07SSam Ravnborg	  This allows you to specify the maximum number of CPUs which this
1021bb61ccc7SJosh Boyer	  kernel will support.  If CPUMASK_OFFSTACK is enabled, the maximum
1022cad14bb9SKirill A. Shutemov	  supported value is 8192, otherwise the maximum value is 512.  The
1023506f1d07SSam Ravnborg	  minimum value which makes sense is 2.
1024506f1d07SSam Ravnborg
1025aec6487eSIngo Molnar	  This is purely to save memory: each supported CPU adds about 8KB
1026aec6487eSIngo Molnar	  to the kernel image.
1027506f1d07SSam Ravnborg
102866558b73STim Chenconfig SCHED_CLUSTER
102966558b73STim Chen	bool "Cluster scheduler support"
103066558b73STim Chen	depends on SMP
103166558b73STim Chen	default y
103266558b73STim Chen	help
103366558b73STim Chen	  Cluster scheduler support improves the CPU scheduler's decision
103466558b73STim Chen	  making when dealing with machines that have clusters of CPUs.
103566558b73STim Chen	  Cluster usually means a couple of CPUs which are placed closely
103666558b73STim Chen	  by sharing mid-level caches, last-level cache tags or internal
103766558b73STim Chen	  busses.
103866558b73STim Chen
1039506f1d07SSam Ravnborgconfig SCHED_SMT
1040dbe73364SThomas Gleixner	def_bool y if SMP
1041506f1d07SSam Ravnborg
1042506f1d07SSam Ravnborgconfig SCHED_MC
10433c2362e6SHarvey Harrison	def_bool y
10443c2362e6SHarvey Harrison	prompt "Multi-core scheduler support"
1045c8e56d20SBorislav Petkov	depends on SMP
1046a7f7f624SMasahiro Yamada	help
1047506f1d07SSam Ravnborg	  Multi-core scheduler support improves the CPU scheduler's decision
1048506f1d07SSam Ravnborg	  making when dealing with multi-core CPU chips at a cost of slightly
1049506f1d07SSam Ravnborg	  increased overhead in some places. If unsure say N here.
1050506f1d07SSam Ravnborg
1051de966cf4STim Chenconfig SCHED_MC_PRIO
1052de966cf4STim Chen	bool "CPU core priorities scheduler support"
10533598e577SMeng Li	depends on SCHED_MC
10543598e577SMeng Li	select X86_INTEL_PSTATE if CPU_SUP_INTEL
10553598e577SMeng Li	select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI
10560a21fc12SIngo Molnar	select CPU_FREQ
1057de966cf4STim Chen	default y
1058a7f7f624SMasahiro Yamada	help
1059de966cf4STim Chen	  Intel Turbo Boost Max Technology 3.0 enabled CPUs have a
1060de966cf4STim Chen	  core ordering determined at manufacturing time, which allows
1061de966cf4STim Chen	  certain cores to reach higher turbo frequencies (when running
1062de966cf4STim Chen	  single threaded workloads) than others.
1063de966cf4STim Chen
1064de966cf4STim Chen	  Enabling this kernel feature teaches the scheduler about
1065de966cf4STim Chen	  the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the
1066de966cf4STim Chen	  scheduler's CPU selection logic accordingly, so that higher
1067de966cf4STim Chen	  overall system performance can be achieved.
1068de966cf4STim Chen
1069de966cf4STim Chen	  This feature will have no effect on CPUs without this feature.
1070de966cf4STim Chen
1071de966cf4STim Chen	  If unsure say Y here.
10725e76b2abSTim Chen
107330b8b006SThomas Gleixnerconfig UP_LATE_INIT
107430b8b006SThomas Gleixner	def_bool y
1075ba360f88SThomas Gleixner	depends on !SMP && X86_LOCAL_APIC
107630b8b006SThomas Gleixner
1077506f1d07SSam Ravnborgconfig X86_UP_APIC
107850849eefSJan Beulich	bool "Local APIC support on uniprocessors" if !PCI_MSI
107950849eefSJan Beulich	default PCI_MSI
1080dcbb01fbSArnd Bergmann	depends on X86_32 && !SMP
1081a7f7f624SMasahiro Yamada	help
1082506f1d07SSam Ravnborg	  A local APIC (Advanced Programmable Interrupt Controller) is an
1083506f1d07SSam Ravnborg	  integrated interrupt controller in the CPU. If you have a single-CPU
1084506f1d07SSam Ravnborg	  system which has a processor with a local APIC, you can say Y here to
1085506f1d07SSam Ravnborg	  enable and use it. If you say Y here even though your machine doesn't
1086506f1d07SSam Ravnborg	  have a local APIC, then the kernel will still run with no slowdown at
1087506f1d07SSam Ravnborg	  all. The local APIC supports CPU-generated self-interrupts (timer,
1088506f1d07SSam Ravnborg	  performance counters), and the NMI watchdog which detects hard
1089506f1d07SSam Ravnborg	  lockups.
1090506f1d07SSam Ravnborg
1091506f1d07SSam Ravnborgconfig X86_UP_IOAPIC
1092506f1d07SSam Ravnborg	bool "IO-APIC support on uniprocessors"
1093506f1d07SSam Ravnborg	depends on X86_UP_APIC
1094a7f7f624SMasahiro Yamada	help
1095506f1d07SSam Ravnborg	  An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
1096506f1d07SSam Ravnborg	  SMP-capable replacement for PC-style interrupt controllers. Most
1097506f1d07SSam Ravnborg	  SMP systems and many recent uniprocessor systems have one.
1098506f1d07SSam Ravnborg
1099506f1d07SSam Ravnborg	  If you have a single-CPU system with an IO-APIC, you can say Y here
1100506f1d07SSam Ravnborg	  to use it. If you say Y here even though your machine doesn't have
1101506f1d07SSam Ravnborg	  an IO-APIC, then the kernel will still run with no slowdown at all.
1102506f1d07SSam Ravnborg
1103506f1d07SSam Ravnborgconfig X86_LOCAL_APIC
11043c2362e6SHarvey Harrison	def_bool y
1105dcbb01fbSArnd Bergmann	depends on X86_64 || SMP || X86_UP_APIC || PCI_MSI
1106b5dc8e6cSJiang Liu	select IRQ_DOMAIN_HIERARCHY
1107506f1d07SSam Ravnborg
11082b5e22afSKirill A. Shutemovconfig ACPI_MADT_WAKEUP
11092b5e22afSKirill A. Shutemov	def_bool y
11102b5e22afSKirill A. Shutemov	depends on X86_64
11112b5e22afSKirill A. Shutemov	depends on ACPI
11122b5e22afSKirill A. Shutemov	depends on SMP
11132b5e22afSKirill A. Shutemov	depends on X86_LOCAL_APIC
11142b5e22afSKirill A. Shutemov
1115506f1d07SSam Ravnborgconfig X86_IO_APIC
1116b1da1e71SJan Beulich	def_bool y
1117b1da1e71SJan Beulich	depends on X86_LOCAL_APIC || X86_UP_IOAPIC
1118506f1d07SSam Ravnborg
111941b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS
112041b9eb26SStefan Assmann	bool "Reroute for broken boot IRQs"
112141b9eb26SStefan Assmann	depends on X86_IO_APIC
1122a7f7f624SMasahiro Yamada	help
112341b9eb26SStefan Assmann	  This option enables a workaround that fixes a source of
112441b9eb26SStefan Assmann	  spurious interrupts. This is recommended when threaded
112541b9eb26SStefan Assmann	  interrupt handling is used on systems where the generation of
112641b9eb26SStefan Assmann	  superfluous "boot interrupts" cannot be disabled.
112741b9eb26SStefan Assmann
112841b9eb26SStefan Assmann	  Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
112941b9eb26SStefan Assmann	  entry in the chipset's IO-APIC is masked (as, e.g. the RT
113041b9eb26SStefan Assmann	  kernel does during interrupt handling). On chipsets where this
113141b9eb26SStefan Assmann	  boot IRQ generation cannot be disabled, this workaround keeps
113241b9eb26SStefan Assmann	  the original IRQ line masked so that only the equivalent "boot
113341b9eb26SStefan Assmann	  IRQ" is delivered to the CPUs. The workaround also tells the
113441b9eb26SStefan Assmann	  kernel to set up the IRQ handler on the boot IRQ line. In this
113541b9eb26SStefan Assmann	  way only one interrupt is delivered to the kernel. Otherwise
113641b9eb26SStefan Assmann	  the spurious second interrupt may cause the kernel to bring
113741b9eb26SStefan Assmann	  down (vital) interrupt lines.
113841b9eb26SStefan Assmann
113941b9eb26SStefan Assmann	  Only affects "broken" chipsets. Interrupt sharing may be
114041b9eb26SStefan Assmann	  increased on these systems.
114141b9eb26SStefan Assmann
1142506f1d07SSam Ravnborgconfig X86_MCE
1143bab9bc65SAndi Kleen	bool "Machine Check / overheating reporting"
1144648ed940SChen, Gong	select GENERIC_ALLOCATOR
1145e57dbaf7SBorislav Petkov	default y
1146a7f7f624SMasahiro Yamada	help
1147bab9bc65SAndi Kleen	  Machine Check support allows the processor to notify the
1148bab9bc65SAndi Kleen	  kernel if it detects a problem (e.g. overheating, data corruption).
1149506f1d07SSam Ravnborg	  The action the kernel takes depends on the severity of the problem,
1150bab9bc65SAndi Kleen	  ranging from warning messages to halting the machine.
11514efc0670SAndi Kleen
11525de97c9fSTony Luckconfig X86_MCELOG_LEGACY
11535de97c9fSTony Luck	bool "Support for deprecated /dev/mcelog character device"
11545de97c9fSTony Luck	depends on X86_MCE
1155a7f7f624SMasahiro Yamada	help
11565de97c9fSTony Luck	  Enable support for /dev/mcelog which is needed by the old mcelog
11575de97c9fSTony Luck	  userspace logging daemon. Consider switching to the new generation
11585de97c9fSTony Luck	  rasdaemon solution.
11595de97c9fSTony Luck
1160506f1d07SSam Ravnborgconfig X86_MCE_INTEL
11613c2362e6SHarvey Harrison	def_bool y
11623c2362e6SHarvey Harrison	prompt "Intel MCE features"
1163c1ebf835SAndi Kleen	depends on X86_MCE && X86_LOCAL_APIC
1164a7f7f624SMasahiro Yamada	help
1165506f1d07SSam Ravnborg	  Additional support for intel specific MCE features such as
1166506f1d07SSam Ravnborg	  the thermal monitor.
1167506f1d07SSam Ravnborg
1168506f1d07SSam Ravnborgconfig X86_MCE_AMD
11693c2362e6SHarvey Harrison	def_bool y
11703c2362e6SHarvey Harrison	prompt "AMD MCE features"
1171d35fb312SYazen Ghannam	depends on X86_MCE && X86_LOCAL_APIC
1172a7f7f624SMasahiro Yamada	help
1173506f1d07SSam Ravnborg	  Additional support for AMD specific MCE features such as
1174506f1d07SSam Ravnborg	  the DRAM Error Threshold.
1175506f1d07SSam Ravnborg
11764efc0670SAndi Kleenconfig X86_ANCIENT_MCE
11776fc108a0SJan Beulich	bool "Support for old Pentium 5 / WinChip machine checks"
1178c31d9633SAndi Kleen	depends on X86_32 && X86_MCE
1179a7f7f624SMasahiro Yamada	help
11804efc0670SAndi Kleen	  Include support for machine check handling on old Pentium 5 or WinChip
11815065a706SMasanari Iida	  systems. These typically need to be enabled explicitly on the command
11824efc0670SAndi Kleen	  line.
11834efc0670SAndi Kleen
1184b2762686SAndi Kleenconfig X86_MCE_THRESHOLD
1185b2762686SAndi Kleen	depends on X86_MCE_AMD || X86_MCE_INTEL
11866fc108a0SJan Beulich	def_bool y
1187b2762686SAndi Kleen
1188ea149b36SAndi Kleenconfig X86_MCE_INJECT
1189bc8e80d5SBorislav Petkov	depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS
1190ea149b36SAndi Kleen	tristate "Machine check injector support"
1191a7f7f624SMasahiro Yamada	help
1192ea149b36SAndi Kleen	  Provide support for injecting machine checks for testing purposes.
1193ea149b36SAndi Kleen	  If you don't know what a machine check is and you don't do kernel
1194ea149b36SAndi Kleen	  QA it is safe to say n.
1195ea149b36SAndi Kleen
119607dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig"
1197e633c65aSKan Liang
11985aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86
11991e642812SIngo Molnar	bool "Legacy VM86 support"
1200506f1d07SSam Ravnborg	depends on X86_32
1201a7f7f624SMasahiro Yamada	help
12025aef51c3SAndy Lutomirski	  This option allows user programs to put the CPU into V8086
12035aef51c3SAndy Lutomirski	  mode, which is an 80286-era approximation of 16-bit real mode.
12045aef51c3SAndy Lutomirski
12055aef51c3SAndy Lutomirski	  Some very old versions of X and/or vbetool require this option
12065aef51c3SAndy Lutomirski	  for user mode setting.  Similarly, DOSEMU will use it if
12075aef51c3SAndy Lutomirski	  available to accelerate real mode DOS programs.  However, any
12085aef51c3SAndy Lutomirski	  recent version of DOSEMU, X, or vbetool should be fully
12095aef51c3SAndy Lutomirski	  functional even without kernel VM86 support, as they will all
12101e642812SIngo Molnar	  fall back to software emulation. Nevertheless, if you are using
12111e642812SIngo Molnar	  a 16-bit DOS program where 16-bit performance matters, vm86
12121e642812SIngo Molnar	  mode might be faster than emulation and you might want to
12131e642812SIngo Molnar	  enable this option.
12145aef51c3SAndy Lutomirski
12151e642812SIngo Molnar	  Note that any app that works on a 64-bit kernel is unlikely to
12161e642812SIngo Molnar	  need this option, as 64-bit kernels don't, and can't, support
12171e642812SIngo Molnar	  V8086 mode. This option is also unrelated to 16-bit protected
12181e642812SIngo Molnar	  mode and is not needed to run most 16-bit programs under Wine.
12195aef51c3SAndy Lutomirski
12201e642812SIngo Molnar	  Enabling this option increases the complexity of the kernel
12211e642812SIngo Molnar	  and slows down exception handling a tiny bit.
12225aef51c3SAndy Lutomirski
12231e642812SIngo Molnar	  If unsure, say N here.
12245aef51c3SAndy Lutomirski
12255aef51c3SAndy Lutomirskiconfig VM86
12265aef51c3SAndy Lutomirski	bool
12275aef51c3SAndy Lutomirski	default X86_LEGACY_VM86
122834273f41SH. Peter Anvin
122934273f41SH. Peter Anvinconfig X86_16BIT
123034273f41SH. Peter Anvin	bool "Enable support for 16-bit segments" if EXPERT
123134273f41SH. Peter Anvin	default y
1232a5b9e5a2SAndy Lutomirski	depends on MODIFY_LDT_SYSCALL
1233a7f7f624SMasahiro Yamada	help
123434273f41SH. Peter Anvin	  This option is required by programs like Wine to run 16-bit
123534273f41SH. Peter Anvin	  protected mode legacy code on x86 processors.  Disabling
123634273f41SH. Peter Anvin	  this option saves about 300 bytes on i386, or around 6K text
123734273f41SH. Peter Anvin	  plus 16K runtime memory on x86-64,
123834273f41SH. Peter Anvin
123934273f41SH. Peter Anvinconfig X86_ESPFIX32
124034273f41SH. Peter Anvin	def_bool y
124134273f41SH. Peter Anvin	depends on X86_16BIT && X86_32
1242506f1d07SSam Ravnborg
1243197725deSH. Peter Anvinconfig X86_ESPFIX64
1244197725deSH. Peter Anvin	def_bool y
124534273f41SH. Peter Anvin	depends on X86_16BIT && X86_64
1246506f1d07SSam Ravnborg
12471ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION
12481ad83c85SAndy Lutomirski	bool "Enable vsyscall emulation" if EXPERT
12491ad83c85SAndy Lutomirski	default y
12501ad83c85SAndy Lutomirski	depends on X86_64
1251a7f7f624SMasahiro Yamada	help
12521ad83c85SAndy Lutomirski	  This enables emulation of the legacy vsyscall page.  Disabling
12531ad83c85SAndy Lutomirski	  it is roughly equivalent to booting with vsyscall=none, except
12541ad83c85SAndy Lutomirski	  that it will also disable the helpful warning if a program
12551ad83c85SAndy Lutomirski	  tries to use a vsyscall.  With this option set to N, offending
12561ad83c85SAndy Lutomirski	  programs will just segfault, citing addresses of the form
12571ad83c85SAndy Lutomirski	  0xffffffffff600?00.
12581ad83c85SAndy Lutomirski
12591ad83c85SAndy Lutomirski	  This option is required by many programs built before 2013, and
12601ad83c85SAndy Lutomirski	  care should be used even with newer programs if set to N.
12611ad83c85SAndy Lutomirski
12621ad83c85SAndy Lutomirski	  Disabling this option saves about 7K of kernel size and
12631ad83c85SAndy Lutomirski	  possibly 4K of additional runtime pagetable memory.
12641ad83c85SAndy Lutomirski
1265111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM
1266111e7b15SThomas Gleixner	bool "IOPERM and IOPL Emulation"
1267a24ca997SThomas Gleixner	default y
1268a7f7f624SMasahiro Yamada	help
1269111e7b15SThomas Gleixner	  This enables the ioperm() and iopl() syscalls which are necessary
1270111e7b15SThomas Gleixner	  for legacy applications.
1271111e7b15SThomas Gleixner
1272c8137aceSThomas Gleixner	  Legacy IOPL support is an overbroad mechanism which allows user
1273c8137aceSThomas Gleixner	  space aside of accessing all 65536 I/O ports also to disable
1274c8137aceSThomas Gleixner	  interrupts. To gain this access the caller needs CAP_SYS_RAWIO
1275c8137aceSThomas Gleixner	  capabilities and permission from potentially active security
1276c8137aceSThomas Gleixner	  modules.
1277c8137aceSThomas Gleixner
1278c8137aceSThomas Gleixner	  The emulation restricts the functionality of the syscall to
1279c8137aceSThomas Gleixner	  only allowing the full range I/O port access, but prevents the
1280a24ca997SThomas Gleixner	  ability to disable interrupts from user space which would be
1281a24ca997SThomas Gleixner	  granted if the hardware IOPL mechanism would be used.
1282c8137aceSThomas Gleixner
1283506f1d07SSam Ravnborgconfig TOSHIBA
1284506f1d07SSam Ravnborg	tristate "Toshiba Laptop support"
1285506f1d07SSam Ravnborg	depends on X86_32
1286a7f7f624SMasahiro Yamada	help
1287506f1d07SSam Ravnborg	  This adds a driver to safely access the System Management Mode of
1288506f1d07SSam Ravnborg	  the CPU on Toshiba portables with a genuine Toshiba BIOS. It does
1289506f1d07SSam Ravnborg	  not work on models with a Phoenix BIOS. The System Management Mode
1290506f1d07SSam Ravnborg	  is used to set the BIOS and power saving options on Toshiba portables.
1291506f1d07SSam Ravnborg
1292506f1d07SSam Ravnborg	  For information on utilities to make use of this driver see the
1293506f1d07SSam Ravnborg	  Toshiba Linux utilities web site at:
1294506f1d07SSam Ravnborg	  <http://www.buzzard.org.uk/toshiba/>.
1295506f1d07SSam Ravnborg
1296506f1d07SSam Ravnborg	  Say Y if you intend to run this kernel on a Toshiba portable.
1297506f1d07SSam Ravnborg	  Say N otherwise.
1298506f1d07SSam Ravnborg
1299506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS
13009ba16087SJan Beulich	bool "Enable X86 board specific fixups for reboot"
13019ba16087SJan Beulich	depends on X86_32
1302a7f7f624SMasahiro Yamada	help
1303506f1d07SSam Ravnborg	  This enables chipset and/or board specific fixups to be done
1304506f1d07SSam Ravnborg	  in order to get reboot to work correctly. This is only needed on
1305506f1d07SSam Ravnborg	  some combinations of hardware and BIOS. The symptom, for which
1306506f1d07SSam Ravnborg	  this config is intended, is when reboot ends with a stalled/hung
1307506f1d07SSam Ravnborg	  system.
1308506f1d07SSam Ravnborg
1309506f1d07SSam Ravnborg	  Currently, the only fixup is for the Geode machines using
13105e3a77e9SFlorian Fainelli	  CS5530A and CS5536 chipsets and the RDC R-321x SoC.
1311506f1d07SSam Ravnborg
1312506f1d07SSam Ravnborg	  Say Y if you want to enable the fixup. Currently, it's safe to
1313506f1d07SSam Ravnborg	  enable this option even if you don't need it.
1314506f1d07SSam Ravnborg	  Say N otherwise.
1315506f1d07SSam Ravnborg
1316506f1d07SSam Ravnborgconfig MICROCODE
1317e6bcfdd7SThomas Gleixner	def_bool y
131880030e3dSBorislav Petkov	depends on CPU_SUP_AMD || CPU_SUP_INTEL
131980cc9f10SPeter Oruba
1320fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32
1321fdbd4381SThomas Gleixner	def_bool y
1322fdbd4381SThomas Gleixner	depends on MICROCODE && X86_32 && BLK_DEV_INITRD
1323fdbd4381SThomas Gleixner
1324a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING
1325a77a94f8SBorislav Petkov	bool "Late microcode loading (DANGEROUS)"
1326c02f48e0SBorislav Petkov	default n
1327634ac23aSThomas Gleixner	depends on MICROCODE && SMP
1328a7f7f624SMasahiro Yamada	help
1329a77a94f8SBorislav Petkov	  Loading microcode late, when the system is up and executing instructions
1330a77a94f8SBorislav Petkov	  is a tricky business and should be avoided if possible. Just the sequence
1331a77a94f8SBorislav Petkov	  of synchronizing all cores and SMT threads is one fragile dance which does
1332a77a94f8SBorislav Petkov	  not guarantee that cores might not softlock after the loading. Therefore,
13339407bda8SThomas Gleixner	  use this at your own risk. Late loading taints the kernel unless the
13349407bda8SThomas Gleixner	  microcode header indicates that it is safe for late loading via the
13359407bda8SThomas Gleixner	  minimal revision check. This minimal revision check can be enforced on
13369407bda8SThomas Gleixner	  the kernel command line with "microcode.minrev=Y".
13379407bda8SThomas Gleixner
13389407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV
13399407bda8SThomas Gleixner	bool "Enforce late microcode loading minimal revision check"
13409407bda8SThomas Gleixner	default n
13419407bda8SThomas Gleixner	depends on MICROCODE_LATE_LOADING
13429407bda8SThomas Gleixner	help
13439407bda8SThomas Gleixner	  To prevent that users load microcode late which modifies already
13449407bda8SThomas Gleixner	  in use features, newer microcode patches have a minimum revision field
13459407bda8SThomas Gleixner	  in the microcode header, which tells the kernel which minimum
13469407bda8SThomas Gleixner	  revision must be active in the CPU to safely load that new microcode
13479407bda8SThomas Gleixner	  late into the running system. If disabled the check will not
13489407bda8SThomas Gleixner	  be enforced but the kernel will be tainted when the minimal
13499407bda8SThomas Gleixner	  revision check fails.
13509407bda8SThomas Gleixner
13519407bda8SThomas Gleixner	  This minimal revision check can also be controlled via the
13529407bda8SThomas Gleixner	  "microcode.minrev" parameter on the kernel command line.
13539407bda8SThomas Gleixner
13549407bda8SThomas Gleixner	  If unsure say Y.
1355506f1d07SSam Ravnborg
1356506f1d07SSam Ravnborgconfig X86_MSR
1357506f1d07SSam Ravnborg	tristate "/dev/cpu/*/msr - Model-specific register support"
1358a7f7f624SMasahiro Yamada	help
1359506f1d07SSam Ravnborg	  This device gives privileged processes access to the x86
1360506f1d07SSam Ravnborg	  Model-Specific Registers (MSRs).  It is a character device with
1361506f1d07SSam Ravnborg	  major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
1362506f1d07SSam Ravnborg	  MSR accesses are directed to a specific CPU on multi-processor
1363506f1d07SSam Ravnborg	  systems.
1364506f1d07SSam Ravnborg
1365506f1d07SSam Ravnborgconfig X86_CPUID
1366506f1d07SSam Ravnborg	tristate "/dev/cpu/*/cpuid - CPU information support"
1367a7f7f624SMasahiro Yamada	help
1368506f1d07SSam Ravnborg	  This device gives processes access to the x86 CPUID instruction to
1369506f1d07SSam Ravnborg	  be executed on a specific processor.  It is a character device
1370506f1d07SSam Ravnborg	  with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
1371506f1d07SSam Ravnborg	  /dev/cpu/31/cpuid.
1372506f1d07SSam Ravnborg
1373bbeb69ceSArnd Bergmannconfig HIGHMEM4G
1374bbeb69ceSArnd Bergmann	bool "High Memory Support"
1375506f1d07SSam Ravnborg	depends on X86_32
1376a7f7f624SMasahiro Yamada	help
1377bbeb69ceSArnd Bergmann	  Linux can use up to 4 Gigabytes of physical memory on x86 systems.
1378506f1d07SSam Ravnborg	  However, the address space of 32-bit x86 processors is only 4
1379506f1d07SSam Ravnborg	  Gigabytes large. That means that, if you have a large amount of
1380506f1d07SSam Ravnborg	  physical memory, not all of it can be "permanently mapped" by the
1381506f1d07SSam Ravnborg	  kernel. The physical memory that's not permanently mapped is called
1382506f1d07SSam Ravnborg	  "high memory".
1383506f1d07SSam Ravnborg
1384506f1d07SSam Ravnborg	  If you are compiling a kernel which will never run on a machine with
1385506f1d07SSam Ravnborg	  more than 1 Gigabyte total physical RAM, answer "off" here (default
1386506f1d07SSam Ravnborg	  choice and suitable for most users). This will result in a "3GB/1GB"
1387506f1d07SSam Ravnborg	  split: 3GB are mapped so that each process sees a 3GB virtual memory
1388506f1d07SSam Ravnborg	  space and the remaining part of the 4GB virtual memory space is used
1389506f1d07SSam Ravnborg	  by the kernel to permanently map as much physical memory as
1390506f1d07SSam Ravnborg	  possible.
1391506f1d07SSam Ravnborg
1392506f1d07SSam Ravnborg	  If the machine has between 1 and 4 Gigabytes physical RAM, then
1393bbeb69ceSArnd Bergmann	  answer "Y" here.
1394506f1d07SSam Ravnborg
1395bbeb69ceSArnd Bergmann	  If unsure, say N.
1396506f1d07SSam Ravnborg
1397506f1d07SSam Ravnborgchoice
13986a108a14SDavid Rientjes	prompt "Memory split" if EXPERT
1399506f1d07SSam Ravnborg	default VMSPLIT_3G
1400506f1d07SSam Ravnborg	depends on X86_32
1401a7f7f624SMasahiro Yamada	help
1402506f1d07SSam Ravnborg	  Select the desired split between kernel and user memory.
1403506f1d07SSam Ravnborg
1404506f1d07SSam Ravnborg	  If the address range available to the kernel is less than the
1405506f1d07SSam Ravnborg	  physical memory installed, the remaining memory will be available
1406506f1d07SSam Ravnborg	  as "high memory". Accessing high memory is a little more costly
1407506f1d07SSam Ravnborg	  than low memory, as it needs to be mapped into the kernel first.
1408506f1d07SSam Ravnborg	  Note that increasing the kernel address space limits the range
1409506f1d07SSam Ravnborg	  available to user programs, making the address space there
1410506f1d07SSam Ravnborg	  tighter.  Selecting anything other than the default 3G/1G split
1411506f1d07SSam Ravnborg	  will also likely make your kernel incompatible with binary-only
1412506f1d07SSam Ravnborg	  kernel modules.
1413506f1d07SSam Ravnborg
1414506f1d07SSam Ravnborg	  If you are not absolutely sure what you are doing, leave this
1415506f1d07SSam Ravnborg	  option alone!
1416506f1d07SSam Ravnborg
1417506f1d07SSam Ravnborg	config VMSPLIT_3G
1418506f1d07SSam Ravnborg		bool "3G/1G user/kernel split"
1419506f1d07SSam Ravnborg	config VMSPLIT_3G_OPT
1420506f1d07SSam Ravnborg		depends on !X86_PAE
1421506f1d07SSam Ravnborg		bool "3G/1G user/kernel split (for full 1G low memory)"
1422506f1d07SSam Ravnborg	config VMSPLIT_2G
1423506f1d07SSam Ravnborg		bool "2G/2G user/kernel split"
1424506f1d07SSam Ravnborg	config VMSPLIT_2G_OPT
1425506f1d07SSam Ravnborg		depends on !X86_PAE
1426506f1d07SSam Ravnborg		bool "2G/2G user/kernel split (for full 2G low memory)"
1427506f1d07SSam Ravnborg	config VMSPLIT_1G
1428506f1d07SSam Ravnborg		bool "1G/3G user/kernel split"
1429506f1d07SSam Ravnborgendchoice
1430506f1d07SSam Ravnborg
1431506f1d07SSam Ravnborgconfig PAGE_OFFSET
1432506f1d07SSam Ravnborg	hex
1433506f1d07SSam Ravnborg	default 0xB0000000 if VMSPLIT_3G_OPT
1434506f1d07SSam Ravnborg	default 0x80000000 if VMSPLIT_2G
1435506f1d07SSam Ravnborg	default 0x78000000 if VMSPLIT_2G_OPT
1436506f1d07SSam Ravnborg	default 0x40000000 if VMSPLIT_1G
1437506f1d07SSam Ravnborg	default 0xC0000000
1438506f1d07SSam Ravnborg	depends on X86_32
1439506f1d07SSam Ravnborg
1440506f1d07SSam Ravnborgconfig HIGHMEM
1441bbeb69ceSArnd Bergmann	def_bool HIGHMEM4G
1442506f1d07SSam Ravnborg
1443506f1d07SSam Ravnborgconfig X86_PAE
14449ba16087SJan Beulich	bool "PAE (Physical Address Extension) Support"
144588a2b4edSArnd Bergmann	depends on X86_32 && X86_HAVE_PAE
1446d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
1447a7f7f624SMasahiro Yamada	help
1448506f1d07SSam Ravnborg	  PAE is required for NX support, and furthermore enables
1449506f1d07SSam Ravnborg	  larger swapspace support for non-overcommit purposes. It
1450506f1d07SSam Ravnborg	  has the cost of more pagetable lookup overhead, and also
1451506f1d07SSam Ravnborg	  consumes more pagetable space per process.
1452506f1d07SSam Ravnborg
145377ef56e4SKirill A. Shutemovconfig X86_5LEVEL
145477ef56e4SKirill A. Shutemov	bool "Enable 5-level page tables support"
145518ec1eafSKirill A. Shutemov	default y
1456eedb92abSKirill A. Shutemov	select DYNAMIC_MEMORY_LAYOUT
1457162434e7SKirill A. Shutemov	select SPARSEMEM_VMEMMAP
145877ef56e4SKirill A. Shutemov	depends on X86_64
1459a7f7f624SMasahiro Yamada	help
146077ef56e4SKirill A. Shutemov	  5-level paging enables access to larger address space:
146177ef56e4SKirill A. Shutemov	  up to 128 PiB of virtual address space and 4 PiB of
146277ef56e4SKirill A. Shutemov	  physical address space.
146377ef56e4SKirill A. Shutemov
146477ef56e4SKirill A. Shutemov	  It will be supported by future Intel CPUs.
146577ef56e4SKirill A. Shutemov
14666657fca0SKirill A. Shutemov	  A kernel with the option enabled can be booted on machines that
14676657fca0SKirill A. Shutemov	  support 4- or 5-level paging.
146877ef56e4SKirill A. Shutemov
1469ff61f079SJonathan Corbet	  See Documentation/arch/x86/x86_64/5level-paging.rst for more
147077ef56e4SKirill A. Shutemov	  information.
147177ef56e4SKirill A. Shutemov
147277ef56e4SKirill A. Shutemov	  Say N if unsure.
147377ef56e4SKirill A. Shutemov
147410971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES
1475e5008abeSLuis R. Rodriguez	def_bool y
14762e1da13fSVlastimil Babka	depends on X86_64
1477a7f7f624SMasahiro Yamada	help
147810971ab2SIngo Molnar	  Certain kernel features effectively disable kernel
147910971ab2SIngo Molnar	  linear 1 GB mappings (even if the CPU otherwise
148010971ab2SIngo Molnar	  supports them), so don't confuse the user by printing
148110971ab2SIngo Molnar	  that we have them enabled.
14829e899816SNick Piggin
14835c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS
14845c280cf6SThomas Gleixner	bool "Enable statistic for Change Page Attribute"
14855c280cf6SThomas Gleixner	depends on DEBUG_FS
1486a7f7f624SMasahiro Yamada	help
1487b75baaf3SIngo Molnar	  Expose statistics about the Change Page Attribute mechanism, which
1488a943245aSColin Ian King	  helps to determine the effectiveness of preserving large and huge
14895c280cf6SThomas Gleixner	  page mappings when mapping protections are changed.
14905c280cf6SThomas Gleixner
149120f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT
149220f07a04SKirill A. Shutemov	select ARCH_HAS_FORCE_DMA_UNENCRYPTED
149320f07a04SKirill A. Shutemov	select DYNAMIC_PHYSICAL_MASK
149420f07a04SKirill A. Shutemov	def_bool n
149520f07a04SKirill A. Shutemov
14967744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT
14977744ccdbSTom Lendacky	bool "AMD Secure Memory Encryption (SME) support"
14987744ccdbSTom Lendacky	depends on X86_64 && CPU_SUP_AMD
14996c321179STom Lendacky	depends on EFI_STUB
150082fef0adSDavid Rientjes	select DMA_COHERENT_POOL
1501ce9084baSArd Biesheuvel	select ARCH_USE_MEMREMAP_PROT
1502597cfe48SJoerg Roedel	select INSTRUCTION_DECODER
1503aa5a4611STom Lendacky	select ARCH_HAS_CC_PLATFORM
150420f07a04SKirill A. Shutemov	select X86_MEM_ENCRYPT
15056c321179STom Lendacky	select UNACCEPTED_MEMORY
1506c5529418SNikunj A Dadhania	select CRYPTO_LIB_AESGCM
1507a7f7f624SMasahiro Yamada	help
15087744ccdbSTom Lendacky	  Say yes to enable support for the encryption of system memory.
15097744ccdbSTom Lendacky	  This requires an AMD processor that supports Secure Memory
15107744ccdbSTom Lendacky	  Encryption (SME).
15117744ccdbSTom Lendacky
1512506f1d07SSam Ravnborg# Common NUMA Features
1513506f1d07SSam Ravnborgconfig NUMA
1514e133f6eaSRandy Dunlap	bool "NUMA Memory Allocation and Scheduler Support"
1515506f1d07SSam Ravnborg	depends on SMP
15160abf5086SArnd Bergmann	depends on X86_64
15177ecd19cfSKefeng Wang	select USE_PERCPU_NUMA_NODE_ID
15180c436a58SSaurabh Sengar	select OF_NUMA if OF
1519a7f7f624SMasahiro Yamada	help
1520e133f6eaSRandy Dunlap	  Enable NUMA (Non-Uniform Memory Access) support.
1521fd51b2d7SKOSAKI Motohiro
1522506f1d07SSam Ravnborg	  The kernel will try to allocate memory used by a CPU on the
1523506f1d07SSam Ravnborg	  local memory controller of the CPU and add some more
1524506f1d07SSam Ravnborg	  NUMA awareness to the kernel.
1525506f1d07SSam Ravnborg
1526c280ea5eSIngo Molnar	  For 64-bit this is recommended if the system is Intel Core i7
1527fd51b2d7SKOSAKI Motohiro	  (or later), AMD Opteron, or EM64T NUMA.
1528fd51b2d7SKOSAKI Motohiro
1529fd51b2d7SKOSAKI Motohiro	  Otherwise, you should say N.
1530506f1d07SSam Ravnborg
1531eec1d4faSHans Rosenfeldconfig AMD_NUMA
15323c2362e6SHarvey Harrison	def_bool y
15333c2362e6SHarvey Harrison	prompt "Old style AMD Opteron NUMA detection"
15345da0ef9aSTejun Heo	depends on X86_64 && NUMA && PCI
1535a7f7f624SMasahiro Yamada	help
1536eec1d4faSHans Rosenfeld	  Enable AMD NUMA node topology detection.  You should say Y here if
1537eec1d4faSHans Rosenfeld	  you have a multi processor AMD system. This uses an old method to
1538eec1d4faSHans Rosenfeld	  read the NUMA configuration directly from the builtin Northbridge
1539eec1d4faSHans Rosenfeld	  of Opteron. It is recommended to use X86_64_ACPI_NUMA instead,
1540eec1d4faSHans Rosenfeld	  which also takes priority if both are compiled in.
1541506f1d07SSam Ravnborg
1542506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA
15433c2362e6SHarvey Harrison	def_bool y
15443c2362e6SHarvey Harrison	prompt "ACPI NUMA detection"
1545506f1d07SSam Ravnborg	depends on X86_64 && NUMA && ACPI && PCI
1546506f1d07SSam Ravnborg	select ACPI_NUMA
1547a7f7f624SMasahiro Yamada	help
1548506f1d07SSam Ravnborg	  Enable ACPI SRAT based node topology detection.
1549506f1d07SSam Ravnborg
1550506f1d07SSam Ravnborgconfig NODES_SHIFT
1551d25e26b6SLinus Torvalds	int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
155251591e31SDavid Rientjes	range 1 10
155351591e31SDavid Rientjes	default "10" if MAXSMP
1554506f1d07SSam Ravnborg	default "6" if X86_64
1555506f1d07SSam Ravnborg	default "3"
1556a9ee6cf5SMike Rapoport	depends on NUMA
1557a7f7f624SMasahiro Yamada	help
15581184dc2fSMike Travis	  Specify the maximum number of NUMA Nodes available on the target
1559692105b8SMatt LaPlante	  system.  Increases memory reserved to accommodate various tables.
1560506f1d07SSam Ravnborg
1561506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE
1562506f1d07SSam Ravnborg	def_bool y
15633b16651fSTejun Heo	depends on X86_32 && !NUMA
1564506f1d07SSam Ravnborg
1565506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE
1566506f1d07SSam Ravnborg	def_bool y
1567dcbb01fbSArnd Bergmann	depends on X86_64 || NUMA || X86_32
1568506f1d07SSam Ravnborg	select SPARSEMEM_STATIC if X86_32
1569506f1d07SSam Ravnborg	select SPARSEMEM_VMEMMAP_ENABLE if X86_64
1570506f1d07SSam Ravnborg
15713b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT
15726ad57f7fSMike Rapoport	def_bool X86_64 || (NUMA && X86_32)
15733b16651fSTejun Heo
1574506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL
1575506f1d07SSam Ravnborg	def_bool y
15764eda2bc3SDavid Hildenbrand	depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE
1577506f1d07SSam Ravnborg
1578506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE
1579a0842b70SToshi Kani	bool "Enable sysfs memory/probe interface"
15805c11f00bSDavid Hildenbrand	depends on MEMORY_HOTPLUG
1581a0842b70SToshi Kani	help
1582a0842b70SToshi Kani	  This option enables a sysfs memory/probe interface for testing.
1583cb1aaebeSMauro Carvalho Chehab	  See Documentation/admin-guide/mm/memory-hotplug.rst for more information.
1584a0842b70SToshi Kani	  If you are unsure how to answer this question, answer N.
1585506f1d07SSam Ravnborg
15863b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT
15873b16651fSTejun Heo	def_bool y
15883b16651fSTejun Heo	depends on X86_64 && PROC_KCORE
15893b16651fSTejun Heo
1590a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE
1591a29815a3SAvi Kivity	hex
1592a29815a3SAvi Kivity	default 0 if X86_32
1593a29815a3SAvi Kivity	default 0xdead000000000000 if X86_64
1594a29815a3SAvi Kivity
15957a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE
15967a67832cSDan Williams	bool
15977a67832cSDan Williams
1598ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY
15997a67832cSDan Williams	tristate "Support non-standard NVDIMMs and ADR protected memory"
16009f53f9faSDan Williams	depends on PHYS_ADDR_T_64BIT
16019f53f9faSDan Williams	depends on BLK_DEV
16027a67832cSDan Williams	select X86_PMEM_LEGACY_DEVICE
16037b27a862SDan Williams	select NUMA_KEEP_MEMINFO if NUMA
16049f53f9faSDan Williams	select LIBNVDIMM
1605ec776ef6SChristoph Hellwig	help
1606ec776ef6SChristoph Hellwig	  Treat memory marked using the non-standard e820 type of 12 as used
1607ec776ef6SChristoph Hellwig	  by the Intel Sandy Bridge-EP reference BIOS as protected memory.
1608ec776ef6SChristoph Hellwig	  The kernel will offer these regions to the 'pmem' driver so
1609ec776ef6SChristoph Hellwig	  they can be used for persistent storage.
1610ec776ef6SChristoph Hellwig
1611ec776ef6SChristoph Hellwig	  Say Y if unsure.
1612ec776ef6SChristoph Hellwig
16139f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION
16149f077871SJeremy Fitzhardinge	bool "Check for low memory corruption"
1615a7f7f624SMasahiro Yamada	help
16169f077871SJeremy Fitzhardinge	  Periodically check for memory corruption in low memory, which
16179f077871SJeremy Fitzhardinge	  is suspected to be caused by BIOS.  Even when enabled in the
16189f077871SJeremy Fitzhardinge	  configuration, it is disabled at runtime.  Enable it by
16199f077871SJeremy Fitzhardinge	  setting "memory_corruption_check=1" on the kernel command
16209f077871SJeremy Fitzhardinge	  line.  By default it scans the low 64k of memory every 60
16219f077871SJeremy Fitzhardinge	  seconds; see the memory_corruption_check_size and
16229f077871SJeremy Fitzhardinge	  memory_corruption_check_period parameters in
16238c27ceffSMauro Carvalho Chehab	  Documentation/admin-guide/kernel-parameters.rst to adjust this.
16249f077871SJeremy Fitzhardinge
16259f077871SJeremy Fitzhardinge	  When enabled with the default parameters, this option has
16269f077871SJeremy Fitzhardinge	  almost no overhead, as it reserves a relatively small amount
16279f077871SJeremy Fitzhardinge	  of memory and scans it infrequently.  It both detects corruption
16289f077871SJeremy Fitzhardinge	  and prevents it from affecting the running system.
16299f077871SJeremy Fitzhardinge
16309f077871SJeremy Fitzhardinge	  It is, however, intended as a diagnostic tool; if repeatable
16319f077871SJeremy Fitzhardinge	  BIOS-originated corruption always affects the same memory,
16329f077871SJeremy Fitzhardinge	  you can use memmap= to prevent the kernel from using that
16339f077871SJeremy Fitzhardinge	  memory.
16349f077871SJeremy Fitzhardinge
1635c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
1636c885df50SJeremy Fitzhardinge	bool "Set the default setting of memory_corruption_check"
1637c885df50SJeremy Fitzhardinge	depends on X86_CHECK_BIOS_CORRUPTION
1638c885df50SJeremy Fitzhardinge	default y
1639a7f7f624SMasahiro Yamada	help
1640c885df50SJeremy Fitzhardinge	  Set whether the default state of memory_corruption_check is
1641c885df50SJeremy Fitzhardinge	  on or off.
1642c885df50SJeremy Fitzhardinge
1643506f1d07SSam Ravnborgconfig MATH_EMULATION
1644506f1d07SSam Ravnborg	bool
1645a5b9e5a2SAndy Lutomirski	depends on MODIFY_LDT_SYSCALL
164687d6021bSArnd Bergmann	prompt "Math emulation" if X86_32 && (M486SX || MELAN)
1647a7f7f624SMasahiro Yamada	help
1648506f1d07SSam Ravnborg	  Linux can emulate a math coprocessor (used for floating point
1649506f1d07SSam Ravnborg	  operations) if you don't have one. 486DX and Pentium processors have
1650506f1d07SSam Ravnborg	  a math coprocessor built in, 486SX and 386 do not, unless you added
1651506f1d07SSam Ravnborg	  a 487DX or 387, respectively. (The messages during boot time can
1652506f1d07SSam Ravnborg	  give you some hints here ["man dmesg"].) Everyone needs either a
1653506f1d07SSam Ravnborg	  coprocessor or this emulation.
1654506f1d07SSam Ravnborg
1655506f1d07SSam Ravnborg	  If you don't have a math coprocessor, you need to say Y here; if you
1656506f1d07SSam Ravnborg	  say Y here even though you have a coprocessor, the coprocessor will
1657506f1d07SSam Ravnborg	  be used nevertheless. (This behavior can be changed with the kernel
1658506f1d07SSam Ravnborg	  command line option "no387", which comes handy if your coprocessor
1659506f1d07SSam Ravnborg	  is broken. Try "man bootparam" or see the documentation of your boot
1660506f1d07SSam Ravnborg	  loader (lilo or loadlin) about how to pass options to the kernel at
1661506f1d07SSam Ravnborg	  boot time.) This means that it is a good idea to say Y here if you
1662506f1d07SSam Ravnborg	  intend to use this kernel on different machines.
1663506f1d07SSam Ravnborg
1664506f1d07SSam Ravnborg	  More information about the internals of the Linux math coprocessor
1665506f1d07SSam Ravnborg	  emulation can be found in <file:arch/x86/math-emu/README>.
1666506f1d07SSam Ravnborg
1667506f1d07SSam Ravnborg	  If you are not sure, say Y; apart from resulting in a 66 KB bigger
1668506f1d07SSam Ravnborg	  kernel, it won't hurt.
1669506f1d07SSam Ravnborg
1670506f1d07SSam Ravnborgconfig MTRR
16716fc108a0SJan Beulich	def_bool y
16726a108a14SDavid Rientjes	prompt "MTRR (Memory Type Range Register) support" if EXPERT
1673a7f7f624SMasahiro Yamada	help
1674506f1d07SSam Ravnborg	  On Intel P6 family processors (Pentium Pro, Pentium II and later)
1675506f1d07SSam Ravnborg	  the Memory Type Range Registers (MTRRs) may be used to control
1676506f1d07SSam Ravnborg	  processor access to memory ranges. This is most useful if you have
1677506f1d07SSam Ravnborg	  a video (VGA) card on a PCI or AGP bus. Enabling write-combining
1678506f1d07SSam Ravnborg	  allows bus write transfers to be combined into a larger transfer
1679506f1d07SSam Ravnborg	  before bursting over the PCI/AGP bus. This can increase performance
1680506f1d07SSam Ravnborg	  of image write operations 2.5 times or more. Saying Y here creates a
1681506f1d07SSam Ravnborg	  /proc/mtrr file which may be used to manipulate your processor's
1682506f1d07SSam Ravnborg	  MTRRs. Typically the X server should use this.
1683506f1d07SSam Ravnborg
1684506f1d07SSam Ravnborg	  This code has a reasonably generic interface so that similar
1685506f1d07SSam Ravnborg	  control registers on other processors can be easily supported
1686506f1d07SSam Ravnborg	  as well:
1687506f1d07SSam Ravnborg
1688506f1d07SSam Ravnborg	  The Cyrix 6x86, 6x86MX and M II processors have Address Range
1689506f1d07SSam Ravnborg	  Registers (ARRs) which provide a similar functionality to MTRRs. For
1690506f1d07SSam Ravnborg	  these, the ARRs are used to emulate the MTRRs.
1691506f1d07SSam Ravnborg	  The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
1692506f1d07SSam Ravnborg	  MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
1693506f1d07SSam Ravnborg	  write-combining. All of these processors are supported by this code
1694506f1d07SSam Ravnborg	  and it makes sense to say Y here if you have one of them.
1695506f1d07SSam Ravnborg
1696506f1d07SSam Ravnborg	  Saying Y here also fixes a problem with buggy SMP BIOSes which only
1697506f1d07SSam Ravnborg	  set the MTRRs for the boot CPU and not for the secondary CPUs. This
1698506f1d07SSam Ravnborg	  can lead to all sorts of problems, so it's good to say Y here.
1699506f1d07SSam Ravnborg
1700506f1d07SSam Ravnborg	  You can safely say Y even if your machine doesn't have MTRRs, you'll
1701506f1d07SSam Ravnborg	  just add about 9 KB to your kernel.
1702506f1d07SSam Ravnborg
1703ff61f079SJonathan Corbet	  See <file:Documentation/arch/x86/mtrr.rst> for more information.
1704506f1d07SSam Ravnborg
170595ffa243SYinghai Luconfig MTRR_SANITIZER
17062ffb3501SYinghai Lu	def_bool y
170795ffa243SYinghai Lu	prompt "MTRR cleanup support"
170895ffa243SYinghai Lu	depends on MTRR
1709a7f7f624SMasahiro Yamada	help
1710aba3728cSThomas Gleixner	  Convert MTRR layout from continuous to discrete, so X drivers can
1711aba3728cSThomas Gleixner	  add writeback entries.
171295ffa243SYinghai Lu
1713aba3728cSThomas Gleixner	  Can be disabled with disable_mtrr_cleanup on the kernel command line.
1714692105b8SMatt LaPlante	  The largest mtrr entry size for a continuous block can be set with
1715aba3728cSThomas Gleixner	  mtrr_chunk_size.
171695ffa243SYinghai Lu
17172ffb3501SYinghai Lu	  If unsure, say Y.
171895ffa243SYinghai Lu
171995ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT
1720f5098d62SYinghai Lu	int "MTRR cleanup enable value (0-1)"
1721f5098d62SYinghai Lu	range 0 1
1722f5098d62SYinghai Lu	default "0"
172395ffa243SYinghai Lu	depends on MTRR_SANITIZER
1724a7f7f624SMasahiro Yamada	help
1725f5098d62SYinghai Lu	  Enable mtrr cleanup default value
172695ffa243SYinghai Lu
172712031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
172812031a62SYinghai Lu	int "MTRR cleanup spare reg num (0-7)"
172912031a62SYinghai Lu	range 0 7
173012031a62SYinghai Lu	default "1"
173112031a62SYinghai Lu	depends on MTRR_SANITIZER
1732a7f7f624SMasahiro Yamada	help
173312031a62SYinghai Lu	  mtrr cleanup spare entries default, it can be changed via
1734aba3728cSThomas Gleixner	  mtrr_spare_reg_nr=N on the kernel command line.
173512031a62SYinghai Lu
17362e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT
17376fc108a0SJan Beulich	def_bool y
17386a108a14SDavid Rientjes	prompt "x86 PAT support" if EXPERT
17392a8a2719SIngo Molnar	depends on MTRR
17407a87225aSMatthew Wilcox (Oracle)	select ARCH_USES_PG_ARCH_2
1741a7f7f624SMasahiro Yamada	help
17422e5d9c85Svenkatesh.pallipadi@intel.com	  Use PAT attributes to setup page level cache control.
1743042b78e4SVenki Pallipadi
17442e5d9c85Svenkatesh.pallipadi@intel.com	  PATs are the modern equivalents of MTRRs and are much more
17452e5d9c85Svenkatesh.pallipadi@intel.com	  flexible than MTRRs.
17462e5d9c85Svenkatesh.pallipadi@intel.com
17472e5d9c85Svenkatesh.pallipadi@intel.com	  Say N here if you see bootup problems (boot crash, boot hang,
1748042b78e4SVenki Pallipadi	  spontaneous reboots) or a non-working video driver.
17492e5d9c85Svenkatesh.pallipadi@intel.com
17502e5d9c85Svenkatesh.pallipadi@intel.com	  If unsure, say Y.
17512e5d9c85Svenkatesh.pallipadi@intel.com
1752b971880fSBabu Mogerconfig X86_UMIP
1753796ebc81SRicardo Neri	def_bool y
1754b971880fSBabu Moger	prompt "User Mode Instruction Prevention" if EXPERT
1755a7f7f624SMasahiro Yamada	help
1756b971880fSBabu Moger	  User Mode Instruction Prevention (UMIP) is a security feature in
1757b971880fSBabu Moger	  some x86 processors. If enabled, a general protection fault is
1758b971880fSBabu Moger	  issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are
1759b971880fSBabu Moger	  executed in user mode. These instructions unnecessarily expose
1760b971880fSBabu Moger	  information about the hardware state.
1761796ebc81SRicardo Neri
1762796ebc81SRicardo Neri	  The vast majority of applications do not use these instructions.
1763796ebc81SRicardo Neri	  For the very few that do, software emulation is provided in
1764796ebc81SRicardo Neri	  specific cases in protected and virtual-8086 modes. Emulated
1765796ebc81SRicardo Neri	  results are dummy.
1766aa35f896SRicardo Neri
1767156ff4a5SPeter Zijlstraconfig CC_HAS_IBT
1768156ff4a5SPeter Zijlstra	# GCC >= 9 and binutils >= 2.29
1769156ff4a5SPeter Zijlstra	# Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654
1770156ff4a5SPeter Zijlstra	# Clang/LLVM >= 14
1771262448f3SNathan Chancellor	# https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f
1772262448f3SNathan Chancellor	# https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332
1773156ff4a5SPeter Zijlstra	def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \
1774262448f3SNathan Chancellor		  (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \
1775156ff4a5SPeter Zijlstra		  $(as-instr,endbr64)
1776156ff4a5SPeter Zijlstra
177718e66b69SRick Edgecombeconfig X86_CET
177818e66b69SRick Edgecombe	def_bool n
177918e66b69SRick Edgecombe	help
178018e66b69SRick Edgecombe	  CET features configured (Shadow stack or IBT)
178118e66b69SRick Edgecombe
1782156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT
1783156ff4a5SPeter Zijlstra	prompt "Indirect Branch Tracking"
17844fd5f70cSKees Cook	def_bool y
178503f16cd0SJosh Poimboeuf	depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL
1786f6a2c2b2SNathan Chancellor	# https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f
1787f6a2c2b2SNathan Chancellor	depends on !LD_IS_LLD || LLD_VERSION >= 140000
178803f16cd0SJosh Poimboeuf	select OBJTOOL
178918e66b69SRick Edgecombe	select X86_CET
1790156ff4a5SPeter Zijlstra	help
1791156ff4a5SPeter Zijlstra	  Build the kernel with support for Indirect Branch Tracking, a
1792156ff4a5SPeter Zijlstra	  hardware support course-grain forward-edge Control Flow Integrity
1793156ff4a5SPeter Zijlstra	  protection. It enforces that all indirect calls must land on
1794156ff4a5SPeter Zijlstra	  an ENDBR instruction, as such, the compiler will instrument the
1795156ff4a5SPeter Zijlstra	  code with them to make this happen.
1796156ff4a5SPeter Zijlstra
1797ed53a0d9SPeter Zijlstra	  In addition to building the kernel with IBT, seal all functions that
17984cdfc11bSNur Hussein	  are not indirect call targets, avoiding them ever becoming one.
1799ed53a0d9SPeter Zijlstra
1800ed53a0d9SPeter Zijlstra	  This requires LTO like objtool runs and will slow down the build. It
1801ed53a0d9SPeter Zijlstra	  does significantly reduce the number of ENDBR instructions in the
1802ed53a0d9SPeter Zijlstra	  kernel image.
1803ed53a0d9SPeter Zijlstra
180435e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS
180538f3e775SBabu Moger	prompt "Memory Protection Keys"
180635e97790SDave Hansen	def_bool y
1807284244a9SDave Hansen	# Note: only available in 64-bit mode
180838f3e775SBabu Moger	depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD)
180952c8e601SIngo Molnar	select ARCH_USES_HIGH_VMA_FLAGS
181052c8e601SIngo Molnar	select ARCH_HAS_PKEYS
1811a7f7f624SMasahiro Yamada	help
1812284244a9SDave Hansen	  Memory Protection Keys provides a mechanism for enforcing
1813284244a9SDave Hansen	  page-based protections, but without requiring modification of the
1814284244a9SDave Hansen	  page tables when an application changes protection domains.
1815284244a9SDave Hansen
18161eecbcdcSMauro Carvalho Chehab	  For details, see Documentation/core-api/protection-keys.rst
1817284244a9SDave Hansen
1818284244a9SDave Hansen	  If unsure, say y.
181935e97790SDave Hansen
18205626f8d4SJoey Goulyconfig ARCH_PKEY_BITS
18215626f8d4SJoey Gouly	int
18225626f8d4SJoey Gouly	default 4
18235626f8d4SJoey Gouly
1824db616173SMichal Hockochoice
1825db616173SMichal Hocko	prompt "TSX enable mode"
1826db616173SMichal Hocko	depends on CPU_SUP_INTEL
1827db616173SMichal Hocko	default X86_INTEL_TSX_MODE_OFF
1828db616173SMichal Hocko	help
1829db616173SMichal Hocko	  Intel's TSX (Transactional Synchronization Extensions) feature
1830db616173SMichal Hocko	  allows to optimize locking protocols through lock elision which
1831db616173SMichal Hocko	  can lead to a noticeable performance boost.
1832db616173SMichal Hocko
1833db616173SMichal Hocko	  On the other hand it has been shown that TSX can be exploited
1834db616173SMichal Hocko	  to form side channel attacks (e.g. TAA) and chances are there
1835db616173SMichal Hocko	  will be more of those attacks discovered in the future.
1836db616173SMichal Hocko
1837db616173SMichal Hocko	  Therefore TSX is not enabled by default (aka tsx=off). An admin
1838db616173SMichal Hocko	  might override this decision by tsx=on the command line parameter.
1839db616173SMichal Hocko	  Even with TSX enabled, the kernel will attempt to enable the best
1840db616173SMichal Hocko	  possible TAA mitigation setting depending on the microcode available
1841db616173SMichal Hocko	  for the particular machine.
1842db616173SMichal Hocko
1843db616173SMichal Hocko	  This option allows to set the default tsx mode between tsx=on, =off
1844db616173SMichal Hocko	  and =auto. See Documentation/admin-guide/kernel-parameters.txt for more
1845db616173SMichal Hocko	  details.
1846db616173SMichal Hocko
1847db616173SMichal Hocko	  Say off if not sure, auto if TSX is in use but it should be used on safe
1848db616173SMichal Hocko	  platforms or on if TSX is in use and the security aspect of tsx is not
1849db616173SMichal Hocko	  relevant.
1850db616173SMichal Hocko
1851db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF
1852db616173SMichal Hocko	bool "off"
1853db616173SMichal Hocko	help
1854db616173SMichal Hocko	  TSX is disabled if possible - equals to tsx=off command line parameter.
1855db616173SMichal Hocko
1856db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON
1857db616173SMichal Hocko	bool "on"
1858db616173SMichal Hocko	help
1859db616173SMichal Hocko	  TSX is always enabled on TSX capable HW - equals the tsx=on command
1860db616173SMichal Hocko	  line parameter.
1861db616173SMichal Hocko
1862db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO
1863db616173SMichal Hocko	bool "auto"
1864db616173SMichal Hocko	help
1865db616173SMichal Hocko	  TSX is enabled on TSX capable HW that is believed to be safe against
1866db616173SMichal Hocko	  side channel attacks- equals the tsx=auto command line parameter.
1867db616173SMichal Hockoendchoice
1868db616173SMichal Hocko
1869e7e05452SSean Christophersonconfig X86_SGX
1870e7e05452SSean Christopherson	bool "Software Guard eXtensions (SGX)"
1871b8d1d163SDaniel Sneddon	depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC
1872e7e05452SSean Christopherson	depends on CRYPTO=y
1873e7e05452SSean Christopherson	depends on CRYPTO_SHA256=y
1874e7e05452SSean Christopherson	select MMU_NOTIFIER
1875901ddbb9SJarkko Sakkinen	select NUMA_KEEP_MEMINFO if NUMA
187640e0e784STony Luck	select XARRAY_MULTI
1877e7e05452SSean Christopherson	help
1878e7e05452SSean Christopherson	  Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions
1879e7e05452SSean Christopherson	  that can be used by applications to set aside private regions of code
1880e7e05452SSean Christopherson	  and data, referred to as enclaves. An enclave's private memory can
1881e7e05452SSean Christopherson	  only be accessed by code running within the enclave. Accesses from
1882e7e05452SSean Christopherson	  outside the enclave, including other enclaves, are disallowed by
1883e7e05452SSean Christopherson	  hardware.
1884e7e05452SSean Christopherson
1885e7e05452SSean Christopherson	  If unsure, say N.
1886e7e05452SSean Christopherson
188718e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK
188818e66b69SRick Edgecombe	bool "X86 userspace shadow stack"
188918e66b69SRick Edgecombe	depends on AS_WRUSS
189018e66b69SRick Edgecombe	depends on X86_64
189118e66b69SRick Edgecombe	select ARCH_USES_HIGH_VMA_FLAGS
1892bcc9d04eSMark Brown	select ARCH_HAS_USER_SHADOW_STACK
189318e66b69SRick Edgecombe	select X86_CET
189418e66b69SRick Edgecombe	help
189518e66b69SRick Edgecombe	  Shadow stack protection is a hardware feature that detects function
189618e66b69SRick Edgecombe	  return address corruption.  This helps mitigate ROP attacks.
189718e66b69SRick Edgecombe	  Applications must be enabled to use it, and old userspace does not
189818e66b69SRick Edgecombe	  get protection "for free".
189918e66b69SRick Edgecombe
190018e66b69SRick Edgecombe	  CPUs supporting shadow stacks were first released in 2020.
190118e66b69SRick Edgecombe
190254acee60SDave Hansen	  See Documentation/arch/x86/shstk.rst for more information.
190318e66b69SRick Edgecombe
190418e66b69SRick Edgecombe	  If unsure, say N.
190518e66b69SRick Edgecombe
1906c33621b4SKai Huangconfig INTEL_TDX_HOST
1907c33621b4SKai Huang	bool "Intel Trust Domain Extensions (TDX) host support"
1908c33621b4SKai Huang	depends on CPU_SUP_INTEL
1909c33621b4SKai Huang	depends on X86_64
1910c33621b4SKai Huang	depends on KVM_INTEL
19113115cabdSKai Huang	depends on X86_X2APIC
1912abe8dbabSKai Huang	select ARCH_KEEP_MEMBLOCK
1913ac3a2208SKai Huang	depends on CONTIG_ALLOC
1914cb8eb06dSDave Hansen	depends on !KEXEC_CORE
191583e1bdc9SKai Huang	depends on X86_MCE
1916c33621b4SKai Huang	help
1917c33621b4SKai Huang	  Intel Trust Domain Extensions (TDX) protects guest VMs from malicious
1918c33621b4SKai Huang	  host and certain physical attacks.  This option enables necessary TDX
1919c33621b4SKai Huang	  support in the host kernel to run confidential VMs.
1920c33621b4SKai Huang
1921c33621b4SKai Huang	  If unsure, say N.
1922c33621b4SKai Huang
1923506f1d07SSam Ravnborgconfig EFI
19249ba16087SJan Beulich	bool "EFI runtime service support"
19255b83683fSHuang, Ying	depends on ACPI
1926f6ce5002SSergey Vlasov	select UCS2_STRING
1927022ee6c5SArd Biesheuvel	select EFI_RUNTIME_WRAPPERS
19281ff2fc02STom Lendacky	select ARCH_USE_MEMREMAP_PROT
1929aba7e066SArd Biesheuvel	select EFI_RUNTIME_MAP if KEXEC_CORE
1930a7f7f624SMasahiro Yamada	help
19318b2cb7a8SHuang, Ying	  This enables the kernel to use EFI runtime services that are
1932506f1d07SSam Ravnborg	  available (such as the EFI variable services).
1933506f1d07SSam Ravnborg
19348b2cb7a8SHuang, Ying	  This option is only useful on systems that have EFI firmware.
19358b2cb7a8SHuang, Ying	  In addition, you should use the latest ELILO loader available
19368b2cb7a8SHuang, Ying	  at <http://elilo.sourceforge.net> in order to take advantage
19378b2cb7a8SHuang, Ying	  of EFI runtime services. However, even with this option, the
19388b2cb7a8SHuang, Ying	  resultant kernel should continue to boot on existing non-EFI
19398b2cb7a8SHuang, Ying	  platforms.
1940506f1d07SSam Ravnborg
1941291f3632SMatt Flemingconfig EFI_STUB
1942291f3632SMatt Fleming	bool "EFI stub support"
1943c6dbd3e5SPeter Zijlstra	depends on EFI
19447b2a583aSMatt Fleming	select RELOCATABLE
1945a7f7f624SMasahiro Yamada	help
1946291f3632SMatt Fleming	  This kernel feature allows a bzImage to be loaded directly
1947291f3632SMatt Fleming	  by EFI firmware without the use of a bootloader.
1948291f3632SMatt Fleming
19494f4cfa6cSMauro Carvalho Chehab	  See Documentation/admin-guide/efi-stub.rst for more information.
19500c759662SMatt Fleming
1951cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL
1952cc3fdda2SArd Biesheuvel	bool "EFI handover protocol (DEPRECATED)"
1953cc3fdda2SArd Biesheuvel	depends on EFI_STUB
1954cc3fdda2SArd Biesheuvel	default y
1955cc3fdda2SArd Biesheuvel	help
1956cc3fdda2SArd Biesheuvel	  Select this in order to include support for the deprecated EFI
1957cc3fdda2SArd Biesheuvel	  handover protocol, which defines alternative entry points into the
1958cc3fdda2SArd Biesheuvel	  EFI stub.  This is a practice that has no basis in the UEFI
1959cc3fdda2SArd Biesheuvel	  specification, and requires a priori knowledge on the part of the
1960cc3fdda2SArd Biesheuvel	  bootloader about Linux/x86 specific ways of passing the command line
1961cc3fdda2SArd Biesheuvel	  and initrd, and where in memory those assets may be loaded.
1962cc3fdda2SArd Biesheuvel
1963cc3fdda2SArd Biesheuvel	  If in doubt, say Y. Even though the corresponding support is not
1964cc3fdda2SArd Biesheuvel	  present in upstream GRUB or other bootloaders, most distros build
1965cc3fdda2SArd Biesheuvel	  GRUB with numerous downstream patches applied, and may rely on the
1966cc3fdda2SArd Biesheuvel	  handover protocol as as result.
1967cc3fdda2SArd Biesheuvel
19687d453eeeSMatt Flemingconfig EFI_MIXED
19697d453eeeSMatt Fleming	bool "EFI mixed-mode support"
19707d453eeeSMatt Fleming	depends on EFI_STUB && X86_64
1971a7f7f624SMasahiro Yamada	help
19727d453eeeSMatt Fleming	  Enabling this feature allows a 64-bit kernel to be booted
19737d453eeeSMatt Fleming	  on a 32-bit firmware, provided that your CPU supports 64-bit
19747d453eeeSMatt Fleming	  mode.
19757d453eeeSMatt Fleming
19767d453eeeSMatt Fleming	  Note that it is not possible to boot a mixed-mode enabled
19777d453eeeSMatt Fleming	  kernel via the EFI boot stub - a bootloader that supports
19787d453eeeSMatt Fleming	  the EFI handover protocol must be used.
19797d453eeeSMatt Fleming
19807d453eeeSMatt Fleming	  If unsure, say N.
19817d453eeeSMatt Fleming
19821fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP
19831fff234dSArd Biesheuvel	bool "Export EFI runtime maps to sysfs" if EXPERT
19841fff234dSArd Biesheuvel	depends on EFI
19851fff234dSArd Biesheuvel	help
19861fff234dSArd Biesheuvel	  Export EFI runtime memory regions to /sys/firmware/efi/runtime-map.
19871fff234dSArd Biesheuvel	  That memory map is required by the 2nd kernel to set up EFI virtual
19881fff234dSArd Biesheuvel	  mappings after kexec, but can also be used for debugging purposes.
19891fff234dSArd Biesheuvel
19901fff234dSArd Biesheuvel	  See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map.
19911fff234dSArd Biesheuvel
19928636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz"
1993506f1d07SSam Ravnborg
19946af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC
19956af51380SEric DeVolder	def_bool y
1996506f1d07SSam Ravnborg
19976af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE
1998c1ad12eeSArnd Bergmann	def_bool X86_64
1999506f1d07SSam Ravnborg
20006af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE
20016af51380SEric DeVolder	def_bool y
20026af51380SEric DeVolder	depends on KEXEC_FILE
2003b69a2afdSJonathan McDowell	select HAVE_IMA_KEXEC if IMA
200474ca317cSVivek Goyal
2005e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY
2006c1ad12eeSArnd Bergmann	def_bool y
2007b799a09fSAKASHI Takahiro
20086af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG
20096af51380SEric DeVolder	def_bool y
201099d5cadfSJiri Bohac
20116af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE
20126af51380SEric DeVolder	def_bool y
201399d5cadfSJiri Bohac
20146af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG
20156af51380SEric DeVolder	def_bool y
201699d5cadfSJiri Bohac
20176af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP
20186af51380SEric DeVolder	def_bool y
20198e7d8381SVivek Goyal
20206af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP
20216af51380SEric DeVolder	def_bool X86_64 || (X86_32 && HIGHMEM)
20228e7d8381SVivek Goyal
202331daa343SDave Vasilevskyconfig ARCH_DEFAULT_CRASH_DUMP
202431daa343SDave Vasilevsky	def_bool y
202531daa343SDave Vasilevsky
2026ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG
2027ea53ad9cSEric DeVolder	def_bool y
20283ab83521SHuang Ying
20299c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
203085fcde40SBaoquan He	def_bool CRASH_RESERVE
20319c08a2a1SBaoquan He
2032506f1d07SSam Ravnborgconfig PHYSICAL_START
20336a108a14SDavid Rientjes	hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
2034ceefccc9SH. Peter Anvin	default "0x1000000"
2035a7f7f624SMasahiro Yamada	help
2036506f1d07SSam Ravnborg	  This gives the physical address where the kernel is loaded.
2037506f1d07SSam Ravnborg
203843b1d3e6SChris Koch	  If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage
203943b1d3e6SChris Koch	  will decompress itself to above physical address and run from there.
204043b1d3e6SChris Koch	  Otherwise, bzImage will run from the address where it has been loaded
204143b1d3e6SChris Koch	  by the boot loader. The only exception is if it is loaded below the
204243b1d3e6SChris Koch	  above physical address, in which case it will relocate itself there.
2043506f1d07SSam Ravnborg
2044506f1d07SSam Ravnborg	  In normal kdump cases one does not have to set/change this option
2045506f1d07SSam Ravnborg	  as now bzImage can be compiled as a completely relocatable image
2046506f1d07SSam Ravnborg	  (CONFIG_RELOCATABLE=y) and be used to load and run from a different
2047506f1d07SSam Ravnborg	  address. This option is mainly useful for the folks who don't want
2048506f1d07SSam Ravnborg	  to use a bzImage for capturing the crash dump and want to use a
2049506f1d07SSam Ravnborg	  vmlinux instead. vmlinux is not relocatable hence a kernel needs
2050506f1d07SSam Ravnborg	  to be specifically compiled to run from a specific memory area
2051506f1d07SSam Ravnborg	  (normally a reserved region) and this option comes handy.
2052506f1d07SSam Ravnborg
2053ceefccc9SH. Peter Anvin	  So if you are using bzImage for capturing the crash dump,
2054ceefccc9SH. Peter Anvin	  leave the value here unchanged to 0x1000000 and set
2055ceefccc9SH. Peter Anvin	  CONFIG_RELOCATABLE=y.  Otherwise if you plan to use vmlinux
2056ceefccc9SH. Peter Anvin	  for capturing the crash dump change this value to start of
2057ceefccc9SH. Peter Anvin	  the reserved region.  In other words, it can be set based on
2058ceefccc9SH. Peter Anvin	  the "X" value as specified in the "crashkernel=YM@XM"
2059ceefccc9SH. Peter Anvin	  command line boot parameter passed to the panic-ed
2060330d4810SMauro Carvalho Chehab	  kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst
2061ceefccc9SH. Peter Anvin	  for more details about crash dumps.
2062506f1d07SSam Ravnborg
2063506f1d07SSam Ravnborg	  Usage of bzImage for capturing the crash dump is recommended as
2064506f1d07SSam Ravnborg	  one does not have to build two kernels. Same kernel can be used
2065506f1d07SSam Ravnborg	  as production kernel and capture kernel. Above option should have
2066506f1d07SSam Ravnborg	  gone away after relocatable bzImage support is introduced. But it
2067506f1d07SSam Ravnborg	  is present because there are users out there who continue to use
2068506f1d07SSam Ravnborg	  vmlinux for dump capture. This option should go away down the
2069506f1d07SSam Ravnborg	  line.
2070506f1d07SSam Ravnborg
2071506f1d07SSam Ravnborg	  Don't change this unless you know what you are doing.
2072506f1d07SSam Ravnborg
2073506f1d07SSam Ravnborgconfig RELOCATABLE
207426717808SH. Peter Anvin	bool "Build a relocatable kernel"
207526717808SH. Peter Anvin	default y
2076a7f7f624SMasahiro Yamada	help
2077506f1d07SSam Ravnborg	  This builds a kernel image that retains relocation information
2078506f1d07SSam Ravnborg	  so it can be loaded someplace besides the default 1MB.
2079506f1d07SSam Ravnborg	  The relocations tend to make the kernel binary about 10% larger,
2080506f1d07SSam Ravnborg	  but are discarded at runtime.
2081506f1d07SSam Ravnborg
2082506f1d07SSam Ravnborg	  One use is for the kexec on panic case where the recovery kernel
2083506f1d07SSam Ravnborg	  must live at a different physical address than the primary
2084506f1d07SSam Ravnborg	  kernel.
2085506f1d07SSam Ravnborg
2086506f1d07SSam Ravnborg	  Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
2087506f1d07SSam Ravnborg	  it has been loaded at and the compile time physical address
20888ab3820fSKees Cook	  (CONFIG_PHYSICAL_START) is used as the minimum location.
2089506f1d07SSam Ravnborg
20908ab3820fSKees Cookconfig RANDOMIZE_BASE
2091e8581e3dSBaoquan He	bool "Randomize the address of the kernel image (KASLR)"
20928ab3820fSKees Cook	depends on RELOCATABLE
20936807c846SIngo Molnar	default y
2094a7f7f624SMasahiro Yamada	help
2095e8581e3dSBaoquan He	  In support of Kernel Address Space Layout Randomization (KASLR),
2096e8581e3dSBaoquan He	  this randomizes the physical address at which the kernel image
2097e8581e3dSBaoquan He	  is decompressed and the virtual address where the kernel
2098e8581e3dSBaoquan He	  image is mapped, as a security feature that deters exploit
2099e8581e3dSBaoquan He	  attempts relying on knowledge of the location of kernel
2100e8581e3dSBaoquan He	  code internals.
2101e8581e3dSBaoquan He
2102ed9f007eSKees Cook	  On 64-bit, the kernel physical and virtual addresses are
2103ed9f007eSKees Cook	  randomized separately. The physical address will be anywhere
2104ed9f007eSKees Cook	  between 16MB and the top of physical memory (up to 64TB). The
2105ed9f007eSKees Cook	  virtual address will be randomized from 16MB up to 1GB (9 bits
2106ed9f007eSKees Cook	  of entropy). Note that this also reduces the memory space
2107ed9f007eSKees Cook	  available to kernel modules from 1.5GB to 1GB.
2108ed9f007eSKees Cook
2109ed9f007eSKees Cook	  On 32-bit, the kernel physical and virtual addresses are
2110ed9f007eSKees Cook	  randomized together. They will be randomized from 16MB up to
2111ed9f007eSKees Cook	  512MB (8 bits of entropy).
21128ab3820fSKees Cook
2113a653f356SKees Cook	  Entropy is generated using the RDRAND instruction if it is
2114e8581e3dSBaoquan He	  supported. If RDTSC is supported, its value is mixed into
2115e8581e3dSBaoquan He	  the entropy pool as well. If neither RDRAND nor RDTSC are
2116ed9f007eSKees Cook	  supported, then entropy is read from the i8254 timer. The
2117ed9f007eSKees Cook	  usable entropy is limited by the kernel being built using
2118ed9f007eSKees Cook	  2GB addressing, and that PHYSICAL_ALIGN must be at a
2119ed9f007eSKees Cook	  minimum of 2MB. As a result, only 10 bits of entropy are
2120ed9f007eSKees Cook	  theoretically possible, but the implementations are further
2121ed9f007eSKees Cook	  limited due to memory layouts.
2122e8581e3dSBaoquan He
21236807c846SIngo Molnar	  If unsure, say Y.
2124da2b6fb9SKees Cook
21258ab3820fSKees Cook# Relocation on x86 needs some additional build support
2126845adf72SH. Peter Anvinconfig X86_NEED_RELOCS
2127845adf72SH. Peter Anvin	def_bool y
21288ab3820fSKees Cook	depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE)
2129845adf72SH. Peter Anvin
2130506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN
2131a0215061SKees Cook	hex "Alignment value to which kernel should be aligned"
21328ab3820fSKees Cook	default "0x200000"
2133a0215061SKees Cook	range 0x2000 0x1000000 if X86_32
2134a0215061SKees Cook	range 0x200000 0x1000000 if X86_64
2135a7f7f624SMasahiro Yamada	help
2136506f1d07SSam Ravnborg	  This value puts the alignment restrictions on physical address
2137506f1d07SSam Ravnborg	  where kernel is loaded and run from. Kernel is compiled for an
2138506f1d07SSam Ravnborg	  address which meets above alignment restriction.
2139506f1d07SSam Ravnborg
2140506f1d07SSam Ravnborg	  If bootloader loads the kernel at a non-aligned address and
2141506f1d07SSam Ravnborg	  CONFIG_RELOCATABLE is set, kernel will move itself to nearest
2142506f1d07SSam Ravnborg	  address aligned to above value and run from there.
2143506f1d07SSam Ravnborg
2144506f1d07SSam Ravnborg	  If bootloader loads the kernel at a non-aligned address and
2145506f1d07SSam Ravnborg	  CONFIG_RELOCATABLE is not set, kernel will ignore the run time
2146506f1d07SSam Ravnborg	  load address and decompress itself to the address it has been
2147506f1d07SSam Ravnborg	  compiled for and run from there. The address for which kernel is
2148506f1d07SSam Ravnborg	  compiled already meets above alignment restrictions. Hence the
2149506f1d07SSam Ravnborg	  end result is that kernel runs from a physical address meeting
2150506f1d07SSam Ravnborg	  above alignment restrictions.
2151506f1d07SSam Ravnborg
2152a0215061SKees Cook	  On 32-bit this value must be a multiple of 0x2000. On 64-bit
2153a0215061SKees Cook	  this value must be a multiple of 0x200000.
2154a0215061SKees Cook
2155506f1d07SSam Ravnborg	  Don't change this unless you know what you are doing.
2156506f1d07SSam Ravnborg
2157eedb92abSKirill A. Shutemovconfig DYNAMIC_MEMORY_LAYOUT
2158eedb92abSKirill A. Shutemov	bool
2159a7f7f624SMasahiro Yamada	help
2160eedb92abSKirill A. Shutemov	  This option makes base addresses of vmalloc and vmemmap as well as
2161eedb92abSKirill A. Shutemov	  __PAGE_OFFSET movable during boot.
2162eedb92abSKirill A. Shutemov
21630483e1faSThomas Garnierconfig RANDOMIZE_MEMORY
21640483e1faSThomas Garnier	bool "Randomize the kernel memory sections"
21650483e1faSThomas Garnier	depends on X86_64
21660483e1faSThomas Garnier	depends on RANDOMIZE_BASE
2167eedb92abSKirill A. Shutemov	select DYNAMIC_MEMORY_LAYOUT
21680483e1faSThomas Garnier	default RANDOMIZE_BASE
2169a7f7f624SMasahiro Yamada	help
21700483e1faSThomas Garnier	  Randomizes the base virtual address of kernel memory sections
21710483e1faSThomas Garnier	  (physical memory mapping, vmalloc & vmemmap). This security feature
21720483e1faSThomas Garnier	  makes exploits relying on predictable memory locations less reliable.
21730483e1faSThomas Garnier
21740483e1faSThomas Garnier	  The order of allocations remains unchanged. Entropy is generated in
21750483e1faSThomas Garnier	  the same way as RANDOMIZE_BASE. Current implementation in the optimal
21760483e1faSThomas Garnier	  configuration have in average 30,000 different possible virtual
21770483e1faSThomas Garnier	  addresses for each memory section.
21780483e1faSThomas Garnier
21796807c846SIngo Molnar	  If unsure, say Y.
21800483e1faSThomas Garnier
218190397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING
218290397a41SThomas Garnier	hex "Physical memory mapping padding" if EXPERT
218390397a41SThomas Garnier	depends on RANDOMIZE_MEMORY
218490397a41SThomas Garnier	default "0xa" if MEMORY_HOTPLUG
218590397a41SThomas Garnier	default "0x0"
218690397a41SThomas Garnier	range 0x1 0x40 if MEMORY_HOTPLUG
218790397a41SThomas Garnier	range 0x0 0x40
2188a7f7f624SMasahiro Yamada	help
218990397a41SThomas Garnier	  Define the padding in terabytes added to the existing physical
219090397a41SThomas Garnier	  memory size during kernel memory randomization. It is useful
219190397a41SThomas Garnier	  for memory hotplug support but reduces the entropy available for
219290397a41SThomas Garnier	  address randomization.
219390397a41SThomas Garnier
219490397a41SThomas Garnier	  If unsure, leave at the default value.
219590397a41SThomas Garnier
21966449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING
21976449dcb0SKirill A. Shutemov	bool "Linear Address Masking support"
21986449dcb0SKirill A. Shutemov	depends on X86_64
21993267cb6dSPawan Gupta	depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS
22006449dcb0SKirill A. Shutemov	help
22016449dcb0SKirill A. Shutemov	  Linear Address Masking (LAM) modifies the checking that is applied
22026449dcb0SKirill A. Shutemov	  to 64-bit linear addresses, allowing software to use of the
22036449dcb0SKirill A. Shutemov	  untranslated address bits for metadata.
22046449dcb0SKirill A. Shutemov
22056449dcb0SKirill A. Shutemov	  The capability can be used for efficient address sanitizers (ASAN)
22066449dcb0SKirill A. Shutemov	  implementation and for optimizations in JITs.
22076449dcb0SKirill A. Shutemov
2208506f1d07SSam Ravnborgconfig HOTPLUG_CPU
2209bebd024eSThomas Gleixner	def_bool y
221040b31360SStephen Rothwell	depends on SMP
2211506f1d07SSam Ravnborg
2212506f1d07SSam Ravnborgconfig COMPAT_VDSO
2213b0b49f26SAndy Lutomirski	def_bool n
2214b0b49f26SAndy Lutomirski	prompt "Disable the 32-bit vDSO (needed for glibc 2.3.3)"
2215953fee1dSIngo Molnar	depends on COMPAT_32
2216a7f7f624SMasahiro Yamada	help
2217b0b49f26SAndy Lutomirski	  Certain buggy versions of glibc will crash if they are
2218b0b49f26SAndy Lutomirski	  presented with a 32-bit vDSO that is not mapped at the address
2219b0b49f26SAndy Lutomirski	  indicated in its segment table.
2220e84446deSRandy Dunlap
2221b0b49f26SAndy Lutomirski	  The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a
2222b0b49f26SAndy Lutomirski	  and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and
2223b0b49f26SAndy Lutomirski	  49ad572a70b8aeb91e57483a11dd1b77e31c4468.  Glibc 2.3.3 is
2224b0b49f26SAndy Lutomirski	  the only released version with the bug, but OpenSUSE 9
2225b0b49f26SAndy Lutomirski	  contains a buggy "glibc 2.3.2".
2226506f1d07SSam Ravnborg
2227b0b49f26SAndy Lutomirski	  The symptom of the bug is that everything crashes on startup, saying:
2228b0b49f26SAndy Lutomirski	  dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed!
2229b0b49f26SAndy Lutomirski
2230b0b49f26SAndy Lutomirski	  Saying Y here changes the default value of the vdso32 boot
2231b0b49f26SAndy Lutomirski	  option from 1 to 0, which turns off the 32-bit vDSO entirely.
2232b0b49f26SAndy Lutomirski	  This works around the glibc bug but hurts performance.
2233b0b49f26SAndy Lutomirski
2234b0b49f26SAndy Lutomirski	  If unsure, say N: if you are compiling your own kernel, you
2235b0b49f26SAndy Lutomirski	  are unlikely to be using a buggy version of glibc.
2236506f1d07SSam Ravnborg
22373dc33bd3SKees Cookchoice
22383dc33bd3SKees Cook	prompt "vsyscall table for legacy applications"
22393dc33bd3SKees Cook	depends on X86_64
2240625b7b7fSAndy Lutomirski	default LEGACY_VSYSCALL_XONLY
22413dc33bd3SKees Cook	help
22423dc33bd3SKees Cook	  Legacy user code that does not know how to find the vDSO expects
22433dc33bd3SKees Cook	  to be able to issue three syscalls by calling fixed addresses in
22443dc33bd3SKees Cook	  kernel space. Since this location is not randomized with ASLR,
22453dc33bd3SKees Cook	  it can be used to assist security vulnerability exploitation.
22463dc33bd3SKees Cook
22473dc33bd3SKees Cook	  This setting can be changed at boot time via the kernel command
2248bf00745eSAndy Lutomirski	  line parameter vsyscall=[emulate|xonly|none].  Emulate mode
2249bf00745eSAndy Lutomirski	  is deprecated and can only be enabled using the kernel command
2250bf00745eSAndy Lutomirski	  line.
22513dc33bd3SKees Cook
22523dc33bd3SKees Cook	  On a system with recent enough glibc (2.14 or newer) and no
22533dc33bd3SKees Cook	  static binaries, you can say None without a performance penalty
22543dc33bd3SKees Cook	  to improve security.
22553dc33bd3SKees Cook
2256bd49e16eSAndy Lutomirski	  If unsure, select "Emulate execution only".
22573dc33bd3SKees Cook
2258bd49e16eSAndy Lutomirski	config LEGACY_VSYSCALL_XONLY
2259bd49e16eSAndy Lutomirski		bool "Emulate execution only"
2260bd49e16eSAndy Lutomirski		help
2261bd49e16eSAndy Lutomirski		  The kernel traps and emulates calls into the fixed vsyscall
2262bd49e16eSAndy Lutomirski		  address mapping and does not allow reads.  This
2263bd49e16eSAndy Lutomirski		  configuration is recommended when userspace might use the
2264bd49e16eSAndy Lutomirski		  legacy vsyscall area but support for legacy binary
2265bd49e16eSAndy Lutomirski		  instrumentation of legacy code is not needed.  It mitigates
2266bd49e16eSAndy Lutomirski		  certain uses of the vsyscall area as an ASLR-bypassing
2267bd49e16eSAndy Lutomirski		  buffer.
22683dc33bd3SKees Cook
22693dc33bd3SKees Cook	config LEGACY_VSYSCALL_NONE
22703dc33bd3SKees Cook		bool "None"
22713dc33bd3SKees Cook		help
22723dc33bd3SKees Cook		  There will be no vsyscall mapping at all. This will
22733dc33bd3SKees Cook		  eliminate any risk of ASLR bypass due to the vsyscall
22743dc33bd3SKees Cook		  fixed address mapping. Attempts to use the vsyscalls
22753dc33bd3SKees Cook		  will be reported to dmesg, so that either old or
22763dc33bd3SKees Cook		  malicious userspace programs can be identified.
22773dc33bd3SKees Cook
22783dc33bd3SKees Cookendchoice
22793dc33bd3SKees Cook
2280516cbf37STim Birdconfig CMDLINE_BOOL
2281516cbf37STim Bird	bool "Built-in kernel command line"
2282a7f7f624SMasahiro Yamada	help
2283516cbf37STim Bird	  Allow for specifying boot arguments to the kernel at
2284516cbf37STim Bird	  build time.  On some systems (e.g. embedded ones), it is
2285516cbf37STim Bird	  necessary or convenient to provide some or all of the
2286516cbf37STim Bird	  kernel boot arguments with the kernel itself (that is,
2287516cbf37STim Bird	  to not rely on the boot loader to provide them.)
2288516cbf37STim Bird
2289516cbf37STim Bird	  To compile command line arguments into the kernel,
2290516cbf37STim Bird	  set this option to 'Y', then fill in the
229169711ca1SSébastien Hinderer	  boot arguments in CONFIG_CMDLINE.
2292516cbf37STim Bird
2293516cbf37STim Bird	  Systems with fully functional boot loaders (i.e. non-embedded)
2294516cbf37STim Bird	  should leave this option set to 'N'.
2295516cbf37STim Bird
2296516cbf37STim Birdconfig CMDLINE
2297516cbf37STim Bird	string "Built-in kernel command string"
2298516cbf37STim Bird	depends on CMDLINE_BOOL
2299516cbf37STim Bird	default ""
2300a7f7f624SMasahiro Yamada	help
2301516cbf37STim Bird	  Enter arguments here that should be compiled into the kernel
2302516cbf37STim Bird	  image and used at boot time.  If the boot loader provides a
2303516cbf37STim Bird	  command line at boot time, it is appended to this string to
2304516cbf37STim Bird	  form the full kernel command line, when the system boots.
2305516cbf37STim Bird
2306516cbf37STim Bird	  However, you can use the CONFIG_CMDLINE_OVERRIDE option to
2307516cbf37STim Bird	  change this behavior.
2308516cbf37STim Bird
2309516cbf37STim Bird	  In most cases, the command line (whether built-in or provided
2310516cbf37STim Bird	  by the boot loader) should specify the device for the root
2311516cbf37STim Bird	  file system.
2312516cbf37STim Bird
2313516cbf37STim Birdconfig CMDLINE_OVERRIDE
2314516cbf37STim Bird	bool "Built-in command line overrides boot loader arguments"
2315645e6466SAnders Roxell	depends on CMDLINE_BOOL && CMDLINE != ""
2316a7f7f624SMasahiro Yamada	help
2317516cbf37STim Bird	  Set this option to 'Y' to have the kernel ignore the boot loader
2318516cbf37STim Bird	  command line, and use ONLY the built-in command line.
2319516cbf37STim Bird
2320516cbf37STim Bird	  This is used to work around broken boot loaders.  This should
2321516cbf37STim Bird	  be set to 'N' under normal conditions.
2322516cbf37STim Bird
2323a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL
2324a5b9e5a2SAndy Lutomirski	bool "Enable the LDT (local descriptor table)" if EXPERT
2325a5b9e5a2SAndy Lutomirski	default y
2326a7f7f624SMasahiro Yamada	help
2327a5b9e5a2SAndy Lutomirski	  Linux can allow user programs to install a per-process x86
2328a5b9e5a2SAndy Lutomirski	  Local Descriptor Table (LDT) using the modify_ldt(2) system
2329a5b9e5a2SAndy Lutomirski	  call.  This is required to run 16-bit or segmented code such as
2330a5b9e5a2SAndy Lutomirski	  DOSEMU or some Wine programs.  It is also used by some very old
2331a5b9e5a2SAndy Lutomirski	  threading libraries.
2332a5b9e5a2SAndy Lutomirski
2333a5b9e5a2SAndy Lutomirski	  Enabling this feature adds a small amount of overhead to
2334a5b9e5a2SAndy Lutomirski	  context switches and increases the low-level kernel attack
2335a5b9e5a2SAndy Lutomirski	  surface.  Disabling it removes the modify_ldt(2) system call.
2336a5b9e5a2SAndy Lutomirski
2337a5b9e5a2SAndy Lutomirski	  Saying 'N' here may make sense for embedded or server kernels.
2338a5b9e5a2SAndy Lutomirski
23393aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE
23403aac3ebeSThomas Gleixner	bool "Enforce strict size checking for sigaltstack"
23413aac3ebeSThomas Gleixner	depends on DYNAMIC_SIGFRAME
23423aac3ebeSThomas Gleixner	help
23433aac3ebeSThomas Gleixner	  For historical reasons MINSIGSTKSZ is a constant which became
23443aac3ebeSThomas Gleixner	  already too small with AVX512 support. Add a mechanism to
23453aac3ebeSThomas Gleixner	  enforce strict checking of the sigaltstack size against the
23463aac3ebeSThomas Gleixner	  real size of the FPU frame. This option enables the check
23473aac3ebeSThomas Gleixner	  by default. It can also be controlled via the kernel command
23483aac3ebeSThomas Gleixner	  line option 'strict_sas_size' independent of this config
23493aac3ebeSThomas Gleixner	  switch. Enabling it might break existing applications which
23503aac3ebeSThomas Gleixner	  allocate a too small sigaltstack but 'work' because they
23513aac3ebeSThomas Gleixner	  never get a signal delivered.
23523aac3ebeSThomas Gleixner
23533aac3ebeSThomas Gleixner	  Say 'N' unless you want to really enforce this check.
23543aac3ebeSThomas Gleixner
2355d6f635bcSKees Cookconfig CFI_AUTO_DEFAULT
2356d6f635bcSKees Cook	bool "Attempt to use FineIBT by default at boot time"
2357d6f635bcSKees Cook	depends on FINEIBT
2358d6f635bcSKees Cook	default y
2359d6f635bcSKees Cook	help
2360d6f635bcSKees Cook	  Attempt to use FineIBT by default at boot time. If enabled,
2361d6f635bcSKees Cook	  this is the same as booting with "cfi=auto". If disabled,
2362d6f635bcSKees Cook	  this is the same as booting with "cfi=kcfi".
2363d6f635bcSKees Cook
2364b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig"
2365b700e7f0SSeth Jennings
2366350afa8aSRavi Bangoriaconfig X86_BUS_LOCK_DETECT
2367350afa8aSRavi Bangoria	bool "Split Lock Detect and Bus Lock Detect support"
2368408eb741SRavi Bangoria	depends on CPU_SUP_INTEL || CPU_SUP_AMD
2369350afa8aSRavi Bangoria	default y
2370350afa8aSRavi Bangoria	help
2371350afa8aSRavi Bangoria	  Enable Split Lock Detect and Bus Lock Detect functionalities.
2372350afa8aSRavi Bangoria	  See <file:Documentation/arch/x86/buslock.rst> for more information.
2373350afa8aSRavi Bangoria
2374506f1d07SSam Ravnborgendmenu
2375506f1d07SSam Ravnborg
23761ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS
237747ff30ccSUros Bizjak	def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null)
237847ff30ccSUros Bizjak	depends on CC_IS_GCC
23791ca3683cSUros Bizjak
23809ebe5500SUros Bizjakconfig CC_HAS_NAMED_AS_FIXED_SANITIZERS
2381f61f02d1SUros Bizjak	def_bool CC_IS_GCC && GCC_VERSION >= 130300
23821ca3683cSUros Bizjak
23831ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT
23841ca3683cSUros Bizjak	def_bool y
2385e29aad08SUros Bizjak	depends on CC_HAS_NAMED_AS
2386e29aad08SUros Bizjak	#
23879ebe5500SUros Bizjak	# -fsanitize=kernel-address (KASAN) and -fsanitize=thread
23889ebe5500SUros Bizjak	# (KCSAN) are incompatible with named address spaces with
23899ebe5500SUros Bizjak	# GCC < 13.3 - see GCC PR sanitizer/111736.
2390e29aad08SUros Bizjak	#
23919ebe5500SUros Bizjak	depends on !(KASAN || KCSAN) || CC_HAS_NAMED_AS_FIXED_SANITIZERS
23921ca3683cSUros Bizjak
2393f43b9876SPeter Zijlstraconfig CC_HAS_SLS
2394f43b9876SPeter Zijlstra	def_bool $(cc-option,-mharden-sls=all)
2395f43b9876SPeter Zijlstra
2396f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK
2397f43b9876SPeter Zijlstra	def_bool $(cc-option,-mfunction-return=thunk-extern)
2398f43b9876SPeter Zijlstra
2399bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING
2400bea75b33SThomas Gleixner	def_bool $(cc-option,-fpatchable-function-entry=16,16)
2401bea75b33SThomas Gleixner
2402bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI
2403bea75b33SThomas Gleixner	int
2404bea75b33SThomas Gleixner	default 59 if FUNCTION_ALIGNMENT_64B
2405bea75b33SThomas Gleixner	default 27 if FUNCTION_ALIGNMENT_32B
2406bea75b33SThomas Gleixner	default 11 if FUNCTION_ALIGNMENT_16B
2407bea75b33SThomas Gleixner	default  3 if FUNCTION_ALIGNMENT_8B
2408bea75b33SThomas Gleixner	default  0
2409bea75b33SThomas Gleixner
2410bea75b33SThomas Gleixner# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG
2411bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/
2412bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES
2413bea75b33SThomas Gleixner	int
2414bea75b33SThomas Gleixner	default FUNCTION_PADDING_CFI if CFI_CLANG
2415bea75b33SThomas Gleixner	default FUNCTION_ALIGNMENT
2416bea75b33SThomas Gleixner
2417931ab636SPeter Zijlstraconfig CALL_PADDING
2418931ab636SPeter Zijlstra	def_bool n
2419931ab636SPeter Zijlstra	depends on CC_HAS_ENTRY_PADDING && OBJTOOL
2420931ab636SPeter Zijlstra	select FUNCTION_ALIGNMENT_16B
2421931ab636SPeter Zijlstra
2422931ab636SPeter Zijlstraconfig FINEIBT
2423931ab636SPeter Zijlstra	def_bool y
2424aefb2f2eSBreno Leitao	depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE
2425931ab636SPeter Zijlstra	select CALL_PADDING
2426931ab636SPeter Zijlstra
24278f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS
24288f7c0d8bSThomas Gleixner	def_bool y
24290911b8c5SBreno Leitao	depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL
24308f7c0d8bSThomas Gleixner
24318f7c0d8bSThomas Gleixnerconfig CALL_THUNKS
24328f7c0d8bSThomas Gleixner	def_bool n
2433931ab636SPeter Zijlstra	select CALL_PADDING
24348f7c0d8bSThomas Gleixner
2435b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS
2436b341b20dSPeter Zijlstra	def_bool y
2437931ab636SPeter Zijlstra	depends on CALL_PADDING && !CFI_CLANG
2438b341b20dSPeter Zijlstra
2439fe42754bSSean Christophersonmenuconfig CPU_MITIGATIONS
2440fe42754bSSean Christopherson	bool "Mitigations for CPU vulnerabilities"
2441f43b9876SPeter Zijlstra	default y
2442f43b9876SPeter Zijlstra	help
2443fe42754bSSean Christopherson	  Say Y here to enable options which enable mitigations for hardware
2444fe42754bSSean Christopherson	  vulnerabilities (usually related to speculative execution).
2445ce0abef6SSean Christopherson	  Mitigations can be disabled or restricted to SMT systems at runtime
2446ce0abef6SSean Christopherson	  via the "mitigations" kernel parameter.
2447f43b9876SPeter Zijlstra
2448ce0abef6SSean Christopherson	  If you say N, all mitigations will be disabled.  This CANNOT be
2449ce0abef6SSean Christopherson	  overridden at runtime.
2450ce0abef6SSean Christopherson
2451ce0abef6SSean Christopherson	  Say 'Y', unless you really know what you are doing.
2452f43b9876SPeter Zijlstra
2453fe42754bSSean Christophersonif CPU_MITIGATIONS
2454f43b9876SPeter Zijlstra
2455ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION
2456f43b9876SPeter Zijlstra	bool "Remove the kernel mapping in user mode"
2457f43b9876SPeter Zijlstra	default y
2458f43b9876SPeter Zijlstra	depends on (X86_64 || X86_PAE)
2459f43b9876SPeter Zijlstra	help
2460f43b9876SPeter Zijlstra	  This feature reduces the number of hardware side channels by
2461f43b9876SPeter Zijlstra	  ensuring that the majority of kernel addresses are not mapped
2462f43b9876SPeter Zijlstra	  into userspace.
2463f43b9876SPeter Zijlstra
2464ff61f079SJonathan Corbet	  See Documentation/arch/x86/pti.rst for more details.
2465f43b9876SPeter Zijlstra
2466aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE
2467f43b9876SPeter Zijlstra	bool "Avoid speculative indirect branches in kernel"
2468f43b9876SPeter Zijlstra	select OBJTOOL if HAVE_OBJTOOL
2469f43b9876SPeter Zijlstra	default y
2470f43b9876SPeter Zijlstra	help
2471f43b9876SPeter Zijlstra	  Compile kernel with the retpoline compiler options to guard against
2472f43b9876SPeter Zijlstra	  kernel-to-user data leaks by avoiding speculative indirect
2473f43b9876SPeter Zijlstra	  branches. Requires a compiler with -mindirect-branch=thunk-extern
2474f43b9876SPeter Zijlstra	  support for full protection. The kernel may run slower.
2475f43b9876SPeter Zijlstra
24760911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK
2477f43b9876SPeter Zijlstra	bool "Enable return-thunks"
2478aefb2f2eSBreno Leitao	depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK
2479f43b9876SPeter Zijlstra	select OBJTOOL if HAVE_OBJTOOL
2480b648ab48SBen Hutchings	default y if X86_64
2481f43b9876SPeter Zijlstra	help
2482f43b9876SPeter Zijlstra	  Compile the kernel with the return-thunks compiler option to guard
2483f43b9876SPeter Zijlstra	  against kernel-to-user data leaks by avoiding return speculation.
2484f43b9876SPeter Zijlstra	  Requires a compiler with -mfunction-return=thunk-extern
2485f43b9876SPeter Zijlstra	  support for full protection. The kernel may run slower.
2486f43b9876SPeter Zijlstra
2487ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY
2488f43b9876SPeter Zijlstra	bool "Enable UNRET on kernel entry"
24890911b8c5SBreno Leitao	depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64
2490f43b9876SPeter Zijlstra	default y
2491f43b9876SPeter Zijlstra	help
2492f43b9876SPeter Zijlstra	  Compile the kernel with support for the retbleed=unret mitigation.
2493f43b9876SPeter Zijlstra
24945fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING
249580e4c1cdSThomas Gleixner	bool "Mitigate RSB underflow with call depth tracking"
249680e4c1cdSThomas Gleixner	depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS
249780e4c1cdSThomas Gleixner	select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE
249880e4c1cdSThomas Gleixner	select CALL_THUNKS
249980e4c1cdSThomas Gleixner	default y
250080e4c1cdSThomas Gleixner	help
250180e4c1cdSThomas Gleixner	  Compile the kernel with call depth tracking to mitigate the Intel
250286e39b94SBreno Leitao	  SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off
250386e39b94SBreno Leitao	  by default and needs to be enabled on the kernel command line via the
250486e39b94SBreno Leitao	  retbleed=stuff option. For non-affected systems the overhead of this
250586e39b94SBreno Leitao	  option is marginal as the call depth tracking is using run-time
250686e39b94SBreno Leitao	  generated call thunks in a compiler generated padding area and call
250786e39b94SBreno Leitao	  patching. This increases text size by ~5%. For non affected systems
250886e39b94SBreno Leitao	  this space is unused. On affected SKL systems this results in a
250986e39b94SBreno Leitao	  significant performance gain over the IBRS mitigation.
251080e4c1cdSThomas Gleixner
2511e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG
2512e81dc127SThomas Gleixner	bool "Enable call thunks and call depth tracking debugging"
25135fa31af3SBreno Leitao	depends on MITIGATION_CALL_DEPTH_TRACKING
2514e81dc127SThomas Gleixner	select FUNCTION_ALIGNMENT_32B
2515e81dc127SThomas Gleixner	default n
2516e81dc127SThomas Gleixner	help
2517e81dc127SThomas Gleixner	  Enable call/ret counters for imbalance detection and build in
2518e81dc127SThomas Gleixner	  a noisy dmesg about callthunks generation and call patching for
2519e81dc127SThomas Gleixner	  trouble shooting. The debug prints need to be enabled on the
2520e81dc127SThomas Gleixner	  kernel command line with 'debug-callthunks'.
252154628de6SRandy Dunlap	  Only enable this when you are debugging call thunks as this
252254628de6SRandy Dunlap	  creates a noticeable runtime overhead. If unsure say N.
252380e4c1cdSThomas Gleixner
2524e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY
2525f43b9876SPeter Zijlstra	bool "Enable IBPB on kernel entry"
2526b648ab48SBen Hutchings	depends on CPU_SUP_AMD && X86_64
2527f43b9876SPeter Zijlstra	default y
2528f43b9876SPeter Zijlstra	help
2529318e8c33SPatrick Bellasi	  Compile the kernel with support for the retbleed=ibpb and
2530318e8c33SPatrick Bellasi	  spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations.
2531f43b9876SPeter Zijlstra
25321da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY
2533f43b9876SPeter Zijlstra	bool "Enable IBRS on kernel entry"
2534b648ab48SBen Hutchings	depends on CPU_SUP_INTEL && X86_64
2535f43b9876SPeter Zijlstra	default y
2536f43b9876SPeter Zijlstra	help
2537f43b9876SPeter Zijlstra	  Compile the kernel with support for the spectre_v2=ibrs mitigation.
2538f43b9876SPeter Zijlstra	  This mitigates both spectre_v2 and retbleed at great cost to
2539f43b9876SPeter Zijlstra	  performance.
2540f43b9876SPeter Zijlstra
2541a033eec9SBreno Leitaoconfig MITIGATION_SRSO
2542fb3bd914SBorislav Petkov (AMD)	bool "Mitigate speculative RAS overflow on AMD"
25430911b8c5SBreno Leitao	depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK
2544fb3bd914SBorislav Petkov (AMD)	default y
2545fb3bd914SBorislav Petkov (AMD)	help
2546fb3bd914SBorislav Petkov (AMD)	  Enable the SRSO mitigation needed on AMD Zen1-4 machines.
2547fb3bd914SBorislav Petkov (AMD)
25487b75782fSBreno Leitaoconfig MITIGATION_SLS
2549f43b9876SPeter Zijlstra	bool "Mitigate Straight-Line-Speculation"
2550f43b9876SPeter Zijlstra	depends on CC_HAS_SLS && X86_64
2551f43b9876SPeter Zijlstra	select OBJTOOL if HAVE_OBJTOOL
2552f43b9876SPeter Zijlstra	default n
2553f43b9876SPeter Zijlstra	help
2554f43b9876SPeter Zijlstra	  Compile the kernel with straight-line-speculation options to guard
2555f43b9876SPeter Zijlstra	  against straight line speculation. The kernel image might be slightly
2556f43b9876SPeter Zijlstra	  larger.
2557f43b9876SPeter Zijlstra
2558225f2bd0SBreno Leitaoconfig MITIGATION_GDS
2559225f2bd0SBreno Leitao	bool "Mitigate Gather Data Sampling"
2560225f2bd0SBreno Leitao	depends on CPU_SUP_INTEL
2561225f2bd0SBreno Leitao	default y
2562225f2bd0SBreno Leitao	help
2563225f2bd0SBreno Leitao	  Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware
2564225f2bd0SBreno Leitao	  vulnerability which allows unprivileged speculative access to data
2565225f2bd0SBreno Leitao	  which was previously stored in vector registers. The attacker uses gather
2566225f2bd0SBreno Leitao	  instructions to infer the stale vector register data.
2567225f2bd0SBreno Leitao
25688076fcdeSPawan Guptaconfig MITIGATION_RFDS
25698076fcdeSPawan Gupta	bool "RFDS Mitigation"
25708076fcdeSPawan Gupta	depends on CPU_SUP_INTEL
25718076fcdeSPawan Gupta	default y
25728076fcdeSPawan Gupta	help
25738076fcdeSPawan Gupta	  Enable mitigation for Register File Data Sampling (RFDS) by default.
25748076fcdeSPawan Gupta	  RFDS is a hardware vulnerability which affects Intel Atom CPUs. It
25758076fcdeSPawan Gupta	  allows unprivileged speculative access to stale data previously
25768076fcdeSPawan Gupta	  stored in floating point, vector and integer registers.
25778076fcdeSPawan Gupta	  See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst>
25788076fcdeSPawan Gupta
25794f511739SJosh Poimboeufconfig MITIGATION_SPECTRE_BHI
25804f511739SJosh Poimboeuf	bool "Mitigate Spectre-BHB (Branch History Injection)"
2581ec9404e4SPawan Gupta	depends on CPU_SUP_INTEL
25824f511739SJosh Poimboeuf	default y
2583ec9404e4SPawan Gupta	help
2584ec9404e4SPawan Gupta	  Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks
2585ec9404e4SPawan Gupta	  where the branch history buffer is poisoned to speculatively steer
2586ec9404e4SPawan Gupta	  indirect branches.
2587ec9404e4SPawan Gupta	  See <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2588ec9404e4SPawan Gupta
258994045568SBreno Leitaoconfig MITIGATION_MDS
259094045568SBreno Leitao	bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug"
259194045568SBreno Leitao	depends on CPU_SUP_INTEL
259294045568SBreno Leitao	default y
259394045568SBreno Leitao	help
259494045568SBreno Leitao	  Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is
259594045568SBreno Leitao	  a hardware vulnerability which allows unprivileged speculative access
259694045568SBreno Leitao	  to data which is available in various CPU internal buffers.
259794045568SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/mds.rst>
2598b8da0b33SBreno Leitao
2599b8da0b33SBreno Leitaoconfig MITIGATION_TAA
2600b8da0b33SBreno Leitao	bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug"
2601b8da0b33SBreno Leitao	depends on CPU_SUP_INTEL
2602b8da0b33SBreno Leitao	default y
2603b8da0b33SBreno Leitao	help
2604b8da0b33SBreno Leitao	  Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware
2605b8da0b33SBreno Leitao	  vulnerability that allows unprivileged speculative access to data
2606b8da0b33SBreno Leitao	  which is available in various CPU internal buffers by using
2607b8da0b33SBreno Leitao	  asynchronous aborts within an Intel TSX transactional region.
2608b8da0b33SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst>
2609163f9fe6SBreno Leitao
2610163f9fe6SBreno Leitaoconfig MITIGATION_MMIO_STALE_DATA
2611163f9fe6SBreno Leitao	bool "Mitigate MMIO Stale Data hardware bug"
2612163f9fe6SBreno Leitao	depends on CPU_SUP_INTEL
2613163f9fe6SBreno Leitao	default y
2614163f9fe6SBreno Leitao	help
2615163f9fe6SBreno Leitao	  Enable mitigation for MMIO Stale Data hardware bugs.  Processor MMIO
2616163f9fe6SBreno Leitao	  Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO)
2617163f9fe6SBreno Leitao	  vulnerabilities that can expose data. The vulnerabilities require the
2618163f9fe6SBreno Leitao	  attacker to have access to MMIO.
2619163f9fe6SBreno Leitao	  See also
2620163f9fe6SBreno Leitao	  <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst>
26213a4ee4ffSBreno Leitao
26223a4ee4ffSBreno Leitaoconfig MITIGATION_L1TF
26233a4ee4ffSBreno Leitao	bool "Mitigate L1 Terminal Fault (L1TF) hardware bug"
26243a4ee4ffSBreno Leitao	depends on CPU_SUP_INTEL
26253a4ee4ffSBreno Leitao	default y
26263a4ee4ffSBreno Leitao	help
26273a4ee4ffSBreno Leitao	  Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a
26283a4ee4ffSBreno Leitao	  hardware vulnerability which allows unprivileged speculative access to data
26293a4ee4ffSBreno Leitao	  available in the Level 1 Data Cache.
26303a4ee4ffSBreno Leitao	  See <file:Documentation/admin-guide/hw-vuln/l1tf.rst
2631894e2885SBreno Leitao
2632894e2885SBreno Leitaoconfig MITIGATION_RETBLEED
2633894e2885SBreno Leitao	bool "Mitigate RETBleed hardware bug"
2634894e2885SBreno Leitao	depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY
2635894e2885SBreno Leitao	default y
2636894e2885SBreno Leitao	help
2637894e2885SBreno Leitao	  Enable mitigation for RETBleed (Arbitrary Speculative Code Execution
2638894e2885SBreno Leitao	  with Return Instructions) vulnerability.  RETBleed is a speculative
2639894e2885SBreno Leitao	  execution attack which takes advantage of microarchitectural behavior
2640894e2885SBreno Leitao	  in many modern microprocessors, similar to Spectre v2. An
2641894e2885SBreno Leitao	  unprivileged attacker can use these flaws to bypass conventional
2642894e2885SBreno Leitao	  memory security restrictions to gain read access to privileged memory
2643894e2885SBreno Leitao	  that would otherwise be inaccessible.
2644ca01c0d8SBreno Leitao
2645ca01c0d8SBreno Leitaoconfig MITIGATION_SPECTRE_V1
2646ca01c0d8SBreno Leitao	bool "Mitigate SPECTRE V1 hardware bug"
2647ca01c0d8SBreno Leitao	default y
2648ca01c0d8SBreno Leitao	help
2649ca01c0d8SBreno Leitao	  Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a
2650ca01c0d8SBreno Leitao	  class of side channel attacks that takes advantage of speculative
2651ca01c0d8SBreno Leitao	  execution that bypasses conditional branch instructions used for
2652ca01c0d8SBreno Leitao	  memory access bounds check.
2653ca01c0d8SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2654a0b02e3fSBreno Leitao
265572c70f48SBreno Leitaoconfig MITIGATION_SPECTRE_V2
265672c70f48SBreno Leitao	bool "Mitigate SPECTRE V2 hardware bug"
265772c70f48SBreno Leitao	default y
265872c70f48SBreno Leitao	help
265972c70f48SBreno Leitao	  Enable mitigation for Spectre V2 (Branch Target Injection). Spectre
266072c70f48SBreno Leitao	  V2 is a class of side channel attacks that takes advantage of
266172c70f48SBreno Leitao	  indirect branch predictors inside the processor. In Spectre variant 2
266272c70f48SBreno Leitao	  attacks, the attacker can steer speculative indirect branches in the
266372c70f48SBreno Leitao	  victim to gadget code by poisoning the branch target buffer of a CPU
266472c70f48SBreno Leitao	  used for predicting indirect branch addresses.
266572c70f48SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
266672c70f48SBreno Leitao
2667a0b02e3fSBreno Leitaoconfig MITIGATION_SRBDS
2668a0b02e3fSBreno Leitao	bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug"
2669a0b02e3fSBreno Leitao	depends on CPU_SUP_INTEL
2670a0b02e3fSBreno Leitao	default y
2671a0b02e3fSBreno Leitao	help
2672a0b02e3fSBreno Leitao	  Enable mitigation for Special Register Buffer Data Sampling (SRBDS).
2673a0b02e3fSBreno Leitao	  SRBDS is a hardware vulnerability that allows Microarchitectural Data
2674a0b02e3fSBreno Leitao	  Sampling (MDS) techniques to infer values returned from special
2675a0b02e3fSBreno Leitao	  register accesses. An unprivileged user can extract values returned
2676a0b02e3fSBreno Leitao	  from RDRAND and RDSEED executed on another core or sibling thread
2677a0b02e3fSBreno Leitao	  using MDS techniques.
2678a0b02e3fSBreno Leitao	  See also
2679a0b02e3fSBreno Leitao	  <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst>
2680b908cdabSBreno Leitao
2681b908cdabSBreno Leitaoconfig MITIGATION_SSB
2682b908cdabSBreno Leitao	bool "Mitigate Speculative Store Bypass (SSB) hardware bug"
2683b908cdabSBreno Leitao	default y
2684b908cdabSBreno Leitao	help
2685b908cdabSBreno Leitao	  Enable mitigation for Speculative Store Bypass (SSB). SSB is a
2686b908cdabSBreno Leitao	  hardware security vulnerability and its exploitation takes advantage
2687b908cdabSBreno Leitao	  of speculative execution in a similar way to the Meltdown and Spectre
2688b908cdabSBreno Leitao	  security vulnerabilities.
2689b908cdabSBreno Leitao
2690f43b9876SPeter Zijlstraendif
2691f43b9876SPeter Zijlstra
26923072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES
26933072e413SMichal Hocko	def_bool y
26945c11f00bSDavid Hildenbrand	depends on ARCH_ENABLE_MEMORY_HOTPLUG
26953072e413SMichal Hocko
2696da85f865SBjorn Helgaasmenu "Power management and ACPI options"
2697e279b6c1SSam Ravnborg
2698e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER
26993c2362e6SHarvey Harrison	def_bool y
270044556530SZhimin Gu	depends on HIBERNATION
2701e279b6c1SSam Ravnborg
2702e279b6c1SSam Ravnborgsource "kernel/power/Kconfig"
2703e279b6c1SSam Ravnborg
2704e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig"
2705e279b6c1SSam Ravnborg
2706a6b68076SAndi Kleenconfig X86_APM_BOOT
27076fc108a0SJan Beulich	def_bool y
2708282e5aabSPaul Bolle	depends on APM
2709a6b68076SAndi Kleen
2710e279b6c1SSam Ravnborgmenuconfig APM
2711e279b6c1SSam Ravnborg	tristate "APM (Advanced Power Management) BIOS support"
2712efefa6f6SIngo Molnar	depends on X86_32 && PM_SLEEP
2713a7f7f624SMasahiro Yamada	help
2714e279b6c1SSam Ravnborg	  APM is a BIOS specification for saving power using several different
2715e279b6c1SSam Ravnborg	  techniques. This is mostly useful for battery powered laptops with
2716e279b6c1SSam Ravnborg	  APM compliant BIOSes. If you say Y here, the system time will be
2717e279b6c1SSam Ravnborg	  reset after a RESUME operation, the /proc/apm device will provide
2718e279b6c1SSam Ravnborg	  battery status information, and user-space programs will receive
2719e279b6c1SSam Ravnborg	  notification of APM "events" (e.g. battery status change).
2720e279b6c1SSam Ravnborg
2721e279b6c1SSam Ravnborg	  If you select "Y" here, you can disable actual use of the APM
2722e279b6c1SSam Ravnborg	  BIOS by passing the "apm=off" option to the kernel at boot time.
2723e279b6c1SSam Ravnborg
2724e279b6c1SSam Ravnborg	  Note that the APM support is almost completely disabled for
2725e279b6c1SSam Ravnborg	  machines with more than one CPU.
2726e279b6c1SSam Ravnborg
2727e279b6c1SSam Ravnborg	  In order to use APM, you will need supporting software. For location
2728151f4e2bSMauro Carvalho Chehab	  and more information, read <file:Documentation/power/apm-acpi.rst>
27292dc98fd3SMichael Witten	  and the Battery Powered Linux mini-HOWTO, available from
2730e279b6c1SSam Ravnborg	  <http://www.tldp.org/docs.html#howto>.
2731e279b6c1SSam Ravnborg
2732e279b6c1SSam Ravnborg	  This driver does not spin down disk drives (see the hdparm(8)
2733e279b6c1SSam Ravnborg	  manpage ("man 8 hdparm") for that), and it doesn't turn off
2734e279b6c1SSam Ravnborg	  VESA-compliant "green" monitors.
2735e279b6c1SSam Ravnborg
2736e279b6c1SSam Ravnborg	  This driver does not support the TI 4000M TravelMate and the ACER
2737e279b6c1SSam Ravnborg	  486/DX4/75 because they don't have compliant BIOSes. Many "green"
2738e279b6c1SSam Ravnborg	  desktop machines also don't have compliant BIOSes, and this driver
2739e279b6c1SSam Ravnborg	  may cause those machines to panic during the boot phase.
2740e279b6c1SSam Ravnborg
2741e279b6c1SSam Ravnborg	  Generally, if you don't have a battery in your machine, there isn't
2742e279b6c1SSam Ravnborg	  much point in using this driver and you should say N. If you get
2743e279b6c1SSam Ravnborg	  random kernel OOPSes or reboots that don't seem to be related to
2744e279b6c1SSam Ravnborg	  anything, try disabling/enabling this option (or disabling/enabling
2745e279b6c1SSam Ravnborg	  APM in your BIOS).
2746e279b6c1SSam Ravnborg
2747e279b6c1SSam Ravnborg	  Some other things you should try when experiencing seemingly random,
2748e279b6c1SSam Ravnborg	  "weird" problems:
2749e279b6c1SSam Ravnborg
2750e279b6c1SSam Ravnborg	  1) make sure that you have enough swap space and that it is
2751e279b6c1SSam Ravnborg	  enabled.
27527987448fSStephen Kitt	  2) pass the "idle=poll" option to the kernel
2753e279b6c1SSam Ravnborg	  3) switch on floating point emulation in the kernel and pass
2754e279b6c1SSam Ravnborg	  the "no387" option to the kernel
2755e279b6c1SSam Ravnborg	  4) pass the "floppy=nodma" option to the kernel
2756e279b6c1SSam Ravnborg	  5) pass the "mem=4M" option to the kernel (thereby disabling
2757e279b6c1SSam Ravnborg	  all but the first 4 MB of RAM)
2758e279b6c1SSam Ravnborg	  6) make sure that the CPU is not over clocked.
2759e279b6c1SSam Ravnborg	  7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/>
2760e279b6c1SSam Ravnborg	  8) disable the cache from your BIOS settings
2761e279b6c1SSam Ravnborg	  9) install a fan for the video card or exchange video RAM
2762e279b6c1SSam Ravnborg	  10) install a better fan for the CPU
2763e279b6c1SSam Ravnborg	  11) exchange RAM chips
2764e279b6c1SSam Ravnborg	  12) exchange the motherboard.
2765e279b6c1SSam Ravnborg
2766e279b6c1SSam Ravnborg	  To compile this driver as a module, choose M here: the
2767e279b6c1SSam Ravnborg	  module will be called apm.
2768e279b6c1SSam Ravnborg
2769e279b6c1SSam Ravnborgif APM
2770e279b6c1SSam Ravnborg
2771e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND
2772e279b6c1SSam Ravnborg	bool "Ignore USER SUSPEND"
2773a7f7f624SMasahiro Yamada	help
2774e279b6c1SSam Ravnborg	  This option will ignore USER SUSPEND requests. On machines with a
2775e279b6c1SSam Ravnborg	  compliant APM BIOS, you want to say N. However, on the NEC Versa M
2776e279b6c1SSam Ravnborg	  series notebooks, it is necessary to say Y because of a BIOS bug.
2777e279b6c1SSam Ravnborg
2778e279b6c1SSam Ravnborgconfig APM_DO_ENABLE
2779e279b6c1SSam Ravnborg	bool "Enable PM at boot time"
2780a7f7f624SMasahiro Yamada	help
2781e279b6c1SSam Ravnborg	  Enable APM features at boot time. From page 36 of the APM BIOS
2782e279b6c1SSam Ravnborg	  specification: "When disabled, the APM BIOS does not automatically
2783e279b6c1SSam Ravnborg	  power manage devices, enter the Standby State, enter the Suspend
2784e279b6c1SSam Ravnborg	  State, or take power saving steps in response to CPU Idle calls."
2785e279b6c1SSam Ravnborg	  This driver will make CPU Idle calls when Linux is idle (unless this
2786e279b6c1SSam Ravnborg	  feature is turned off -- see "Do CPU IDLE calls", below). This
2787e279b6c1SSam Ravnborg	  should always save battery power, but more complicated APM features
2788e279b6c1SSam Ravnborg	  will be dependent on your BIOS implementation. You may need to turn
2789e279b6c1SSam Ravnborg	  this option off if your computer hangs at boot time when using APM
2790e279b6c1SSam Ravnborg	  support, or if it beeps continuously instead of suspending. Turn
2791e279b6c1SSam Ravnborg	  this off if you have a NEC UltraLite Versa 33/C or a Toshiba
2792e279b6c1SSam Ravnborg	  T400CDT. This is off by default since most machines do fine without
2793e279b6c1SSam Ravnborg	  this feature.
2794e279b6c1SSam Ravnborg
2795e279b6c1SSam Ravnborgconfig APM_CPU_IDLE
2796dd8af076SLen Brown	depends on CPU_IDLE
2797e279b6c1SSam Ravnborg	bool "Make CPU Idle calls when idle"
2798a7f7f624SMasahiro Yamada	help
2799e279b6c1SSam Ravnborg	  Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
2800e279b6c1SSam Ravnborg	  On some machines, this can activate improved power savings, such as
2801e279b6c1SSam Ravnborg	  a slowed CPU clock rate, when the machine is idle. These idle calls
2802e279b6c1SSam Ravnborg	  are made after the idle loop has run for some length of time (e.g.,
2803e279b6c1SSam Ravnborg	  333 mS). On some machines, this will cause a hang at boot time or
2804e279b6c1SSam Ravnborg	  whenever the CPU becomes idle. (On machines with more than one CPU,
2805e279b6c1SSam Ravnborg	  this option does nothing.)
2806e279b6c1SSam Ravnborg
2807e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK
2808e279b6c1SSam Ravnborg	bool "Enable console blanking using APM"
2809a7f7f624SMasahiro Yamada	help
2810e279b6c1SSam Ravnborg	  Enable console blanking using the APM. Some laptops can use this to
2811e279b6c1SSam Ravnborg	  turn off the LCD backlight when the screen blanker of the Linux
2812e279b6c1SSam Ravnborg	  virtual console blanks the screen. Note that this is only used by
2813e279b6c1SSam Ravnborg	  the virtual console screen blanker, and won't turn off the backlight
2814e279b6c1SSam Ravnborg	  when using the X Window system. This also doesn't have anything to
2815e279b6c1SSam Ravnborg	  do with your VESA-compliant power-saving monitor. Further, this
2816e279b6c1SSam Ravnborg	  option doesn't work for all laptops -- it might not turn off your
2817e279b6c1SSam Ravnborg	  backlight at all, or it might print a lot of errors to the console,
2818e279b6c1SSam Ravnborg	  especially if you are using gpm.
2819e279b6c1SSam Ravnborg
2820e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS
2821e279b6c1SSam Ravnborg	bool "Allow interrupts during APM BIOS calls"
2822a7f7f624SMasahiro Yamada	help
2823e279b6c1SSam Ravnborg	  Normally we disable external interrupts while we are making calls to
2824e279b6c1SSam Ravnborg	  the APM BIOS as a measure to lessen the effects of a badly behaving
2825e279b6c1SSam Ravnborg	  BIOS implementation.  The BIOS should reenable interrupts if it
2826e279b6c1SSam Ravnborg	  needs to.  Unfortunately, some BIOSes do not -- especially those in
2827e279b6c1SSam Ravnborg	  many of the newer IBM Thinkpads.  If you experience hangs when you
2828e279b6c1SSam Ravnborg	  suspend, try setting this to Y.  Otherwise, say N.
2829e279b6c1SSam Ravnborg
2830e279b6c1SSam Ravnborgendif # APM
2831e279b6c1SSam Ravnborg
2832bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig"
2833e279b6c1SSam Ravnborg
2834e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig"
2835e279b6c1SSam Ravnborg
283627471fdbSAndy Henroidsource "drivers/idle/Kconfig"
283727471fdbSAndy Henroid
2838e279b6c1SSam Ravnborgendmenu
2839e279b6c1SSam Ravnborg
2840e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)"
2841e279b6c1SSam Ravnborg
2842e279b6c1SSam Ravnborgchoice
2843e279b6c1SSam Ravnborg	prompt "PCI access mode"
2844efefa6f6SIngo Molnar	depends on X86_32 && PCI
2845e279b6c1SSam Ravnborg	default PCI_GOANY
2846a7f7f624SMasahiro Yamada	help
2847e279b6c1SSam Ravnborg	  On PCI systems, the BIOS can be used to detect the PCI devices and
2848e279b6c1SSam Ravnborg	  determine their configuration. However, some old PCI motherboards
2849e279b6c1SSam Ravnborg	  have BIOS bugs and may crash if this is done. Also, some embedded
2850e279b6c1SSam Ravnborg	  PCI-based systems don't have any BIOS at all. Linux can also try to
2851e279b6c1SSam Ravnborg	  detect the PCI hardware directly without using the BIOS.
2852e279b6c1SSam Ravnborg
2853e279b6c1SSam Ravnborg	  With this option, you can specify how Linux should detect the
2854e279b6c1SSam Ravnborg	  PCI devices. If you choose "BIOS", the BIOS will be used,
2855e279b6c1SSam Ravnborg	  if you choose "Direct", the BIOS won't be used, and if you
2856e279b6c1SSam Ravnborg	  choose "MMConfig", then PCI Express MMCONFIG will be used.
2857e279b6c1SSam Ravnborg	  If you choose "Any", the kernel will try MMCONFIG, then the
2858e279b6c1SSam Ravnborg	  direct access method and falls back to the BIOS if that doesn't
2859e279b6c1SSam Ravnborg	  work. If unsure, go with the default, which is "Any".
2860e279b6c1SSam Ravnborg
2861e279b6c1SSam Ravnborgconfig PCI_GOBIOS
2862e279b6c1SSam Ravnborg	bool "BIOS"
2863e279b6c1SSam Ravnborg
2864e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG
2865e279b6c1SSam Ravnborg	bool "MMConfig"
2866e279b6c1SSam Ravnborg
2867e279b6c1SSam Ravnborgconfig PCI_GODIRECT
2868e279b6c1SSam Ravnborg	bool "Direct"
2869e279b6c1SSam Ravnborg
28703ef0e1f8SAndres Salomonconfig PCI_GOOLPC
287176fb6570SDaniel Drake	bool "OLPC XO-1"
28723ef0e1f8SAndres Salomon	depends on OLPC
28733ef0e1f8SAndres Salomon
28742bdd1b03SAndres Salomonconfig PCI_GOANY
28752bdd1b03SAndres Salomon	bool "Any"
28762bdd1b03SAndres Salomon
2877e279b6c1SSam Ravnborgendchoice
2878e279b6c1SSam Ravnborg
2879e279b6c1SSam Ravnborgconfig PCI_BIOS
28803c2362e6SHarvey Harrison	def_bool y
2881efefa6f6SIngo Molnar	depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY)
2882e279b6c1SSam Ravnborg
2883e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct.
2884e279b6c1SSam Ravnborgconfig PCI_DIRECT
28853c2362e6SHarvey Harrison	def_bool y
28860aba496fSShaohua Li	depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG))
2887e279b6c1SSam Ravnborg
2888e279b6c1SSam Ravnborgconfig PCI_MMCONFIG
2889b45c9f36SJan Kiszka	bool "Support mmconfig PCI config space access" if X86_64
2890b45c9f36SJan Kiszka	default y
28914590d98fSAndy Shevchenko	depends on PCI && (ACPI || JAILHOUSE_GUEST)
2892b45c9f36SJan Kiszka	depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG)
2893e279b6c1SSam Ravnborg
28943ef0e1f8SAndres Salomonconfig PCI_OLPC
28952bdd1b03SAndres Salomon	def_bool y
28962bdd1b03SAndres Salomon	depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY)
28973ef0e1f8SAndres Salomon
2898b5401a96SAlex Nixonconfig PCI_XEN
2899b5401a96SAlex Nixon	def_bool y
2900b5401a96SAlex Nixon	depends on PCI && XEN
2901b5401a96SAlex Nixon
29028364e1f8SJan Kiszkaconfig MMCONF_FAM10H
29038364e1f8SJan Kiszka	def_bool y
29048364e1f8SJan Kiszka	depends on X86_64 && PCI_MMCONFIG && ACPI
2905e279b6c1SSam Ravnborg
29063f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK
29076a108a14SDavid Rientjes	bool "Read CNB20LE Host Bridge Windows" if EXPERT
29086ea30386SKees Cook	depends on PCI
29093f6ea84aSIra W. Snyder	help
29103f6ea84aSIra W. Snyder	  Read the PCI windows out of the CNB20LE host bridge. This allows
29113f6ea84aSIra W. Snyder	  PCI hotplug to work on systems with the CNB20LE chipset which do
29123f6ea84aSIra W. Snyder	  not have ACPI.
29133f6ea84aSIra W. Snyder
291464a5fed6SBjorn Helgaas	  There's no public spec for this chipset, and this functionality
291564a5fed6SBjorn Helgaas	  is known to be incomplete.
291664a5fed6SBjorn Helgaas
291764a5fed6SBjorn Helgaas	  You should say N unless you know you need this.
291864a5fed6SBjorn Helgaas
29193a495511SWilliam Breathitt Grayconfig ISA_BUS
292017a2a129SWilliam Breathitt Gray	bool "ISA bus support on modern systems" if EXPERT
29213a495511SWilliam Breathitt Gray	help
292217a2a129SWilliam Breathitt Gray	  Expose ISA bus device drivers and options available for selection and
292317a2a129SWilliam Breathitt Gray	  configuration. Enable this option if your target machine has an ISA
292417a2a129SWilliam Breathitt Gray	  bus. ISA is an older system, displaced by PCI and newer bus
292517a2a129SWilliam Breathitt Gray	  architectures -- if your target machine is modern, it probably does
292617a2a129SWilliam Breathitt Gray	  not have an ISA bus.
29273a495511SWilliam Breathitt Gray
29283a495511SWilliam Breathitt Gray	  If unsure, say N.
29293a495511SWilliam Breathitt Gray
29301c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA.
2931e279b6c1SSam Ravnborgconfig ISA_DMA_API
29321c00f016SDavid Rientjes	bool "ISA-style DMA support" if (X86_64 && EXPERT)
29331c00f016SDavid Rientjes	default y
29341c00f016SDavid Rientjes	help
29351c00f016SDavid Rientjes	  Enables ISA-style DMA support for devices requiring such controllers.
29361c00f016SDavid Rientjes	  If unsure, say Y.
2937e279b6c1SSam Ravnborg
293851e68d05SLinus Torvaldsif X86_32
293951e68d05SLinus Torvalds
2940e279b6c1SSam Ravnborgconfig ISA
2941e279b6c1SSam Ravnborg	bool "ISA support"
2942a7f7f624SMasahiro Yamada	help
2943e279b6c1SSam Ravnborg	  Find out whether you have ISA slots on your motherboard.  ISA is the
2944e279b6c1SSam Ravnborg	  name of a bus system, i.e. the way the CPU talks to the other stuff
2945e279b6c1SSam Ravnborg	  inside your box.  Other bus systems are PCI, EISA, MicroChannel
2946e279b6c1SSam Ravnborg	  (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
2947e279b6c1SSam Ravnborg	  newer boards don't support it.  If you have ISA, say Y, otherwise N.
2948e279b6c1SSam Ravnborg
2949e279b6c1SSam Ravnborgconfig SCx200
2950e279b6c1SSam Ravnborg	tristate "NatSemi SCx200 support"
2951a7f7f624SMasahiro Yamada	help
2952e279b6c1SSam Ravnborg	  This provides basic support for National Semiconductor's
2953e279b6c1SSam Ravnborg	  (now AMD's) Geode processors.  The driver probes for the
2954e279b6c1SSam Ravnborg	  PCI-IDs of several on-chip devices, so its a good dependency
2955e279b6c1SSam Ravnborg	  for other scx200_* drivers.
2956e279b6c1SSam Ravnborg
2957e279b6c1SSam Ravnborg	  If compiled as a module, the driver is named scx200.
2958e279b6c1SSam Ravnborg
2959e279b6c1SSam Ravnborgconfig SCx200HR_TIMER
2960e279b6c1SSam Ravnborg	tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
2961592913ecSJohn Stultz	depends on SCx200
2962e279b6c1SSam Ravnborg	default y
2963a7f7f624SMasahiro Yamada	help
2964e279b6c1SSam Ravnborg	  This driver provides a clocksource built upon the on-chip
2965e279b6c1SSam Ravnborg	  27MHz high-resolution timer.  Its also a workaround for
2966e279b6c1SSam Ravnborg	  NSC Geode SC-1100's buggy TSC, which loses time when the
2967e279b6c1SSam Ravnborg	  processor goes idle (as is done by the scheduler).  The
2968e279b6c1SSam Ravnborg	  other workaround is idle=poll boot option.
2969e279b6c1SSam Ravnborg
29703ef0e1f8SAndres Salomonconfig OLPC
29713ef0e1f8SAndres Salomon	bool "One Laptop Per Child support"
297254008979SThomas Gleixner	depends on !X86_PAE
29733c554946SAndres Salomon	select GPIOLIB
2974dc3119e7SThomas Gleixner	select OF
297545bb1674SDaniel Drake	select OF_PROMTREE
2976b4e51854SGrant Likely	select IRQ_DOMAIN
29770c3d931bSLubomir Rintel	select OLPC_EC
2978a7f7f624SMasahiro Yamada	help
29793ef0e1f8SAndres Salomon	  Add support for detecting the unique features of the OLPC
29803ef0e1f8SAndres Salomon	  XO hardware.
29813ef0e1f8SAndres Salomon
2982a3128588SDaniel Drakeconfig OLPC_XO1_PM
2983a3128588SDaniel Drake	bool "OLPC XO-1 Power Management"
2984fa112cf1SBorislav Petkov	depends on OLPC && MFD_CS5535=y && PM_SLEEP
2985a7f7f624SMasahiro Yamada	help
298697c4cb71SDaniel Drake	  Add support for poweroff and suspend of the OLPC XO-1 laptop.
2987bf1ebf00SDaniel Drake
2988cfee9597SDaniel Drakeconfig OLPC_XO1_RTC
2989cfee9597SDaniel Drake	bool "OLPC XO-1 Real Time Clock"
2990cfee9597SDaniel Drake	depends on OLPC_XO1_PM && RTC_DRV_CMOS
2991a7f7f624SMasahiro Yamada	help
2992cfee9597SDaniel Drake	  Add support for the XO-1 real time clock, which can be used as a
2993cfee9597SDaniel Drake	  programmable wakeup source.
2994cfee9597SDaniel Drake
29957feda8e9SDaniel Drakeconfig OLPC_XO1_SCI
29967feda8e9SDaniel Drake	bool "OLPC XO-1 SCI extras"
299792e830f2SArnd Bergmann	depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y
2998ed8e47feSRandy Dunlap	depends on INPUT=y
2999d8d01a63SDaniel Drake	select POWER_SUPPLY
3000a7f7f624SMasahiro Yamada	help
30017feda8e9SDaniel Drake	  Add support for SCI-based features of the OLPC XO-1 laptop:
30027bc74b3dSDaniel Drake	   - EC-driven system wakeups
30037feda8e9SDaniel Drake	   - Power button
30047bc74b3dSDaniel Drake	   - Ebook switch
30052cf2baeaSDaniel Drake	   - Lid switch
3006e1040ac6SDaniel Drake	   - AC adapter status updates
3007e1040ac6SDaniel Drake	   - Battery status updates
30087feda8e9SDaniel Drake
3009a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI
3010a0f30f59SDaniel Drake	bool "OLPC XO-1.5 SCI extras"
3011d8d01a63SDaniel Drake	depends on OLPC && ACPI
3012d8d01a63SDaniel Drake	select POWER_SUPPLY
3013a7f7f624SMasahiro Yamada	help
3014a0f30f59SDaniel Drake	  Add support for SCI-based features of the OLPC XO-1.5 laptop:
3015a0f30f59SDaniel Drake	   - EC-driven system wakeups
3016a0f30f59SDaniel Drake	   - AC adapter status updates
3017a0f30f59SDaniel Drake	   - Battery status updates
3018e279b6c1SSam Ravnborg
3019298c9babSDmitry Torokhovconfig GEODE_COMMON
3020298c9babSDmitry Torokhov	bool
3021298c9babSDmitry Torokhov
3022d4f3e350SEd Wildgooseconfig ALIX
3023d4f3e350SEd Wildgoose	bool "PCEngines ALIX System Support (LED setup)"
3024d4f3e350SEd Wildgoose	select GPIOLIB
3025298c9babSDmitry Torokhov	select GEODE_COMMON
3026a7f7f624SMasahiro Yamada	help
3027d4f3e350SEd Wildgoose	  This option enables system support for the PCEngines ALIX.
3028d4f3e350SEd Wildgoose	  At present this just sets up LEDs for GPIO control on
3029d4f3e350SEd Wildgoose	  ALIX2/3/6 boards.  However, other system specific setup should
3030d4f3e350SEd Wildgoose	  get added here.
3031d4f3e350SEd Wildgoose
3032d4f3e350SEd Wildgoose	  Note: You must still enable the drivers for GPIO and LED support
3033d4f3e350SEd Wildgoose	  (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs
3034d4f3e350SEd Wildgoose
3035d4f3e350SEd Wildgoose	  Note: You have to set alix.force=1 for boards with Award BIOS.
3036d4f3e350SEd Wildgoose
3037da4e3302SPhilip Prindevilleconfig NET5501
3038da4e3302SPhilip Prindeville	bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)"
3039da4e3302SPhilip Prindeville	select GPIOLIB
3040298c9babSDmitry Torokhov	select GEODE_COMMON
3041a7f7f624SMasahiro Yamada	help
3042da4e3302SPhilip Prindeville	  This option enables system support for the Soekris Engineering net5501.
3043da4e3302SPhilip Prindeville
30443197059aSPhilip A. Prindevilleconfig GEOS
30453197059aSPhilip A. Prindeville	bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)"
30463197059aSPhilip A. Prindeville	select GPIOLIB
3047298c9babSDmitry Torokhov	select GEODE_COMMON
30483197059aSPhilip A. Prindeville	depends on DMI
3049a7f7f624SMasahiro Yamada	help
30503197059aSPhilip A. Prindeville	  This option enables system support for the Traverse Technologies GEOS.
30513197059aSPhilip A. Prindeville
30527d029125SVivien Didelotconfig TS5500
30537d029125SVivien Didelot	bool "Technologic Systems TS-5500 platform support"
30547d029125SVivien Didelot	depends on MELAN
30557d029125SVivien Didelot	select CHECK_SIGNATURE
30567d029125SVivien Didelot	select NEW_LEDS
30577d029125SVivien Didelot	select LEDS_CLASS
3058a7f7f624SMasahiro Yamada	help
30597d029125SVivien Didelot	  This option enables system support for the Technologic Systems TS-5500.
30607d029125SVivien Didelot
3061e279b6c1SSam Ravnborgendif # X86_32
3062e279b6c1SSam Ravnborg
306323ac4ae8SAndreas Herrmannconfig AMD_NB
3064e279b6c1SSam Ravnborg	def_bool y
3065e6e6e5e8SYazen Ghannam	depends on AMD_NODE
3066e6e6e5e8SYazen Ghannam
3067e6e6e5e8SYazen Ghannamconfig AMD_NODE
3068e6e6e5e8SYazen Ghannam	def_bool y
30690e152cd7SBorislav Petkov	depends on CPU_SUP_AMD && PCI
3070e279b6c1SSam Ravnborg
3071e279b6c1SSam Ravnborgendmenu
3072e279b6c1SSam Ravnborg
30731572497cSChristoph Hellwigmenu "Binary Emulations"
3074e279b6c1SSam Ravnborg
3075e279b6c1SSam Ravnborgconfig IA32_EMULATION
3076e279b6c1SSam Ravnborg	bool "IA32 Emulation"
3077e279b6c1SSam Ravnborg	depends on X86_64
307839f88911SIngo Molnar	select ARCH_WANT_OLD_COMPAT_IPC
3079d1603990SRandy Dunlap	select BINFMT_ELF
308039f88911SIngo Molnar	select COMPAT_OLD_SIGACTION
3081a7f7f624SMasahiro Yamada	help
30825fd92e65SH. J. Lu	  Include code to run legacy 32-bit programs under a
30835fd92e65SH. J. Lu	  64-bit kernel. You should likely turn this on, unless you're
30845fd92e65SH. J. Lu	  100% sure that you don't have any 32-bit programs left.
3085e279b6c1SSam Ravnborg
3086a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED
3087a11e0975SNikolay Borisov	bool "IA32 emulation disabled by default"
3088a11e0975SNikolay Borisov	default n
3089a11e0975SNikolay Borisov	depends on IA32_EMULATION
3090a11e0975SNikolay Borisov	help
3091a11e0975SNikolay Borisov	  Make IA32 emulation disabled by default. This prevents loading 32-bit
3092a11e0975SNikolay Borisov	  processes and access to 32-bit syscalls. If unsure, leave it to its
3093a11e0975SNikolay Borisov	  default value.
3094a11e0975SNikolay Borisov
309583a44a4fSMasahiro Yamadaconfig X86_X32_ABI
30966ea30386SKees Cook	bool "x32 ABI for 64-bit mode"
30979b54050bSBrian Gerst	depends on X86_64
3098aaeed6ecSNathan Chancellor	# llvm-objcopy does not convert x86_64 .note.gnu.property or
3099aaeed6ecSNathan Chancellor	# compressed debug sections to x86_x32 properly:
3100aaeed6ecSNathan Chancellor	# https://github.com/ClangBuiltLinux/linux/issues/514
3101aaeed6ecSNathan Chancellor	# https://github.com/ClangBuiltLinux/linux/issues/1141
3102aaeed6ecSNathan Chancellor	depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm)
3103a7f7f624SMasahiro Yamada	help
31045fd92e65SH. J. Lu	  Include code to run binaries for the x32 native 32-bit ABI
31055fd92e65SH. J. Lu	  for 64-bit processors.  An x32 process gets access to the
31065fd92e65SH. J. Lu	  full 64-bit register file and wide data path while leaving
31075fd92e65SH. J. Lu	  pointers at 32 bits for smaller memory footprint.
31085fd92e65SH. J. Lu
3109953fee1dSIngo Molnarconfig COMPAT_32
3110953fee1dSIngo Molnar	def_bool y
3111953fee1dSIngo Molnar	depends on IA32_EMULATION || X86_32
3112953fee1dSIngo Molnar	select HAVE_UID16
3113953fee1dSIngo Molnar	select OLD_SIGSUSPEND3
3114953fee1dSIngo Molnar
3115e279b6c1SSam Ravnborgconfig COMPAT
31163c2362e6SHarvey Harrison	def_bool y
311783a44a4fSMasahiro Yamada	depends on IA32_EMULATION || X86_X32_ABI
3118e279b6c1SSam Ravnborg
3119e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT
31203120e25eSJan Beulich	def_bool y
3121a9251280SLinus Torvalds	depends on COMPAT
3122ee009e4aSDavid Howells
3123e279b6c1SSam Ravnborgendmenu
3124e279b6c1SSam Ravnborg
3125e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP
3126e5beae16SKeith Packard	def_bool y
3127e5beae16SKeith Packard	depends on X86_32
3128e5beae16SKeith Packard
3129edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig"
31305e8ebd84SJason A. Donenfeld
31315e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler"
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