xref: /linux/arch/x86/Kconfig (revision 872df34d7c51a79523820ea6a14860398c639b87)
1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0
2daa93fabSSam Ravnborg# Select 32 or 64 bit
3daa93fabSSam Ravnborgconfig 64BIT
4104daea1SMasahiro Yamada	bool "64-bit kernel" if "$(ARCH)" = "x86"
5104daea1SMasahiro Yamada	default "$(ARCH)" != "i386"
6a7f7f624SMasahiro Yamada	help
7daa93fabSSam Ravnborg	  Say yes to build a 64-bit kernel - formerly known as x86_64
8daa93fabSSam Ravnborg	  Say no to build a 32-bit kernel - formerly known as i386
9daa93fabSSam Ravnborg
10daa93fabSSam Ravnborgconfig X86_32
113120e25eSJan Beulich	def_bool y
123120e25eSJan Beulich	depends on !64BIT
13341c787eSIngo Molnar	# Options that are inherently 32-bit kernel only:
14341c787eSIngo Molnar	select ARCH_WANT_IPC_PARSE_VERSION
15341c787eSIngo Molnar	select CLKSRC_I8253
16341c787eSIngo Molnar	select CLONE_BACKWARDS
17157e118bSThomas Gleixner	select GENERIC_VDSO_32
18117ed454SThomas Gleixner	select HAVE_DEBUG_STACKOVERFLOW
19157e118bSThomas Gleixner	select KMAP_LOCAL
20341c787eSIngo Molnar	select MODULES_USE_ELF_REL
21341c787eSIngo Molnar	select OLD_SIGACTION
222ca408d9SBrian Gerst	select ARCH_SPLIT_ARG64
23daa93fabSSam Ravnborg
24daa93fabSSam Ravnborgconfig X86_64
253120e25eSJan Beulich	def_bool y
263120e25eSJan Beulich	depends on 64BIT
27d94e0685SIngo Molnar	# Options that are inherently 64-bit kernel only:
284eb0716eSAlexandre Ghiti	select ARCH_HAS_GIGANTIC_PAGE
29f9aad622SAnshuman Khandual	select ARCH_HAS_PTDUMP
303049def1SJeff Xu	select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS
31c12d3362SArd Biesheuvel	select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
320bff0aaeSSuren Baghdasaryan	select ARCH_SUPPORTS_PER_VMA_LOCK
3375182022SPeter Xu	select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE
34d94e0685SIngo Molnar	select HAVE_ARCH_SOFT_DIRTY
35d94e0685SIngo Molnar	select MODULES_USE_ELF_RELA
36f616ab59SChristoph Hellwig	select NEED_DMA_MAP_STATE
3709230cbcSChristoph Hellwig	select SWIOTLB
387facdc42SAl Viro	select ARCH_HAS_ELFCORE_COMPAT
3963703f37SKefeng Wang	select ZONE_DMA32
4014e56fb2SMike Rapoport (IBM)	select EXECMEM if DYNAMIC_FTRACE
411032c0baSSam Ravnborg
42518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE
43518049d9SSteven Rostedt (VMware)	def_bool y
44518049d9SSteven Rostedt (VMware)	depends on X86_32
45518049d9SSteven Rostedt (VMware)	depends on FUNCTION_TRACER
46518049d9SSteven Rostedt (VMware)	select DYNAMIC_FTRACE
47518049d9SSteven Rostedt (VMware)	help
48518049d9SSteven Rostedt (VMware)	  We keep the static function tracing (!DYNAMIC_FTRACE) around
49518049d9SSteven Rostedt (VMware)	  in order to test the non static function tracing in the
50518049d9SSteven Rostedt (VMware)	  generic code, as other architectures still use it. But we
51518049d9SSteven Rostedt (VMware)	  only need to keep it around for x86_64. No need to keep it
52518049d9SSteven Rostedt (VMware)	  for x86_32. For x86_32, force DYNAMIC_FTRACE.
53d94e0685SIngo Molnar#
54d94e0685SIngo Molnar# Arch settings
55d94e0685SIngo Molnar#
56d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be
57d94e0685SIngo Molnar#   ported to 32-bit as well. )
58d94e0685SIngo Molnar#
598d5fffb9SSam Ravnborgconfig X86
603c2362e6SHarvey Harrison	def_bool y
61c763ea26SIngo Molnar	#
62c763ea26SIngo Molnar	# Note: keep this list sorted alphabetically
63c763ea26SIngo Molnar	#
646471b825SIngo Molnar	select ACPI_LEGACY_TABLES_LOOKUP	if ACPI
656e0a0ea1SGraeme Gregory	select ACPI_SYSTEM_POWER_STATES_SUPPORT	if ACPI
66a02f66bbSJames Morse	select ACPI_HOTPLUG_CPU			if ACPI_PROCESSOR && HOTPLUG_CPU
67942fa985SYury Norov	select ARCH_32BIT_OFF_T			if X86_32
682a21ad57SThomas Gleixner	select ARCH_CLOCKSOURCE_INIT
69fe42754bSSean Christopherson	select ARCH_CONFIGURES_CPU_MITIGATIONS
701f6d3a8fSMasami Hiramatsu	select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE
711e866974SAnshuman Khandual	select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION
725c11f00bSDavid Hildenbrand	select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64
7391024b3cSAnshuman Khandual	select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
74cebc774fSAnshuman Khandual	select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE)
751e866974SAnshuman Khandual	select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE
7691dda51aSAleksey Makarov	select ARCH_HAS_ACPI_TABLE_UPGRADE	if ACPI
77c2280be8SAnshuman Khandual	select ARCH_HAS_CACHE_LINE_SIZE
781156b441SDavidlohr Bueso	select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
797c7077a7SThomas Gleixner	select ARCH_HAS_CPU_FINALIZE_INIT
808f23f5dbSJason Gunthorpe	select ARCH_HAS_CPU_PASID		if IOMMU_SVA
8155d1ecceSEric Biggers	select ARCH_HAS_CRC32
824ffd5086SEric Biggers	select ARCH_HAS_CRC64			if X86_64
83dbdda1fdSEric Biggers	select ARCH_HAS_CRC_T10DIF
842792d84eSKees Cook	select ARCH_HAS_CURRENT_STACK_POINTER
85fa5b6ec9SLaura Abbott	select ARCH_HAS_DEBUG_VIRTUAL
86399145f9SAnshuman Khandual	select ARCH_HAS_DEBUG_VM_PGTABLE	if !X86_PAE
8721266be9SDan Williams	select ARCH_HAS_DEVMEM_IS_ALLOWED
88de6c85bfSChristoph Hellwig	select ARCH_HAS_DMA_OPS			if GART_IOMMU || XEN
89b1a57bbfSDouglas Anderson	select ARCH_HAS_EARLY_DEBUG		if KGDB
906471b825SIngo Molnar	select ARCH_HAS_ELF_RANDOMIZE
9164f6a4e1SMike Rapoport (Microsoft)	select ARCH_HAS_EXECMEM_ROX		if X86_64
9272d93104SLinus Torvalds	select ARCH_HAS_FAST_MULTIPLIER
936974f0c4SDaniel Micay	select ARCH_HAS_FORTIFY_SOURCE
94957e3facSRiku Voipio	select ARCH_HAS_GCOV_PROFILE_ALL
95bece04b5SMarco Elver	select ARCH_HAS_KCOV			if X86_64
96b0b8a15bSSamuel Holland	select ARCH_HAS_KERNEL_FPU_SUPPORT
970c9c1d56SThiago Jung Bauermann	select ARCH_HAS_MEM_ENCRYPT
9810bcc80eSMathieu Desnoyers	select ARCH_HAS_MEMBARRIER_SYNC_CORE
9949f88c70SPaul E. McKenney	select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
1000ebeea8cSDaniel Borkmann	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
101c763ea26SIngo Molnar	select ARCH_HAS_PMEM_API		if X86_64
102476e8583SPeter Zijlstra	select ARCH_HAS_PREEMPT_LAZY
10317596731SRobin Murphy	select ARCH_HAS_PTE_DEVMAP		if X86_64
1043010a5eaSLaurent Dufour	select ARCH_HAS_PTE_SPECIAL
10571ce1ab5SKinsey Ho	select ARCH_HAS_HW_PTE_YOUNG
106eed9a328SYu Zhao	select ARCH_HAS_NONLEAF_PMD_YOUNG	if PGTABLE_LEVELS > 2
1070aed55afSDan Williams	select ARCH_HAS_UACCESS_FLUSHCACHE	if X86_64
108ec6347bbSDan Williams	select ARCH_HAS_COPY_MC			if X86_64
109d2852a22SDaniel Borkmann	select ARCH_HAS_SET_MEMORY
110d253ca0cSRick Edgecombe	select ARCH_HAS_SET_DIRECT_MAP
111ad21fc4fSLaura Abbott	select ARCH_HAS_STRICT_KERNEL_RWX
112ad21fc4fSLaura Abbott	select ARCH_HAS_STRICT_MODULE_RWX
113ac1ab12aSMathieu Desnoyers	select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE
11425c619e5SBrian Gerst	select ARCH_HAS_SYSCALL_WRAPPER
115918327e9SKees Cook	select ARCH_HAS_UBSAN
1167e01ccb4SZong Li	select ARCH_HAS_DEBUG_WX
11763703f37SKefeng Wang	select ARCH_HAS_ZONE_DMA_SET if EXPERT
1186471b825SIngo Molnar	select ARCH_HAVE_NMI_SAFE_CMPXCHG
119ba386777SVignesh Balasubramanian	select ARCH_HAVE_EXTRA_ELF_NOTES
12004d5ea46SAneesh Kumar K.V	select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE
1216471b825SIngo Molnar	select ARCH_MIGHT_HAVE_ACPI_PDC		if ACPI
12277fbbc81SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
1235e2c18c0SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
1243599fe12SThomas Gleixner	select ARCH_STACKWALK
1252c870e61SArnd Bergmann	select ARCH_SUPPORTS_ACPI
1266471b825SIngo Molnar	select ARCH_SUPPORTS_ATOMIC_RMW
1275d6ad668SMike Rapoport	select ARCH_SUPPORTS_DEBUG_PAGEALLOC
128d283d422SPasha Tatashin	select ARCH_SUPPORTS_PAGE_TABLE_CHECK	if X86_64
1296471b825SIngo Molnar	select ARCH_SUPPORTS_NUMA_BALANCING	if X86_64
13014df3267SThomas Gleixner	select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP	if NR_CPUS <= 4096
1313c516f89SSami Tolvanen	select ARCH_SUPPORTS_CFI_CLANG		if X86_64
1323c516f89SSami Tolvanen	select ARCH_USES_CFI_TRAPS		if X86_64 && CFI_CLANG
133583bfd48SNathan Chancellor	select ARCH_SUPPORTS_LTO_CLANG
134583bfd48SNathan Chancellor	select ARCH_SUPPORTS_LTO_CLANG_THIN
135d2d6422fSSebastian Andrzej Siewior	select ARCH_SUPPORTS_RT
136315ad878SRong Xu	select ARCH_SUPPORTS_AUTOFDO_CLANG
137d5dc9583SRong Xu	select ARCH_SUPPORTS_PROPELLER_CLANG    if X86_64
1386471b825SIngo Molnar	select ARCH_USE_BUILTIN_BSWAP
139909639aaSH. Peter Anvin (Intel)	select ARCH_USE_CMPXCHG_LOCKREF		if X86_CX8
140dce44566SAnshuman Khandual	select ARCH_USE_MEMTEST
1416471b825SIngo Molnar	select ARCH_USE_QUEUED_RWLOCKS
1426471b825SIngo Molnar	select ARCH_USE_QUEUED_SPINLOCKS
1432ce0d7f9SMark Brown	select ARCH_USE_SYM_ANNOTATIONS
144ce4a4e56SAndy Lutomirski	select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
14581c22041SDaniel Borkmann	select ARCH_WANT_DEFAULT_BPF_JIT	if X86_64
146c763ea26SIngo Molnar	select ARCH_WANTS_DYNAMIC_TASK_STRUCT
14751c2ee6dSNick Desaulniers	select ARCH_WANTS_NO_INSTR
14807431506SAnshuman Khandual	select ARCH_WANT_GENERAL_HUGETLB
1493876d4a3SAlexandre Ghiti	select ARCH_WANT_HUGE_PMD_SHARE
15059612b24SNathan Chancellor	select ARCH_WANT_LD_ORPHAN_WARN
1510b6f1582SAneesh Kumar K.V	select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP	if X86_64
1520b6f1582SAneesh Kumar K.V	select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP	if X86_64
15308efe293SFrank van der Linden	select ARCH_WANT_HUGETLB_VMEMMAP_PREINIT if X86_64
15438d8b4e6SHuang Ying	select ARCH_WANTS_THP_SWAP		if X86_64
155b5f06f64SBalbir Singh	select ARCH_HAS_PARANOID_L1D_FLUSH
15610916706SShile Zhang	select BUILDTIME_TABLE_SORT
1576471b825SIngo Molnar	select CLKEVT_I8253
1586471b825SIngo Molnar	select CLOCKSOURCE_WATCHDOG
1597cf8f44aSAlexander Potapenko	# Word-size accesses may read uninitialized data past the trailing \0
1607cf8f44aSAlexander Potapenko	# in strings and cause false KMSAN reports.
1617cf8f44aSAlexander Potapenko	select DCACHE_WORD_ACCESS		if !KMSAN
1623aac3ebeSThomas Gleixner	select DYNAMIC_SIGFRAME
16345471cd9SLinus Torvalds	select EDAC_ATOMIC_SCRUB
16445471cd9SLinus Torvalds	select EDAC_SUPPORT
1656471b825SIngo Molnar	select GENERIC_CLOCKEVENTS_BROADCAST	if X86_64 || (X86_32 && X86_LOCAL_APIC)
166cb81deefSThomas Gleixner	select GENERIC_CLOCKEVENTS_BROADCAST_IDLE	if GENERIC_CLOCKEVENTS_BROADCAST
1676471b825SIngo Molnar	select GENERIC_CLOCKEVENTS_MIN_ADJUST
1686471b825SIngo Molnar	select GENERIC_CMOS_UPDATE
1696471b825SIngo Molnar	select GENERIC_CPU_AUTOPROBE
1705b95f94cSJames Morse	select GENERIC_CPU_DEVICES
17161dc0f55SThomas Gleixner	select GENERIC_CPU_VULNERABILITIES
1726471b825SIngo Molnar	select GENERIC_EARLY_IOREMAP
17327d6b4d1SThomas Gleixner	select GENERIC_ENTRY
1746471b825SIngo Molnar	select GENERIC_IOMAP
175c7d6c9ddSThomas Gleixner	select GENERIC_IRQ_EFFECTIVE_AFF_MASK	if SMP
1760fa115daSThomas Gleixner	select GENERIC_IRQ_MATRIX_ALLOCATOR	if X86_LOCAL_APIC
177ad7a929fSThomas Gleixner	select GENERIC_IRQ_MIGRATION		if SMP
1786471b825SIngo Molnar	select GENERIC_IRQ_PROBE
179c201c917SThomas Gleixner	select GENERIC_IRQ_RESERVATION_MODE
1806471b825SIngo Molnar	select GENERIC_IRQ_SHOW
1816471b825SIngo Molnar	select GENERIC_PENDING_IRQ		if SMP
1826471b825SIngo Molnar	select GENERIC_SMP_IDLE_THREAD
1836471b825SIngo Molnar	select GENERIC_TIME_VSYSCALL
1847ac87074SVincenzo Frascino	select GENERIC_GETTIMEOFDAY
185dafde296SThomas Weißschuh	select GENERIC_VDSO_DATA_STORE
186550a77a7SDmitry Safonov	select GENERIC_VDSO_TIME_NS
1877e90ffb7SAdrian Hunter	select GENERIC_VDSO_OVERFLOW_PROTECT
1886ca297d4SPeter Zijlstra	select GUP_GET_PXX_LOW_HIGH		if X86_PAE
18917e5888eSHans de Goede	select HARDIRQS_SW_RESEND
1907edaeb68SThomas Gleixner	select HARDLOCKUP_CHECK_TIMESTAMP	if X86_64
191fcbfe812SNiklas Schnelle	select HAS_IOPORT
1926471b825SIngo Molnar	select HAVE_ACPI_APEI			if ACPI
1936471b825SIngo Molnar	select HAVE_ACPI_APEI_NMI		if ACPI
1942a19be61SVlastimil Babka	select HAVE_ALIGNED_STRUCT_PAGE
1956471b825SIngo Molnar	select HAVE_ARCH_AUDITSYSCALL
1966471b825SIngo Molnar	select HAVE_ARCH_HUGE_VMAP		if X86_64 || X86_PAE
197eed1fceeSSong Liu	select HAVE_ARCH_HUGE_VMALLOC		if X86_64
1986471b825SIngo Molnar	select HAVE_ARCH_JUMP_LABEL
199b34006c4SArd Biesheuvel	select HAVE_ARCH_JUMP_LABEL_RELATIVE
200d17a1d97SAndrey Ryabinin	select HAVE_ARCH_KASAN			if X86_64
2010609ae01SDaniel Axtens	select HAVE_ARCH_KASAN_VMALLOC		if X86_64
2021dc0da6eSAlexander Potapenko	select HAVE_ARCH_KFENCE
2034ca8cc8dSAlexander Potapenko	select HAVE_ARCH_KMSAN			if X86_64
2046471b825SIngo Molnar	select HAVE_ARCH_KGDB
2059e08f57dSDaniel Cashman	select HAVE_ARCH_MMAP_RND_BITS		if MMU
2069e08f57dSDaniel Cashman	select HAVE_ARCH_MMAP_RND_COMPAT_BITS	if MMU && COMPAT
2071b028f78SDmitry Safonov	select HAVE_ARCH_COMPAT_MMAP_BASES	if MMU && COMPAT
208271ca788SArd Biesheuvel	select HAVE_ARCH_PREL32_RELOCATIONS
2096471b825SIngo Molnar	select HAVE_ARCH_SECCOMP_FILTER
210f7d83c1cSKees Cook	select HAVE_ARCH_THREAD_STRUCT_WHITELIST
211afaef01cSAlexander Popov	select HAVE_ARCH_STACKLEAK
2126471b825SIngo Molnar	select HAVE_ARCH_TRACEHOOK
2136471b825SIngo Molnar	select HAVE_ARCH_TRANSPARENT_HUGEPAGE
214a00cc7d9SMatthew Wilcox	select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64
215b64d8d1eSPeter Xu	select HAVE_ARCH_USERFAULTFD_WP         if X86_64 && USERFAULTFD
2167677f7fdSAxel Rasmussen	select HAVE_ARCH_USERFAULTFD_MINOR	if X86_64 && USERFAULTFD
217e37e43a4SAndy Lutomirski	select HAVE_ARCH_VMAP_STACK		if X86_64
218fe950f60SKees Cook	select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
219c763ea26SIngo Molnar	select HAVE_ARCH_WITHIN_STACK_FRAMES
2202ff2b7ecSMasahiro Yamada	select HAVE_ASM_MODVERSIONS
2216471b825SIngo Molnar	select HAVE_CMPXCHG_DOUBLE
2226471b825SIngo Molnar	select HAVE_CMPXCHG_LOCAL
22324a9c541SFrederic Weisbecker	select HAVE_CONTEXT_TRACKING_USER		if X86_64
22424a9c541SFrederic Weisbecker	select HAVE_CONTEXT_TRACKING_USER_OFFSTACK	if HAVE_CONTEXT_TRACKING_USER
2256471b825SIngo Molnar	select HAVE_C_RECORDMCOUNT
22603f16cd0SJosh Poimboeuf	select HAVE_OBJTOOL_MCOUNT		if HAVE_OBJTOOL
227280981d6SSathvika Vasireddy	select HAVE_OBJTOOL_NOP_MCOUNT		if HAVE_OBJTOOL_MCOUNT
2284ed308c4SSteven Rostedt (Google)	select HAVE_BUILDTIME_MCOUNT_SORT
2296471b825SIngo Molnar	select HAVE_DEBUG_KMEMLEAK
2309c5a3621SAkinobu Mita	select HAVE_DMA_CONTIGUOUS
231677aa9f7SSteven Rostedt	select HAVE_DYNAMIC_FTRACE
23206aeaaeaSMasami Hiramatsu	select HAVE_DYNAMIC_FTRACE_WITH_REGS
23302a474caSSteven Rostedt (VMware)	select HAVE_DYNAMIC_FTRACE_WITH_ARGS	if X86_64
234762abbc0SMasami Hiramatsu (Google)	select HAVE_FTRACE_REGS_HAVING_PT_REGS	if X86_64
235562955feSSteven Rostedt (VMware)	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
236c316eb44SHeiko Carstens	select HAVE_SAMPLE_FTRACE_DIRECT	if X86_64
237503e4510SHeiko Carstens	select HAVE_SAMPLE_FTRACE_DIRECT_MULTI	if X86_64
23803f5781bSWang YanQing	select HAVE_EBPF_JIT
23958340a07SJohannes Berg	select HAVE_EFFICIENT_UNALIGNED_ACCESS
240976ba8daSArnd Bergmann	select HAVE_EISA			if X86_32
2415f56a5dfSJiri Slaby	select HAVE_EXIT_THREAD
24225176ad0SDavid Hildenbrand	select HAVE_GUP_FAST
243644e0e8dSSteven Rostedt (VMware)	select HAVE_FENTRY			if X86_64 || DYNAMIC_FTRACE
244a762e926SMasami Hiramatsu (Google)	select HAVE_FTRACE_GRAPH_FUNC		if HAVE_FUNCTION_GRAPH_TRACER
2456471b825SIngo Molnar	select HAVE_FTRACE_MCOUNT_RECORD
246a3ed4157SMasami Hiramatsu (Google)	select HAVE_FUNCTION_GRAPH_FREGS	if HAVE_FUNCTION_GRAPH_TRACER
2474a30e4c9SSteven Rostedt (VMware)	select HAVE_FUNCTION_GRAPH_TRACER	if X86_32 || (X86_64 && DYNAMIC_FTRACE)
2486471b825SIngo Molnar	select HAVE_FUNCTION_TRACER
2496b90bd4bSEmese Revfy	select HAVE_GCC_PLUGINS
2500067f129SK.Prasad	select HAVE_HW_BREAKPOINT
2516471b825SIngo Molnar	select HAVE_IOREMAP_PROT
252624db9eaSThomas Gleixner	select HAVE_IRQ_EXIT_ON_IRQ_STACK	if X86_64
2536471b825SIngo Molnar	select HAVE_IRQ_TIME_ACCOUNTING
2544ab7674fSJosh Poimboeuf	select HAVE_JUMP_LABEL_HACK		if HAVE_OBJTOOL
2556471b825SIngo Molnar	select HAVE_KERNEL_BZIP2
2566471b825SIngo Molnar	select HAVE_KERNEL_GZIP
2576471b825SIngo Molnar	select HAVE_KERNEL_LZ4
2586471b825SIngo Molnar	select HAVE_KERNEL_LZMA
2596471b825SIngo Molnar	select HAVE_KERNEL_LZO
2606471b825SIngo Molnar	select HAVE_KERNEL_XZ
261fb46d057SNick Terrell	select HAVE_KERNEL_ZSTD
2626471b825SIngo Molnar	select HAVE_KPROBES
2636471b825SIngo Molnar	select HAVE_KPROBES_ON_FTRACE
264540adea3SMasami Hiramatsu	select HAVE_FUNCTION_ERROR_INJECTION
2656471b825SIngo Molnar	select HAVE_KRETPROBES
266f3a112c0SMasami Hiramatsu	select HAVE_RETHOOK
2676471b825SIngo Molnar	select HAVE_LIVEPATCH			if X86_64
2680102752eSFrederic Weisbecker	select HAVE_MIXED_BREAKPOINTS_REGS
269ee9f8fceSJosh Poimboeuf	select HAVE_MOD_ARCH_SPECIFIC
2709f132f7eSJoel Fernandes (Google)	select HAVE_MOVE_PMD
271be37c98dSKalesh Singh	select HAVE_MOVE_PUD
27222102f45SJosh Poimboeuf	select HAVE_NOINSTR_HACK		if HAVE_OBJTOOL
27342a0bb3fSPetr Mladek	select HAVE_NMI
274489e355bSJosh Poimboeuf	select HAVE_NOINSTR_VALIDATION		if HAVE_OBJTOOL
27503f16cd0SJosh Poimboeuf	select HAVE_OBJTOOL			if X86_64
2766471b825SIngo Molnar	select HAVE_OPTPROBES
2775394f1e9SArnd Bergmann	select HAVE_PAGE_SIZE_4KB
2786471b825SIngo Molnar	select HAVE_PCSPKR_PLATFORM
2796471b825SIngo Molnar	select HAVE_PERF_EVENTS
280c01d4323SFrederic Weisbecker	select HAVE_PERF_EVENTS_NMI
28192e5aae4SNicholas Piggin	select HAVE_HARDLOCKUP_DETECTOR_PERF	if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
282eb01d42aSChristoph Hellwig	select HAVE_PCI
283c5e63197SJiri Olsa	select HAVE_PERF_REGS
284c5ebcedbSJiri Olsa	select HAVE_PERF_USER_STACK_DUMP
285a3725973SRik van Riel	select MMU_GATHER_RCU_TABLE_FREE
2861e9fdf21SPeter Zijlstra	select MMU_GATHER_MERGE_VMAS
28700998085SThomas Gleixner	select HAVE_POSIX_CPU_TIMERS_TASK_WORK
2886471b825SIngo Molnar	select HAVE_REGS_AND_STACK_ACCESS_API
28903f16cd0SJosh Poimboeuf	select HAVE_RELIABLE_STACKTRACE		if UNWINDER_ORC || STACK_VALIDATION
2903c88ee19SMasami Hiramatsu	select HAVE_FUNCTION_ARG_ACCESS_API
2917ecd19cfSKefeng Wang	select HAVE_SETUP_PER_CPU_AREA
292cd1a41ceSThomas Gleixner	select HAVE_SOFTIRQ_ON_OWN_STACK
2930ee2689bSBrian Gerst	select HAVE_STACKPROTECTOR
29403f16cd0SJosh Poimboeuf	select HAVE_STACK_VALIDATION		if HAVE_OBJTOOL
295e6d6c071SJosh Poimboeuf	select HAVE_STATIC_CALL
29603f16cd0SJosh Poimboeuf	select HAVE_STATIC_CALL_INLINE		if HAVE_OBJTOOL
29799cf983cSMark Rutland	select HAVE_PREEMPT_DYNAMIC_CALL
298d6761b8fSMathieu Desnoyers	select HAVE_RSEQ
29909498135SMiguel Ojeda	select HAVE_RUST			if X86_64
3006471b825SIngo Molnar	select HAVE_SYSCALL_TRACEPOINTS
3015f3da8c0SJosh Poimboeuf	select HAVE_UACCESS_VALIDATION		if HAVE_OBJTOOL
3026471b825SIngo Molnar	select HAVE_UNSTABLE_SCHED_CLOCK
3037c68af6eSAvi Kivity	select HAVE_USER_RETURN_NOTIFIER
3047ac87074SVincenzo Frascino	select HAVE_GENERIC_VDSO
30533385150SJason A. Donenfeld	select VDSO_GETRANDOM			if X86_64
3060c7ffa32SThomas Gleixner	select HOTPLUG_PARALLEL			if SMP && X86_64
30705736e4aSThomas Gleixner	select HOTPLUG_SMT			if SMP
3080c7ffa32SThomas Gleixner	select HOTPLUG_SPLIT_STARTUP		if SMP && X86_32
309c0185808SThomas Gleixner	select IRQ_FORCED_THREADING
310c2508ec5SLinus Torvalds	select LOCK_MM_AND_FIND_VMA
3117ecd19cfSKefeng Wang	select NEED_PER_CPU_EMBED_FIRST_CHUNK
3127ecd19cfSKefeng Wang	select NEED_PER_CPU_PAGE_FIRST_CHUNK
31386596f0aSChristoph Hellwig	select NEED_SG_DMA_LENGTH
31487482708SMike Rapoport (Microsoft)	select NUMA_MEMBLKS			if NUMA
3152eac9c2dSChristoph Hellwig	select PCI_DOMAINS			if PCI
316625210cfSSinan Kaya	select PCI_LOCKLESS_CONFIG		if PCI
3176471b825SIngo Molnar	select PERF_EVENTS
3183195ef59SPrarit Bhargava	select RTC_LIB
319d6faca40SArnd Bergmann	select RTC_MC146818_LIB
3206471b825SIngo Molnar	select SPARSE_IRQ
3216471b825SIngo Molnar	select SYSCTL_EXCEPTION_TRACE
32215f4eae7SAndy Lutomirski	select THREAD_INFO_IN_TASK
3234aae683fSMasahiro Yamada	select TRACE_IRQFLAGS_SUPPORT
3244510bffbSMark Rutland	select TRACE_IRQFLAGS_NMI_SUPPORT
3256471b825SIngo Molnar	select USER_STACKTRACE_SUPPORT
3263b02a051SIngo Molnar	select HAVE_ARCH_KCSAN			if X86_64
3270c608dadSAubrey Li	select PROC_PID_ARCH_STATUS		if PROC_FS
32850468e43SJarkko Sakkinen	select HAVE_ARCH_NODE_DEV_GROUP		if X86_SGX
329d49a0626SPeter Zijlstra	select FUNCTION_ALIGNMENT_16B		if X86_64 || X86_ALIGNMENT_16
330d49a0626SPeter Zijlstra	select FUNCTION_ALIGNMENT_4B
3319e2b4be3SNayna Jain	imply IMA_SECURE_AND_OR_TRUSTED_BOOT    if EFI
332ceea991aSJiri Olsa	select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE
3334817f70cSQi Zheng	select ARCH_SUPPORTS_PT_RECLAIM		if X86_64
3347d8330a5SBalbir Singh
335ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER
3363120e25eSJan Beulich	def_bool y
3373120e25eSJan Beulich	depends on KPROBES || PERF_EVENTS || UPROBES
338ba7e4d13SIngo Molnar
33951b26adaSLinus Torvaldsconfig OUTPUT_FORMAT
34051b26adaSLinus Torvalds	string
34151b26adaSLinus Torvalds	default "elf32-i386" if X86_32
34251b26adaSLinus Torvalds	default "elf64-x86-64" if X86_64
34351b26adaSLinus Torvalds
3448d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT
3453c2362e6SHarvey Harrison	def_bool y
3468d5fffb9SSam Ravnborg
3478d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT
3483c2362e6SHarvey Harrison	def_bool y
3498d5fffb9SSam Ravnborg
3508d5fffb9SSam Ravnborgconfig MMU
3513c2362e6SHarvey Harrison	def_bool y
3528d5fffb9SSam Ravnborg
3539e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN
3549e08f57dSDaniel Cashman	default 28 if 64BIT
3559e08f57dSDaniel Cashman	default 8
3569e08f57dSDaniel Cashman
3579e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX
3589e08f57dSDaniel Cashman	default 32 if 64BIT
3599e08f57dSDaniel Cashman	default 16
3609e08f57dSDaniel Cashman
3619e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN
3629e08f57dSDaniel Cashman	default 8
3639e08f57dSDaniel Cashman
3649e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX
3659e08f57dSDaniel Cashman	default 16
3669e08f57dSDaniel Cashman
3678d5fffb9SSam Ravnborgconfig SBUS
3688d5fffb9SSam Ravnborg	bool
3698d5fffb9SSam Ravnborg
3708d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA
3713120e25eSJan Beulich	def_bool y
3723120e25eSJan Beulich	depends on ISA_DMA_API
3738d5fffb9SSam Ravnborg
374d911c67eSAlexander Potapenkoconfig GENERIC_CSUM
375d911c67eSAlexander Potapenko	bool
376d911c67eSAlexander Potapenko	default y if KMSAN || KASAN
377d911c67eSAlexander Potapenko
3788d5fffb9SSam Ravnborgconfig GENERIC_BUG
3793c2362e6SHarvey Harrison	def_bool y
3808d5fffb9SSam Ravnborg	depends on BUG
381b93a531eSJan Beulich	select GENERIC_BUG_RELATIVE_POINTERS if X86_64
382b93a531eSJan Beulich
383b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS
384b93a531eSJan Beulich	bool
3858d5fffb9SSam Ravnborg
3868d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC
3873120e25eSJan Beulich	def_bool y
3883120e25eSJan Beulich	depends on ISA_DMA_API
3898d5fffb9SSam Ravnborg
3901032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY
3911032c0baSSam Ravnborg	def_bool y
3921032c0baSSam Ravnborg
3939a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX
3949a0b8415Svenkatesh.pallipadi@intel.com	def_bool y
3958d5fffb9SSam Ravnborg
396801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE
397801e4062SJohannes Berg	def_bool y
398801e4062SJohannes Berg
399f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
400f4cb5700SJohannes Berg	def_bool y
401f4cb5700SJohannes Berg
4028d5fffb9SSam Ravnborgconfig AUDIT_ARCH
403e0fd24a3SJan Beulich	def_bool y if X86_64
4048d5fffb9SSam Ravnborg
405d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET
406d6f2d75aSAndrey Ryabinin	hex
407d6f2d75aSAndrey Ryabinin	depends on KASAN
408d6f2d75aSAndrey Ryabinin	default 0xdffffc0000000000
409d6f2d75aSAndrey Ryabinin
41069575d38SShane Wangconfig HAVE_INTEL_TXT
41169575d38SShane Wang	def_bool y
4126ea30386SKees Cook	depends on INTEL_IOMMU && ACPI
41369575d38SShane Wang
4146b0c3d44SSam Ravnborgconfig X86_64_SMP
4156b0c3d44SSam Ravnborg	def_bool y
4166b0c3d44SSam Ravnborg	depends on X86_64 && SMP
4176b0c3d44SSam Ravnborg
4182b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES
4192b144498SSrikar Dronamraju	def_bool y
4202b144498SSrikar Dronamraju
421d20642f0SRob Herringconfig FIX_EARLYCON_MEM
422d20642f0SRob Herring	def_bool y
423d20642f0SRob Herring
42494d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK
42594d49eb3SKirill A. Shutemov	bool
42694d49eb3SKirill A. Shutemov
42798233368SKirill A. Shutemovconfig PGTABLE_LEVELS
42898233368SKirill A. Shutemov	int
42977ef56e4SKirill A. Shutemov	default 5 if X86_5LEVEL
43098233368SKirill A. Shutemov	default 4 if X86_64
43198233368SKirill A. Shutemov	default 3 if X86_PAE
43298233368SKirill A. Shutemov	default 2
43398233368SKirill A. Shutemov
434506f1d07SSam Ravnborgmenu "Processor type and features"
435506f1d07SSam Ravnborg
436506f1d07SSam Ravnborgconfig SMP
437506f1d07SSam Ravnborg	bool "Symmetric multi-processing support"
438a7f7f624SMasahiro Yamada	help
439506f1d07SSam Ravnborg	  This enables support for systems with more than one CPU. If you have
4404a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
4414a474157SRobert Graffham	  than one CPU, say Y.
442506f1d07SSam Ravnborg
4434a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
444506f1d07SSam Ravnborg	  machines, but will use only one CPU of a multiprocessor machine. If
445506f1d07SSam Ravnborg	  you say Y here, the kernel will run on many, but not all,
4464a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
447506f1d07SSam Ravnborg	  will run faster if you say N here.
448506f1d07SSam Ravnborg
449506f1d07SSam Ravnborg	  Note that if you say Y here and choose architecture "586" or
450506f1d07SSam Ravnborg	  "Pentium" under "Processor family", the kernel will not work on 486
451506f1d07SSam Ravnborg	  architectures. Similarly, multiprocessor kernels for the "PPro"
452506f1d07SSam Ravnborg	  architecture may not work on all Pentium based boards.
453506f1d07SSam Ravnborg
454506f1d07SSam Ravnborg	  People using multiprocessor machines who say Y here should also say
455506f1d07SSam Ravnborg	  Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
456506f1d07SSam Ravnborg	  Management" code will be disabled if you say Y here.
457506f1d07SSam Ravnborg
458ff61f079SJonathan Corbet	  See also <file:Documentation/arch/x86/i386/IO-APIC.rst>,
4594f4cfa6cSMauro Carvalho Chehab	  <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
460506f1d07SSam Ravnborg	  <http://www.tldp.org/docs.html#howto>.
461506f1d07SSam Ravnborg
462506f1d07SSam Ravnborg	  If you don't know what to do here, say N.
463506f1d07SSam Ravnborg
46406cd9a7dSYinghai Luconfig X86_X2APIC
4659232c49fSMateusz Jończyk	bool "x2APIC interrupt controller architecture support"
46619e3d60dSJan Kiszka	depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
4679232c49fSMateusz Jończyk	default y
468a7f7f624SMasahiro Yamada	help
4699232c49fSMateusz Jończyk	  x2APIC is an interrupt controller architecture, a component of which
4709232c49fSMateusz Jończyk	  (the local APIC) is present in the CPU. It allows faster access to
4719232c49fSMateusz Jończyk	  the local APIC and supports a larger number of CPUs in the system
4729232c49fSMateusz Jończyk	  than the predecessors.
47306cd9a7dSYinghai Lu
4749232c49fSMateusz Jończyk	  x2APIC was introduced in Intel CPUs around 2008 and in AMD EPYC CPUs
4759232c49fSMateusz Jończyk	  in 2019, but it can be disabled by the BIOS. It is also frequently
4769232c49fSMateusz Jończyk	  emulated in virtual machines, even when the host CPU does not support
4779232c49fSMateusz Jończyk	  it. Support in the CPU can be checked by executing
47899bb1bd8SMateusz Jończyk		grep x2apic /proc/cpuinfo
47906cd9a7dSYinghai Lu
48099bb1bd8SMateusz Jończyk	  If this configuration option is disabled, the kernel will boot with
48199bb1bd8SMateusz Jończyk	  very reduced functionality and performance on some platforms that
48299bb1bd8SMateusz Jończyk	  have x2APIC enabled. On the other hand, on hardware that does not
48399bb1bd8SMateusz Jończyk	  support x2APIC, a kernel with this option enabled will just fallback
48499bb1bd8SMateusz Jończyk	  to older APIC implementations.
485b8d1d163SDaniel Sneddon
48699bb1bd8SMateusz Jończyk	  If in doubt, say Y.
48706cd9a7dSYinghai Lu
4887fec07fdSJacob Panconfig X86_POSTED_MSI
4897fec07fdSJacob Pan	bool "Enable MSI and MSI-x delivery by posted interrupts"
4907fec07fdSJacob Pan	depends on X86_64 && IRQ_REMAP
4917fec07fdSJacob Pan	help
4927fec07fdSJacob Pan	  This enables MSIs that are under interrupt remapping to be delivered as
4937fec07fdSJacob Pan	  posted interrupts to the host kernel. Interrupt throughput can
4947fec07fdSJacob Pan	  potentially be improved by coalescing CPU notifications during high
4957fec07fdSJacob Pan	  frequency bursts.
4967fec07fdSJacob Pan
4977fec07fdSJacob Pan	  If you don't know what to do here, say N.
4987fec07fdSJacob Pan
4996695c85bSYinghai Luconfig X86_MPPARSE
5004590d98fSAndy Shevchenko	bool "Enable MPS table" if ACPI
5017a527688SJan Beulich	default y
5025ab74722SIngo Molnar	depends on X86_LOCAL_APIC
503a7f7f624SMasahiro Yamada	help
5046695c85bSYinghai Lu	  For old smp systems that do not have proper acpi support. Newer systems
5056695c85bSYinghai Lu	  (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
5066695c85bSYinghai Lu
507e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL
508e6d42931SJohannes Weiner	bool "x86 CPU resource control support"
5096fe07ce3SBabu Moger	depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD)
51059fe5a77SThomas Gleixner	select KERNFS
511e79f15a4SChen Yu	select PROC_CPU_RESCTRL		if PROC_FS
51270288405SJames Morse	select RESCTRL_FS_PSEUDO_LOCK
51378e99b4aSFenghua Yu	help
514e6d42931SJohannes Weiner	  Enable x86 CPU resource control support.
5156fe07ce3SBabu Moger
5166fe07ce3SBabu Moger	  Provide support for the allocation and monitoring of system resources
5176fe07ce3SBabu Moger	  usage by the CPU.
5186fe07ce3SBabu Moger
5196fe07ce3SBabu Moger	  Intel calls this Intel Resource Director Technology
5206fe07ce3SBabu Moger	  (Intel(R) RDT). More information about RDT can be found in the
5216fe07ce3SBabu Moger	  Intel x86 Architecture Software Developer Manual.
5226fe07ce3SBabu Moger
5236fe07ce3SBabu Moger	  AMD calls this AMD Platform Quality of Service (AMD QoS).
5246fe07ce3SBabu Moger	  More information about AMD QoS can be found in the AMD64 Technology
5256fe07ce3SBabu Moger	  Platform Quality of Service Extensions manual.
52678e99b4aSFenghua Yu
52778e99b4aSFenghua Yu	  Say N if unsure.
52878e99b4aSFenghua Yu
52970288405SJames Morseconfig RESCTRL_FS_PSEUDO_LOCK
53070288405SJames Morse	bool
53170288405SJames Morse	help
53270288405SJames Morse	  Software mechanism to pin data in a cache portion using
53370288405SJames Morse	  micro-architecture specific knowledge.
53470288405SJames Morse
5352cce9591SH. Peter Anvin (Intel)config X86_FRED
5362cce9591SH. Peter Anvin (Intel)	bool "Flexible Return and Event Delivery"
5372cce9591SH. Peter Anvin (Intel)	depends on X86_64
5382cce9591SH. Peter Anvin (Intel)	help
5392cce9591SH. Peter Anvin (Intel)	  When enabled, try to use Flexible Return and Event Delivery
5402cce9591SH. Peter Anvin (Intel)	  instead of the legacy SYSCALL/SYSENTER/IDT architecture for
5412cce9591SH. Peter Anvin (Intel)	  ring transitions and exception/interrupt handling if the
5423c41786cSPaul Menzel	  system supports it.
5432cce9591SH. Peter Anvin (Intel)
544c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM
545c5c606d9SRavikiran G Thirumalai	bool "Support for extended (non-PC) x86 platforms"
546c5c606d9SRavikiran G Thirumalai	default y
547a7f7f624SMasahiro Yamada	help
54806ac8346SIngo Molnar	  If you disable this option then the kernel will only support
54906ac8346SIngo Molnar	  standard PC platforms. (which covers the vast majority of
55006ac8346SIngo Molnar	  systems out there.)
55106ac8346SIngo Molnar
5528425091fSRavikiran G Thirumalai	  If you enable this option then you'll be able to select support
55371d99ea4SMasahiro Yamada	  for the following non-PC x86 platforms, depending on the value of
55471d99ea4SMasahiro Yamada	  CONFIG_64BIT.
55571d99ea4SMasahiro Yamada
55671d99ea4SMasahiro Yamada	  32-bit platforms (CONFIG_64BIT=n):
5574047e877SMateusz Jończyk		Goldfish (mostly Android emulator)
5584047e877SMateusz Jończyk		Intel CE media processor (CE4100) SoC
5594047e877SMateusz Jończyk		Intel Quark
5608425091fSRavikiran G Thirumalai		RDC R-321x SoC
56106ac8346SIngo Molnar
56271d99ea4SMasahiro Yamada	  64-bit platforms (CONFIG_64BIT=y):
56344b111b5SSteffen Persvold		Numascale NumaChip
5648425091fSRavikiran G Thirumalai		ScaleMP vSMP
5658425091fSRavikiran G Thirumalai		SGI Ultraviolet
566ca5955ddSArnd Bergmann		Merrifield/Moorefield MID devices
5674047e877SMateusz Jończyk		Goldfish (mostly Android emulator)
5688425091fSRavikiran G Thirumalai
5698425091fSRavikiran G Thirumalai	  If you have one of these systems, or if you want to build a
5708425091fSRavikiran G Thirumalai	  generic distribution kernel, say Y here - otherwise say N.
57171d99ea4SMasahiro Yamada
572c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms
573c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions
57444b111b5SSteffen Persvoldconfig X86_NUMACHIP
57544b111b5SSteffen Persvold	bool "Numascale NumaChip"
57644b111b5SSteffen Persvold	depends on X86_64
57744b111b5SSteffen Persvold	depends on X86_EXTENDED_PLATFORM
57844b111b5SSteffen Persvold	depends on NUMA
57944b111b5SSteffen Persvold	depends on SMP
58044b111b5SSteffen Persvold	depends on X86_X2APIC
581f9726bfdSDaniel J Blueman	depends on PCI_MMCONFIG
582a7f7f624SMasahiro Yamada	help
58344b111b5SSteffen Persvold	  Adds support for Numascale NumaChip large-SMP systems. Needed to
58444b111b5SSteffen Persvold	  enable more than ~168 cores.
58544b111b5SSteffen Persvold	  If you don't have one of these, you should say N here.
58603b48632SNick Piggin
5876a48565eSIngo Molnarconfig X86_VSMP
588c5c606d9SRavikiran G Thirumalai	bool "ScaleMP vSMP"
5896276a074SBorislav Petkov	select HYPERVISOR_GUEST
5906a48565eSIngo Molnar	select PARAVIRT
5916a48565eSIngo Molnar	depends on X86_64 && PCI
592c5c606d9SRavikiran G Thirumalai	depends on X86_EXTENDED_PLATFORM
593ead91d4bSShai Fultheim	depends on SMP
594a7f7f624SMasahiro Yamada	help
5956a48565eSIngo Molnar	  Support for ScaleMP vSMP systems.  Say 'Y' here if this kernel is
5966a48565eSIngo Molnar	  supposed to run on these EM64T-based machines.  Only choose this option
5976a48565eSIngo Molnar	  if you have one of these machines.
5986a48565eSIngo Molnar
599c5c606d9SRavikiran G Thirumalaiconfig X86_UV
600c5c606d9SRavikiran G Thirumalai	bool "SGI Ultraviolet"
601c5c606d9SRavikiran G Thirumalai	depends on X86_64
602c5c606d9SRavikiran G Thirumalai	depends on X86_EXTENDED_PLATFORM
60354c28d29SJack Steiner	depends on NUMA
6041ecb4ae5SAndrew Morton	depends on EFI
605c2209ea5SIngo Molnar	depends on KEXEC_CORE
6069d6c26e7SSuresh Siddha	depends on X86_X2APIC
6071222e564SIngo Molnar	depends on PCI
608a7f7f624SMasahiro Yamada	help
609c5c606d9SRavikiran G Thirumalai	  This option is needed in order to support SGI Ultraviolet systems.
610c5c606d9SRavikiran G Thirumalai	  If you don't have one of these, you should say N here.
611c5c606d9SRavikiran G Thirumalai
612ca5955ddSArnd Bergmannconfig X86_INTEL_MID
613ca5955ddSArnd Bergmann	bool "Intel Z34xx/Z35xx MID platform support"
614ca5955ddSArnd Bergmann	depends on X86_EXTENDED_PLATFORM
615ca5955ddSArnd Bergmann	depends on X86_PLATFORM_DEVICES
616ca5955ddSArnd Bergmann	depends on PCI
617ca5955ddSArnd Bergmann	depends on X86_64 || (EXPERT && PCI_GOANY)
618ca5955ddSArnd Bergmann	depends on X86_IO_APIC
619ca5955ddSArnd Bergmann	select I2C
620ca5955ddSArnd Bergmann	select DW_APB_TIMER
621ca5955ddSArnd Bergmann	select INTEL_SCU_PCI
622ca5955ddSArnd Bergmann	help
623ca5955ddSArnd Bergmann	  Select to build a kernel capable of supporting 64-bit Intel MID
624ca5955ddSArnd Bergmann	  (Mobile Internet Device) platform systems which do not have
625ca5955ddSArnd Bergmann	  the PCI legacy interfaces.
626ca5955ddSArnd Bergmann
627ca5955ddSArnd Bergmann	  The only supported devices are the 22nm Merrified (Z34xx)
628ca5955ddSArnd Bergmann	  and Moorefield (Z35xx) SoC used in the Intel Edison board and
629ca5955ddSArnd Bergmann	  a small number of Android devices such as the Asus Zenfone 2,
630ca5955ddSArnd Bergmann	  Asus FonePad 8 and Dell Venue 7.
631ca5955ddSArnd Bergmann
632ca5955ddSArnd Bergmann	  If you are building for a PC class system or non-MID tablet
633ca5955ddSArnd Bergmann	  SoCs like Bay Trail (Z36xx/Z37xx), say N here.
634ca5955ddSArnd Bergmann
635ca5955ddSArnd Bergmann	  Intel MID platforms are based on an Intel processor and chipset which
636ca5955ddSArnd Bergmann	  consume less power than most of the x86 derivatives.
637506f1d07SSam Ravnborg
638ddd70cf9SJun Nakajimaconfig X86_GOLDFISH
639ddd70cf9SJun Nakajima	bool "Goldfish (Virtual Platform)"
640cb7b8023SBen Hutchings	depends on X86_EXTENDED_PLATFORM
641a7f7f624SMasahiro Yamada	help
642ddd70cf9SJun Nakajima	  Enable support for the Goldfish virtual platform used primarily
643ddd70cf9SJun Nakajima	  for Android development. Unless you are building for the Android
644ddd70cf9SJun Nakajima	  Goldfish emulator say N here.
645ddd70cf9SJun Nakajima
646ca5955ddSArnd Bergmann# Following is an alphabetically sorted list of 32 bit extended platforms
647ca5955ddSArnd Bergmann# Please maintain the alphabetic order if and when there are additions
648ca5955ddSArnd Bergmann
649c751e17bSThomas Gleixnerconfig X86_INTEL_CE
650c751e17bSThomas Gleixner	bool "CE4100 TV platform"
651c751e17bSThomas Gleixner	depends on PCI
652c751e17bSThomas Gleixner	depends on PCI_GODIRECT
6536084a6e2SJiang Liu	depends on X86_IO_APIC
654c751e17bSThomas Gleixner	depends on X86_32
655c751e17bSThomas Gleixner	depends on X86_EXTENDED_PLATFORM
65637bc9f50SDirk Brandewie	select X86_REBOOTFIXUPS
657da6b737bSSebastian Andrzej Siewior	select OF
658da6b737bSSebastian Andrzej Siewior	select OF_EARLY_FLATTREE
659a7f7f624SMasahiro Yamada	help
660c751e17bSThomas Gleixner	  Select for the Intel CE media processor (CE4100) SOC.
661c751e17bSThomas Gleixner	  This option compiles in support for the CE4100 SOC for settop
662c751e17bSThomas Gleixner	  boxes and media devices.
663c751e17bSThomas Gleixner
6648bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK
6658bbc2a13SBryan O'Donoghue	bool "Intel Quark platform support"
6668bbc2a13SBryan O'Donoghue	depends on X86_32
6678bbc2a13SBryan O'Donoghue	depends on X86_EXTENDED_PLATFORM
6688bbc2a13SBryan O'Donoghue	depends on X86_PLATFORM_DEVICES
6698bbc2a13SBryan O'Donoghue	depends on X86_TSC
6708bbc2a13SBryan O'Donoghue	depends on PCI
6718bbc2a13SBryan O'Donoghue	depends on PCI_GOANY
6728bbc2a13SBryan O'Donoghue	depends on X86_IO_APIC
6738bbc2a13SBryan O'Donoghue	select IOSF_MBI
6748bbc2a13SBryan O'Donoghue	select INTEL_IMR
6759ab6eb51SAndy Shevchenko	select COMMON_CLK
676a7f7f624SMasahiro Yamada	help
6778bbc2a13SBryan O'Donoghue	  Select to include support for Quark X1000 SoC.
6788bbc2a13SBryan O'Donoghue	  Say Y here if you have a Quark based system such as the Arduino
6798bbc2a13SBryan O'Donoghue	  compatible Intel Galileo.
6808bbc2a13SBryan O'Donoghue
681e35e328dSMateusz Jończykconfig X86_RDC321X
682e35e328dSMateusz Jończyk	bool "RDC R-321x SoC"
683e35e328dSMateusz Jończyk	depends on X86_32
684e35e328dSMateusz Jończyk	depends on X86_EXTENDED_PLATFORM
685e35e328dSMateusz Jończyk	select M486
686e35e328dSMateusz Jończyk	select X86_REBOOTFIXUPS
687e35e328dSMateusz Jończyk	help
688e35e328dSMateusz Jończyk	  This option is needed for RDC R-321x system-on-chip, also known
689e35e328dSMateusz Jończyk	  as R-8610-(G).
690e35e328dSMateusz Jończyk	  If you don't have one of these chips, you should say N here.
691e35e328dSMateusz Jończyk
6923d48aab1SMika Westerbergconfig X86_INTEL_LPSS
6933d48aab1SMika Westerberg	bool "Intel Low Power Subsystem Support"
6945962dd22SSinan Kaya	depends on X86 && ACPI && PCI
6953d48aab1SMika Westerberg	select COMMON_CLK
6960f531431SMathias Nyman	select PINCTRL
697eebb3e8dSAndy Shevchenko	select IOSF_MBI
698a7f7f624SMasahiro Yamada	help
6993d48aab1SMika Westerberg	  Select to build support for Intel Low Power Subsystem such as
7003d48aab1SMika Westerberg	  found on Intel Lynxpoint PCH. Selecting this option enables
7010f531431SMathias Nyman	  things like clock tree (common clock framework) and pincontrol
7020f531431SMathias Nyman	  which are needed by the LPSS peripheral drivers.
7033d48aab1SMika Westerberg
70492082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE
70592082a88SKen Xue	bool "AMD ACPI2Platform devices support"
70692082a88SKen Xue	depends on ACPI
70792082a88SKen Xue	select COMMON_CLK
70892082a88SKen Xue	select PINCTRL
709a7f7f624SMasahiro Yamada	help
71092082a88SKen Xue	  Select to interpret AMD specific ACPI device to platform device
71192082a88SKen Xue	  such as I2C, UART, GPIO found on AMD Carrizo and later chipsets.
71292082a88SKen Xue	  I2C and UART depend on COMMON_CLK to set clock. GPIO driver is
71392082a88SKen Xue	  implemented under PINCTRL subsystem.
71492082a88SKen Xue
715ced3ce76SDavid E. Boxconfig IOSF_MBI
716ced3ce76SDavid E. Box	tristate "Intel SoC IOSF Sideband support for SoC platforms"
717ced3ce76SDavid E. Box	depends on PCI
718a7f7f624SMasahiro Yamada	help
719ced3ce76SDavid E. Box	  This option enables sideband register access support for Intel SoC
720ced3ce76SDavid E. Box	  platforms. On these platforms the IOSF sideband is used in lieu of
721ced3ce76SDavid E. Box	  MSR's for some register accesses, mostly but not limited to thermal
722ced3ce76SDavid E. Box	  and power. Drivers may query the availability of this device to
723ced3ce76SDavid E. Box	  determine if they need the sideband in order to work on these
724ced3ce76SDavid E. Box	  platforms. The sideband is available on the following SoC products.
725ced3ce76SDavid E. Box	  This list is not meant to be exclusive.
726ced3ce76SDavid E. Box	   - BayTrail
727ced3ce76SDavid E. Box	   - Braswell
728ced3ce76SDavid E. Box	   - Quark
729ced3ce76SDavid E. Box
730ced3ce76SDavid E. Box	  You should say Y if you are running a kernel on one of these SoC's.
731ced3ce76SDavid E. Box
732ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG
733ed2226bdSDavid E. Box	bool "Enable IOSF sideband access through debugfs"
734ed2226bdSDavid E. Box	depends on IOSF_MBI && DEBUG_FS
735a7f7f624SMasahiro Yamada	help
736ed2226bdSDavid E. Box	  Select this option to expose the IOSF sideband access registers (MCR,
737ed2226bdSDavid E. Box	  MDR, MCRX) through debugfs to write and read register information from
738ed2226bdSDavid E. Box	  different units on the SoC. This is most useful for obtaining device
739ed2226bdSDavid E. Box	  state information for debug and analysis. As this is a general access
740ed2226bdSDavid E. Box	  mechanism, users of this option would have specific knowledge of the
741ed2226bdSDavid E. Box	  device they want to access.
742ed2226bdSDavid E. Box
743ed2226bdSDavid E. Box	  If you don't require the option or are in doubt, say N.
744ed2226bdSDavid E. Box
745d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE
7466fc108a0SJan Beulich	def_bool y
747d949f36fSLinus Torvalds	# MCE code calls memory_failure():
748d949f36fSLinus Torvalds	depends on X86_MCE
749d949f36fSLinus Torvalds	# On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
750d949f36fSLinus Torvalds	# On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
751d949f36fSLinus Torvalds	depends on X86_64 || !SPARSEMEM
752d949f36fSLinus Torvalds	select ARCH_SUPPORTS_MEMORY_FAILURE
753d949f36fSLinus Torvalds
75482148d1dSShérabconfig X86_32_IRIS
75582148d1dSShérab	tristate "Eurobraille/Iris poweroff module"
75682148d1dSShérab	depends on X86_32
757a7f7f624SMasahiro Yamada	help
75882148d1dSShérab	  The Iris machines from EuroBraille do not have APM or ACPI support
75982148d1dSShérab	  to shut themselves down properly.  A special I/O sequence is
76082148d1dSShérab	  needed to do so, which is what this module does at
76182148d1dSShérab	  kernel shutdown.
76282148d1dSShérab
76382148d1dSShérab	  This is only for Iris machines from EuroBraille.
76482148d1dSShérab
76582148d1dSShérab	  If unused, say N.
76682148d1dSShérab
767ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
7683c2362e6SHarvey Harrison	def_bool y
7693c2362e6SHarvey Harrison	prompt "Single-depth WCHAN output"
770a87d0914SKen Chen	depends on X86
771a7f7f624SMasahiro Yamada	help
772506f1d07SSam Ravnborg	  Calculate simpler /proc/<PID>/wchan values. If this option
773506f1d07SSam Ravnborg	  is disabled then wchan values will recurse back to the
774506f1d07SSam Ravnborg	  caller function. This provides more accurate wchan values,
775506f1d07SSam Ravnborg	  at the expense of slightly more scheduling overhead.
776506f1d07SSam Ravnborg
777506f1d07SSam Ravnborg	  If in doubt, say "Y".
778506f1d07SSam Ravnborg
7796276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST
7806276a074SBorislav Petkov	bool "Linux guest support"
781a7f7f624SMasahiro Yamada	help
7826276a074SBorislav Petkov	  Say Y here to enable options for running Linux under various hyper-
7836276a074SBorislav Petkov	  visors. This option enables basic hypervisor detection and platform
7846276a074SBorislav Petkov	  setup.
785506f1d07SSam Ravnborg
7866276a074SBorislav Petkov	  If you say N, all options in this submenu will be skipped and
7876276a074SBorislav Petkov	  disabled, and Linux guest support won't be built in.
788506f1d07SSam Ravnborg
7896276a074SBorislav Petkovif HYPERVISOR_GUEST
790506f1d07SSam Ravnborg
791e61bd94aSEduardo Pereira Habkostconfig PARAVIRT
792e61bd94aSEduardo Pereira Habkost	bool "Enable paravirtualization code"
793a0e2bf7cSJuergen Gross	depends on HAVE_STATIC_CALL
794a7f7f624SMasahiro Yamada	help
795e61bd94aSEduardo Pereira Habkost	  This changes the kernel so it can modify itself when it is run
796e61bd94aSEduardo Pereira Habkost	  under a hypervisor, potentially improving performance significantly
797e61bd94aSEduardo Pereira Habkost	  over full virtualization.  However, when run without a hypervisor
798e61bd94aSEduardo Pereira Habkost	  the kernel is theoretically slower and slightly larger.
799e61bd94aSEduardo Pereira Habkost
800c00a280aSJuergen Grossconfig PARAVIRT_XXL
801c00a280aSJuergen Gross	bool
802c00a280aSJuergen Gross
8036276a074SBorislav Petkovconfig PARAVIRT_DEBUG
8046276a074SBorislav Petkov	bool "paravirt-ops debugging"
8056276a074SBorislav Petkov	depends on PARAVIRT && DEBUG_KERNEL
806a7f7f624SMasahiro Yamada	help
8076276a074SBorislav Petkov	  Enable to debug paravirt_ops internals.  Specifically, BUG if
8086276a074SBorislav Petkov	  a paravirt_op is missing when it is called.
8096276a074SBorislav Petkov
810b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS
811b4ecc126SJeremy Fitzhardinge	bool "Paravirtualization layer for spinlocks"
8126ea30386SKees Cook	depends on PARAVIRT && SMP
813a7f7f624SMasahiro Yamada	help
814b4ecc126SJeremy Fitzhardinge	  Paravirtualized spinlocks allow a pvops backend to replace the
815b4ecc126SJeremy Fitzhardinge	  spinlock implementation with something virtualization-friendly
816b4ecc126SJeremy Fitzhardinge	  (for example, block the virtual CPU rather than spinning).
817b4ecc126SJeremy Fitzhardinge
8184c4e4f61SRaghavendra K T	  It has a minimal impact on native kernels and gives a nice performance
8194c4e4f61SRaghavendra K T	  benefit on paravirtualized KVM / Xen kernels.
820b4ecc126SJeremy Fitzhardinge
8214c4e4f61SRaghavendra K T	  If you are unsure how to answer this question, answer Y.
822b4ecc126SJeremy Fitzhardinge
823ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR
824ecca2502SZhao Yakui	def_bool n
825ecca2502SZhao Yakui
8266276a074SBorislav Petkovsource "arch/x86/xen/Kconfig"
8276276a074SBorislav Petkov
8286276a074SBorislav Petkovconfig KVM_GUEST
8296276a074SBorislav Petkov	bool "KVM Guest support (including kvmclock)"
8306276a074SBorislav Petkov	depends on PARAVIRT
8316276a074SBorislav Petkov	select PARAVIRT_CLOCK
832a1c4423bSMarcelo Tosatti	select ARCH_CPUIDLE_HALTPOLL
833b1d40575SVitaly Kuznetsov	select X86_HV_CALLBACK_VECTOR
8346276a074SBorislav Petkov	default y
835a7f7f624SMasahiro Yamada	help
8366276a074SBorislav Petkov	  This option enables various optimizations for running under the KVM
8376276a074SBorislav Petkov	  hypervisor. It includes a paravirtualized clock, so that instead
8386276a074SBorislav Petkov	  of relying on a PIT (or probably other) emulation by the
8396276a074SBorislav Petkov	  underlying device model, the host provides the guest with
8406276a074SBorislav Petkov	  timing infrastructure such as time of day, and system time
8416276a074SBorislav Petkov
842a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL
843a1c4423bSMarcelo Tosatti	def_bool n
844a1c4423bSMarcelo Tosatti	prompt "Disable host haltpoll when loading haltpoll driver"
845a1c4423bSMarcelo Tosatti	help
846a1c4423bSMarcelo Tosatti	  If virtualized under KVM, disable host haltpoll.
847a1c4423bSMarcelo Tosatti
8487733607fSMaran Wilsonconfig PVH
8497733607fSMaran Wilson	bool "Support for running PVH guests"
850a7f7f624SMasahiro Yamada	help
8517733607fSMaran Wilson	  This option enables the PVH entry point for guest virtual machines
8527733607fSMaran Wilson	  as specified in the x86/HVM direct boot ABI.
8537733607fSMaran Wilson
8546276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING
8556276a074SBorislav Petkov	bool "Paravirtual steal time accounting"
8566276a074SBorislav Petkov	depends on PARAVIRT
857a7f7f624SMasahiro Yamada	help
8586276a074SBorislav Petkov	  Select this option to enable fine granularity task steal time
8596276a074SBorislav Petkov	  accounting. Time spent executing other tasks in parallel with
8606276a074SBorislav Petkov	  the current vCPU is discounted from the vCPU power. To account for
8616276a074SBorislav Petkov	  that, there can be a small performance impact.
8626276a074SBorislav Petkov
8636276a074SBorislav Petkov	  If in doubt, say N here.
8646276a074SBorislav Petkov
8657af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK
8667af192c9SGerd Hoffmann	bool
8677af192c9SGerd Hoffmann
8684a362601SJan Kiszkaconfig JAILHOUSE_GUEST
8694a362601SJan Kiszka	bool "Jailhouse non-root cell support"
870abde587bSArnd Bergmann	depends on X86_64 && PCI
87187e65d05SJan Kiszka	select X86_PM_TIMER
872a7f7f624SMasahiro Yamada	help
8734a362601SJan Kiszka	  This option allows to run Linux as guest in a Jailhouse non-root
8744a362601SJan Kiszka	  cell. You can leave this option disabled if you only want to start
8754a362601SJan Kiszka	  Jailhouse and run Linux afterwards in the root cell.
8764a362601SJan Kiszka
877ec7972c9SZhao Yakuiconfig ACRN_GUEST
878ec7972c9SZhao Yakui	bool "ACRN Guest support"
879ec7972c9SZhao Yakui	depends on X86_64
880498ad393SZhao Yakui	select X86_HV_CALLBACK_VECTOR
881ec7972c9SZhao Yakui	help
882ec7972c9SZhao Yakui	  This option allows to run Linux as guest in the ACRN hypervisor. ACRN is
883ec7972c9SZhao Yakui	  a flexible, lightweight reference open-source hypervisor, built with
884ec7972c9SZhao Yakui	  real-time and safety-criticality in mind. It is built for embedded
885ec7972c9SZhao Yakui	  IOT with small footprint and real-time features. More details can be
886ec7972c9SZhao Yakui	  found in https://projectacrn.org/.
887ec7972c9SZhao Yakui
88859bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST
88959bd54a8SKuppuswamy Sathyanarayanan	bool "Intel TDX (Trust Domain Extensions) - Guest Support"
89059bd54a8SKuppuswamy Sathyanarayanan	depends on X86_64 && CPU_SUP_INTEL
89159bd54a8SKuppuswamy Sathyanarayanan	depends on X86_X2APIC
89275d090fdSKirill A. Shutemov	depends on EFI_STUB
8939f98a4f4SVishal Annapurve	depends on PARAVIRT
89441394e33SKirill A. Shutemov	select ARCH_HAS_CC_PLATFORM
895968b4931SKirill A. Shutemov	select X86_MEM_ENCRYPT
89677a512e3SSean Christopherson	select X86_MCE
89775d090fdSKirill A. Shutemov	select UNACCEPTED_MEMORY
89859bd54a8SKuppuswamy Sathyanarayanan	help
89959bd54a8SKuppuswamy Sathyanarayanan	  Support running as a guest under Intel TDX.  Without this support,
90059bd54a8SKuppuswamy Sathyanarayanan	  the guest kernel can not boot or run under TDX.
90159bd54a8SKuppuswamy Sathyanarayanan	  TDX includes memory encryption and integrity capabilities
90259bd54a8SKuppuswamy Sathyanarayanan	  which protect the confidentiality and integrity of guest
90359bd54a8SKuppuswamy Sathyanarayanan	  memory contents and CPU state. TDX guests are protected from
90459bd54a8SKuppuswamy Sathyanarayanan	  some attacks from the VMM.
90559bd54a8SKuppuswamy Sathyanarayanan
9066276a074SBorislav Petkovendif # HYPERVISOR_GUEST
90797349135SJeremy Fitzhardinge
908506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu"
909506f1d07SSam Ravnborg
910506f1d07SSam Ravnborgconfig HPET_TIMER
9113c2362e6SHarvey Harrison	def_bool X86_64
912506f1d07SSam Ravnborg	prompt "HPET Timer Support" if X86_32
913a7f7f624SMasahiro Yamada	help
914506f1d07SSam Ravnborg	  Use the IA-PC HPET (High Precision Event Timer) to manage
915506f1d07SSam Ravnborg	  time in preference to the PIT and RTC, if a HPET is
916506f1d07SSam Ravnborg	  present.
917506f1d07SSam Ravnborg	  HPET is the next generation timer replacing legacy 8254s.
918506f1d07SSam Ravnborg	  The HPET provides a stable time base on SMP
919506f1d07SSam Ravnborg	  systems, unlike the TSC, but it is more expensive to access,
9204e7f9df2SMichael S. Tsirkin	  as it is off-chip.  The interface used is documented
9214e7f9df2SMichael S. Tsirkin	  in the HPET spec, revision 1.
922506f1d07SSam Ravnborg
923506f1d07SSam Ravnborg	  You can safely choose Y here.  However, HPET will only be
924506f1d07SSam Ravnborg	  activated if the platform and the BIOS support this feature.
925506f1d07SSam Ravnborg	  Otherwise the 8254 will be used for timing services.
926506f1d07SSam Ravnborg
927506f1d07SSam Ravnborg	  Choose N to continue using the legacy 8254 timer.
928506f1d07SSam Ravnborg
929506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC
9303c2362e6SHarvey Harrison	def_bool y
9313228e1dcSAnand K Mistry	depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
932506f1d07SSam Ravnborg
9336a108a14SDavid Rientjes# Mark as expert because too many people got it wrong.
934506f1d07SSam Ravnborg# The code disables itself when not needed.
9357ae9392cSThomas Petazzoniconfig DMI
9367ae9392cSThomas Petazzoni	default y
937cf074402SArd Biesheuvel	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
9386a108a14SDavid Rientjes	bool "Enable DMI scanning" if EXPERT
939a7f7f624SMasahiro Yamada	help
9407ae9392cSThomas Petazzoni	  Enabled scanning of DMI to identify machine quirks. Say Y
9417ae9392cSThomas Petazzoni	  here unless you have verified that your setup is not
9427ae9392cSThomas Petazzoni	  affected by entries in the DMI blacklist. Required by PNP
9437ae9392cSThomas Petazzoni	  BIOS code.
9447ae9392cSThomas Petazzoni
945506f1d07SSam Ravnborgconfig GART_IOMMU
94638901f1cSAndi Kleen	bool "Old AMD GART IOMMU support"
947a4ce5a48SChristoph Hellwig	select IOMMU_HELPER
948506f1d07SSam Ravnborg	select SWIOTLB
94923ac4ae8SAndreas Herrmann	depends on X86_64 && PCI && AMD_NB
950a7f7f624SMasahiro Yamada	help
951ced3c42cSIngo Molnar	  Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron
952ced3c42cSIngo Molnar	  GART based hardware IOMMUs.
953ced3c42cSIngo Molnar
954ced3c42cSIngo Molnar	  The GART supports full DMA access for devices with 32-bit access
955ced3c42cSIngo Molnar	  limitations, on systems with more than 3 GB. This is usually needed
956ced3c42cSIngo Molnar	  for USB, sound, many IDE/SATA chipsets and some other devices.
957ced3c42cSIngo Molnar
958ced3c42cSIngo Molnar	  Newer systems typically have a modern AMD IOMMU, supported via
959ced3c42cSIngo Molnar	  the CONFIG_AMD_IOMMU=y config option.
960ced3c42cSIngo Molnar
961ced3c42cSIngo Molnar	  In normal configurations this driver is only active when needed:
962ced3c42cSIngo Molnar	  there's more than 3 GB of memory and the system contains a
963ced3c42cSIngo Molnar	  32-bit limited device.
964ced3c42cSIngo Molnar
965ced3c42cSIngo Molnar	  If unsure, say Y.
966506f1d07SSam Ravnborg
9678b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT
9688b766b0fSMichal Suchanek	bool
9698b766b0fSMichal Suchanek	help
9708b766b0fSMichal Suchanek	  If true, at least one selected framebuffer driver can take advantage
9718b766b0fSMichal Suchanek	  of VESA video modes set at an early boot stage via the vga= parameter.
9728b766b0fSMichal Suchanek
9731184dc2fSMike Travisconfig MAXSMP
974ddb0c5a6SSamuel Thibault	bool "Enable Maximum number of SMP Processors and NUMA Nodes"
9756ea30386SKees Cook	depends on X86_64 && SMP && DEBUG_KERNEL
97636f5101aSMike Travis	select CPUMASK_OFFSTACK
977a7f7f624SMasahiro Yamada	help
978ddb0c5a6SSamuel Thibault	  Enable maximum number of CPUS and NUMA Nodes for this architecture.
9791184dc2fSMike Travis	  If unsure, say N.
980506f1d07SSam Ravnborg
981aec6487eSIngo Molnar#
982aec6487eSIngo Molnar# The maximum number of CPUs supported:
983aec6487eSIngo Molnar#
984aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT,
985aec6487eSIngo Molnar# and which can be configured interactively in the
986aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range.
987aec6487eSIngo Molnar#
988aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on
989aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel.
990aec6487eSIngo Molnar#
991aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable
992aec6487eSIngo Molnar#   interactive configuration. )
993aec6487eSIngo Molnar#
994a0d0bb4dSRandy Dunlap
995aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN
996a0d0bb4dSRandy Dunlap	int
997aec6487eSIngo Molnar	default NR_CPUS_RANGE_END if MAXSMP
998a0d0bb4dSRandy Dunlap	default    1 if !SMP
999a0d0bb4dSRandy Dunlap	default    2
1000a0d0bb4dSRandy Dunlap
1001aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END
1002a0d0bb4dSRandy Dunlap	int
1003a0d0bb4dSRandy Dunlap	depends on X86_32
10040abf5086SArnd Bergmann	default    8 if  SMP
1005a0d0bb4dSRandy Dunlap	default    1 if !SMP
1006a0d0bb4dSRandy Dunlap
1007aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END
1008a0d0bb4dSRandy Dunlap	int
1009a0d0bb4dSRandy Dunlap	depends on X86_64
10101edae1aeSScott Wood	default 8192 if  SMP && CPUMASK_OFFSTACK
10111edae1aeSScott Wood	default  512 if  SMP && !CPUMASK_OFFSTACK
1012a0d0bb4dSRandy Dunlap	default    1 if !SMP
1013aec6487eSIngo Molnar
1014aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT
1015aec6487eSIngo Molnar	int
1016aec6487eSIngo Molnar	depends on X86_32
1017aec6487eSIngo Molnar	default    8 if  SMP
1018aec6487eSIngo Molnar	default    1 if !SMP
1019aec6487eSIngo Molnar
1020aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT
1021aec6487eSIngo Molnar	int
1022aec6487eSIngo Molnar	depends on X86_64
1023a0d0bb4dSRandy Dunlap	default 8192 if  MAXSMP
1024a0d0bb4dSRandy Dunlap	default   64 if  SMP
1025aec6487eSIngo Molnar	default    1 if !SMP
1026a0d0bb4dSRandy Dunlap
1027506f1d07SSam Ravnborgconfig NR_CPUS
102836f5101aSMike Travis	int "Maximum number of CPUs" if SMP && !MAXSMP
1029aec6487eSIngo Molnar	range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END
1030aec6487eSIngo Molnar	default NR_CPUS_DEFAULT
1031a7f7f624SMasahiro Yamada	help
1032506f1d07SSam Ravnborg	  This allows you to specify the maximum number of CPUs which this
1033bb61ccc7SJosh Boyer	  kernel will support.  If CPUMASK_OFFSTACK is enabled, the maximum
1034cad14bb9SKirill A. Shutemov	  supported value is 8192, otherwise the maximum value is 512.  The
1035506f1d07SSam Ravnborg	  minimum value which makes sense is 2.
1036506f1d07SSam Ravnborg
1037aec6487eSIngo Molnar	  This is purely to save memory: each supported CPU adds about 8KB
1038aec6487eSIngo Molnar	  to the kernel image.
1039506f1d07SSam Ravnborg
104066558b73STim Chenconfig SCHED_CLUSTER
104166558b73STim Chen	bool "Cluster scheduler support"
104266558b73STim Chen	depends on SMP
104366558b73STim Chen	default y
104466558b73STim Chen	help
104566558b73STim Chen	  Cluster scheduler support improves the CPU scheduler's decision
104666558b73STim Chen	  making when dealing with machines that have clusters of CPUs.
104766558b73STim Chen	  Cluster usually means a couple of CPUs which are placed closely
104866558b73STim Chen	  by sharing mid-level caches, last-level cache tags or internal
104966558b73STim Chen	  busses.
105066558b73STim Chen
1051506f1d07SSam Ravnborgconfig SCHED_SMT
1052dbe73364SThomas Gleixner	def_bool y if SMP
1053506f1d07SSam Ravnborg
1054506f1d07SSam Ravnborgconfig SCHED_MC
10553c2362e6SHarvey Harrison	def_bool y
10563c2362e6SHarvey Harrison	prompt "Multi-core scheduler support"
1057c8e56d20SBorislav Petkov	depends on SMP
1058a7f7f624SMasahiro Yamada	help
1059506f1d07SSam Ravnborg	  Multi-core scheduler support improves the CPU scheduler's decision
1060506f1d07SSam Ravnborg	  making when dealing with multi-core CPU chips at a cost of slightly
1061506f1d07SSam Ravnborg	  increased overhead in some places. If unsure say N here.
1062506f1d07SSam Ravnborg
1063de966cf4STim Chenconfig SCHED_MC_PRIO
1064de966cf4STim Chen	bool "CPU core priorities scheduler support"
10653598e577SMeng Li	depends on SCHED_MC
10663598e577SMeng Li	select X86_INTEL_PSTATE if CPU_SUP_INTEL
10673598e577SMeng Li	select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI
10680a21fc12SIngo Molnar	select CPU_FREQ
1069de966cf4STim Chen	default y
1070a7f7f624SMasahiro Yamada	help
1071de966cf4STim Chen	  Intel Turbo Boost Max Technology 3.0 enabled CPUs have a
1072de966cf4STim Chen	  core ordering determined at manufacturing time, which allows
1073de966cf4STim Chen	  certain cores to reach higher turbo frequencies (when running
1074de966cf4STim Chen	  single threaded workloads) than others.
1075de966cf4STim Chen
1076de966cf4STim Chen	  Enabling this kernel feature teaches the scheduler about
1077de966cf4STim Chen	  the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the
1078de966cf4STim Chen	  scheduler's CPU selection logic accordingly, so that higher
1079de966cf4STim Chen	  overall system performance can be achieved.
1080de966cf4STim Chen
1081de966cf4STim Chen	  This feature will have no effect on CPUs without this feature.
1082de966cf4STim Chen
1083de966cf4STim Chen	  If unsure say Y here.
10845e76b2abSTim Chen
108530b8b006SThomas Gleixnerconfig UP_LATE_INIT
108630b8b006SThomas Gleixner	def_bool y
1087ba360f88SThomas Gleixner	depends on !SMP && X86_LOCAL_APIC
108830b8b006SThomas Gleixner
1089506f1d07SSam Ravnborgconfig X86_UP_APIC
109050849eefSJan Beulich	bool "Local APIC support on uniprocessors" if !PCI_MSI
109150849eefSJan Beulich	default PCI_MSI
1092dcbb01fbSArnd Bergmann	depends on X86_32 && !SMP
1093a7f7f624SMasahiro Yamada	help
1094506f1d07SSam Ravnborg	  A local APIC (Advanced Programmable Interrupt Controller) is an
1095506f1d07SSam Ravnborg	  integrated interrupt controller in the CPU. If you have a single-CPU
1096506f1d07SSam Ravnborg	  system which has a processor with a local APIC, you can say Y here to
1097506f1d07SSam Ravnborg	  enable and use it. If you say Y here even though your machine doesn't
1098506f1d07SSam Ravnborg	  have a local APIC, then the kernel will still run with no slowdown at
1099506f1d07SSam Ravnborg	  all. The local APIC supports CPU-generated self-interrupts (timer,
1100506f1d07SSam Ravnborg	  performance counters), and the NMI watchdog which detects hard
1101506f1d07SSam Ravnborg	  lockups.
1102506f1d07SSam Ravnborg
1103506f1d07SSam Ravnborgconfig X86_UP_IOAPIC
1104506f1d07SSam Ravnborg	bool "IO-APIC support on uniprocessors"
1105506f1d07SSam Ravnborg	depends on X86_UP_APIC
1106a7f7f624SMasahiro Yamada	help
1107506f1d07SSam Ravnborg	  An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
1108506f1d07SSam Ravnborg	  SMP-capable replacement for PC-style interrupt controllers. Most
1109506f1d07SSam Ravnborg	  SMP systems and many recent uniprocessor systems have one.
1110506f1d07SSam Ravnborg
1111506f1d07SSam Ravnborg	  If you have a single-CPU system with an IO-APIC, you can say Y here
1112506f1d07SSam Ravnborg	  to use it. If you say Y here even though your machine doesn't have
1113506f1d07SSam Ravnborg	  an IO-APIC, then the kernel will still run with no slowdown at all.
1114506f1d07SSam Ravnborg
1115506f1d07SSam Ravnborgconfig X86_LOCAL_APIC
11163c2362e6SHarvey Harrison	def_bool y
1117dcbb01fbSArnd Bergmann	depends on X86_64 || SMP || X86_UP_APIC || PCI_MSI
1118b5dc8e6cSJiang Liu	select IRQ_DOMAIN_HIERARCHY
1119506f1d07SSam Ravnborg
11202b5e22afSKirill A. Shutemovconfig ACPI_MADT_WAKEUP
11212b5e22afSKirill A. Shutemov	def_bool y
11222b5e22afSKirill A. Shutemov	depends on X86_64
11232b5e22afSKirill A. Shutemov	depends on ACPI
11242b5e22afSKirill A. Shutemov	depends on SMP
11252b5e22afSKirill A. Shutemov	depends on X86_LOCAL_APIC
11262b5e22afSKirill A. Shutemov
1127506f1d07SSam Ravnborgconfig X86_IO_APIC
1128b1da1e71SJan Beulich	def_bool y
1129b1da1e71SJan Beulich	depends on X86_LOCAL_APIC || X86_UP_IOAPIC
1130506f1d07SSam Ravnborg
113141b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS
113241b9eb26SStefan Assmann	bool "Reroute for broken boot IRQs"
113341b9eb26SStefan Assmann	depends on X86_IO_APIC
1134a7f7f624SMasahiro Yamada	help
113541b9eb26SStefan Assmann	  This option enables a workaround that fixes a source of
113641b9eb26SStefan Assmann	  spurious interrupts. This is recommended when threaded
113741b9eb26SStefan Assmann	  interrupt handling is used on systems where the generation of
113841b9eb26SStefan Assmann	  superfluous "boot interrupts" cannot be disabled.
113941b9eb26SStefan Assmann
114041b9eb26SStefan Assmann	  Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
114141b9eb26SStefan Assmann	  entry in the chipset's IO-APIC is masked (as, e.g. the RT
114241b9eb26SStefan Assmann	  kernel does during interrupt handling). On chipsets where this
114341b9eb26SStefan Assmann	  boot IRQ generation cannot be disabled, this workaround keeps
114441b9eb26SStefan Assmann	  the original IRQ line masked so that only the equivalent "boot
114541b9eb26SStefan Assmann	  IRQ" is delivered to the CPUs. The workaround also tells the
114641b9eb26SStefan Assmann	  kernel to set up the IRQ handler on the boot IRQ line. In this
114741b9eb26SStefan Assmann	  way only one interrupt is delivered to the kernel. Otherwise
114841b9eb26SStefan Assmann	  the spurious second interrupt may cause the kernel to bring
114941b9eb26SStefan Assmann	  down (vital) interrupt lines.
115041b9eb26SStefan Assmann
115141b9eb26SStefan Assmann	  Only affects "broken" chipsets. Interrupt sharing may be
115241b9eb26SStefan Assmann	  increased on these systems.
115341b9eb26SStefan Assmann
1154506f1d07SSam Ravnborgconfig X86_MCE
1155bab9bc65SAndi Kleen	bool "Machine Check / overheating reporting"
1156648ed940SChen, Gong	select GENERIC_ALLOCATOR
1157e57dbaf7SBorislav Petkov	default y
1158a7f7f624SMasahiro Yamada	help
1159bab9bc65SAndi Kleen	  Machine Check support allows the processor to notify the
1160bab9bc65SAndi Kleen	  kernel if it detects a problem (e.g. overheating, data corruption).
1161506f1d07SSam Ravnborg	  The action the kernel takes depends on the severity of the problem,
1162bab9bc65SAndi Kleen	  ranging from warning messages to halting the machine.
11634efc0670SAndi Kleen
11645de97c9fSTony Luckconfig X86_MCELOG_LEGACY
11655de97c9fSTony Luck	bool "Support for deprecated /dev/mcelog character device"
11665de97c9fSTony Luck	depends on X86_MCE
1167a7f7f624SMasahiro Yamada	help
11685de97c9fSTony Luck	  Enable support for /dev/mcelog which is needed by the old mcelog
11695de97c9fSTony Luck	  userspace logging daemon. Consider switching to the new generation
11705de97c9fSTony Luck	  rasdaemon solution.
11715de97c9fSTony Luck
1172506f1d07SSam Ravnborgconfig X86_MCE_INTEL
11733c2362e6SHarvey Harrison	def_bool y
11743c2362e6SHarvey Harrison	prompt "Intel MCE features"
1175c1ebf835SAndi Kleen	depends on X86_MCE && X86_LOCAL_APIC
1176a7f7f624SMasahiro Yamada	help
1177506f1d07SSam Ravnborg	  Additional support for intel specific MCE features such as
1178506f1d07SSam Ravnborg	  the thermal monitor.
1179506f1d07SSam Ravnborg
1180506f1d07SSam Ravnborgconfig X86_MCE_AMD
11813c2362e6SHarvey Harrison	def_bool y
11823c2362e6SHarvey Harrison	prompt "AMD MCE features"
1183d35fb312SYazen Ghannam	depends on X86_MCE && X86_LOCAL_APIC
1184a7f7f624SMasahiro Yamada	help
1185506f1d07SSam Ravnborg	  Additional support for AMD specific MCE features such as
1186506f1d07SSam Ravnborg	  the DRAM Error Threshold.
1187506f1d07SSam Ravnborg
11884efc0670SAndi Kleenconfig X86_ANCIENT_MCE
11896fc108a0SJan Beulich	bool "Support for old Pentium 5 / WinChip machine checks"
1190c31d9633SAndi Kleen	depends on X86_32 && X86_MCE
1191a7f7f624SMasahiro Yamada	help
11924efc0670SAndi Kleen	  Include support for machine check handling on old Pentium 5 or WinChip
11935065a706SMasanari Iida	  systems. These typically need to be enabled explicitly on the command
11944efc0670SAndi Kleen	  line.
11954efc0670SAndi Kleen
1196b2762686SAndi Kleenconfig X86_MCE_THRESHOLD
1197b2762686SAndi Kleen	depends on X86_MCE_AMD || X86_MCE_INTEL
11986fc108a0SJan Beulich	def_bool y
1199b2762686SAndi Kleen
1200ea149b36SAndi Kleenconfig X86_MCE_INJECT
1201bc8e80d5SBorislav Petkov	depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS
1202ea149b36SAndi Kleen	tristate "Machine check injector support"
1203a7f7f624SMasahiro Yamada	help
1204ea149b36SAndi Kleen	  Provide support for injecting machine checks for testing purposes.
1205ea149b36SAndi Kleen	  If you don't know what a machine check is and you don't do kernel
1206ea149b36SAndi Kleen	  QA it is safe to say n.
1207ea149b36SAndi Kleen
120807dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig"
1209e633c65aSKan Liang
12105aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86
12111e642812SIngo Molnar	bool "Legacy VM86 support"
1212506f1d07SSam Ravnborg	depends on X86_32
1213a7f7f624SMasahiro Yamada	help
12145aef51c3SAndy Lutomirski	  This option allows user programs to put the CPU into V8086
12155aef51c3SAndy Lutomirski	  mode, which is an 80286-era approximation of 16-bit real mode.
12165aef51c3SAndy Lutomirski
12175aef51c3SAndy Lutomirski	  Some very old versions of X and/or vbetool require this option
12185aef51c3SAndy Lutomirski	  for user mode setting.  Similarly, DOSEMU will use it if
12195aef51c3SAndy Lutomirski	  available to accelerate real mode DOS programs.  However, any
12205aef51c3SAndy Lutomirski	  recent version of DOSEMU, X, or vbetool should be fully
12215aef51c3SAndy Lutomirski	  functional even without kernel VM86 support, as they will all
12221e642812SIngo Molnar	  fall back to software emulation. Nevertheless, if you are using
12231e642812SIngo Molnar	  a 16-bit DOS program where 16-bit performance matters, vm86
12241e642812SIngo Molnar	  mode might be faster than emulation and you might want to
12251e642812SIngo Molnar	  enable this option.
12265aef51c3SAndy Lutomirski
12271e642812SIngo Molnar	  Note that any app that works on a 64-bit kernel is unlikely to
12281e642812SIngo Molnar	  need this option, as 64-bit kernels don't, and can't, support
12291e642812SIngo Molnar	  V8086 mode. This option is also unrelated to 16-bit protected
12301e642812SIngo Molnar	  mode and is not needed to run most 16-bit programs under Wine.
12315aef51c3SAndy Lutomirski
12321e642812SIngo Molnar	  Enabling this option increases the complexity of the kernel
12331e642812SIngo Molnar	  and slows down exception handling a tiny bit.
12345aef51c3SAndy Lutomirski
12351e642812SIngo Molnar	  If unsure, say N here.
12365aef51c3SAndy Lutomirski
12375aef51c3SAndy Lutomirskiconfig VM86
12385aef51c3SAndy Lutomirski	bool
12395aef51c3SAndy Lutomirski	default X86_LEGACY_VM86
124034273f41SH. Peter Anvin
124134273f41SH. Peter Anvinconfig X86_16BIT
124234273f41SH. Peter Anvin	bool "Enable support for 16-bit segments" if EXPERT
124334273f41SH. Peter Anvin	default y
1244a5b9e5a2SAndy Lutomirski	depends on MODIFY_LDT_SYSCALL
1245a7f7f624SMasahiro Yamada	help
124634273f41SH. Peter Anvin	  This option is required by programs like Wine to run 16-bit
124734273f41SH. Peter Anvin	  protected mode legacy code on x86 processors.  Disabling
124834273f41SH. Peter Anvin	  this option saves about 300 bytes on i386, or around 6K text
124934273f41SH. Peter Anvin	  plus 16K runtime memory on x86-64,
125034273f41SH. Peter Anvin
125134273f41SH. Peter Anvinconfig X86_ESPFIX32
125234273f41SH. Peter Anvin	def_bool y
125334273f41SH. Peter Anvin	depends on X86_16BIT && X86_32
1254506f1d07SSam Ravnborg
1255197725deSH. Peter Anvinconfig X86_ESPFIX64
1256197725deSH. Peter Anvin	def_bool y
125734273f41SH. Peter Anvin	depends on X86_16BIT && X86_64
1258506f1d07SSam Ravnborg
12591ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION
12601ad83c85SAndy Lutomirski	bool "Enable vsyscall emulation" if EXPERT
12611ad83c85SAndy Lutomirski	default y
12621ad83c85SAndy Lutomirski	depends on X86_64
1263a7f7f624SMasahiro Yamada	help
12641ad83c85SAndy Lutomirski	  This enables emulation of the legacy vsyscall page.  Disabling
12651ad83c85SAndy Lutomirski	  it is roughly equivalent to booting with vsyscall=none, except
12661ad83c85SAndy Lutomirski	  that it will also disable the helpful warning if a program
12671ad83c85SAndy Lutomirski	  tries to use a vsyscall.  With this option set to N, offending
12681ad83c85SAndy Lutomirski	  programs will just segfault, citing addresses of the form
12691ad83c85SAndy Lutomirski	  0xffffffffff600?00.
12701ad83c85SAndy Lutomirski
12711ad83c85SAndy Lutomirski	  This option is required by many programs built before 2013, and
12721ad83c85SAndy Lutomirski	  care should be used even with newer programs if set to N.
12731ad83c85SAndy Lutomirski
12741ad83c85SAndy Lutomirski	  Disabling this option saves about 7K of kernel size and
12751ad83c85SAndy Lutomirski	  possibly 4K of additional runtime pagetable memory.
12761ad83c85SAndy Lutomirski
1277111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM
1278111e7b15SThomas Gleixner	bool "IOPERM and IOPL Emulation"
1279a24ca997SThomas Gleixner	default y
1280a7f7f624SMasahiro Yamada	help
1281111e7b15SThomas Gleixner	  This enables the ioperm() and iopl() syscalls which are necessary
1282111e7b15SThomas Gleixner	  for legacy applications.
1283111e7b15SThomas Gleixner
1284c8137aceSThomas Gleixner	  Legacy IOPL support is an overbroad mechanism which allows user
1285c8137aceSThomas Gleixner	  space aside of accessing all 65536 I/O ports also to disable
1286c8137aceSThomas Gleixner	  interrupts. To gain this access the caller needs CAP_SYS_RAWIO
1287c8137aceSThomas Gleixner	  capabilities and permission from potentially active security
1288c8137aceSThomas Gleixner	  modules.
1289c8137aceSThomas Gleixner
1290c8137aceSThomas Gleixner	  The emulation restricts the functionality of the syscall to
1291c8137aceSThomas Gleixner	  only allowing the full range I/O port access, but prevents the
1292a24ca997SThomas Gleixner	  ability to disable interrupts from user space which would be
1293a24ca997SThomas Gleixner	  granted if the hardware IOPL mechanism would be used.
1294c8137aceSThomas Gleixner
1295506f1d07SSam Ravnborgconfig TOSHIBA
1296506f1d07SSam Ravnborg	tristate "Toshiba Laptop support"
1297506f1d07SSam Ravnborg	depends on X86_32
1298a7f7f624SMasahiro Yamada	help
1299506f1d07SSam Ravnborg	  This adds a driver to safely access the System Management Mode of
1300506f1d07SSam Ravnborg	  the CPU on Toshiba portables with a genuine Toshiba BIOS. It does
1301506f1d07SSam Ravnborg	  not work on models with a Phoenix BIOS. The System Management Mode
1302506f1d07SSam Ravnborg	  is used to set the BIOS and power saving options on Toshiba portables.
1303506f1d07SSam Ravnborg
1304506f1d07SSam Ravnborg	  For information on utilities to make use of this driver see the
1305506f1d07SSam Ravnborg	  Toshiba Linux utilities web site at:
1306506f1d07SSam Ravnborg	  <http://www.buzzard.org.uk/toshiba/>.
1307506f1d07SSam Ravnborg
1308506f1d07SSam Ravnborg	  Say Y if you intend to run this kernel on a Toshiba portable.
1309506f1d07SSam Ravnborg	  Say N otherwise.
1310506f1d07SSam Ravnborg
1311506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS
13129ba16087SJan Beulich	bool "Enable X86 board specific fixups for reboot"
13139ba16087SJan Beulich	depends on X86_32
1314a7f7f624SMasahiro Yamada	help
1315506f1d07SSam Ravnborg	  This enables chipset and/or board specific fixups to be done
1316506f1d07SSam Ravnborg	  in order to get reboot to work correctly. This is only needed on
1317506f1d07SSam Ravnborg	  some combinations of hardware and BIOS. The symptom, for which
1318506f1d07SSam Ravnborg	  this config is intended, is when reboot ends with a stalled/hung
1319506f1d07SSam Ravnborg	  system.
1320506f1d07SSam Ravnborg
1321506f1d07SSam Ravnborg	  Currently, the only fixup is for the Geode machines using
13225e3a77e9SFlorian Fainelli	  CS5530A and CS5536 chipsets and the RDC R-321x SoC.
1323506f1d07SSam Ravnborg
1324506f1d07SSam Ravnborg	  Say Y if you want to enable the fixup. Currently, it's safe to
1325506f1d07SSam Ravnborg	  enable this option even if you don't need it.
1326506f1d07SSam Ravnborg	  Say N otherwise.
1327506f1d07SSam Ravnborg
1328506f1d07SSam Ravnborgconfig MICROCODE
1329e6bcfdd7SThomas Gleixner	def_bool y
133080030e3dSBorislav Petkov	depends on CPU_SUP_AMD || CPU_SUP_INTEL
133150cef76dSBorislav Petkov (AMD)	select CRYPTO_LIB_SHA256 if CPU_SUP_AMD
133280cc9f10SPeter Oruba
1333fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32
1334fdbd4381SThomas Gleixner	def_bool y
1335fdbd4381SThomas Gleixner	depends on MICROCODE && X86_32 && BLK_DEV_INITRD
1336fdbd4381SThomas Gleixner
1337a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING
1338a77a94f8SBorislav Petkov	bool "Late microcode loading (DANGEROUS)"
1339c02f48e0SBorislav Petkov	default n
1340634ac23aSThomas Gleixner	depends on MICROCODE && SMP
1341a7f7f624SMasahiro Yamada	help
1342a77a94f8SBorislav Petkov	  Loading microcode late, when the system is up and executing instructions
1343a77a94f8SBorislav Petkov	  is a tricky business and should be avoided if possible. Just the sequence
1344a77a94f8SBorislav Petkov	  of synchronizing all cores and SMT threads is one fragile dance which does
1345a77a94f8SBorislav Petkov	  not guarantee that cores might not softlock after the loading. Therefore,
13469407bda8SThomas Gleixner	  use this at your own risk. Late loading taints the kernel unless the
13479407bda8SThomas Gleixner	  microcode header indicates that it is safe for late loading via the
13489407bda8SThomas Gleixner	  minimal revision check. This minimal revision check can be enforced on
13499407bda8SThomas Gleixner	  the kernel command line with "microcode.minrev=Y".
13509407bda8SThomas Gleixner
13519407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV
13529407bda8SThomas Gleixner	bool "Enforce late microcode loading minimal revision check"
13539407bda8SThomas Gleixner	default n
13549407bda8SThomas Gleixner	depends on MICROCODE_LATE_LOADING
13559407bda8SThomas Gleixner	help
13569407bda8SThomas Gleixner	  To prevent that users load microcode late which modifies already
13579407bda8SThomas Gleixner	  in use features, newer microcode patches have a minimum revision field
13589407bda8SThomas Gleixner	  in the microcode header, which tells the kernel which minimum
13599407bda8SThomas Gleixner	  revision must be active in the CPU to safely load that new microcode
13609407bda8SThomas Gleixner	  late into the running system. If disabled the check will not
13619407bda8SThomas Gleixner	  be enforced but the kernel will be tainted when the minimal
13629407bda8SThomas Gleixner	  revision check fails.
13639407bda8SThomas Gleixner
13649407bda8SThomas Gleixner	  This minimal revision check can also be controlled via the
13659407bda8SThomas Gleixner	  "microcode.minrev" parameter on the kernel command line.
13669407bda8SThomas Gleixner
13679407bda8SThomas Gleixner	  If unsure say Y.
1368506f1d07SSam Ravnborg
1369506f1d07SSam Ravnborgconfig X86_MSR
1370506f1d07SSam Ravnborg	tristate "/dev/cpu/*/msr - Model-specific register support"
1371a7f7f624SMasahiro Yamada	help
1372506f1d07SSam Ravnborg	  This device gives privileged processes access to the x86
1373506f1d07SSam Ravnborg	  Model-Specific Registers (MSRs).  It is a character device with
1374506f1d07SSam Ravnborg	  major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
1375506f1d07SSam Ravnborg	  MSR accesses are directed to a specific CPU on multi-processor
1376506f1d07SSam Ravnborg	  systems.
1377506f1d07SSam Ravnborg
1378506f1d07SSam Ravnborgconfig X86_CPUID
1379506f1d07SSam Ravnborg	tristate "/dev/cpu/*/cpuid - CPU information support"
1380a7f7f624SMasahiro Yamada	help
1381506f1d07SSam Ravnborg	  This device gives processes access to the x86 CPUID instruction to
1382506f1d07SSam Ravnborg	  be executed on a specific processor.  It is a character device
1383506f1d07SSam Ravnborg	  with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
1384506f1d07SSam Ravnborg	  /dev/cpu/31/cpuid.
1385506f1d07SSam Ravnborg
1386bbeb69ceSArnd Bergmannconfig HIGHMEM4G
1387bbeb69ceSArnd Bergmann	bool "High Memory Support"
1388506f1d07SSam Ravnborg	depends on X86_32
1389a7f7f624SMasahiro Yamada	help
1390bbeb69ceSArnd Bergmann	  Linux can use up to 4 Gigabytes of physical memory on x86 systems.
1391506f1d07SSam Ravnborg	  However, the address space of 32-bit x86 processors is only 4
1392506f1d07SSam Ravnborg	  Gigabytes large. That means that, if you have a large amount of
1393506f1d07SSam Ravnborg	  physical memory, not all of it can be "permanently mapped" by the
1394506f1d07SSam Ravnborg	  kernel. The physical memory that's not permanently mapped is called
1395506f1d07SSam Ravnborg	  "high memory".
1396506f1d07SSam Ravnborg
1397506f1d07SSam Ravnborg	  If you are compiling a kernel which will never run on a machine with
1398506f1d07SSam Ravnborg	  more than 1 Gigabyte total physical RAM, answer "off" here (default
1399506f1d07SSam Ravnborg	  choice and suitable for most users). This will result in a "3GB/1GB"
1400506f1d07SSam Ravnborg	  split: 3GB are mapped so that each process sees a 3GB virtual memory
1401506f1d07SSam Ravnborg	  space and the remaining part of the 4GB virtual memory space is used
1402506f1d07SSam Ravnborg	  by the kernel to permanently map as much physical memory as
1403506f1d07SSam Ravnborg	  possible.
1404506f1d07SSam Ravnborg
1405506f1d07SSam Ravnborg	  If the machine has between 1 and 4 Gigabytes physical RAM, then
1406bbeb69ceSArnd Bergmann	  answer "Y" here.
1407506f1d07SSam Ravnborg
1408bbeb69ceSArnd Bergmann	  If unsure, say N.
1409506f1d07SSam Ravnborg
1410506f1d07SSam Ravnborgchoice
14116a108a14SDavid Rientjes	prompt "Memory split" if EXPERT
1412506f1d07SSam Ravnborg	default VMSPLIT_3G
1413506f1d07SSam Ravnborg	depends on X86_32
1414a7f7f624SMasahiro Yamada	help
1415506f1d07SSam Ravnborg	  Select the desired split between kernel and user memory.
1416506f1d07SSam Ravnborg
1417506f1d07SSam Ravnborg	  If the address range available to the kernel is less than the
1418506f1d07SSam Ravnborg	  physical memory installed, the remaining memory will be available
1419506f1d07SSam Ravnborg	  as "high memory". Accessing high memory is a little more costly
1420506f1d07SSam Ravnborg	  than low memory, as it needs to be mapped into the kernel first.
1421506f1d07SSam Ravnborg	  Note that increasing the kernel address space limits the range
1422506f1d07SSam Ravnborg	  available to user programs, making the address space there
1423506f1d07SSam Ravnborg	  tighter.  Selecting anything other than the default 3G/1G split
1424506f1d07SSam Ravnborg	  will also likely make your kernel incompatible with binary-only
1425506f1d07SSam Ravnborg	  kernel modules.
1426506f1d07SSam Ravnborg
1427506f1d07SSam Ravnborg	  If you are not absolutely sure what you are doing, leave this
1428506f1d07SSam Ravnborg	  option alone!
1429506f1d07SSam Ravnborg
1430506f1d07SSam Ravnborg	config VMSPLIT_3G
1431506f1d07SSam Ravnborg		bool "3G/1G user/kernel split"
1432506f1d07SSam Ravnborg	config VMSPLIT_3G_OPT
1433506f1d07SSam Ravnborg		depends on !X86_PAE
1434506f1d07SSam Ravnborg		bool "3G/1G user/kernel split (for full 1G low memory)"
1435506f1d07SSam Ravnborg	config VMSPLIT_2G
1436506f1d07SSam Ravnborg		bool "2G/2G user/kernel split"
1437506f1d07SSam Ravnborg	config VMSPLIT_2G_OPT
1438506f1d07SSam Ravnborg		depends on !X86_PAE
1439506f1d07SSam Ravnborg		bool "2G/2G user/kernel split (for full 2G low memory)"
1440506f1d07SSam Ravnborg	config VMSPLIT_1G
1441506f1d07SSam Ravnborg		bool "1G/3G user/kernel split"
1442506f1d07SSam Ravnborgendchoice
1443506f1d07SSam Ravnborg
1444506f1d07SSam Ravnborgconfig PAGE_OFFSET
1445506f1d07SSam Ravnborg	hex
1446506f1d07SSam Ravnborg	default 0xB0000000 if VMSPLIT_3G_OPT
1447506f1d07SSam Ravnborg	default 0x80000000 if VMSPLIT_2G
1448506f1d07SSam Ravnborg	default 0x78000000 if VMSPLIT_2G_OPT
1449506f1d07SSam Ravnborg	default 0x40000000 if VMSPLIT_1G
1450506f1d07SSam Ravnborg	default 0xC0000000
1451506f1d07SSam Ravnborg	depends on X86_32
1452506f1d07SSam Ravnborg
1453506f1d07SSam Ravnborgconfig HIGHMEM
1454bbeb69ceSArnd Bergmann	def_bool HIGHMEM4G
1455506f1d07SSam Ravnborg
1456506f1d07SSam Ravnborgconfig X86_PAE
14579ba16087SJan Beulich	bool "PAE (Physical Address Extension) Support"
145888a2b4edSArnd Bergmann	depends on X86_32 && X86_HAVE_PAE
1459d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
1460a7f7f624SMasahiro Yamada	help
1461506f1d07SSam Ravnborg	  PAE is required for NX support, and furthermore enables
1462506f1d07SSam Ravnborg	  larger swapspace support for non-overcommit purposes. It
1463506f1d07SSam Ravnborg	  has the cost of more pagetable lookup overhead, and also
1464506f1d07SSam Ravnborg	  consumes more pagetable space per process.
1465506f1d07SSam Ravnborg
146677ef56e4SKirill A. Shutemovconfig X86_5LEVEL
146777ef56e4SKirill A. Shutemov	bool "Enable 5-level page tables support"
146818ec1eafSKirill A. Shutemov	default y
1469eedb92abSKirill A. Shutemov	select DYNAMIC_MEMORY_LAYOUT
1470162434e7SKirill A. Shutemov	select SPARSEMEM_VMEMMAP
147177ef56e4SKirill A. Shutemov	depends on X86_64
1472a7f7f624SMasahiro Yamada	help
147377ef56e4SKirill A. Shutemov	  5-level paging enables access to larger address space:
147477ef56e4SKirill A. Shutemov	  up to 128 PiB of virtual address space and 4 PiB of
147577ef56e4SKirill A. Shutemov	  physical address space.
147677ef56e4SKirill A. Shutemov
147777ef56e4SKirill A. Shutemov	  It will be supported by future Intel CPUs.
147877ef56e4SKirill A. Shutemov
14796657fca0SKirill A. Shutemov	  A kernel with the option enabled can be booted on machines that
14806657fca0SKirill A. Shutemov	  support 4- or 5-level paging.
148177ef56e4SKirill A. Shutemov
1482ff61f079SJonathan Corbet	  See Documentation/arch/x86/x86_64/5level-paging.rst for more
148377ef56e4SKirill A. Shutemov	  information.
148477ef56e4SKirill A. Shutemov
148577ef56e4SKirill A. Shutemov	  Say N if unsure.
148677ef56e4SKirill A. Shutemov
148710971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES
1488e5008abeSLuis R. Rodriguez	def_bool y
14892e1da13fSVlastimil Babka	depends on X86_64
1490a7f7f624SMasahiro Yamada	help
149110971ab2SIngo Molnar	  Certain kernel features effectively disable kernel
149210971ab2SIngo Molnar	  linear 1 GB mappings (even if the CPU otherwise
149310971ab2SIngo Molnar	  supports them), so don't confuse the user by printing
149410971ab2SIngo Molnar	  that we have them enabled.
14959e899816SNick Piggin
14965c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS
14975c280cf6SThomas Gleixner	bool "Enable statistic for Change Page Attribute"
14985c280cf6SThomas Gleixner	depends on DEBUG_FS
1499a7f7f624SMasahiro Yamada	help
1500b75baaf3SIngo Molnar	  Expose statistics about the Change Page Attribute mechanism, which
1501a943245aSColin Ian King	  helps to determine the effectiveness of preserving large and huge
15025c280cf6SThomas Gleixner	  page mappings when mapping protections are changed.
15035c280cf6SThomas Gleixner
150420f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT
150520f07a04SKirill A. Shutemov	select ARCH_HAS_FORCE_DMA_UNENCRYPTED
150620f07a04SKirill A. Shutemov	select DYNAMIC_PHYSICAL_MASK
150720f07a04SKirill A. Shutemov	def_bool n
150820f07a04SKirill A. Shutemov
15097744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT
15107744ccdbSTom Lendacky	bool "AMD Secure Memory Encryption (SME) support"
15117744ccdbSTom Lendacky	depends on X86_64 && CPU_SUP_AMD
15126c321179STom Lendacky	depends on EFI_STUB
151382fef0adSDavid Rientjes	select DMA_COHERENT_POOL
1514ce9084baSArd Biesheuvel	select ARCH_USE_MEMREMAP_PROT
1515597cfe48SJoerg Roedel	select INSTRUCTION_DECODER
1516aa5a4611STom Lendacky	select ARCH_HAS_CC_PLATFORM
151720f07a04SKirill A. Shutemov	select X86_MEM_ENCRYPT
15186c321179STom Lendacky	select UNACCEPTED_MEMORY
1519c5529418SNikunj A Dadhania	select CRYPTO_LIB_AESGCM
1520a7f7f624SMasahiro Yamada	help
15217744ccdbSTom Lendacky	  Say yes to enable support for the encryption of system memory.
15227744ccdbSTom Lendacky	  This requires an AMD processor that supports Secure Memory
15237744ccdbSTom Lendacky	  Encryption (SME).
15247744ccdbSTom Lendacky
1525506f1d07SSam Ravnborg# Common NUMA Features
1526506f1d07SSam Ravnborgconfig NUMA
1527e133f6eaSRandy Dunlap	bool "NUMA Memory Allocation and Scheduler Support"
1528506f1d07SSam Ravnborg	depends on SMP
15290abf5086SArnd Bergmann	depends on X86_64
15307ecd19cfSKefeng Wang	select USE_PERCPU_NUMA_NODE_ID
15310c436a58SSaurabh Sengar	select OF_NUMA if OF
1532a7f7f624SMasahiro Yamada	help
1533e133f6eaSRandy Dunlap	  Enable NUMA (Non-Uniform Memory Access) support.
1534fd51b2d7SKOSAKI Motohiro
1535506f1d07SSam Ravnborg	  The kernel will try to allocate memory used by a CPU on the
1536506f1d07SSam Ravnborg	  local memory controller of the CPU and add some more
1537506f1d07SSam Ravnborg	  NUMA awareness to the kernel.
1538506f1d07SSam Ravnborg
1539c280ea5eSIngo Molnar	  For 64-bit this is recommended if the system is Intel Core i7
1540fd51b2d7SKOSAKI Motohiro	  (or later), AMD Opteron, or EM64T NUMA.
1541fd51b2d7SKOSAKI Motohiro
1542fd51b2d7SKOSAKI Motohiro	  Otherwise, you should say N.
1543506f1d07SSam Ravnborg
1544eec1d4faSHans Rosenfeldconfig AMD_NUMA
15453c2362e6SHarvey Harrison	def_bool y
15463c2362e6SHarvey Harrison	prompt "Old style AMD Opteron NUMA detection"
15475da0ef9aSTejun Heo	depends on X86_64 && NUMA && PCI
1548a7f7f624SMasahiro Yamada	help
1549eec1d4faSHans Rosenfeld	  Enable AMD NUMA node topology detection.  You should say Y here if
1550eec1d4faSHans Rosenfeld	  you have a multi processor AMD system. This uses an old method to
1551eec1d4faSHans Rosenfeld	  read the NUMA configuration directly from the builtin Northbridge
1552eec1d4faSHans Rosenfeld	  of Opteron. It is recommended to use X86_64_ACPI_NUMA instead,
1553eec1d4faSHans Rosenfeld	  which also takes priority if both are compiled in.
1554506f1d07SSam Ravnborg
1555506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA
15563c2362e6SHarvey Harrison	def_bool y
15573c2362e6SHarvey Harrison	prompt "ACPI NUMA detection"
1558506f1d07SSam Ravnborg	depends on X86_64 && NUMA && ACPI && PCI
1559506f1d07SSam Ravnborg	select ACPI_NUMA
1560a7f7f624SMasahiro Yamada	help
1561506f1d07SSam Ravnborg	  Enable ACPI SRAT based node topology detection.
1562506f1d07SSam Ravnborg
1563506f1d07SSam Ravnborgconfig NODES_SHIFT
1564d25e26b6SLinus Torvalds	int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
156551591e31SDavid Rientjes	range 1 10
156651591e31SDavid Rientjes	default "10" if MAXSMP
1567506f1d07SSam Ravnborg	default "6" if X86_64
1568506f1d07SSam Ravnborg	default "3"
1569a9ee6cf5SMike Rapoport	depends on NUMA
1570a7f7f624SMasahiro Yamada	help
15711184dc2fSMike Travis	  Specify the maximum number of NUMA Nodes available on the target
1572692105b8SMatt LaPlante	  system.  Increases memory reserved to accommodate various tables.
1573506f1d07SSam Ravnborg
1574506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE
1575506f1d07SSam Ravnborg	def_bool y
15763b16651fSTejun Heo	depends on X86_32 && !NUMA
1577506f1d07SSam Ravnborg
1578506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE
1579506f1d07SSam Ravnborg	def_bool y
1580506f1d07SSam Ravnborg	select SPARSEMEM_STATIC if X86_32
1581506f1d07SSam Ravnborg	select SPARSEMEM_VMEMMAP_ENABLE if X86_64
1582506f1d07SSam Ravnborg
15833b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT
15846ad57f7fSMike Rapoport	def_bool X86_64 || (NUMA && X86_32)
15853b16651fSTejun Heo
1586506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL
1587506f1d07SSam Ravnborg	def_bool y
15884eda2bc3SDavid Hildenbrand	depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE
1589506f1d07SSam Ravnborg
1590506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE
1591a0842b70SToshi Kani	bool "Enable sysfs memory/probe interface"
15925c11f00bSDavid Hildenbrand	depends on MEMORY_HOTPLUG
1593a0842b70SToshi Kani	help
1594a0842b70SToshi Kani	  This option enables a sysfs memory/probe interface for testing.
1595cb1aaebeSMauro Carvalho Chehab	  See Documentation/admin-guide/mm/memory-hotplug.rst for more information.
1596a0842b70SToshi Kani	  If you are unsure how to answer this question, answer N.
1597506f1d07SSam Ravnborg
15983b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT
15993b16651fSTejun Heo	def_bool y
16003b16651fSTejun Heo	depends on X86_64 && PROC_KCORE
16013b16651fSTejun Heo
1602a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE
1603a29815a3SAvi Kivity	hex
1604a29815a3SAvi Kivity	default 0 if X86_32
1605a29815a3SAvi Kivity	default 0xdead000000000000 if X86_64
1606a29815a3SAvi Kivity
16077a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE
16087a67832cSDan Williams	bool
16097a67832cSDan Williams
1610ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY
16117a67832cSDan Williams	tristate "Support non-standard NVDIMMs and ADR protected memory"
16129f53f9faSDan Williams	depends on PHYS_ADDR_T_64BIT
16139f53f9faSDan Williams	depends on BLK_DEV
16147a67832cSDan Williams	select X86_PMEM_LEGACY_DEVICE
16157b27a862SDan Williams	select NUMA_KEEP_MEMINFO if NUMA
16169f53f9faSDan Williams	select LIBNVDIMM
1617ec776ef6SChristoph Hellwig	help
1618ec776ef6SChristoph Hellwig	  Treat memory marked using the non-standard e820 type of 12 as used
1619ec776ef6SChristoph Hellwig	  by the Intel Sandy Bridge-EP reference BIOS as protected memory.
1620ec776ef6SChristoph Hellwig	  The kernel will offer these regions to the 'pmem' driver so
1621ec776ef6SChristoph Hellwig	  they can be used for persistent storage.
1622ec776ef6SChristoph Hellwig
1623ec776ef6SChristoph Hellwig	  Say Y if unsure.
1624ec776ef6SChristoph Hellwig
16259f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION
16269f077871SJeremy Fitzhardinge	bool "Check for low memory corruption"
1627a7f7f624SMasahiro Yamada	help
16289f077871SJeremy Fitzhardinge	  Periodically check for memory corruption in low memory, which
16299f077871SJeremy Fitzhardinge	  is suspected to be caused by BIOS.  Even when enabled in the
16309f077871SJeremy Fitzhardinge	  configuration, it is disabled at runtime.  Enable it by
16319f077871SJeremy Fitzhardinge	  setting "memory_corruption_check=1" on the kernel command
16329f077871SJeremy Fitzhardinge	  line.  By default it scans the low 64k of memory every 60
16339f077871SJeremy Fitzhardinge	  seconds; see the memory_corruption_check_size and
16349f077871SJeremy Fitzhardinge	  memory_corruption_check_period parameters in
16358c27ceffSMauro Carvalho Chehab	  Documentation/admin-guide/kernel-parameters.rst to adjust this.
16369f077871SJeremy Fitzhardinge
16379f077871SJeremy Fitzhardinge	  When enabled with the default parameters, this option has
16389f077871SJeremy Fitzhardinge	  almost no overhead, as it reserves a relatively small amount
16399f077871SJeremy Fitzhardinge	  of memory and scans it infrequently.  It both detects corruption
16409f077871SJeremy Fitzhardinge	  and prevents it from affecting the running system.
16419f077871SJeremy Fitzhardinge
16429f077871SJeremy Fitzhardinge	  It is, however, intended as a diagnostic tool; if repeatable
16439f077871SJeremy Fitzhardinge	  BIOS-originated corruption always affects the same memory,
16449f077871SJeremy Fitzhardinge	  you can use memmap= to prevent the kernel from using that
16459f077871SJeremy Fitzhardinge	  memory.
16469f077871SJeremy Fitzhardinge
1647c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
1648c885df50SJeremy Fitzhardinge	bool "Set the default setting of memory_corruption_check"
1649c885df50SJeremy Fitzhardinge	depends on X86_CHECK_BIOS_CORRUPTION
1650c885df50SJeremy Fitzhardinge	default y
1651a7f7f624SMasahiro Yamada	help
1652c885df50SJeremy Fitzhardinge	  Set whether the default state of memory_corruption_check is
1653c885df50SJeremy Fitzhardinge	  on or off.
1654c885df50SJeremy Fitzhardinge
1655506f1d07SSam Ravnborgconfig MATH_EMULATION
1656506f1d07SSam Ravnborg	bool
1657a5b9e5a2SAndy Lutomirski	depends on MODIFY_LDT_SYSCALL
165887d6021bSArnd Bergmann	prompt "Math emulation" if X86_32 && (M486SX || MELAN)
1659a7f7f624SMasahiro Yamada	help
1660506f1d07SSam Ravnborg	  Linux can emulate a math coprocessor (used for floating point
1661506f1d07SSam Ravnborg	  operations) if you don't have one. 486DX and Pentium processors have
1662506f1d07SSam Ravnborg	  a math coprocessor built in, 486SX and 386 do not, unless you added
1663506f1d07SSam Ravnborg	  a 487DX or 387, respectively. (The messages during boot time can
1664506f1d07SSam Ravnborg	  give you some hints here ["man dmesg"].) Everyone needs either a
1665506f1d07SSam Ravnborg	  coprocessor or this emulation.
1666506f1d07SSam Ravnborg
1667506f1d07SSam Ravnborg	  If you don't have a math coprocessor, you need to say Y here; if you
1668506f1d07SSam Ravnborg	  say Y here even though you have a coprocessor, the coprocessor will
1669506f1d07SSam Ravnborg	  be used nevertheless. (This behavior can be changed with the kernel
1670506f1d07SSam Ravnborg	  command line option "no387", which comes handy if your coprocessor
1671506f1d07SSam Ravnborg	  is broken. Try "man bootparam" or see the documentation of your boot
1672506f1d07SSam Ravnborg	  loader (lilo or loadlin) about how to pass options to the kernel at
1673506f1d07SSam Ravnborg	  boot time.) This means that it is a good idea to say Y here if you
1674506f1d07SSam Ravnborg	  intend to use this kernel on different machines.
1675506f1d07SSam Ravnborg
1676506f1d07SSam Ravnborg	  More information about the internals of the Linux math coprocessor
1677506f1d07SSam Ravnborg	  emulation can be found in <file:arch/x86/math-emu/README>.
1678506f1d07SSam Ravnborg
1679506f1d07SSam Ravnborg	  If you are not sure, say Y; apart from resulting in a 66 KB bigger
1680506f1d07SSam Ravnborg	  kernel, it won't hurt.
1681506f1d07SSam Ravnborg
1682506f1d07SSam Ravnborgconfig MTRR
16836fc108a0SJan Beulich	def_bool y
16846a108a14SDavid Rientjes	prompt "MTRR (Memory Type Range Register) support" if EXPERT
1685a7f7f624SMasahiro Yamada	help
1686506f1d07SSam Ravnborg	  On Intel P6 family processors (Pentium Pro, Pentium II and later)
1687506f1d07SSam Ravnborg	  the Memory Type Range Registers (MTRRs) may be used to control
1688506f1d07SSam Ravnborg	  processor access to memory ranges. This is most useful if you have
1689506f1d07SSam Ravnborg	  a video (VGA) card on a PCI or AGP bus. Enabling write-combining
1690506f1d07SSam Ravnborg	  allows bus write transfers to be combined into a larger transfer
1691506f1d07SSam Ravnborg	  before bursting over the PCI/AGP bus. This can increase performance
1692506f1d07SSam Ravnborg	  of image write operations 2.5 times or more. Saying Y here creates a
1693506f1d07SSam Ravnborg	  /proc/mtrr file which may be used to manipulate your processor's
1694506f1d07SSam Ravnborg	  MTRRs. Typically the X server should use this.
1695506f1d07SSam Ravnborg
1696506f1d07SSam Ravnborg	  This code has a reasonably generic interface so that similar
1697506f1d07SSam Ravnborg	  control registers on other processors can be easily supported
1698506f1d07SSam Ravnborg	  as well:
1699506f1d07SSam Ravnborg
1700506f1d07SSam Ravnborg	  The Cyrix 6x86, 6x86MX and M II processors have Address Range
1701506f1d07SSam Ravnborg	  Registers (ARRs) which provide a similar functionality to MTRRs. For
1702506f1d07SSam Ravnborg	  these, the ARRs are used to emulate the MTRRs.
1703506f1d07SSam Ravnborg	  The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
1704506f1d07SSam Ravnborg	  MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
1705506f1d07SSam Ravnborg	  write-combining. All of these processors are supported by this code
1706506f1d07SSam Ravnborg	  and it makes sense to say Y here if you have one of them.
1707506f1d07SSam Ravnborg
1708506f1d07SSam Ravnborg	  Saying Y here also fixes a problem with buggy SMP BIOSes which only
1709506f1d07SSam Ravnborg	  set the MTRRs for the boot CPU and not for the secondary CPUs. This
1710506f1d07SSam Ravnborg	  can lead to all sorts of problems, so it's good to say Y here.
1711506f1d07SSam Ravnborg
1712506f1d07SSam Ravnborg	  You can safely say Y even if your machine doesn't have MTRRs, you'll
1713506f1d07SSam Ravnborg	  just add about 9 KB to your kernel.
1714506f1d07SSam Ravnborg
1715ff61f079SJonathan Corbet	  See <file:Documentation/arch/x86/mtrr.rst> for more information.
1716506f1d07SSam Ravnborg
171795ffa243SYinghai Luconfig MTRR_SANITIZER
17182ffb3501SYinghai Lu	def_bool y
171995ffa243SYinghai Lu	prompt "MTRR cleanup support"
172095ffa243SYinghai Lu	depends on MTRR
1721a7f7f624SMasahiro Yamada	help
1722aba3728cSThomas Gleixner	  Convert MTRR layout from continuous to discrete, so X drivers can
1723aba3728cSThomas Gleixner	  add writeback entries.
172495ffa243SYinghai Lu
1725aba3728cSThomas Gleixner	  Can be disabled with disable_mtrr_cleanup on the kernel command line.
1726692105b8SMatt LaPlante	  The largest mtrr entry size for a continuous block can be set with
1727aba3728cSThomas Gleixner	  mtrr_chunk_size.
172895ffa243SYinghai Lu
17292ffb3501SYinghai Lu	  If unsure, say Y.
173095ffa243SYinghai Lu
173195ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT
1732f5098d62SYinghai Lu	int "MTRR cleanup enable value (0-1)"
1733f5098d62SYinghai Lu	range 0 1
1734f5098d62SYinghai Lu	default "0"
173595ffa243SYinghai Lu	depends on MTRR_SANITIZER
1736a7f7f624SMasahiro Yamada	help
1737f5098d62SYinghai Lu	  Enable mtrr cleanup default value
173895ffa243SYinghai Lu
173912031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
174012031a62SYinghai Lu	int "MTRR cleanup spare reg num (0-7)"
174112031a62SYinghai Lu	range 0 7
174212031a62SYinghai Lu	default "1"
174312031a62SYinghai Lu	depends on MTRR_SANITIZER
1744a7f7f624SMasahiro Yamada	help
174512031a62SYinghai Lu	  mtrr cleanup spare entries default, it can be changed via
1746aba3728cSThomas Gleixner	  mtrr_spare_reg_nr=N on the kernel command line.
174712031a62SYinghai Lu
17482e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT
17496fc108a0SJan Beulich	def_bool y
17506a108a14SDavid Rientjes	prompt "x86 PAT support" if EXPERT
17512a8a2719SIngo Molnar	depends on MTRR
17527a87225aSMatthew Wilcox (Oracle)	select ARCH_USES_PG_ARCH_2
1753a7f7f624SMasahiro Yamada	help
17542e5d9c85Svenkatesh.pallipadi@intel.com	  Use PAT attributes to setup page level cache control.
1755042b78e4SVenki Pallipadi
17562e5d9c85Svenkatesh.pallipadi@intel.com	  PATs are the modern equivalents of MTRRs and are much more
17572e5d9c85Svenkatesh.pallipadi@intel.com	  flexible than MTRRs.
17582e5d9c85Svenkatesh.pallipadi@intel.com
17592e5d9c85Svenkatesh.pallipadi@intel.com	  Say N here if you see bootup problems (boot crash, boot hang,
1760042b78e4SVenki Pallipadi	  spontaneous reboots) or a non-working video driver.
17612e5d9c85Svenkatesh.pallipadi@intel.com
17622e5d9c85Svenkatesh.pallipadi@intel.com	  If unsure, say Y.
17632e5d9c85Svenkatesh.pallipadi@intel.com
1764b971880fSBabu Mogerconfig X86_UMIP
1765796ebc81SRicardo Neri	def_bool y
1766b971880fSBabu Moger	prompt "User Mode Instruction Prevention" if EXPERT
1767a7f7f624SMasahiro Yamada	help
1768b971880fSBabu Moger	  User Mode Instruction Prevention (UMIP) is a security feature in
1769b971880fSBabu Moger	  some x86 processors. If enabled, a general protection fault is
1770b971880fSBabu Moger	  issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are
1771b971880fSBabu Moger	  executed in user mode. These instructions unnecessarily expose
1772b971880fSBabu Moger	  information about the hardware state.
1773796ebc81SRicardo Neri
1774796ebc81SRicardo Neri	  The vast majority of applications do not use these instructions.
1775796ebc81SRicardo Neri	  For the very few that do, software emulation is provided in
1776796ebc81SRicardo Neri	  specific cases in protected and virtual-8086 modes. Emulated
1777796ebc81SRicardo Neri	  results are dummy.
1778aa35f896SRicardo Neri
1779156ff4a5SPeter Zijlstraconfig CC_HAS_IBT
1780156ff4a5SPeter Zijlstra	# GCC >= 9 and binutils >= 2.29
1781156ff4a5SPeter Zijlstra	# Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654
1782156ff4a5SPeter Zijlstra	# Clang/LLVM >= 14
1783262448f3SNathan Chancellor	# https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f
1784262448f3SNathan Chancellor	# https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332
1785156ff4a5SPeter Zijlstra	def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \
1786262448f3SNathan Chancellor		  (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \
1787156ff4a5SPeter Zijlstra		  $(as-instr,endbr64)
1788156ff4a5SPeter Zijlstra
178918e66b69SRick Edgecombeconfig X86_CET
179018e66b69SRick Edgecombe	def_bool n
179118e66b69SRick Edgecombe	help
179218e66b69SRick Edgecombe	  CET features configured (Shadow stack or IBT)
179318e66b69SRick Edgecombe
1794156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT
1795156ff4a5SPeter Zijlstra	prompt "Indirect Branch Tracking"
17964fd5f70cSKees Cook	def_bool y
179703f16cd0SJosh Poimboeuf	depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL
1798f6a2c2b2SNathan Chancellor	# https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f
1799f6a2c2b2SNathan Chancellor	depends on !LD_IS_LLD || LLD_VERSION >= 140000
180003f16cd0SJosh Poimboeuf	select OBJTOOL
180118e66b69SRick Edgecombe	select X86_CET
1802156ff4a5SPeter Zijlstra	help
1803156ff4a5SPeter Zijlstra	  Build the kernel with support for Indirect Branch Tracking, a
1804156ff4a5SPeter Zijlstra	  hardware support course-grain forward-edge Control Flow Integrity
1805156ff4a5SPeter Zijlstra	  protection. It enforces that all indirect calls must land on
1806156ff4a5SPeter Zijlstra	  an ENDBR instruction, as such, the compiler will instrument the
1807156ff4a5SPeter Zijlstra	  code with them to make this happen.
1808156ff4a5SPeter Zijlstra
1809ed53a0d9SPeter Zijlstra	  In addition to building the kernel with IBT, seal all functions that
18104cdfc11bSNur Hussein	  are not indirect call targets, avoiding them ever becoming one.
1811ed53a0d9SPeter Zijlstra
1812ed53a0d9SPeter Zijlstra	  This requires LTO like objtool runs and will slow down the build. It
1813ed53a0d9SPeter Zijlstra	  does significantly reduce the number of ENDBR instructions in the
1814ed53a0d9SPeter Zijlstra	  kernel image.
1815ed53a0d9SPeter Zijlstra
181635e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS
181738f3e775SBabu Moger	prompt "Memory Protection Keys"
181835e97790SDave Hansen	def_bool y
1819284244a9SDave Hansen	# Note: only available in 64-bit mode
182038f3e775SBabu Moger	depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD)
182152c8e601SIngo Molnar	select ARCH_USES_HIGH_VMA_FLAGS
182252c8e601SIngo Molnar	select ARCH_HAS_PKEYS
1823a7f7f624SMasahiro Yamada	help
1824284244a9SDave Hansen	  Memory Protection Keys provides a mechanism for enforcing
1825284244a9SDave Hansen	  page-based protections, but without requiring modification of the
1826284244a9SDave Hansen	  page tables when an application changes protection domains.
1827284244a9SDave Hansen
18281eecbcdcSMauro Carvalho Chehab	  For details, see Documentation/core-api/protection-keys.rst
1829284244a9SDave Hansen
1830284244a9SDave Hansen	  If unsure, say y.
183135e97790SDave Hansen
18325626f8d4SJoey Goulyconfig ARCH_PKEY_BITS
18335626f8d4SJoey Gouly	int
18345626f8d4SJoey Gouly	default 4
18355626f8d4SJoey Gouly
1836db616173SMichal Hockochoice
1837db616173SMichal Hocko	prompt "TSX enable mode"
1838db616173SMichal Hocko	depends on CPU_SUP_INTEL
1839db616173SMichal Hocko	default X86_INTEL_TSX_MODE_OFF
1840db616173SMichal Hocko	help
1841db616173SMichal Hocko	  Intel's TSX (Transactional Synchronization Extensions) feature
1842db616173SMichal Hocko	  allows to optimize locking protocols through lock elision which
1843db616173SMichal Hocko	  can lead to a noticeable performance boost.
1844db616173SMichal Hocko
1845db616173SMichal Hocko	  On the other hand it has been shown that TSX can be exploited
1846db616173SMichal Hocko	  to form side channel attacks (e.g. TAA) and chances are there
1847db616173SMichal Hocko	  will be more of those attacks discovered in the future.
1848db616173SMichal Hocko
1849db616173SMichal Hocko	  Therefore TSX is not enabled by default (aka tsx=off). An admin
1850db616173SMichal Hocko	  might override this decision by tsx=on the command line parameter.
1851db616173SMichal Hocko	  Even with TSX enabled, the kernel will attempt to enable the best
1852db616173SMichal Hocko	  possible TAA mitigation setting depending on the microcode available
1853db616173SMichal Hocko	  for the particular machine.
1854db616173SMichal Hocko
1855db616173SMichal Hocko	  This option allows to set the default tsx mode between tsx=on, =off
1856db616173SMichal Hocko	  and =auto. See Documentation/admin-guide/kernel-parameters.txt for more
1857db616173SMichal Hocko	  details.
1858db616173SMichal Hocko
1859db616173SMichal Hocko	  Say off if not sure, auto if TSX is in use but it should be used on safe
1860db616173SMichal Hocko	  platforms or on if TSX is in use and the security aspect of tsx is not
1861db616173SMichal Hocko	  relevant.
1862db616173SMichal Hocko
1863db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF
1864db616173SMichal Hocko	bool "off"
1865db616173SMichal Hocko	help
1866db616173SMichal Hocko	  TSX is disabled if possible - equals to tsx=off command line parameter.
1867db616173SMichal Hocko
1868db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON
1869db616173SMichal Hocko	bool "on"
1870db616173SMichal Hocko	help
1871db616173SMichal Hocko	  TSX is always enabled on TSX capable HW - equals the tsx=on command
1872db616173SMichal Hocko	  line parameter.
1873db616173SMichal Hocko
1874db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO
1875db616173SMichal Hocko	bool "auto"
1876db616173SMichal Hocko	help
1877db616173SMichal Hocko	  TSX is enabled on TSX capable HW that is believed to be safe against
1878db616173SMichal Hocko	  side channel attacks- equals the tsx=auto command line parameter.
1879db616173SMichal Hockoendchoice
1880db616173SMichal Hocko
1881e7e05452SSean Christophersonconfig X86_SGX
1882e7e05452SSean Christopherson	bool "Software Guard eXtensions (SGX)"
1883b8d1d163SDaniel Sneddon	depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC
1884e7e05452SSean Christopherson	depends on CRYPTO=y
1885e7e05452SSean Christopherson	depends on CRYPTO_SHA256=y
1886e7e05452SSean Christopherson	select MMU_NOTIFIER
1887901ddbb9SJarkko Sakkinen	select NUMA_KEEP_MEMINFO if NUMA
188840e0e784STony Luck	select XARRAY_MULTI
1889e7e05452SSean Christopherson	help
1890e7e05452SSean Christopherson	  Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions
1891e7e05452SSean Christopherson	  that can be used by applications to set aside private regions of code
1892e7e05452SSean Christopherson	  and data, referred to as enclaves. An enclave's private memory can
1893e7e05452SSean Christopherson	  only be accessed by code running within the enclave. Accesses from
1894e7e05452SSean Christopherson	  outside the enclave, including other enclaves, are disallowed by
1895e7e05452SSean Christopherson	  hardware.
1896e7e05452SSean Christopherson
1897e7e05452SSean Christopherson	  If unsure, say N.
1898e7e05452SSean Christopherson
189918e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK
190018e66b69SRick Edgecombe	bool "X86 userspace shadow stack"
190118e66b69SRick Edgecombe	depends on AS_WRUSS
190218e66b69SRick Edgecombe	depends on X86_64
190318e66b69SRick Edgecombe	select ARCH_USES_HIGH_VMA_FLAGS
1904bcc9d04eSMark Brown	select ARCH_HAS_USER_SHADOW_STACK
190518e66b69SRick Edgecombe	select X86_CET
190618e66b69SRick Edgecombe	help
190718e66b69SRick Edgecombe	  Shadow stack protection is a hardware feature that detects function
190818e66b69SRick Edgecombe	  return address corruption.  This helps mitigate ROP attacks.
190918e66b69SRick Edgecombe	  Applications must be enabled to use it, and old userspace does not
191018e66b69SRick Edgecombe	  get protection "for free".
191118e66b69SRick Edgecombe
191218e66b69SRick Edgecombe	  CPUs supporting shadow stacks were first released in 2020.
191318e66b69SRick Edgecombe
191454acee60SDave Hansen	  See Documentation/arch/x86/shstk.rst for more information.
191518e66b69SRick Edgecombe
191618e66b69SRick Edgecombe	  If unsure, say N.
191718e66b69SRick Edgecombe
1918c33621b4SKai Huangconfig INTEL_TDX_HOST
1919c33621b4SKai Huang	bool "Intel Trust Domain Extensions (TDX) host support"
1920c33621b4SKai Huang	depends on CPU_SUP_INTEL
1921c33621b4SKai Huang	depends on X86_64
1922c33621b4SKai Huang	depends on KVM_INTEL
19233115cabdSKai Huang	depends on X86_X2APIC
1924abe8dbabSKai Huang	select ARCH_KEEP_MEMBLOCK
1925ac3a2208SKai Huang	depends on CONTIG_ALLOC
1926cb8eb06dSDave Hansen	depends on !KEXEC_CORE
192783e1bdc9SKai Huang	depends on X86_MCE
1928c33621b4SKai Huang	help
1929c33621b4SKai Huang	  Intel Trust Domain Extensions (TDX) protects guest VMs from malicious
1930c33621b4SKai Huang	  host and certain physical attacks.  This option enables necessary TDX
1931c33621b4SKai Huang	  support in the host kernel to run confidential VMs.
1932c33621b4SKai Huang
1933c33621b4SKai Huang	  If unsure, say N.
1934c33621b4SKai Huang
1935506f1d07SSam Ravnborgconfig EFI
19369ba16087SJan Beulich	bool "EFI runtime service support"
19375b83683fSHuang, Ying	depends on ACPI
1938f6ce5002SSergey Vlasov	select UCS2_STRING
1939022ee6c5SArd Biesheuvel	select EFI_RUNTIME_WRAPPERS
19401ff2fc02STom Lendacky	select ARCH_USE_MEMREMAP_PROT
1941aba7e066SArd Biesheuvel	select EFI_RUNTIME_MAP if KEXEC_CORE
1942a7f7f624SMasahiro Yamada	help
19438b2cb7a8SHuang, Ying	  This enables the kernel to use EFI runtime services that are
1944506f1d07SSam Ravnborg	  available (such as the EFI variable services).
1945506f1d07SSam Ravnborg
19468b2cb7a8SHuang, Ying	  This option is only useful on systems that have EFI firmware.
19478b2cb7a8SHuang, Ying	  In addition, you should use the latest ELILO loader available
19488b2cb7a8SHuang, Ying	  at <http://elilo.sourceforge.net> in order to take advantage
19498b2cb7a8SHuang, Ying	  of EFI runtime services. However, even with this option, the
19508b2cb7a8SHuang, Ying	  resultant kernel should continue to boot on existing non-EFI
19518b2cb7a8SHuang, Ying	  platforms.
1952506f1d07SSam Ravnborg
1953291f3632SMatt Flemingconfig EFI_STUB
1954291f3632SMatt Fleming	bool "EFI stub support"
1955c6dbd3e5SPeter Zijlstra	depends on EFI
19567b2a583aSMatt Fleming	select RELOCATABLE
1957a7f7f624SMasahiro Yamada	help
1958291f3632SMatt Fleming	  This kernel feature allows a bzImage to be loaded directly
1959291f3632SMatt Fleming	  by EFI firmware without the use of a bootloader.
1960291f3632SMatt Fleming
19614f4cfa6cSMauro Carvalho Chehab	  See Documentation/admin-guide/efi-stub.rst for more information.
19620c759662SMatt Fleming
1963cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL
1964cc3fdda2SArd Biesheuvel	bool "EFI handover protocol (DEPRECATED)"
1965cc3fdda2SArd Biesheuvel	depends on EFI_STUB
1966cc3fdda2SArd Biesheuvel	default y
1967cc3fdda2SArd Biesheuvel	help
1968cc3fdda2SArd Biesheuvel	  Select this in order to include support for the deprecated EFI
1969cc3fdda2SArd Biesheuvel	  handover protocol, which defines alternative entry points into the
1970cc3fdda2SArd Biesheuvel	  EFI stub.  This is a practice that has no basis in the UEFI
1971cc3fdda2SArd Biesheuvel	  specification, and requires a priori knowledge on the part of the
1972cc3fdda2SArd Biesheuvel	  bootloader about Linux/x86 specific ways of passing the command line
1973cc3fdda2SArd Biesheuvel	  and initrd, and where in memory those assets may be loaded.
1974cc3fdda2SArd Biesheuvel
1975cc3fdda2SArd Biesheuvel	  If in doubt, say Y. Even though the corresponding support is not
1976cc3fdda2SArd Biesheuvel	  present in upstream GRUB or other bootloaders, most distros build
1977cc3fdda2SArd Biesheuvel	  GRUB with numerous downstream patches applied, and may rely on the
1978cc3fdda2SArd Biesheuvel	  handover protocol as as result.
1979cc3fdda2SArd Biesheuvel
19807d453eeeSMatt Flemingconfig EFI_MIXED
19817d453eeeSMatt Fleming	bool "EFI mixed-mode support"
19827d453eeeSMatt Fleming	depends on EFI_STUB && X86_64
1983a7f7f624SMasahiro Yamada	help
19847d453eeeSMatt Fleming	  Enabling this feature allows a 64-bit kernel to be booted
19857d453eeeSMatt Fleming	  on a 32-bit firmware, provided that your CPU supports 64-bit
19867d453eeeSMatt Fleming	  mode.
19877d453eeeSMatt Fleming
19887d453eeeSMatt Fleming	  Note that it is not possible to boot a mixed-mode enabled
19897d453eeeSMatt Fleming	  kernel via the EFI boot stub - a bootloader that supports
19907d453eeeSMatt Fleming	  the EFI handover protocol must be used.
19917d453eeeSMatt Fleming
19927d453eeeSMatt Fleming	  If unsure, say N.
19937d453eeeSMatt Fleming
19941fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP
19951fff234dSArd Biesheuvel	bool "Export EFI runtime maps to sysfs" if EXPERT
19961fff234dSArd Biesheuvel	depends on EFI
19971fff234dSArd Biesheuvel	help
19981fff234dSArd Biesheuvel	  Export EFI runtime memory regions to /sys/firmware/efi/runtime-map.
19991fff234dSArd Biesheuvel	  That memory map is required by the 2nd kernel to set up EFI virtual
20001fff234dSArd Biesheuvel	  mappings after kexec, but can also be used for debugging purposes.
20011fff234dSArd Biesheuvel
20021fff234dSArd Biesheuvel	  See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map.
20031fff234dSArd Biesheuvel
20048636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz"
2005506f1d07SSam Ravnborg
20066af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC
20076af51380SEric DeVolder	def_bool y
2008506f1d07SSam Ravnborg
20096af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE
2010c1ad12eeSArnd Bergmann	def_bool X86_64
2011506f1d07SSam Ravnborg
20126af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE
20136af51380SEric DeVolder	def_bool y
20146af51380SEric DeVolder	depends on KEXEC_FILE
2015b69a2afdSJonathan McDowell	select HAVE_IMA_KEXEC if IMA
201674ca317cSVivek Goyal
2017e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY
2018c1ad12eeSArnd Bergmann	def_bool y
2019b799a09fSAKASHI Takahiro
20206af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG
20216af51380SEric DeVolder	def_bool y
202299d5cadfSJiri Bohac
20236af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE
20246af51380SEric DeVolder	def_bool y
202599d5cadfSJiri Bohac
20266af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG
20276af51380SEric DeVolder	def_bool y
202899d5cadfSJiri Bohac
20296af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP
20306af51380SEric DeVolder	def_bool y
20318e7d8381SVivek Goyal
20326af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP
20336af51380SEric DeVolder	def_bool X86_64 || (X86_32 && HIGHMEM)
20348e7d8381SVivek Goyal
203531daa343SDave Vasilevskyconfig ARCH_DEFAULT_CRASH_DUMP
203631daa343SDave Vasilevsky	def_bool y
203731daa343SDave Vasilevsky
2038ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG
2039ea53ad9cSEric DeVolder	def_bool y
20403ab83521SHuang Ying
20419c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
204285fcde40SBaoquan He	def_bool CRASH_RESERVE
20439c08a2a1SBaoquan He
2044506f1d07SSam Ravnborgconfig PHYSICAL_START
20456a108a14SDavid Rientjes	hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
2046ceefccc9SH. Peter Anvin	default "0x1000000"
2047a7f7f624SMasahiro Yamada	help
2048506f1d07SSam Ravnborg	  This gives the physical address where the kernel is loaded.
2049506f1d07SSam Ravnborg
205043b1d3e6SChris Koch	  If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage
205143b1d3e6SChris Koch	  will decompress itself to above physical address and run from there.
205243b1d3e6SChris Koch	  Otherwise, bzImage will run from the address where it has been loaded
205343b1d3e6SChris Koch	  by the boot loader. The only exception is if it is loaded below the
205443b1d3e6SChris Koch	  above physical address, in which case it will relocate itself there.
2055506f1d07SSam Ravnborg
2056506f1d07SSam Ravnborg	  In normal kdump cases one does not have to set/change this option
2057506f1d07SSam Ravnborg	  as now bzImage can be compiled as a completely relocatable image
2058506f1d07SSam Ravnborg	  (CONFIG_RELOCATABLE=y) and be used to load and run from a different
2059506f1d07SSam Ravnborg	  address. This option is mainly useful for the folks who don't want
2060506f1d07SSam Ravnborg	  to use a bzImage for capturing the crash dump and want to use a
2061506f1d07SSam Ravnborg	  vmlinux instead. vmlinux is not relocatable hence a kernel needs
2062506f1d07SSam Ravnborg	  to be specifically compiled to run from a specific memory area
2063506f1d07SSam Ravnborg	  (normally a reserved region) and this option comes handy.
2064506f1d07SSam Ravnborg
2065ceefccc9SH. Peter Anvin	  So if you are using bzImage for capturing the crash dump,
2066ceefccc9SH. Peter Anvin	  leave the value here unchanged to 0x1000000 and set
2067ceefccc9SH. Peter Anvin	  CONFIG_RELOCATABLE=y.  Otherwise if you plan to use vmlinux
2068ceefccc9SH. Peter Anvin	  for capturing the crash dump change this value to start of
2069ceefccc9SH. Peter Anvin	  the reserved region.  In other words, it can be set based on
2070ceefccc9SH. Peter Anvin	  the "X" value as specified in the "crashkernel=YM@XM"
2071ceefccc9SH. Peter Anvin	  command line boot parameter passed to the panic-ed
2072330d4810SMauro Carvalho Chehab	  kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst
2073ceefccc9SH. Peter Anvin	  for more details about crash dumps.
2074506f1d07SSam Ravnborg
2075506f1d07SSam Ravnborg	  Usage of bzImage for capturing the crash dump is recommended as
2076506f1d07SSam Ravnborg	  one does not have to build two kernels. Same kernel can be used
2077506f1d07SSam Ravnborg	  as production kernel and capture kernel. Above option should have
2078506f1d07SSam Ravnborg	  gone away after relocatable bzImage support is introduced. But it
2079506f1d07SSam Ravnborg	  is present because there are users out there who continue to use
2080506f1d07SSam Ravnborg	  vmlinux for dump capture. This option should go away down the
2081506f1d07SSam Ravnborg	  line.
2082506f1d07SSam Ravnborg
2083506f1d07SSam Ravnborg	  Don't change this unless you know what you are doing.
2084506f1d07SSam Ravnborg
2085506f1d07SSam Ravnborgconfig RELOCATABLE
208626717808SH. Peter Anvin	bool "Build a relocatable kernel"
208726717808SH. Peter Anvin	default y
2088a7f7f624SMasahiro Yamada	help
2089506f1d07SSam Ravnborg	  This builds a kernel image that retains relocation information
2090506f1d07SSam Ravnborg	  so it can be loaded someplace besides the default 1MB.
2091506f1d07SSam Ravnborg	  The relocations tend to make the kernel binary about 10% larger,
2092506f1d07SSam Ravnborg	  but are discarded at runtime.
2093506f1d07SSam Ravnborg
2094506f1d07SSam Ravnborg	  One use is for the kexec on panic case where the recovery kernel
2095506f1d07SSam Ravnborg	  must live at a different physical address than the primary
2096506f1d07SSam Ravnborg	  kernel.
2097506f1d07SSam Ravnborg
2098506f1d07SSam Ravnborg	  Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
2099506f1d07SSam Ravnborg	  it has been loaded at and the compile time physical address
21008ab3820fSKees Cook	  (CONFIG_PHYSICAL_START) is used as the minimum location.
2101506f1d07SSam Ravnborg
21028ab3820fSKees Cookconfig RANDOMIZE_BASE
2103e8581e3dSBaoquan He	bool "Randomize the address of the kernel image (KASLR)"
21048ab3820fSKees Cook	depends on RELOCATABLE
21056807c846SIngo Molnar	default y
2106a7f7f624SMasahiro Yamada	help
2107e8581e3dSBaoquan He	  In support of Kernel Address Space Layout Randomization (KASLR),
2108e8581e3dSBaoquan He	  this randomizes the physical address at which the kernel image
2109e8581e3dSBaoquan He	  is decompressed and the virtual address where the kernel
2110e8581e3dSBaoquan He	  image is mapped, as a security feature that deters exploit
2111e8581e3dSBaoquan He	  attempts relying on knowledge of the location of kernel
2112e8581e3dSBaoquan He	  code internals.
2113e8581e3dSBaoquan He
2114ed9f007eSKees Cook	  On 64-bit, the kernel physical and virtual addresses are
2115ed9f007eSKees Cook	  randomized separately. The physical address will be anywhere
2116ed9f007eSKees Cook	  between 16MB and the top of physical memory (up to 64TB). The
2117ed9f007eSKees Cook	  virtual address will be randomized from 16MB up to 1GB (9 bits
2118ed9f007eSKees Cook	  of entropy). Note that this also reduces the memory space
2119ed9f007eSKees Cook	  available to kernel modules from 1.5GB to 1GB.
2120ed9f007eSKees Cook
2121ed9f007eSKees Cook	  On 32-bit, the kernel physical and virtual addresses are
2122ed9f007eSKees Cook	  randomized together. They will be randomized from 16MB up to
2123ed9f007eSKees Cook	  512MB (8 bits of entropy).
21248ab3820fSKees Cook
2125a653f356SKees Cook	  Entropy is generated using the RDRAND instruction if it is
2126e8581e3dSBaoquan He	  supported. If RDTSC is supported, its value is mixed into
2127e8581e3dSBaoquan He	  the entropy pool as well. If neither RDRAND nor RDTSC are
2128ed9f007eSKees Cook	  supported, then entropy is read from the i8254 timer. The
2129ed9f007eSKees Cook	  usable entropy is limited by the kernel being built using
2130ed9f007eSKees Cook	  2GB addressing, and that PHYSICAL_ALIGN must be at a
2131ed9f007eSKees Cook	  minimum of 2MB. As a result, only 10 bits of entropy are
2132ed9f007eSKees Cook	  theoretically possible, but the implementations are further
2133ed9f007eSKees Cook	  limited due to memory layouts.
2134e8581e3dSBaoquan He
21356807c846SIngo Molnar	  If unsure, say Y.
2136da2b6fb9SKees Cook
21378ab3820fSKees Cook# Relocation on x86 needs some additional build support
2138845adf72SH. Peter Anvinconfig X86_NEED_RELOCS
2139845adf72SH. Peter Anvin	def_bool y
21408ab3820fSKees Cook	depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE)
21419b400d17SArd Biesheuvel	select ARCH_VMLINUX_NEEDS_RELOCS
2142845adf72SH. Peter Anvin
2143506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN
2144a0215061SKees Cook	hex "Alignment value to which kernel should be aligned"
21458ab3820fSKees Cook	default "0x200000"
2146a0215061SKees Cook	range 0x2000 0x1000000 if X86_32
2147a0215061SKees Cook	range 0x200000 0x1000000 if X86_64
2148a7f7f624SMasahiro Yamada	help
2149506f1d07SSam Ravnborg	  This value puts the alignment restrictions on physical address
2150506f1d07SSam Ravnborg	  where kernel is loaded and run from. Kernel is compiled for an
2151506f1d07SSam Ravnborg	  address which meets above alignment restriction.
2152506f1d07SSam Ravnborg
2153506f1d07SSam Ravnborg	  If bootloader loads the kernel at a non-aligned address and
2154506f1d07SSam Ravnborg	  CONFIG_RELOCATABLE is set, kernel will move itself to nearest
2155506f1d07SSam Ravnborg	  address aligned to above value and run from there.
2156506f1d07SSam Ravnborg
2157506f1d07SSam Ravnborg	  If bootloader loads the kernel at a non-aligned address and
2158506f1d07SSam Ravnborg	  CONFIG_RELOCATABLE is not set, kernel will ignore the run time
2159506f1d07SSam Ravnborg	  load address and decompress itself to the address it has been
2160506f1d07SSam Ravnborg	  compiled for and run from there. The address for which kernel is
2161506f1d07SSam Ravnborg	  compiled already meets above alignment restrictions. Hence the
2162506f1d07SSam Ravnborg	  end result is that kernel runs from a physical address meeting
2163506f1d07SSam Ravnborg	  above alignment restrictions.
2164506f1d07SSam Ravnborg
2165a0215061SKees Cook	  On 32-bit this value must be a multiple of 0x2000. On 64-bit
2166a0215061SKees Cook	  this value must be a multiple of 0x200000.
2167a0215061SKees Cook
2168506f1d07SSam Ravnborg	  Don't change this unless you know what you are doing.
2169506f1d07SSam Ravnborg
2170eedb92abSKirill A. Shutemovconfig DYNAMIC_MEMORY_LAYOUT
2171eedb92abSKirill A. Shutemov	bool
2172a7f7f624SMasahiro Yamada	help
2173eedb92abSKirill A. Shutemov	  This option makes base addresses of vmalloc and vmemmap as well as
2174eedb92abSKirill A. Shutemov	  __PAGE_OFFSET movable during boot.
2175eedb92abSKirill A. Shutemov
21760483e1faSThomas Garnierconfig RANDOMIZE_MEMORY
21770483e1faSThomas Garnier	bool "Randomize the kernel memory sections"
21780483e1faSThomas Garnier	depends on X86_64
21790483e1faSThomas Garnier	depends on RANDOMIZE_BASE
2180eedb92abSKirill A. Shutemov	select DYNAMIC_MEMORY_LAYOUT
21810483e1faSThomas Garnier	default RANDOMIZE_BASE
2182a7f7f624SMasahiro Yamada	help
21830483e1faSThomas Garnier	  Randomizes the base virtual address of kernel memory sections
21840483e1faSThomas Garnier	  (physical memory mapping, vmalloc & vmemmap). This security feature
21850483e1faSThomas Garnier	  makes exploits relying on predictable memory locations less reliable.
21860483e1faSThomas Garnier
21870483e1faSThomas Garnier	  The order of allocations remains unchanged. Entropy is generated in
21880483e1faSThomas Garnier	  the same way as RANDOMIZE_BASE. Current implementation in the optimal
21890483e1faSThomas Garnier	  configuration have in average 30,000 different possible virtual
21900483e1faSThomas Garnier	  addresses for each memory section.
21910483e1faSThomas Garnier
21926807c846SIngo Molnar	  If unsure, say Y.
21930483e1faSThomas Garnier
219490397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING
219590397a41SThomas Garnier	hex "Physical memory mapping padding" if EXPERT
219690397a41SThomas Garnier	depends on RANDOMIZE_MEMORY
219790397a41SThomas Garnier	default "0xa" if MEMORY_HOTPLUG
219890397a41SThomas Garnier	default "0x0"
219990397a41SThomas Garnier	range 0x1 0x40 if MEMORY_HOTPLUG
220090397a41SThomas Garnier	range 0x0 0x40
2201a7f7f624SMasahiro Yamada	help
220290397a41SThomas Garnier	  Define the padding in terabytes added to the existing physical
220390397a41SThomas Garnier	  memory size during kernel memory randomization. It is useful
220490397a41SThomas Garnier	  for memory hotplug support but reduces the entropy available for
220590397a41SThomas Garnier	  address randomization.
220690397a41SThomas Garnier
220790397a41SThomas Garnier	  If unsure, leave at the default value.
220890397a41SThomas Garnier
22096449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING
22106449dcb0SKirill A. Shutemov	bool "Linear Address Masking support"
22116449dcb0SKirill A. Shutemov	depends on X86_64
22123267cb6dSPawan Gupta	depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS
22136449dcb0SKirill A. Shutemov	help
22146449dcb0SKirill A. Shutemov	  Linear Address Masking (LAM) modifies the checking that is applied
22156449dcb0SKirill A. Shutemov	  to 64-bit linear addresses, allowing software to use of the
22166449dcb0SKirill A. Shutemov	  untranslated address bits for metadata.
22176449dcb0SKirill A. Shutemov
22186449dcb0SKirill A. Shutemov	  The capability can be used for efficient address sanitizers (ASAN)
22196449dcb0SKirill A. Shutemov	  implementation and for optimizations in JITs.
22206449dcb0SKirill A. Shutemov
2221506f1d07SSam Ravnborgconfig HOTPLUG_CPU
2222bebd024eSThomas Gleixner	def_bool y
222340b31360SStephen Rothwell	depends on SMP
2224506f1d07SSam Ravnborg
2225506f1d07SSam Ravnborgconfig COMPAT_VDSO
2226b0b49f26SAndy Lutomirski	def_bool n
2227de711563SMateusz Jończyk	prompt "Workaround for glibc 2.3.2 / 2.3.3 (released in year 2003/2004)"
2228953fee1dSIngo Molnar	depends on COMPAT_32
2229a7f7f624SMasahiro Yamada	help
2230b0b49f26SAndy Lutomirski	  Certain buggy versions of glibc will crash if they are
2231b0b49f26SAndy Lutomirski	  presented with a 32-bit vDSO that is not mapped at the address
2232b0b49f26SAndy Lutomirski	  indicated in its segment table.
2233e84446deSRandy Dunlap
2234b0b49f26SAndy Lutomirski	  The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a
2235b0b49f26SAndy Lutomirski	  and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and
2236b0b49f26SAndy Lutomirski	  49ad572a70b8aeb91e57483a11dd1b77e31c4468.  Glibc 2.3.3 is
2237b0b49f26SAndy Lutomirski	  the only released version with the bug, but OpenSUSE 9
2238b0b49f26SAndy Lutomirski	  contains a buggy "glibc 2.3.2".
2239506f1d07SSam Ravnborg
2240b0b49f26SAndy Lutomirski	  The symptom of the bug is that everything crashes on startup, saying:
2241b0b49f26SAndy Lutomirski	  dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed!
2242b0b49f26SAndy Lutomirski
2243b0b49f26SAndy Lutomirski	  Saying Y here changes the default value of the vdso32 boot
2244b0b49f26SAndy Lutomirski	  option from 1 to 0, which turns off the 32-bit vDSO entirely.
2245b0b49f26SAndy Lutomirski	  This works around the glibc bug but hurts performance.
2246b0b49f26SAndy Lutomirski
2247b0b49f26SAndy Lutomirski	  If unsure, say N: if you are compiling your own kernel, you
2248b0b49f26SAndy Lutomirski	  are unlikely to be using a buggy version of glibc.
2249506f1d07SSam Ravnborg
22503dc33bd3SKees Cookchoice
22513dc33bd3SKees Cook	prompt "vsyscall table for legacy applications"
22523dc33bd3SKees Cook	depends on X86_64
2253625b7b7fSAndy Lutomirski	default LEGACY_VSYSCALL_XONLY
22543dc33bd3SKees Cook	help
22553dc33bd3SKees Cook	  Legacy user code that does not know how to find the vDSO expects
22563dc33bd3SKees Cook	  to be able to issue three syscalls by calling fixed addresses in
22573dc33bd3SKees Cook	  kernel space. Since this location is not randomized with ASLR,
22583dc33bd3SKees Cook	  it can be used to assist security vulnerability exploitation.
22593dc33bd3SKees Cook
22603dc33bd3SKees Cook	  This setting can be changed at boot time via the kernel command
2261bf00745eSAndy Lutomirski	  line parameter vsyscall=[emulate|xonly|none].  Emulate mode
2262bf00745eSAndy Lutomirski	  is deprecated and can only be enabled using the kernel command
2263bf00745eSAndy Lutomirski	  line.
22643dc33bd3SKees Cook
22653dc33bd3SKees Cook	  On a system with recent enough glibc (2.14 or newer) and no
22663dc33bd3SKees Cook	  static binaries, you can say None without a performance penalty
22673dc33bd3SKees Cook	  to improve security.
22683dc33bd3SKees Cook
2269bd49e16eSAndy Lutomirski	  If unsure, select "Emulate execution only".
22703dc33bd3SKees Cook
2271bd49e16eSAndy Lutomirski	config LEGACY_VSYSCALL_XONLY
2272bd49e16eSAndy Lutomirski		bool "Emulate execution only"
2273bd49e16eSAndy Lutomirski		help
2274bd49e16eSAndy Lutomirski		  The kernel traps and emulates calls into the fixed vsyscall
2275bd49e16eSAndy Lutomirski		  address mapping and does not allow reads.  This
2276bd49e16eSAndy Lutomirski		  configuration is recommended when userspace might use the
2277bd49e16eSAndy Lutomirski		  legacy vsyscall area but support for legacy binary
2278bd49e16eSAndy Lutomirski		  instrumentation of legacy code is not needed.  It mitigates
2279bd49e16eSAndy Lutomirski		  certain uses of the vsyscall area as an ASLR-bypassing
2280bd49e16eSAndy Lutomirski		  buffer.
22813dc33bd3SKees Cook
22823dc33bd3SKees Cook	config LEGACY_VSYSCALL_NONE
22833dc33bd3SKees Cook		bool "None"
22843dc33bd3SKees Cook		help
22853dc33bd3SKees Cook		  There will be no vsyscall mapping at all. This will
22863dc33bd3SKees Cook		  eliminate any risk of ASLR bypass due to the vsyscall
22873dc33bd3SKees Cook		  fixed address mapping. Attempts to use the vsyscalls
22883dc33bd3SKees Cook		  will be reported to dmesg, so that either old or
22893dc33bd3SKees Cook		  malicious userspace programs can be identified.
22903dc33bd3SKees Cook
22913dc33bd3SKees Cookendchoice
22923dc33bd3SKees Cook
2293516cbf37STim Birdconfig CMDLINE_BOOL
2294516cbf37STim Bird	bool "Built-in kernel command line"
2295a7f7f624SMasahiro Yamada	help
2296516cbf37STim Bird	  Allow for specifying boot arguments to the kernel at
2297516cbf37STim Bird	  build time.  On some systems (e.g. embedded ones), it is
2298516cbf37STim Bird	  necessary or convenient to provide some or all of the
2299516cbf37STim Bird	  kernel boot arguments with the kernel itself (that is,
2300516cbf37STim Bird	  to not rely on the boot loader to provide them.)
2301516cbf37STim Bird
2302516cbf37STim Bird	  To compile command line arguments into the kernel,
2303516cbf37STim Bird	  set this option to 'Y', then fill in the
230469711ca1SSébastien Hinderer	  boot arguments in CONFIG_CMDLINE.
2305516cbf37STim Bird
2306516cbf37STim Bird	  Systems with fully functional boot loaders (i.e. non-embedded)
2307516cbf37STim Bird	  should leave this option set to 'N'.
2308516cbf37STim Bird
2309516cbf37STim Birdconfig CMDLINE
2310516cbf37STim Bird	string "Built-in kernel command string"
2311516cbf37STim Bird	depends on CMDLINE_BOOL
2312516cbf37STim Bird	default ""
2313a7f7f624SMasahiro Yamada	help
2314516cbf37STim Bird	  Enter arguments here that should be compiled into the kernel
2315516cbf37STim Bird	  image and used at boot time.  If the boot loader provides a
2316516cbf37STim Bird	  command line at boot time, it is appended to this string to
2317516cbf37STim Bird	  form the full kernel command line, when the system boots.
2318516cbf37STim Bird
2319516cbf37STim Bird	  However, you can use the CONFIG_CMDLINE_OVERRIDE option to
2320516cbf37STim Bird	  change this behavior.
2321516cbf37STim Bird
2322516cbf37STim Bird	  In most cases, the command line (whether built-in or provided
2323516cbf37STim Bird	  by the boot loader) should specify the device for the root
2324516cbf37STim Bird	  file system.
2325516cbf37STim Bird
2326516cbf37STim Birdconfig CMDLINE_OVERRIDE
2327516cbf37STim Bird	bool "Built-in command line overrides boot loader arguments"
2328645e6466SAnders Roxell	depends on CMDLINE_BOOL && CMDLINE != ""
2329a7f7f624SMasahiro Yamada	help
2330516cbf37STim Bird	  Set this option to 'Y' to have the kernel ignore the boot loader
2331516cbf37STim Bird	  command line, and use ONLY the built-in command line.
2332516cbf37STim Bird
2333516cbf37STim Bird	  This is used to work around broken boot loaders.  This should
2334516cbf37STim Bird	  be set to 'N' under normal conditions.
2335516cbf37STim Bird
2336a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL
2337a5b9e5a2SAndy Lutomirski	bool "Enable the LDT (local descriptor table)" if EXPERT
2338a5b9e5a2SAndy Lutomirski	default y
2339a7f7f624SMasahiro Yamada	help
2340a5b9e5a2SAndy Lutomirski	  Linux can allow user programs to install a per-process x86
2341a5b9e5a2SAndy Lutomirski	  Local Descriptor Table (LDT) using the modify_ldt(2) system
2342a5b9e5a2SAndy Lutomirski	  call.  This is required to run 16-bit or segmented code such as
2343a5b9e5a2SAndy Lutomirski	  DOSEMU or some Wine programs.  It is also used by some very old
2344a5b9e5a2SAndy Lutomirski	  threading libraries.
2345a5b9e5a2SAndy Lutomirski
2346a5b9e5a2SAndy Lutomirski	  Enabling this feature adds a small amount of overhead to
2347a5b9e5a2SAndy Lutomirski	  context switches and increases the low-level kernel attack
2348a5b9e5a2SAndy Lutomirski	  surface.  Disabling it removes the modify_ldt(2) system call.
2349a5b9e5a2SAndy Lutomirski
2350a5b9e5a2SAndy Lutomirski	  Saying 'N' here may make sense for embedded or server kernels.
2351a5b9e5a2SAndy Lutomirski
23523aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE
23533aac3ebeSThomas Gleixner	bool "Enforce strict size checking for sigaltstack"
23543aac3ebeSThomas Gleixner	depends on DYNAMIC_SIGFRAME
23553aac3ebeSThomas Gleixner	help
23563aac3ebeSThomas Gleixner	  For historical reasons MINSIGSTKSZ is a constant which became
23573aac3ebeSThomas Gleixner	  already too small with AVX512 support. Add a mechanism to
23583aac3ebeSThomas Gleixner	  enforce strict checking of the sigaltstack size against the
23593aac3ebeSThomas Gleixner	  real size of the FPU frame. This option enables the check
23603aac3ebeSThomas Gleixner	  by default. It can also be controlled via the kernel command
23613aac3ebeSThomas Gleixner	  line option 'strict_sas_size' independent of this config
23623aac3ebeSThomas Gleixner	  switch. Enabling it might break existing applications which
23633aac3ebeSThomas Gleixner	  allocate a too small sigaltstack but 'work' because they
23643aac3ebeSThomas Gleixner	  never get a signal delivered.
23653aac3ebeSThomas Gleixner
23663aac3ebeSThomas Gleixner	  Say 'N' unless you want to really enforce this check.
23673aac3ebeSThomas Gleixner
2368d6f635bcSKees Cookconfig CFI_AUTO_DEFAULT
2369d6f635bcSKees Cook	bool "Attempt to use FineIBT by default at boot time"
2370d6f635bcSKees Cook	depends on FINEIBT
2371d6f635bcSKees Cook	default y
2372d6f635bcSKees Cook	help
2373d6f635bcSKees Cook	  Attempt to use FineIBT by default at boot time. If enabled,
2374d6f635bcSKees Cook	  this is the same as booting with "cfi=auto". If disabled,
2375d6f635bcSKees Cook	  this is the same as booting with "cfi=kcfi".
2376d6f635bcSKees Cook
2377b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig"
2378b700e7f0SSeth Jennings
2379350afa8aSRavi Bangoriaconfig X86_BUS_LOCK_DETECT
2380350afa8aSRavi Bangoria	bool "Split Lock Detect and Bus Lock Detect support"
2381408eb741SRavi Bangoria	depends on CPU_SUP_INTEL || CPU_SUP_AMD
2382350afa8aSRavi Bangoria	default y
2383350afa8aSRavi Bangoria	help
2384350afa8aSRavi Bangoria	  Enable Split Lock Detect and Bus Lock Detect functionalities.
2385350afa8aSRavi Bangoria	  See <file:Documentation/arch/x86/buslock.rst> for more information.
2386350afa8aSRavi Bangoria
2387506f1d07SSam Ravnborgendmenu
2388506f1d07SSam Ravnborg
23891ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS
239047ff30ccSUros Bizjak	def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null)
239147ff30ccSUros Bizjak	depends on CC_IS_GCC
23921ca3683cSUros Bizjak
2393b6762467SUros Bizjak#
2394b6762467SUros Bizjak# -fsanitize=kernel-address (KASAN) and -fsanitize=thread (KCSAN)
2395b6762467SUros Bizjak# are incompatible with named address spaces with GCC < 13.3
2396b6762467SUros Bizjak# (see GCC PR sanitizer/111736 and also PR sanitizer/115172).
2397b6762467SUros Bizjak#
2398b6762467SUros Bizjak
23999ebe5500SUros Bizjakconfig CC_HAS_NAMED_AS_FIXED_SANITIZERS
2400b6762467SUros Bizjak	def_bool y
2401b6762467SUros Bizjak	depends on !(KASAN || KCSAN) || GCC_VERSION >= 130300
2402b6762467SUros Bizjak	depends on !(UBSAN_BOOL && KASAN) || GCC_VERSION >= 140200
24031ca3683cSUros Bizjak
24041ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT
2405b6762467SUros Bizjak	def_bool CC_HAS_NAMED_AS
2406b6762467SUros Bizjak	depends on CC_HAS_NAMED_AS_FIXED_SANITIZERS
24071ca3683cSUros Bizjak
2408f43b9876SPeter Zijlstraconfig CC_HAS_SLS
2409f43b9876SPeter Zijlstra	def_bool $(cc-option,-mharden-sls=all)
2410f43b9876SPeter Zijlstra
2411f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK
2412f43b9876SPeter Zijlstra	def_bool $(cc-option,-mfunction-return=thunk-extern)
2413f43b9876SPeter Zijlstra
2414bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING
2415bea75b33SThomas Gleixner	def_bool $(cc-option,-fpatchable-function-entry=16,16)
2416bea75b33SThomas Gleixner
24170c92385dSPeter Zijlstraconfig CC_HAS_KCFI_ARITY
24180c92385dSPeter Zijlstra	def_bool $(cc-option,-fsanitize=kcfi -fsanitize-kcfi-arity)
24190c92385dSPeter Zijlstra	depends on CC_IS_CLANG && !RUST
24200c92385dSPeter Zijlstra
2421bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI
2422bea75b33SThomas Gleixner	int
2423bea75b33SThomas Gleixner	default 59 if FUNCTION_ALIGNMENT_64B
2424bea75b33SThomas Gleixner	default 27 if FUNCTION_ALIGNMENT_32B
2425bea75b33SThomas Gleixner	default 11 if FUNCTION_ALIGNMENT_16B
2426bea75b33SThomas Gleixner	default  3 if FUNCTION_ALIGNMENT_8B
2427bea75b33SThomas Gleixner	default  0
2428bea75b33SThomas Gleixner
2429bea75b33SThomas Gleixner# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG
2430bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/
2431bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES
2432bea75b33SThomas Gleixner	int
2433bea75b33SThomas Gleixner	default FUNCTION_PADDING_CFI if CFI_CLANG
2434bea75b33SThomas Gleixner	default FUNCTION_ALIGNMENT
2435bea75b33SThomas Gleixner
2436931ab636SPeter Zijlstraconfig CALL_PADDING
2437931ab636SPeter Zijlstra	def_bool n
2438931ab636SPeter Zijlstra	depends on CC_HAS_ENTRY_PADDING && OBJTOOL
2439931ab636SPeter Zijlstra	select FUNCTION_ALIGNMENT_16B
2440931ab636SPeter Zijlstra
2441931ab636SPeter Zijlstraconfig FINEIBT
2442931ab636SPeter Zijlstra	def_bool y
2443aefb2f2eSBreno Leitao	depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE
2444931ab636SPeter Zijlstra	select CALL_PADDING
2445931ab636SPeter Zijlstra
24460c92385dSPeter Zijlstraconfig FINEIBT_BHI
24470c92385dSPeter Zijlstra	def_bool y
24480c92385dSPeter Zijlstra	depends on FINEIBT && CC_HAS_KCFI_ARITY
24490c92385dSPeter Zijlstra
24508f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS
24518f7c0d8bSThomas Gleixner	def_bool y
24520911b8c5SBreno Leitao	depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL
24538f7c0d8bSThomas Gleixner
24548f7c0d8bSThomas Gleixnerconfig CALL_THUNKS
24558f7c0d8bSThomas Gleixner	def_bool n
2456931ab636SPeter Zijlstra	select CALL_PADDING
24578f7c0d8bSThomas Gleixner
2458b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS
2459b341b20dSPeter Zijlstra	def_bool y
2460931ab636SPeter Zijlstra	depends on CALL_PADDING && !CFI_CLANG
2461b341b20dSPeter Zijlstra
2462fe42754bSSean Christophersonmenuconfig CPU_MITIGATIONS
2463fe42754bSSean Christopherson	bool "Mitigations for CPU vulnerabilities"
2464f43b9876SPeter Zijlstra	default y
2465f43b9876SPeter Zijlstra	help
2466fe42754bSSean Christopherson	  Say Y here to enable options which enable mitigations for hardware
2467fe42754bSSean Christopherson	  vulnerabilities (usually related to speculative execution).
2468ce0abef6SSean Christopherson	  Mitigations can be disabled or restricted to SMT systems at runtime
2469ce0abef6SSean Christopherson	  via the "mitigations" kernel parameter.
2470f43b9876SPeter Zijlstra
2471ce0abef6SSean Christopherson	  If you say N, all mitigations will be disabled.  This CANNOT be
2472ce0abef6SSean Christopherson	  overridden at runtime.
2473ce0abef6SSean Christopherson
2474ce0abef6SSean Christopherson	  Say 'Y', unless you really know what you are doing.
2475f43b9876SPeter Zijlstra
2476fe42754bSSean Christophersonif CPU_MITIGATIONS
2477f43b9876SPeter Zijlstra
2478ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION
2479f43b9876SPeter Zijlstra	bool "Remove the kernel mapping in user mode"
2480f43b9876SPeter Zijlstra	default y
2481f43b9876SPeter Zijlstra	depends on (X86_64 || X86_PAE)
2482f43b9876SPeter Zijlstra	help
2483f43b9876SPeter Zijlstra	  This feature reduces the number of hardware side channels by
2484f43b9876SPeter Zijlstra	  ensuring that the majority of kernel addresses are not mapped
2485f43b9876SPeter Zijlstra	  into userspace.
2486f43b9876SPeter Zijlstra
2487ff61f079SJonathan Corbet	  See Documentation/arch/x86/pti.rst for more details.
2488f43b9876SPeter Zijlstra
2489aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE
2490f43b9876SPeter Zijlstra	bool "Avoid speculative indirect branches in kernel"
2491f43b9876SPeter Zijlstra	select OBJTOOL if HAVE_OBJTOOL
2492f43b9876SPeter Zijlstra	default y
2493f43b9876SPeter Zijlstra	help
2494f43b9876SPeter Zijlstra	  Compile kernel with the retpoline compiler options to guard against
2495f43b9876SPeter Zijlstra	  kernel-to-user data leaks by avoiding speculative indirect
2496f43b9876SPeter Zijlstra	  branches. Requires a compiler with -mindirect-branch=thunk-extern
2497f43b9876SPeter Zijlstra	  support for full protection. The kernel may run slower.
2498f43b9876SPeter Zijlstra
24990911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK
2500f43b9876SPeter Zijlstra	bool "Enable return-thunks"
2501aefb2f2eSBreno Leitao	depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK
2502f43b9876SPeter Zijlstra	select OBJTOOL if HAVE_OBJTOOL
2503b648ab48SBen Hutchings	default y if X86_64
2504f43b9876SPeter Zijlstra	help
2505f43b9876SPeter Zijlstra	  Compile the kernel with the return-thunks compiler option to guard
2506f43b9876SPeter Zijlstra	  against kernel-to-user data leaks by avoiding return speculation.
2507f43b9876SPeter Zijlstra	  Requires a compiler with -mfunction-return=thunk-extern
2508f43b9876SPeter Zijlstra	  support for full protection. The kernel may run slower.
2509f43b9876SPeter Zijlstra
2510ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY
2511f43b9876SPeter Zijlstra	bool "Enable UNRET on kernel entry"
25120911b8c5SBreno Leitao	depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64
2513f43b9876SPeter Zijlstra	default y
2514f43b9876SPeter Zijlstra	help
2515f43b9876SPeter Zijlstra	  Compile the kernel with support for the retbleed=unret mitigation.
2516f43b9876SPeter Zijlstra
25175fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING
251880e4c1cdSThomas Gleixner	bool "Mitigate RSB underflow with call depth tracking"
251980e4c1cdSThomas Gleixner	depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS
252080e4c1cdSThomas Gleixner	select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE
252180e4c1cdSThomas Gleixner	select CALL_THUNKS
252280e4c1cdSThomas Gleixner	default y
252380e4c1cdSThomas Gleixner	help
252480e4c1cdSThomas Gleixner	  Compile the kernel with call depth tracking to mitigate the Intel
252586e39b94SBreno Leitao	  SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off
252686e39b94SBreno Leitao	  by default and needs to be enabled on the kernel command line via the
252786e39b94SBreno Leitao	  retbleed=stuff option. For non-affected systems the overhead of this
252886e39b94SBreno Leitao	  option is marginal as the call depth tracking is using run-time
252986e39b94SBreno Leitao	  generated call thunks in a compiler generated padding area and call
253086e39b94SBreno Leitao	  patching. This increases text size by ~5%. For non affected systems
253186e39b94SBreno Leitao	  this space is unused. On affected SKL systems this results in a
253286e39b94SBreno Leitao	  significant performance gain over the IBRS mitigation.
253380e4c1cdSThomas Gleixner
2534e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG
2535e81dc127SThomas Gleixner	bool "Enable call thunks and call depth tracking debugging"
25365fa31af3SBreno Leitao	depends on MITIGATION_CALL_DEPTH_TRACKING
2537e81dc127SThomas Gleixner	select FUNCTION_ALIGNMENT_32B
2538e81dc127SThomas Gleixner	default n
2539e81dc127SThomas Gleixner	help
2540e81dc127SThomas Gleixner	  Enable call/ret counters for imbalance detection and build in
2541e81dc127SThomas Gleixner	  a noisy dmesg about callthunks generation and call patching for
2542e81dc127SThomas Gleixner	  trouble shooting. The debug prints need to be enabled on the
2543e81dc127SThomas Gleixner	  kernel command line with 'debug-callthunks'.
254454628de6SRandy Dunlap	  Only enable this when you are debugging call thunks as this
254554628de6SRandy Dunlap	  creates a noticeable runtime overhead. If unsure say N.
254680e4c1cdSThomas Gleixner
2547e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY
2548f43b9876SPeter Zijlstra	bool "Enable IBPB on kernel entry"
2549b648ab48SBen Hutchings	depends on CPU_SUP_AMD && X86_64
2550f43b9876SPeter Zijlstra	default y
2551f43b9876SPeter Zijlstra	help
2552318e8c33SPatrick Bellasi	  Compile the kernel with support for the retbleed=ibpb and
2553318e8c33SPatrick Bellasi	  spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations.
2554f43b9876SPeter Zijlstra
25551da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY
2556f43b9876SPeter Zijlstra	bool "Enable IBRS on kernel entry"
2557b648ab48SBen Hutchings	depends on CPU_SUP_INTEL && X86_64
2558f43b9876SPeter Zijlstra	default y
2559f43b9876SPeter Zijlstra	help
2560f43b9876SPeter Zijlstra	  Compile the kernel with support for the spectre_v2=ibrs mitigation.
2561f43b9876SPeter Zijlstra	  This mitigates both spectre_v2 and retbleed at great cost to
2562f43b9876SPeter Zijlstra	  performance.
2563f43b9876SPeter Zijlstra
2564a033eec9SBreno Leitaoconfig MITIGATION_SRSO
2565fb3bd914SBorislav Petkov (AMD)	bool "Mitigate speculative RAS overflow on AMD"
25660911b8c5SBreno Leitao	depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK
2567fb3bd914SBorislav Petkov (AMD)	default y
2568fb3bd914SBorislav Petkov (AMD)	help
2569fb3bd914SBorislav Petkov (AMD)	  Enable the SRSO mitigation needed on AMD Zen1-4 machines.
2570fb3bd914SBorislav Petkov (AMD)
25717b75782fSBreno Leitaoconfig MITIGATION_SLS
2572f43b9876SPeter Zijlstra	bool "Mitigate Straight-Line-Speculation"
2573f43b9876SPeter Zijlstra	depends on CC_HAS_SLS && X86_64
2574f43b9876SPeter Zijlstra	select OBJTOOL if HAVE_OBJTOOL
2575f43b9876SPeter Zijlstra	default n
2576f43b9876SPeter Zijlstra	help
2577f43b9876SPeter Zijlstra	  Compile the kernel with straight-line-speculation options to guard
2578f43b9876SPeter Zijlstra	  against straight line speculation. The kernel image might be slightly
2579f43b9876SPeter Zijlstra	  larger.
2580f43b9876SPeter Zijlstra
2581225f2bd0SBreno Leitaoconfig MITIGATION_GDS
2582225f2bd0SBreno Leitao	bool "Mitigate Gather Data Sampling"
2583225f2bd0SBreno Leitao	depends on CPU_SUP_INTEL
2584225f2bd0SBreno Leitao	default y
2585225f2bd0SBreno Leitao	help
2586225f2bd0SBreno Leitao	  Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware
2587225f2bd0SBreno Leitao	  vulnerability which allows unprivileged speculative access to data
2588225f2bd0SBreno Leitao	  which was previously stored in vector registers. The attacker uses gather
2589225f2bd0SBreno Leitao	  instructions to infer the stale vector register data.
2590225f2bd0SBreno Leitao
25918076fcdeSPawan Guptaconfig MITIGATION_RFDS
25928076fcdeSPawan Gupta	bool "RFDS Mitigation"
25938076fcdeSPawan Gupta	depends on CPU_SUP_INTEL
25948076fcdeSPawan Gupta	default y
25958076fcdeSPawan Gupta	help
25968076fcdeSPawan Gupta	  Enable mitigation for Register File Data Sampling (RFDS) by default.
25978076fcdeSPawan Gupta	  RFDS is a hardware vulnerability which affects Intel Atom CPUs. It
25988076fcdeSPawan Gupta	  allows unprivileged speculative access to stale data previously
25998076fcdeSPawan Gupta	  stored in floating point, vector and integer registers.
26008076fcdeSPawan Gupta	  See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst>
26018076fcdeSPawan Gupta
26024f511739SJosh Poimboeufconfig MITIGATION_SPECTRE_BHI
26034f511739SJosh Poimboeuf	bool "Mitigate Spectre-BHB (Branch History Injection)"
2604ec9404e4SPawan Gupta	depends on CPU_SUP_INTEL
26054f511739SJosh Poimboeuf	default y
2606ec9404e4SPawan Gupta	help
2607ec9404e4SPawan Gupta	  Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks
2608ec9404e4SPawan Gupta	  where the branch history buffer is poisoned to speculatively steer
2609ec9404e4SPawan Gupta	  indirect branches.
2610ec9404e4SPawan Gupta	  See <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2611ec9404e4SPawan Gupta
261294045568SBreno Leitaoconfig MITIGATION_MDS
261394045568SBreno Leitao	bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug"
261494045568SBreno Leitao	depends on CPU_SUP_INTEL
261594045568SBreno Leitao	default y
261694045568SBreno Leitao	help
261794045568SBreno Leitao	  Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is
261894045568SBreno Leitao	  a hardware vulnerability which allows unprivileged speculative access
261994045568SBreno Leitao	  to data which is available in various CPU internal buffers.
262094045568SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/mds.rst>
2621b8da0b33SBreno Leitao
2622b8da0b33SBreno Leitaoconfig MITIGATION_TAA
2623b8da0b33SBreno Leitao	bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug"
2624b8da0b33SBreno Leitao	depends on CPU_SUP_INTEL
2625b8da0b33SBreno Leitao	default y
2626b8da0b33SBreno Leitao	help
2627b8da0b33SBreno Leitao	  Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware
2628b8da0b33SBreno Leitao	  vulnerability that allows unprivileged speculative access to data
2629b8da0b33SBreno Leitao	  which is available in various CPU internal buffers by using
2630b8da0b33SBreno Leitao	  asynchronous aborts within an Intel TSX transactional region.
2631b8da0b33SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst>
2632163f9fe6SBreno Leitao
2633163f9fe6SBreno Leitaoconfig MITIGATION_MMIO_STALE_DATA
2634163f9fe6SBreno Leitao	bool "Mitigate MMIO Stale Data hardware bug"
2635163f9fe6SBreno Leitao	depends on CPU_SUP_INTEL
2636163f9fe6SBreno Leitao	default y
2637163f9fe6SBreno Leitao	help
2638163f9fe6SBreno Leitao	  Enable mitigation for MMIO Stale Data hardware bugs.  Processor MMIO
2639163f9fe6SBreno Leitao	  Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO)
2640163f9fe6SBreno Leitao	  vulnerabilities that can expose data. The vulnerabilities require the
2641163f9fe6SBreno Leitao	  attacker to have access to MMIO.
2642163f9fe6SBreno Leitao	  See also
2643163f9fe6SBreno Leitao	  <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst>
26443a4ee4ffSBreno Leitao
26453a4ee4ffSBreno Leitaoconfig MITIGATION_L1TF
26463a4ee4ffSBreno Leitao	bool "Mitigate L1 Terminal Fault (L1TF) hardware bug"
26473a4ee4ffSBreno Leitao	depends on CPU_SUP_INTEL
26483a4ee4ffSBreno Leitao	default y
26493a4ee4ffSBreno Leitao	help
26503a4ee4ffSBreno Leitao	  Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a
26513a4ee4ffSBreno Leitao	  hardware vulnerability which allows unprivileged speculative access to data
26523a4ee4ffSBreno Leitao	  available in the Level 1 Data Cache.
26533a4ee4ffSBreno Leitao	  See <file:Documentation/admin-guide/hw-vuln/l1tf.rst
2654894e2885SBreno Leitao
2655894e2885SBreno Leitaoconfig MITIGATION_RETBLEED
2656894e2885SBreno Leitao	bool "Mitigate RETBleed hardware bug"
2657894e2885SBreno Leitao	depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY
2658894e2885SBreno Leitao	default y
2659894e2885SBreno Leitao	help
2660894e2885SBreno Leitao	  Enable mitigation for RETBleed (Arbitrary Speculative Code Execution
2661894e2885SBreno Leitao	  with Return Instructions) vulnerability.  RETBleed is a speculative
2662894e2885SBreno Leitao	  execution attack which takes advantage of microarchitectural behavior
2663894e2885SBreno Leitao	  in many modern microprocessors, similar to Spectre v2. An
2664894e2885SBreno Leitao	  unprivileged attacker can use these flaws to bypass conventional
2665894e2885SBreno Leitao	  memory security restrictions to gain read access to privileged memory
2666894e2885SBreno Leitao	  that would otherwise be inaccessible.
2667ca01c0d8SBreno Leitao
2668ca01c0d8SBreno Leitaoconfig MITIGATION_SPECTRE_V1
2669ca01c0d8SBreno Leitao	bool "Mitigate SPECTRE V1 hardware bug"
2670ca01c0d8SBreno Leitao	default y
2671ca01c0d8SBreno Leitao	help
2672ca01c0d8SBreno Leitao	  Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a
2673ca01c0d8SBreno Leitao	  class of side channel attacks that takes advantage of speculative
2674ca01c0d8SBreno Leitao	  execution that bypasses conditional branch instructions used for
2675ca01c0d8SBreno Leitao	  memory access bounds check.
2676ca01c0d8SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2677a0b02e3fSBreno Leitao
267872c70f48SBreno Leitaoconfig MITIGATION_SPECTRE_V2
267972c70f48SBreno Leitao	bool "Mitigate SPECTRE V2 hardware bug"
268072c70f48SBreno Leitao	default y
268172c70f48SBreno Leitao	help
268272c70f48SBreno Leitao	  Enable mitigation for Spectre V2 (Branch Target Injection). Spectre
268372c70f48SBreno Leitao	  V2 is a class of side channel attacks that takes advantage of
268472c70f48SBreno Leitao	  indirect branch predictors inside the processor. In Spectre variant 2
268572c70f48SBreno Leitao	  attacks, the attacker can steer speculative indirect branches in the
268672c70f48SBreno Leitao	  victim to gadget code by poisoning the branch target buffer of a CPU
268772c70f48SBreno Leitao	  used for predicting indirect branch addresses.
268872c70f48SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
268972c70f48SBreno Leitao
2690a0b02e3fSBreno Leitaoconfig MITIGATION_SRBDS
2691a0b02e3fSBreno Leitao	bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug"
2692a0b02e3fSBreno Leitao	depends on CPU_SUP_INTEL
2693a0b02e3fSBreno Leitao	default y
2694a0b02e3fSBreno Leitao	help
2695a0b02e3fSBreno Leitao	  Enable mitigation for Special Register Buffer Data Sampling (SRBDS).
2696a0b02e3fSBreno Leitao	  SRBDS is a hardware vulnerability that allows Microarchitectural Data
2697a0b02e3fSBreno Leitao	  Sampling (MDS) techniques to infer values returned from special
2698a0b02e3fSBreno Leitao	  register accesses. An unprivileged user can extract values returned
2699a0b02e3fSBreno Leitao	  from RDRAND and RDSEED executed on another core or sibling thread
2700a0b02e3fSBreno Leitao	  using MDS techniques.
2701a0b02e3fSBreno Leitao	  See also
2702a0b02e3fSBreno Leitao	  <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst>
2703b908cdabSBreno Leitao
2704b908cdabSBreno Leitaoconfig MITIGATION_SSB
2705b908cdabSBreno Leitao	bool "Mitigate Speculative Store Bypass (SSB) hardware bug"
2706b908cdabSBreno Leitao	default y
2707b908cdabSBreno Leitao	help
2708b908cdabSBreno Leitao	  Enable mitigation for Speculative Store Bypass (SSB). SSB is a
2709b908cdabSBreno Leitao	  hardware security vulnerability and its exploitation takes advantage
2710b908cdabSBreno Leitao	  of speculative execution in a similar way to the Meltdown and Spectre
2711b908cdabSBreno Leitao	  security vulnerabilities.
2712b908cdabSBreno Leitao
27138754e67aSPawan Guptaconfig MITIGATION_ITS
27148754e67aSPawan Gupta	bool "Enable Indirect Target Selection mitigation"
27158754e67aSPawan Gupta	depends on CPU_SUP_INTEL && X86_64
27168754e67aSPawan Gupta	depends on MITIGATION_RETPOLINE && MITIGATION_RETHUNK
2717*872df34dSPeter Zijlstra	select EXECMEM
27188754e67aSPawan Gupta	default y
27198754e67aSPawan Gupta	help
27208754e67aSPawan Gupta	  Enable Indirect Target Selection (ITS) mitigation. ITS is a bug in
27218754e67aSPawan Gupta	  BPU on some Intel CPUs that may allow Spectre V2 style attacks. If
27228754e67aSPawan Gupta	  disabled, mitigation cannot be enabled via cmdline.
27238754e67aSPawan Gupta	  See <file:Documentation/admin-guide/hw-vuln/indirect-target-selection.rst>
27248754e67aSPawan Gupta
2725f43b9876SPeter Zijlstraendif
2726f43b9876SPeter Zijlstra
27273072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES
27283072e413SMichal Hocko	def_bool y
27295c11f00bSDavid Hildenbrand	depends on ARCH_ENABLE_MEMORY_HOTPLUG
27303072e413SMichal Hocko
2731da85f865SBjorn Helgaasmenu "Power management and ACPI options"
2732e279b6c1SSam Ravnborg
2733e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER
27343c2362e6SHarvey Harrison	def_bool y
273544556530SZhimin Gu	depends on HIBERNATION
2736e279b6c1SSam Ravnborg
2737e279b6c1SSam Ravnborgsource "kernel/power/Kconfig"
2738e279b6c1SSam Ravnborg
2739e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig"
2740e279b6c1SSam Ravnborg
2741a6b68076SAndi Kleenconfig X86_APM_BOOT
27426fc108a0SJan Beulich	def_bool y
2743282e5aabSPaul Bolle	depends on APM
2744a6b68076SAndi Kleen
2745e279b6c1SSam Ravnborgmenuconfig APM
2746e279b6c1SSam Ravnborg	tristate "APM (Advanced Power Management) BIOS support"
2747efefa6f6SIngo Molnar	depends on X86_32 && PM_SLEEP
2748a7f7f624SMasahiro Yamada	help
2749e279b6c1SSam Ravnborg	  APM is a BIOS specification for saving power using several different
2750e279b6c1SSam Ravnborg	  techniques. This is mostly useful for battery powered laptops with
2751e279b6c1SSam Ravnborg	  APM compliant BIOSes. If you say Y here, the system time will be
2752e279b6c1SSam Ravnborg	  reset after a RESUME operation, the /proc/apm device will provide
2753e279b6c1SSam Ravnborg	  battery status information, and user-space programs will receive
2754e279b6c1SSam Ravnborg	  notification of APM "events" (e.g. battery status change).
2755e279b6c1SSam Ravnborg
2756e279b6c1SSam Ravnborg	  If you select "Y" here, you can disable actual use of the APM
2757e279b6c1SSam Ravnborg	  BIOS by passing the "apm=off" option to the kernel at boot time.
2758e279b6c1SSam Ravnborg
2759e279b6c1SSam Ravnborg	  Note that the APM support is almost completely disabled for
2760e279b6c1SSam Ravnborg	  machines with more than one CPU.
2761e279b6c1SSam Ravnborg
2762e279b6c1SSam Ravnborg	  In order to use APM, you will need supporting software. For location
2763151f4e2bSMauro Carvalho Chehab	  and more information, read <file:Documentation/power/apm-acpi.rst>
27642dc98fd3SMichael Witten	  and the Battery Powered Linux mini-HOWTO, available from
2765e279b6c1SSam Ravnborg	  <http://www.tldp.org/docs.html#howto>.
2766e279b6c1SSam Ravnborg
2767e279b6c1SSam Ravnborg	  This driver does not spin down disk drives (see the hdparm(8)
2768e279b6c1SSam Ravnborg	  manpage ("man 8 hdparm") for that), and it doesn't turn off
2769e279b6c1SSam Ravnborg	  VESA-compliant "green" monitors.
2770e279b6c1SSam Ravnborg
2771e279b6c1SSam Ravnborg	  This driver does not support the TI 4000M TravelMate and the ACER
2772e279b6c1SSam Ravnborg	  486/DX4/75 because they don't have compliant BIOSes. Many "green"
2773e279b6c1SSam Ravnborg	  desktop machines also don't have compliant BIOSes, and this driver
2774e279b6c1SSam Ravnborg	  may cause those machines to panic during the boot phase.
2775e279b6c1SSam Ravnborg
2776e279b6c1SSam Ravnborg	  Generally, if you don't have a battery in your machine, there isn't
2777e279b6c1SSam Ravnborg	  much point in using this driver and you should say N. If you get
2778e279b6c1SSam Ravnborg	  random kernel OOPSes or reboots that don't seem to be related to
2779e279b6c1SSam Ravnborg	  anything, try disabling/enabling this option (or disabling/enabling
2780e279b6c1SSam Ravnborg	  APM in your BIOS).
2781e279b6c1SSam Ravnborg
2782e279b6c1SSam Ravnborg	  Some other things you should try when experiencing seemingly random,
2783e279b6c1SSam Ravnborg	  "weird" problems:
2784e279b6c1SSam Ravnborg
2785e279b6c1SSam Ravnborg	  1) make sure that you have enough swap space and that it is
2786e279b6c1SSam Ravnborg	  enabled.
27877987448fSStephen Kitt	  2) pass the "idle=poll" option to the kernel
2788e279b6c1SSam Ravnborg	  3) switch on floating point emulation in the kernel and pass
2789e279b6c1SSam Ravnborg	  the "no387" option to the kernel
2790e279b6c1SSam Ravnborg	  4) pass the "floppy=nodma" option to the kernel
2791e279b6c1SSam Ravnborg	  5) pass the "mem=4M" option to the kernel (thereby disabling
2792e279b6c1SSam Ravnborg	  all but the first 4 MB of RAM)
2793e279b6c1SSam Ravnborg	  6) make sure that the CPU is not over clocked.
2794e279b6c1SSam Ravnborg	  7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/>
2795e279b6c1SSam Ravnborg	  8) disable the cache from your BIOS settings
2796e279b6c1SSam Ravnborg	  9) install a fan for the video card or exchange video RAM
2797e279b6c1SSam Ravnborg	  10) install a better fan for the CPU
2798e279b6c1SSam Ravnborg	  11) exchange RAM chips
2799e279b6c1SSam Ravnborg	  12) exchange the motherboard.
2800e279b6c1SSam Ravnborg
2801e279b6c1SSam Ravnborg	  To compile this driver as a module, choose M here: the
2802e279b6c1SSam Ravnborg	  module will be called apm.
2803e279b6c1SSam Ravnborg
2804e279b6c1SSam Ravnborgif APM
2805e279b6c1SSam Ravnborg
2806e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND
2807e279b6c1SSam Ravnborg	bool "Ignore USER SUSPEND"
2808a7f7f624SMasahiro Yamada	help
2809e279b6c1SSam Ravnborg	  This option will ignore USER SUSPEND requests. On machines with a
2810e279b6c1SSam Ravnborg	  compliant APM BIOS, you want to say N. However, on the NEC Versa M
2811e279b6c1SSam Ravnborg	  series notebooks, it is necessary to say Y because of a BIOS bug.
2812e279b6c1SSam Ravnborg
2813e279b6c1SSam Ravnborgconfig APM_DO_ENABLE
2814e279b6c1SSam Ravnborg	bool "Enable PM at boot time"
2815a7f7f624SMasahiro Yamada	help
2816e279b6c1SSam Ravnborg	  Enable APM features at boot time. From page 36 of the APM BIOS
2817e279b6c1SSam Ravnborg	  specification: "When disabled, the APM BIOS does not automatically
2818e279b6c1SSam Ravnborg	  power manage devices, enter the Standby State, enter the Suspend
2819e279b6c1SSam Ravnborg	  State, or take power saving steps in response to CPU Idle calls."
2820e279b6c1SSam Ravnborg	  This driver will make CPU Idle calls when Linux is idle (unless this
2821e279b6c1SSam Ravnborg	  feature is turned off -- see "Do CPU IDLE calls", below). This
2822e279b6c1SSam Ravnborg	  should always save battery power, but more complicated APM features
2823e279b6c1SSam Ravnborg	  will be dependent on your BIOS implementation. You may need to turn
2824e279b6c1SSam Ravnborg	  this option off if your computer hangs at boot time when using APM
2825e279b6c1SSam Ravnborg	  support, or if it beeps continuously instead of suspending. Turn
2826e279b6c1SSam Ravnborg	  this off if you have a NEC UltraLite Versa 33/C or a Toshiba
2827e279b6c1SSam Ravnborg	  T400CDT. This is off by default since most machines do fine without
2828e279b6c1SSam Ravnborg	  this feature.
2829e279b6c1SSam Ravnborg
2830e279b6c1SSam Ravnborgconfig APM_CPU_IDLE
2831dd8af076SLen Brown	depends on CPU_IDLE
2832e279b6c1SSam Ravnborg	bool "Make CPU Idle calls when idle"
2833a7f7f624SMasahiro Yamada	help
2834e279b6c1SSam Ravnborg	  Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
2835e279b6c1SSam Ravnborg	  On some machines, this can activate improved power savings, such as
2836e279b6c1SSam Ravnborg	  a slowed CPU clock rate, when the machine is idle. These idle calls
2837e279b6c1SSam Ravnborg	  are made after the idle loop has run for some length of time (e.g.,
2838e279b6c1SSam Ravnborg	  333 mS). On some machines, this will cause a hang at boot time or
2839e279b6c1SSam Ravnborg	  whenever the CPU becomes idle. (On machines with more than one CPU,
2840e279b6c1SSam Ravnborg	  this option does nothing.)
2841e279b6c1SSam Ravnborg
2842e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK
2843e279b6c1SSam Ravnborg	bool "Enable console blanking using APM"
2844a7f7f624SMasahiro Yamada	help
2845e279b6c1SSam Ravnborg	  Enable console blanking using the APM. Some laptops can use this to
2846e279b6c1SSam Ravnborg	  turn off the LCD backlight when the screen blanker of the Linux
2847e279b6c1SSam Ravnborg	  virtual console blanks the screen. Note that this is only used by
2848e279b6c1SSam Ravnborg	  the virtual console screen blanker, and won't turn off the backlight
2849e279b6c1SSam Ravnborg	  when using the X Window system. This also doesn't have anything to
2850e279b6c1SSam Ravnborg	  do with your VESA-compliant power-saving monitor. Further, this
2851e279b6c1SSam Ravnborg	  option doesn't work for all laptops -- it might not turn off your
2852e279b6c1SSam Ravnborg	  backlight at all, or it might print a lot of errors to the console,
2853e279b6c1SSam Ravnborg	  especially if you are using gpm.
2854e279b6c1SSam Ravnborg
2855e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS
2856e279b6c1SSam Ravnborg	bool "Allow interrupts during APM BIOS calls"
2857a7f7f624SMasahiro Yamada	help
2858e279b6c1SSam Ravnborg	  Normally we disable external interrupts while we are making calls to
2859e279b6c1SSam Ravnborg	  the APM BIOS as a measure to lessen the effects of a badly behaving
2860e279b6c1SSam Ravnborg	  BIOS implementation.  The BIOS should reenable interrupts if it
2861e279b6c1SSam Ravnborg	  needs to.  Unfortunately, some BIOSes do not -- especially those in
2862e279b6c1SSam Ravnborg	  many of the newer IBM Thinkpads.  If you experience hangs when you
2863e279b6c1SSam Ravnborg	  suspend, try setting this to Y.  Otherwise, say N.
2864e279b6c1SSam Ravnborg
2865e279b6c1SSam Ravnborgendif # APM
2866e279b6c1SSam Ravnborg
2867bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig"
2868e279b6c1SSam Ravnborg
2869e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig"
2870e279b6c1SSam Ravnborg
287127471fdbSAndy Henroidsource "drivers/idle/Kconfig"
287227471fdbSAndy Henroid
2873e279b6c1SSam Ravnborgendmenu
2874e279b6c1SSam Ravnborg
2875e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)"
2876e279b6c1SSam Ravnborg
2877e279b6c1SSam Ravnborgchoice
2878e279b6c1SSam Ravnborg	prompt "PCI access mode"
2879efefa6f6SIngo Molnar	depends on X86_32 && PCI
2880e279b6c1SSam Ravnborg	default PCI_GOANY
2881a7f7f624SMasahiro Yamada	help
2882e279b6c1SSam Ravnborg	  On PCI systems, the BIOS can be used to detect the PCI devices and
2883e279b6c1SSam Ravnborg	  determine their configuration. However, some old PCI motherboards
2884e279b6c1SSam Ravnborg	  have BIOS bugs and may crash if this is done. Also, some embedded
2885e279b6c1SSam Ravnborg	  PCI-based systems don't have any BIOS at all. Linux can also try to
2886e279b6c1SSam Ravnborg	  detect the PCI hardware directly without using the BIOS.
2887e279b6c1SSam Ravnborg
2888e279b6c1SSam Ravnborg	  With this option, you can specify how Linux should detect the
2889e279b6c1SSam Ravnborg	  PCI devices. If you choose "BIOS", the BIOS will be used,
2890e279b6c1SSam Ravnborg	  if you choose "Direct", the BIOS won't be used, and if you
2891e279b6c1SSam Ravnborg	  choose "MMConfig", then PCI Express MMCONFIG will be used.
2892e279b6c1SSam Ravnborg	  If you choose "Any", the kernel will try MMCONFIG, then the
2893e279b6c1SSam Ravnborg	  direct access method and falls back to the BIOS if that doesn't
2894e279b6c1SSam Ravnborg	  work. If unsure, go with the default, which is "Any".
2895e279b6c1SSam Ravnborg
2896e279b6c1SSam Ravnborgconfig PCI_GOBIOS
2897e279b6c1SSam Ravnborg	bool "BIOS"
2898e279b6c1SSam Ravnborg
2899e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG
2900e279b6c1SSam Ravnborg	bool "MMConfig"
2901e279b6c1SSam Ravnborg
2902e279b6c1SSam Ravnborgconfig PCI_GODIRECT
2903e279b6c1SSam Ravnborg	bool "Direct"
2904e279b6c1SSam Ravnborg
29053ef0e1f8SAndres Salomonconfig PCI_GOOLPC
290676fb6570SDaniel Drake	bool "OLPC XO-1"
29073ef0e1f8SAndres Salomon	depends on OLPC
29083ef0e1f8SAndres Salomon
29092bdd1b03SAndres Salomonconfig PCI_GOANY
29102bdd1b03SAndres Salomon	bool "Any"
29112bdd1b03SAndres Salomon
2912e279b6c1SSam Ravnborgendchoice
2913e279b6c1SSam Ravnborg
2914e279b6c1SSam Ravnborgconfig PCI_BIOS
29153c2362e6SHarvey Harrison	def_bool y
2916efefa6f6SIngo Molnar	depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY)
2917e279b6c1SSam Ravnborg
2918e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct.
2919e279b6c1SSam Ravnborgconfig PCI_DIRECT
29203c2362e6SHarvey Harrison	def_bool y
29210aba496fSShaohua Li	depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG))
2922e279b6c1SSam Ravnborg
2923e279b6c1SSam Ravnborgconfig PCI_MMCONFIG
2924b45c9f36SJan Kiszka	bool "Support mmconfig PCI config space access" if X86_64
2925b45c9f36SJan Kiszka	default y
29264590d98fSAndy Shevchenko	depends on PCI && (ACPI || JAILHOUSE_GUEST)
2927b45c9f36SJan Kiszka	depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG)
292821d8fb8dSMateusz Jończyk	help
292921d8fb8dSMateusz Jończyk	  Add support for accessing the PCI configuration space as a memory
293021d8fb8dSMateusz Jończyk	  mapped area. It is the recommended method if the system supports
293121d8fb8dSMateusz Jończyk	  this (it must have PCI Express and ACPI for it to be available).
293221d8fb8dSMateusz Jończyk
293321d8fb8dSMateusz Jończyk	  In the unlikely case that enabling this configuration option causes
293421d8fb8dSMateusz Jończyk	  problems, the mechanism can be switched off with the 'pci=nommconf'
293521d8fb8dSMateusz Jończyk	  command line parameter.
293621d8fb8dSMateusz Jończyk
293721d8fb8dSMateusz Jończyk	  Say N only if you are sure that your platform does not support this
293821d8fb8dSMateusz Jończyk	  access method or you have problems caused by it.
293921d8fb8dSMateusz Jończyk
294021d8fb8dSMateusz Jończyk	  Say Y otherwise.
2941e279b6c1SSam Ravnborg
29423ef0e1f8SAndres Salomonconfig PCI_OLPC
29432bdd1b03SAndres Salomon	def_bool y
29442bdd1b03SAndres Salomon	depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY)
29453ef0e1f8SAndres Salomon
2946b5401a96SAlex Nixonconfig PCI_XEN
2947b5401a96SAlex Nixon	def_bool y
2948b5401a96SAlex Nixon	depends on PCI && XEN
2949b5401a96SAlex Nixon
29508364e1f8SJan Kiszkaconfig MMCONF_FAM10H
29518364e1f8SJan Kiszka	def_bool y
29528364e1f8SJan Kiszka	depends on X86_64 && PCI_MMCONFIG && ACPI
2953e279b6c1SSam Ravnborg
29543f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK
2955d9f87802SMateusz Jończyk	bool "Read PCI host bridge windows from the CNB20LE chipset" if EXPERT
2956d9f87802SMateusz Jończyk	depends on X86_32 && PCI
29573f6ea84aSIra W. Snyder	help
29583f6ea84aSIra W. Snyder	  Read the PCI windows out of the CNB20LE host bridge. This allows
29593f6ea84aSIra W. Snyder	  PCI hotplug to work on systems with the CNB20LE chipset which do
29603f6ea84aSIra W. Snyder	  not have ACPI.
29613f6ea84aSIra W. Snyder
2962d9f87802SMateusz Jończyk	  The ServerWorks (later Broadcom) CNB20LE was a chipset designed
2963d9f87802SMateusz Jończyk	  most probably only for Pentium III.
2964d9f87802SMateusz Jończyk
2965d9f87802SMateusz Jończyk	  To find out if you have such a chipset, search for a PCI device with
2966d9f87802SMateusz Jończyk	  1166:0009 PCI IDs, for example by executing
2967d9f87802SMateusz Jończyk		lspci -nn | grep '1166:0009'
2968d9f87802SMateusz Jończyk	  The code is inactive if there is none.
2969d9f87802SMateusz Jończyk
297064a5fed6SBjorn Helgaas	  There's no public spec for this chipset, and this functionality
297164a5fed6SBjorn Helgaas	  is known to be incomplete.
297264a5fed6SBjorn Helgaas
297364a5fed6SBjorn Helgaas	  You should say N unless you know you need this.
297464a5fed6SBjorn Helgaas
29753a495511SWilliam Breathitt Grayconfig ISA_BUS
297617a2a129SWilliam Breathitt Gray	bool "ISA bus support on modern systems" if EXPERT
29773a495511SWilliam Breathitt Gray	help
297817a2a129SWilliam Breathitt Gray	  Expose ISA bus device drivers and options available for selection and
297917a2a129SWilliam Breathitt Gray	  configuration. Enable this option if your target machine has an ISA
298017a2a129SWilliam Breathitt Gray	  bus. ISA is an older system, displaced by PCI and newer bus
298117a2a129SWilliam Breathitt Gray	  architectures -- if your target machine is modern, it probably does
298217a2a129SWilliam Breathitt Gray	  not have an ISA bus.
29833a495511SWilliam Breathitt Gray
29843a495511SWilliam Breathitt Gray	  If unsure, say N.
29853a495511SWilliam Breathitt Gray
29861c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA.
2987e279b6c1SSam Ravnborgconfig ISA_DMA_API
29881c00f016SDavid Rientjes	bool "ISA-style DMA support" if (X86_64 && EXPERT)
29891c00f016SDavid Rientjes	default y
29901c00f016SDavid Rientjes	help
29911c00f016SDavid Rientjes	  Enables ISA-style DMA support for devices requiring such controllers.
29921c00f016SDavid Rientjes	  If unsure, say Y.
2993e279b6c1SSam Ravnborg
299451e68d05SLinus Torvaldsif X86_32
299551e68d05SLinus Torvalds
2996e279b6c1SSam Ravnborgconfig ISA
2997e279b6c1SSam Ravnborg	bool "ISA support"
2998a7f7f624SMasahiro Yamada	help
2999e279b6c1SSam Ravnborg	  Find out whether you have ISA slots on your motherboard.  ISA is the
3000e279b6c1SSam Ravnborg	  name of a bus system, i.e. the way the CPU talks to the other stuff
3001e279b6c1SSam Ravnborg	  inside your box.  Other bus systems are PCI, EISA, MicroChannel
3002e279b6c1SSam Ravnborg	  (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
3003e279b6c1SSam Ravnborg	  newer boards don't support it.  If you have ISA, say Y, otherwise N.
3004e279b6c1SSam Ravnborg
3005e279b6c1SSam Ravnborgconfig SCx200
3006e279b6c1SSam Ravnborg	tristate "NatSemi SCx200 support"
3007a7f7f624SMasahiro Yamada	help
3008e279b6c1SSam Ravnborg	  This provides basic support for National Semiconductor's
3009e279b6c1SSam Ravnborg	  (now AMD's) Geode processors.  The driver probes for the
3010e279b6c1SSam Ravnborg	  PCI-IDs of several on-chip devices, so its a good dependency
3011e279b6c1SSam Ravnborg	  for other scx200_* drivers.
3012e279b6c1SSam Ravnborg
3013e279b6c1SSam Ravnborg	  If compiled as a module, the driver is named scx200.
3014e279b6c1SSam Ravnborg
3015e279b6c1SSam Ravnborgconfig SCx200HR_TIMER
3016e279b6c1SSam Ravnborg	tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
3017592913ecSJohn Stultz	depends on SCx200
3018e279b6c1SSam Ravnborg	default y
3019a7f7f624SMasahiro Yamada	help
3020e279b6c1SSam Ravnborg	  This driver provides a clocksource built upon the on-chip
3021e279b6c1SSam Ravnborg	  27MHz high-resolution timer.  Its also a workaround for
3022e279b6c1SSam Ravnborg	  NSC Geode SC-1100's buggy TSC, which loses time when the
3023e279b6c1SSam Ravnborg	  processor goes idle (as is done by the scheduler).  The
3024e279b6c1SSam Ravnborg	  other workaround is idle=poll boot option.
3025e279b6c1SSam Ravnborg
30263ef0e1f8SAndres Salomonconfig OLPC
30273ef0e1f8SAndres Salomon	bool "One Laptop Per Child support"
302854008979SThomas Gleixner	depends on !X86_PAE
30293c554946SAndres Salomon	select GPIOLIB
3030dc3119e7SThomas Gleixner	select OF
303145bb1674SDaniel Drake	select OF_PROMTREE
3032b4e51854SGrant Likely	select IRQ_DOMAIN
30330c3d931bSLubomir Rintel	select OLPC_EC
3034a7f7f624SMasahiro Yamada	help
30353ef0e1f8SAndres Salomon	  Add support for detecting the unique features of the OLPC
30363ef0e1f8SAndres Salomon	  XO hardware.
30373ef0e1f8SAndres Salomon
3038a3128588SDaniel Drakeconfig OLPC_XO1_PM
3039a3128588SDaniel Drake	bool "OLPC XO-1 Power Management"
3040fa112cf1SBorislav Petkov	depends on OLPC && MFD_CS5535=y && PM_SLEEP
3041a7f7f624SMasahiro Yamada	help
304297c4cb71SDaniel Drake	  Add support for poweroff and suspend of the OLPC XO-1 laptop.
3043bf1ebf00SDaniel Drake
3044cfee9597SDaniel Drakeconfig OLPC_XO1_RTC
3045cfee9597SDaniel Drake	bool "OLPC XO-1 Real Time Clock"
3046cfee9597SDaniel Drake	depends on OLPC_XO1_PM && RTC_DRV_CMOS
3047a7f7f624SMasahiro Yamada	help
3048cfee9597SDaniel Drake	  Add support for the XO-1 real time clock, which can be used as a
3049cfee9597SDaniel Drake	  programmable wakeup source.
3050cfee9597SDaniel Drake
30517feda8e9SDaniel Drakeconfig OLPC_XO1_SCI
30527feda8e9SDaniel Drake	bool "OLPC XO-1 SCI extras"
305392e830f2SArnd Bergmann	depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y
3054ed8e47feSRandy Dunlap	depends on INPUT=y
3055d8d01a63SDaniel Drake	select POWER_SUPPLY
3056a7f7f624SMasahiro Yamada	help
30577feda8e9SDaniel Drake	  Add support for SCI-based features of the OLPC XO-1 laptop:
30587bc74b3dSDaniel Drake	   - EC-driven system wakeups
30597feda8e9SDaniel Drake	   - Power button
30607bc74b3dSDaniel Drake	   - Ebook switch
30612cf2baeaSDaniel Drake	   - Lid switch
3062e1040ac6SDaniel Drake	   - AC adapter status updates
3063e1040ac6SDaniel Drake	   - Battery status updates
30647feda8e9SDaniel Drake
3065a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI
3066a0f30f59SDaniel Drake	bool "OLPC XO-1.5 SCI extras"
3067d8d01a63SDaniel Drake	depends on OLPC && ACPI
3068d8d01a63SDaniel Drake	select POWER_SUPPLY
3069a7f7f624SMasahiro Yamada	help
3070a0f30f59SDaniel Drake	  Add support for SCI-based features of the OLPC XO-1.5 laptop:
3071a0f30f59SDaniel Drake	   - EC-driven system wakeups
3072a0f30f59SDaniel Drake	   - AC adapter status updates
3073a0f30f59SDaniel Drake	   - Battery status updates
3074e279b6c1SSam Ravnborg
3075298c9babSDmitry Torokhovconfig GEODE_COMMON
3076298c9babSDmitry Torokhov	bool
3077298c9babSDmitry Torokhov
3078d4f3e350SEd Wildgooseconfig ALIX
3079d4f3e350SEd Wildgoose	bool "PCEngines ALIX System Support (LED setup)"
3080d4f3e350SEd Wildgoose	select GPIOLIB
3081298c9babSDmitry Torokhov	select GEODE_COMMON
3082a7f7f624SMasahiro Yamada	help
3083d4f3e350SEd Wildgoose	  This option enables system support for the PCEngines ALIX.
3084d4f3e350SEd Wildgoose	  At present this just sets up LEDs for GPIO control on
3085d4f3e350SEd Wildgoose	  ALIX2/3/6 boards.  However, other system specific setup should
3086d4f3e350SEd Wildgoose	  get added here.
3087d4f3e350SEd Wildgoose
3088d4f3e350SEd Wildgoose	  Note: You must still enable the drivers for GPIO and LED support
3089d4f3e350SEd Wildgoose	  (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs
3090d4f3e350SEd Wildgoose
3091d4f3e350SEd Wildgoose	  Note: You have to set alix.force=1 for boards with Award BIOS.
3092d4f3e350SEd Wildgoose
3093da4e3302SPhilip Prindevilleconfig NET5501
3094da4e3302SPhilip Prindeville	bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)"
3095da4e3302SPhilip Prindeville	select GPIOLIB
3096298c9babSDmitry Torokhov	select GEODE_COMMON
3097a7f7f624SMasahiro Yamada	help
3098da4e3302SPhilip Prindeville	  This option enables system support for the Soekris Engineering net5501.
3099da4e3302SPhilip Prindeville
31003197059aSPhilip A. Prindevilleconfig GEOS
31013197059aSPhilip A. Prindeville	bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)"
31023197059aSPhilip A. Prindeville	select GPIOLIB
3103298c9babSDmitry Torokhov	select GEODE_COMMON
31043197059aSPhilip A. Prindeville	depends on DMI
3105a7f7f624SMasahiro Yamada	help
31063197059aSPhilip A. Prindeville	  This option enables system support for the Traverse Technologies GEOS.
31073197059aSPhilip A. Prindeville
31087d029125SVivien Didelotconfig TS5500
31097d029125SVivien Didelot	bool "Technologic Systems TS-5500 platform support"
31107d029125SVivien Didelot	depends on MELAN
31117d029125SVivien Didelot	select CHECK_SIGNATURE
31127d029125SVivien Didelot	select NEW_LEDS
31137d029125SVivien Didelot	select LEDS_CLASS
3114a7f7f624SMasahiro Yamada	help
31157d029125SVivien Didelot	  This option enables system support for the Technologic Systems TS-5500.
31167d029125SVivien Didelot
3117e279b6c1SSam Ravnborgendif # X86_32
3118e279b6c1SSam Ravnborg
311923ac4ae8SAndreas Herrmannconfig AMD_NB
3120e279b6c1SSam Ravnborg	def_bool y
3121e6e6e5e8SYazen Ghannam	depends on AMD_NODE
3122e6e6e5e8SYazen Ghannam
3123e6e6e5e8SYazen Ghannamconfig AMD_NODE
3124e6e6e5e8SYazen Ghannam	def_bool y
31250e152cd7SBorislav Petkov	depends on CPU_SUP_AMD && PCI
3126e279b6c1SSam Ravnborg
3127e279b6c1SSam Ravnborgendmenu
3128e279b6c1SSam Ravnborg
31291572497cSChristoph Hellwigmenu "Binary Emulations"
3130e279b6c1SSam Ravnborg
3131e279b6c1SSam Ravnborgconfig IA32_EMULATION
3132e279b6c1SSam Ravnborg	bool "IA32 Emulation"
3133e279b6c1SSam Ravnborg	depends on X86_64
313439f88911SIngo Molnar	select ARCH_WANT_OLD_COMPAT_IPC
3135d1603990SRandy Dunlap	select BINFMT_ELF
313639f88911SIngo Molnar	select COMPAT_OLD_SIGACTION
3137a7f7f624SMasahiro Yamada	help
31385fd92e65SH. J. Lu	  Include code to run legacy 32-bit programs under a
31395fd92e65SH. J. Lu	  64-bit kernel. You should likely turn this on, unless you're
31405fd92e65SH. J. Lu	  100% sure that you don't have any 32-bit programs left.
3141e279b6c1SSam Ravnborg
3142a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED
3143a11e0975SNikolay Borisov	bool "IA32 emulation disabled by default"
3144a11e0975SNikolay Borisov	default n
3145a11e0975SNikolay Borisov	depends on IA32_EMULATION
3146a11e0975SNikolay Borisov	help
3147a11e0975SNikolay Borisov	  Make IA32 emulation disabled by default. This prevents loading 32-bit
3148a11e0975SNikolay Borisov	  processes and access to 32-bit syscalls. If unsure, leave it to its
3149a11e0975SNikolay Borisov	  default value.
3150a11e0975SNikolay Borisov
315183a44a4fSMasahiro Yamadaconfig X86_X32_ABI
31526ea30386SKees Cook	bool "x32 ABI for 64-bit mode"
31539b54050bSBrian Gerst	depends on X86_64
3154aaeed6ecSNathan Chancellor	# llvm-objcopy does not convert x86_64 .note.gnu.property or
3155aaeed6ecSNathan Chancellor	# compressed debug sections to x86_x32 properly:
3156aaeed6ecSNathan Chancellor	# https://github.com/ClangBuiltLinux/linux/issues/514
3157aaeed6ecSNathan Chancellor	# https://github.com/ClangBuiltLinux/linux/issues/1141
3158aaeed6ecSNathan Chancellor	depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm)
3159a7f7f624SMasahiro Yamada	help
31605fd92e65SH. J. Lu	  Include code to run binaries for the x32 native 32-bit ABI
31615fd92e65SH. J. Lu	  for 64-bit processors.  An x32 process gets access to the
31625fd92e65SH. J. Lu	  full 64-bit register file and wide data path while leaving
31635fd92e65SH. J. Lu	  pointers at 32 bits for smaller memory footprint.
31645fd92e65SH. J. Lu
3165953fee1dSIngo Molnarconfig COMPAT_32
3166953fee1dSIngo Molnar	def_bool y
3167953fee1dSIngo Molnar	depends on IA32_EMULATION || X86_32
3168953fee1dSIngo Molnar	select HAVE_UID16
3169953fee1dSIngo Molnar	select OLD_SIGSUSPEND3
3170953fee1dSIngo Molnar
3171e279b6c1SSam Ravnborgconfig COMPAT
31723c2362e6SHarvey Harrison	def_bool y
317383a44a4fSMasahiro Yamada	depends on IA32_EMULATION || X86_X32_ABI
3174e279b6c1SSam Ravnborg
3175e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT
31763120e25eSJan Beulich	def_bool y
3177a9251280SLinus Torvalds	depends on COMPAT
3178ee009e4aSDavid Howells
3179e279b6c1SSam Ravnborgendmenu
3180e279b6c1SSam Ravnborg
3181e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP
3182e5beae16SKeith Packard	def_bool y
3183e5beae16SKeith Packard	depends on X86_32
3184e5beae16SKeith Packard
3185edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig"
31865e8ebd84SJason A. Donenfeld
31873d37d939SH. Peter Anvin (Intel)source "arch/x86/Kconfig.cpufeatures"
31883d37d939SH. Peter Anvin (Intel)
31895e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler"
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