1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 2daa93fabSSam Ravnborg# Select 32 or 64 bit 3daa93fabSSam Ravnborgconfig 64BIT 4104daea1SMasahiro Yamada bool "64-bit kernel" if "$(ARCH)" = "x86" 5104daea1SMasahiro Yamada default "$(ARCH)" != "i386" 6a7f7f624SMasahiro Yamada help 7daa93fabSSam Ravnborg Say yes to build a 64-bit kernel - formerly known as x86_64 8daa93fabSSam Ravnborg Say no to build a 32-bit kernel - formerly known as i386 9daa93fabSSam Ravnborg 10daa93fabSSam Ravnborgconfig X86_32 113120e25eSJan Beulich def_bool y 123120e25eSJan Beulich depends on !64BIT 13341c787eSIngo Molnar # Options that are inherently 32-bit kernel only: 14341c787eSIngo Molnar select ARCH_WANT_IPC_PARSE_VERSION 15341c787eSIngo Molnar select CLKSRC_I8253 16341c787eSIngo Molnar select CLONE_BACKWARDS 17157e118bSThomas Gleixner select GENERIC_VDSO_32 18117ed454SThomas Gleixner select HAVE_DEBUG_STACKOVERFLOW 19157e118bSThomas Gleixner select KMAP_LOCAL 20341c787eSIngo Molnar select MODULES_USE_ELF_REL 21341c787eSIngo Molnar select OLD_SIGACTION 222ca408d9SBrian Gerst select ARCH_SPLIT_ARG64 23daa93fabSSam Ravnborg 24daa93fabSSam Ravnborgconfig X86_64 253120e25eSJan Beulich def_bool y 263120e25eSJan Beulich depends on 64BIT 27d94e0685SIngo Molnar # Options that are inherently 64-bit kernel only: 284eb0716eSAlexandre Ghiti select ARCH_HAS_GIGANTIC_PAGE 29c12d3362SArd Biesheuvel select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 300bff0aaeSSuren Baghdasaryan select ARCH_SUPPORTS_PER_VMA_LOCK 3175182022SPeter Xu select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 32d94e0685SIngo Molnar select HAVE_ARCH_SOFT_DIRTY 33d94e0685SIngo Molnar select MODULES_USE_ELF_RELA 34f616ab59SChristoph Hellwig select NEED_DMA_MAP_STATE 3509230cbcSChristoph Hellwig select SWIOTLB 367facdc42SAl Viro select ARCH_HAS_ELFCORE_COMPAT 3763703f37SKefeng Wang select ZONE_DMA32 3814e56fb2SMike Rapoport (IBM) select EXECMEM if DYNAMIC_FTRACE 391032c0baSSam Ravnborg 40518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE 41518049d9SSteven Rostedt (VMware) def_bool y 42518049d9SSteven Rostedt (VMware) depends on X86_32 43518049d9SSteven Rostedt (VMware) depends on FUNCTION_TRACER 44518049d9SSteven Rostedt (VMware) select DYNAMIC_FTRACE 45518049d9SSteven Rostedt (VMware) help 46518049d9SSteven Rostedt (VMware) We keep the static function tracing (!DYNAMIC_FTRACE) around 47518049d9SSteven Rostedt (VMware) in order to test the non static function tracing in the 48518049d9SSteven Rostedt (VMware) generic code, as other architectures still use it. But we 49518049d9SSteven Rostedt (VMware) only need to keep it around for x86_64. No need to keep it 50518049d9SSteven Rostedt (VMware) for x86_32. For x86_32, force DYNAMIC_FTRACE. 51d94e0685SIngo Molnar# 52d94e0685SIngo Molnar# Arch settings 53d94e0685SIngo Molnar# 54d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be 55d94e0685SIngo Molnar# ported to 32-bit as well. ) 56d94e0685SIngo Molnar# 578d5fffb9SSam Ravnborgconfig X86 583c2362e6SHarvey Harrison def_bool y 59c763ea26SIngo Molnar # 60c763ea26SIngo Molnar # Note: keep this list sorted alphabetically 61c763ea26SIngo Molnar # 626471b825SIngo Molnar select ACPI_LEGACY_TABLES_LOOKUP if ACPI 636e0a0ea1SGraeme Gregory select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 64a02f66bbSJames Morse select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 65942fa985SYury Norov select ARCH_32BIT_OFF_T if X86_32 662a21ad57SThomas Gleixner select ARCH_CLOCKSOURCE_INIT 67fe42754bSSean Christopherson select ARCH_CONFIGURES_CPU_MITIGATIONS 681f6d3a8fSMasami Hiramatsu select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE 691e866974SAnshuman Khandual select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION 705c11f00bSDavid Hildenbrand select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64 7191024b3cSAnshuman Khandual select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 72cebc774fSAnshuman Khandual select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE) 731e866974SAnshuman Khandual select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE 7491dda51aSAleksey Makarov select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 75c2280be8SAnshuman Khandual select ARCH_HAS_CACHE_LINE_SIZE 761156b441SDavidlohr Bueso select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION 777c7077a7SThomas Gleixner select ARCH_HAS_CPU_FINALIZE_INIT 788f23f5dbSJason Gunthorpe select ARCH_HAS_CPU_PASID if IOMMU_SVA 792792d84eSKees Cook select ARCH_HAS_CURRENT_STACK_POINTER 80fa5b6ec9SLaura Abbott select ARCH_HAS_DEBUG_VIRTUAL 81399145f9SAnshuman Khandual select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE 8221266be9SDan Williams select ARCH_HAS_DEVMEM_IS_ALLOWED 83de6c85bfSChristoph Hellwig select ARCH_HAS_DMA_OPS if GART_IOMMU || XEN 84b1a57bbfSDouglas Anderson select ARCH_HAS_EARLY_DEBUG if KGDB 856471b825SIngo Molnar select ARCH_HAS_ELF_RANDOMIZE 865185e7f9SMike Rapoport (Microsoft) select ARCH_HAS_EXECMEM_ROX if X86_64 8772d93104SLinus Torvalds select ARCH_HAS_FAST_MULTIPLIER 886974f0c4SDaniel Micay select ARCH_HAS_FORTIFY_SOURCE 89957e3facSRiku Voipio select ARCH_HAS_GCOV_PROFILE_ALL 90bece04b5SMarco Elver select ARCH_HAS_KCOV if X86_64 91b0b8a15bSSamuel Holland select ARCH_HAS_KERNEL_FPU_SUPPORT 920c9c1d56SThiago Jung Bauermann select ARCH_HAS_MEM_ENCRYPT 9310bcc80eSMathieu Desnoyers select ARCH_HAS_MEMBARRIER_SYNC_CORE 9449f88c70SPaul E. McKenney select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 950ebeea8cSDaniel Borkmann select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 96c763ea26SIngo Molnar select ARCH_HAS_PMEM_API if X86_64 97476e8583SPeter Zijlstra select ARCH_HAS_PREEMPT_LAZY 9817596731SRobin Murphy select ARCH_HAS_PTE_DEVMAP if X86_64 993010a5eaSLaurent Dufour select ARCH_HAS_PTE_SPECIAL 10071ce1ab5SKinsey Ho select ARCH_HAS_HW_PTE_YOUNG 101eed9a328SYu Zhao select ARCH_HAS_NONLEAF_PMD_YOUNG if PGTABLE_LEVELS > 2 1020aed55afSDan Williams select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64 103ec6347bbSDan Williams select ARCH_HAS_COPY_MC if X86_64 104d2852a22SDaniel Borkmann select ARCH_HAS_SET_MEMORY 105d253ca0cSRick Edgecombe select ARCH_HAS_SET_DIRECT_MAP 106ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_KERNEL_RWX 107ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_MODULE_RWX 108ac1ab12aSMathieu Desnoyers select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 10925c619e5SBrian Gerst select ARCH_HAS_SYSCALL_WRAPPER 110918327e9SKees Cook select ARCH_HAS_UBSAN 1117e01ccb4SZong Li select ARCH_HAS_DEBUG_WX 11263703f37SKefeng Wang select ARCH_HAS_ZONE_DMA_SET if EXPERT 1136471b825SIngo Molnar select ARCH_HAVE_NMI_SAFE_CMPXCHG 114ba386777SVignesh Balasubramanian select ARCH_HAVE_EXTRA_ELF_NOTES 11504d5ea46SAneesh Kumar K.V select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE 1166471b825SIngo Molnar select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI 11777fbbc81SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 1185e2c18c0SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 1193599fe12SThomas Gleixner select ARCH_STACKWALK 1202c870e61SArnd Bergmann select ARCH_SUPPORTS_ACPI 1216471b825SIngo Molnar select ARCH_SUPPORTS_ATOMIC_RMW 1225d6ad668SMike Rapoport select ARCH_SUPPORTS_DEBUG_PAGEALLOC 123d283d422SPasha Tatashin select ARCH_SUPPORTS_PAGE_TABLE_CHECK if X86_64 1246471b825SIngo Molnar select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 12514df3267SThomas Gleixner select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP if NR_CPUS <= 4096 1263c516f89SSami Tolvanen select ARCH_SUPPORTS_CFI_CLANG if X86_64 1273c516f89SSami Tolvanen select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG 128583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG 129583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG_THIN 130d2d6422fSSebastian Andrzej Siewior select ARCH_SUPPORTS_RT 131315ad878SRong Xu select ARCH_SUPPORTS_AUTOFDO_CLANG 132d5dc9583SRong Xu select ARCH_SUPPORTS_PROPELLER_CLANG if X86_64 1336471b825SIngo Molnar select ARCH_USE_BUILTIN_BSWAP 134a432b7c0SUros Bizjak select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64 135dce44566SAnshuman Khandual select ARCH_USE_MEMTEST 1366471b825SIngo Molnar select ARCH_USE_QUEUED_RWLOCKS 1376471b825SIngo Molnar select ARCH_USE_QUEUED_SPINLOCKS 1382ce0d7f9SMark Brown select ARCH_USE_SYM_ANNOTATIONS 139ce4a4e56SAndy Lutomirski select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH 14081c22041SDaniel Borkmann select ARCH_WANT_DEFAULT_BPF_JIT if X86_64 141c763ea26SIngo Molnar select ARCH_WANTS_DYNAMIC_TASK_STRUCT 14251c2ee6dSNick Desaulniers select ARCH_WANTS_NO_INSTR 14307431506SAnshuman Khandual select ARCH_WANT_GENERAL_HUGETLB 1443876d4a3SAlexandre Ghiti select ARCH_WANT_HUGE_PMD_SHARE 14559612b24SNathan Chancellor select ARCH_WANT_LD_ORPHAN_WARN 1460b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64 1470b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64 14838d8b4e6SHuang Ying select ARCH_WANTS_THP_SWAP if X86_64 149b5f06f64SBalbir Singh select ARCH_HAS_PARANOID_L1D_FLUSH 15010916706SShile Zhang select BUILDTIME_TABLE_SORT 1516471b825SIngo Molnar select CLKEVT_I8253 1526471b825SIngo Molnar select CLOCKSOURCE_WATCHDOG 1537cf8f44aSAlexander Potapenko # Word-size accesses may read uninitialized data past the trailing \0 1547cf8f44aSAlexander Potapenko # in strings and cause false KMSAN reports. 1557cf8f44aSAlexander Potapenko select DCACHE_WORD_ACCESS if !KMSAN 1563aac3ebeSThomas Gleixner select DYNAMIC_SIGFRAME 15745471cd9SLinus Torvalds select EDAC_ATOMIC_SCRUB 15845471cd9SLinus Torvalds select EDAC_SUPPORT 1596471b825SIngo Molnar select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC) 160cb81deefSThomas Gleixner select GENERIC_CLOCKEVENTS_BROADCAST_IDLE if GENERIC_CLOCKEVENTS_BROADCAST 1616471b825SIngo Molnar select GENERIC_CLOCKEVENTS_MIN_ADJUST 1626471b825SIngo Molnar select GENERIC_CMOS_UPDATE 1636471b825SIngo Molnar select GENERIC_CPU_AUTOPROBE 1645b95f94cSJames Morse select GENERIC_CPU_DEVICES 16561dc0f55SThomas Gleixner select GENERIC_CPU_VULNERABILITIES 1666471b825SIngo Molnar select GENERIC_EARLY_IOREMAP 16727d6b4d1SThomas Gleixner select GENERIC_ENTRY 1686471b825SIngo Molnar select GENERIC_IOMAP 169c7d6c9ddSThomas Gleixner select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1700fa115daSThomas Gleixner select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC 171ad7a929fSThomas Gleixner select GENERIC_IRQ_MIGRATION if SMP 1726471b825SIngo Molnar select GENERIC_IRQ_PROBE 173c201c917SThomas Gleixner select GENERIC_IRQ_RESERVATION_MODE 1746471b825SIngo Molnar select GENERIC_IRQ_SHOW 1756471b825SIngo Molnar select GENERIC_PENDING_IRQ if SMP 1762ae27137SSteven Price select GENERIC_PTDUMP 1776471b825SIngo Molnar select GENERIC_SMP_IDLE_THREAD 1786471b825SIngo Molnar select GENERIC_TIME_VSYSCALL 1797ac87074SVincenzo Frascino select GENERIC_GETTIMEOFDAY 180550a77a7SDmitry Safonov select GENERIC_VDSO_TIME_NS 1817e90ffb7SAdrian Hunter select GENERIC_VDSO_OVERFLOW_PROTECT 1826ca297d4SPeter Zijlstra select GUP_GET_PXX_LOW_HIGH if X86_PAE 18317e5888eSHans de Goede select HARDIRQS_SW_RESEND 1847edaeb68SThomas Gleixner select HARDLOCKUP_CHECK_TIMESTAMP if X86_64 185fcbfe812SNiklas Schnelle select HAS_IOPORT 1866471b825SIngo Molnar select HAVE_ACPI_APEI if ACPI 1876471b825SIngo Molnar select HAVE_ACPI_APEI_NMI if ACPI 1882a19be61SVlastimil Babka select HAVE_ALIGNED_STRUCT_PAGE 1896471b825SIngo Molnar select HAVE_ARCH_AUDITSYSCALL 1906471b825SIngo Molnar select HAVE_ARCH_HUGE_VMAP if X86_64 || X86_PAE 191eed1fceeSSong Liu select HAVE_ARCH_HUGE_VMALLOC if X86_64 1926471b825SIngo Molnar select HAVE_ARCH_JUMP_LABEL 193b34006c4SArd Biesheuvel select HAVE_ARCH_JUMP_LABEL_RELATIVE 194d17a1d97SAndrey Ryabinin select HAVE_ARCH_KASAN if X86_64 1950609ae01SDaniel Axtens select HAVE_ARCH_KASAN_VMALLOC if X86_64 1961dc0da6eSAlexander Potapenko select HAVE_ARCH_KFENCE 1974ca8cc8dSAlexander Potapenko select HAVE_ARCH_KMSAN if X86_64 1986471b825SIngo Molnar select HAVE_ARCH_KGDB 1999e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_BITS if MMU 2009e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 2011b028f78SDmitry Safonov select HAVE_ARCH_COMPAT_MMAP_BASES if MMU && COMPAT 202271ca788SArd Biesheuvel select HAVE_ARCH_PREL32_RELOCATIONS 2036471b825SIngo Molnar select HAVE_ARCH_SECCOMP_FILTER 204f7d83c1cSKees Cook select HAVE_ARCH_THREAD_STRUCT_WHITELIST 205afaef01cSAlexander Popov select HAVE_ARCH_STACKLEAK 2066471b825SIngo Molnar select HAVE_ARCH_TRACEHOOK 2076471b825SIngo Molnar select HAVE_ARCH_TRANSPARENT_HUGEPAGE 208a00cc7d9SMatthew Wilcox select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 209b64d8d1eSPeter Xu select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD 2107677f7fdSAxel Rasmussen select HAVE_ARCH_USERFAULTFD_MINOR if X86_64 && USERFAULTFD 211e37e43a4SAndy Lutomirski select HAVE_ARCH_VMAP_STACK if X86_64 212fe950f60SKees Cook select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 213c763ea26SIngo Molnar select HAVE_ARCH_WITHIN_STACK_FRAMES 2142ff2b7ecSMasahiro Yamada select HAVE_ASM_MODVERSIONS 2156471b825SIngo Molnar select HAVE_CMPXCHG_DOUBLE 2166471b825SIngo Molnar select HAVE_CMPXCHG_LOCAL 21724a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER if X86_64 21824a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER_OFFSTACK if HAVE_CONTEXT_TRACKING_USER 2196471b825SIngo Molnar select HAVE_C_RECORDMCOUNT 22003f16cd0SJosh Poimboeuf select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL 221280981d6SSathvika Vasireddy select HAVE_OBJTOOL_NOP_MCOUNT if HAVE_OBJTOOL_MCOUNT 2224ed308c4SSteven Rostedt (Google) select HAVE_BUILDTIME_MCOUNT_SORT 2236471b825SIngo Molnar select HAVE_DEBUG_KMEMLEAK 2249c5a3621SAkinobu Mita select HAVE_DMA_CONTIGUOUS 225677aa9f7SSteven Rostedt select HAVE_DYNAMIC_FTRACE 22606aeaaeaSMasami Hiramatsu select HAVE_DYNAMIC_FTRACE_WITH_REGS 22702a474caSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_ARGS if X86_64 228*762abbc0SMasami Hiramatsu (Google) select HAVE_FTRACE_REGS_HAVING_PT_REGS if X86_64 229562955feSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 230c316eb44SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT if X86_64 231503e4510SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT_MULTI if X86_64 23203f5781bSWang YanQing select HAVE_EBPF_JIT 23358340a07SJohannes Berg select HAVE_EFFICIENT_UNALIGNED_ACCESS 2346630a8e5SChristoph Hellwig select HAVE_EISA 2355f56a5dfSJiri Slaby select HAVE_EXIT_THREAD 23625176ad0SDavid Hildenbrand select HAVE_GUP_FAST 237644e0e8dSSteven Rostedt (VMware) select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE 2386471b825SIngo Molnar select HAVE_FTRACE_MCOUNT_RECORD 239a3ed4157SMasami Hiramatsu (Google) select HAVE_FUNCTION_GRAPH_FREGS if HAVE_FUNCTION_GRAPH_TRACER 2404a30e4c9SSteven Rostedt (VMware) select HAVE_FUNCTION_GRAPH_TRACER if X86_32 || (X86_64 && DYNAMIC_FTRACE) 2416471b825SIngo Molnar select HAVE_FUNCTION_TRACER 2426b90bd4bSEmese Revfy select HAVE_GCC_PLUGINS 2430067f129SK.Prasad select HAVE_HW_BREAKPOINT 2446471b825SIngo Molnar select HAVE_IOREMAP_PROT 245624db9eaSThomas Gleixner select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64 2466471b825SIngo Molnar select HAVE_IRQ_TIME_ACCOUNTING 2474ab7674fSJosh Poimboeuf select HAVE_JUMP_LABEL_HACK if HAVE_OBJTOOL 2486471b825SIngo Molnar select HAVE_KERNEL_BZIP2 2496471b825SIngo Molnar select HAVE_KERNEL_GZIP 2506471b825SIngo Molnar select HAVE_KERNEL_LZ4 2516471b825SIngo Molnar select HAVE_KERNEL_LZMA 2526471b825SIngo Molnar select HAVE_KERNEL_LZO 2536471b825SIngo Molnar select HAVE_KERNEL_XZ 254fb46d057SNick Terrell select HAVE_KERNEL_ZSTD 2556471b825SIngo Molnar select HAVE_KPROBES 2566471b825SIngo Molnar select HAVE_KPROBES_ON_FTRACE 257540adea3SMasami Hiramatsu select HAVE_FUNCTION_ERROR_INJECTION 2586471b825SIngo Molnar select HAVE_KRETPROBES 259f3a112c0SMasami Hiramatsu select HAVE_RETHOOK 2606471b825SIngo Molnar select HAVE_LIVEPATCH if X86_64 2610102752eSFrederic Weisbecker select HAVE_MIXED_BREAKPOINTS_REGS 262ee9f8fceSJosh Poimboeuf select HAVE_MOD_ARCH_SPECIFIC 2639f132f7eSJoel Fernandes (Google) select HAVE_MOVE_PMD 264be37c98dSKalesh Singh select HAVE_MOVE_PUD 26522102f45SJosh Poimboeuf select HAVE_NOINSTR_HACK if HAVE_OBJTOOL 26642a0bb3fSPetr Mladek select HAVE_NMI 267489e355bSJosh Poimboeuf select HAVE_NOINSTR_VALIDATION if HAVE_OBJTOOL 26803f16cd0SJosh Poimboeuf select HAVE_OBJTOOL if X86_64 2696471b825SIngo Molnar select HAVE_OPTPROBES 2705394f1e9SArnd Bergmann select HAVE_PAGE_SIZE_4KB 2716471b825SIngo Molnar select HAVE_PCSPKR_PLATFORM 2726471b825SIngo Molnar select HAVE_PERF_EVENTS 273c01d4323SFrederic Weisbecker select HAVE_PERF_EVENTS_NMI 27492e5aae4SNicholas Piggin select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI 275eb01d42aSChristoph Hellwig select HAVE_PCI 276c5e63197SJiri Olsa select HAVE_PERF_REGS 277c5ebcedbSJiri Olsa select HAVE_PERF_USER_STACK_DUMP 278ff2e6d72SPeter Zijlstra select MMU_GATHER_RCU_TABLE_FREE if PARAVIRT 2791e9fdf21SPeter Zijlstra select MMU_GATHER_MERGE_VMAS 28000998085SThomas Gleixner select HAVE_POSIX_CPU_TIMERS_TASK_WORK 2816471b825SIngo Molnar select HAVE_REGS_AND_STACK_ACCESS_API 28203f16cd0SJosh Poimboeuf select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC || STACK_VALIDATION 2833c88ee19SMasami Hiramatsu select HAVE_FUNCTION_ARG_ACCESS_API 2847ecd19cfSKefeng Wang select HAVE_SETUP_PER_CPU_AREA 285cd1a41ceSThomas Gleixner select HAVE_SOFTIRQ_ON_OWN_STACK 286d148eac0SMasahiro Yamada select HAVE_STACKPROTECTOR if CC_HAS_SANE_STACKPROTECTOR 28703f16cd0SJosh Poimboeuf select HAVE_STACK_VALIDATION if HAVE_OBJTOOL 288e6d6c071SJosh Poimboeuf select HAVE_STATIC_CALL 28903f16cd0SJosh Poimboeuf select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL 29099cf983cSMark Rutland select HAVE_PREEMPT_DYNAMIC_CALL 291d6761b8fSMathieu Desnoyers select HAVE_RSEQ 29209498135SMiguel Ojeda select HAVE_RUST if X86_64 2936471b825SIngo Molnar select HAVE_SYSCALL_TRACEPOINTS 2945f3da8c0SJosh Poimboeuf select HAVE_UACCESS_VALIDATION if HAVE_OBJTOOL 2956471b825SIngo Molnar select HAVE_UNSTABLE_SCHED_CLOCK 2967c68af6eSAvi Kivity select HAVE_USER_RETURN_NOTIFIER 2977ac87074SVincenzo Frascino select HAVE_GENERIC_VDSO 29833385150SJason A. Donenfeld select VDSO_GETRANDOM if X86_64 2990c7ffa32SThomas Gleixner select HOTPLUG_PARALLEL if SMP && X86_64 30005736e4aSThomas Gleixner select HOTPLUG_SMT if SMP 3010c7ffa32SThomas Gleixner select HOTPLUG_SPLIT_STARTUP if SMP && X86_32 302c0185808SThomas Gleixner select IRQ_FORCED_THREADING 303c2508ec5SLinus Torvalds select LOCK_MM_AND_FIND_VMA 3047ecd19cfSKefeng Wang select NEED_PER_CPU_EMBED_FIRST_CHUNK 3057ecd19cfSKefeng Wang select NEED_PER_CPU_PAGE_FIRST_CHUNK 30686596f0aSChristoph Hellwig select NEED_SG_DMA_LENGTH 30787482708SMike Rapoport (Microsoft) select NUMA_MEMBLKS if NUMA 3082eac9c2dSChristoph Hellwig select PCI_DOMAINS if PCI 309625210cfSSinan Kaya select PCI_LOCKLESS_CONFIG if PCI 3106471b825SIngo Molnar select PERF_EVENTS 3113195ef59SPrarit Bhargava select RTC_LIB 312d6faca40SArnd Bergmann select RTC_MC146818_LIB 3136471b825SIngo Molnar select SPARSE_IRQ 3146471b825SIngo Molnar select SYSCTL_EXCEPTION_TRACE 31515f4eae7SAndy Lutomirski select THREAD_INFO_IN_TASK 3164aae683fSMasahiro Yamada select TRACE_IRQFLAGS_SUPPORT 3174510bffbSMark Rutland select TRACE_IRQFLAGS_NMI_SUPPORT 3186471b825SIngo Molnar select USER_STACKTRACE_SUPPORT 3193b02a051SIngo Molnar select HAVE_ARCH_KCSAN if X86_64 3200c608dadSAubrey Li select PROC_PID_ARCH_STATUS if PROC_FS 32150468e43SJarkko Sakkinen select HAVE_ARCH_NODE_DEV_GROUP if X86_SGX 322d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_16B if X86_64 || X86_ALIGNMENT_16 323d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_4B 3249e2b4be3SNayna Jain imply IMA_SECURE_AND_OR_TRUSTED_BOOT if EFI 325ceea991aSJiri Olsa select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 3267d8330a5SBalbir Singh 327ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER 3283120e25eSJan Beulich def_bool y 3293120e25eSJan Beulich depends on KPROBES || PERF_EVENTS || UPROBES 330ba7e4d13SIngo Molnar 33151b26adaSLinus Torvaldsconfig OUTPUT_FORMAT 33251b26adaSLinus Torvalds string 33351b26adaSLinus Torvalds default "elf32-i386" if X86_32 33451b26adaSLinus Torvalds default "elf64-x86-64" if X86_64 33551b26adaSLinus Torvalds 3368d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT 3373c2362e6SHarvey Harrison def_bool y 3388d5fffb9SSam Ravnborg 3398d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT 3403c2362e6SHarvey Harrison def_bool y 3418d5fffb9SSam Ravnborg 3428d5fffb9SSam Ravnborgconfig MMU 3433c2362e6SHarvey Harrison def_bool y 3448d5fffb9SSam Ravnborg 3459e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN 3469e08f57dSDaniel Cashman default 28 if 64BIT 3479e08f57dSDaniel Cashman default 8 3489e08f57dSDaniel Cashman 3499e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX 3509e08f57dSDaniel Cashman default 32 if 64BIT 3519e08f57dSDaniel Cashman default 16 3529e08f57dSDaniel Cashman 3539e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3549e08f57dSDaniel Cashman default 8 3559e08f57dSDaniel Cashman 3569e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3579e08f57dSDaniel Cashman default 16 3589e08f57dSDaniel Cashman 3598d5fffb9SSam Ravnborgconfig SBUS 3608d5fffb9SSam Ravnborg bool 3618d5fffb9SSam Ravnborg 3628d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA 3633120e25eSJan Beulich def_bool y 3643120e25eSJan Beulich depends on ISA_DMA_API 3658d5fffb9SSam Ravnborg 366d911c67eSAlexander Potapenkoconfig GENERIC_CSUM 367d911c67eSAlexander Potapenko bool 368d911c67eSAlexander Potapenko default y if KMSAN || KASAN 369d911c67eSAlexander Potapenko 3708d5fffb9SSam Ravnborgconfig GENERIC_BUG 3713c2362e6SHarvey Harrison def_bool y 3728d5fffb9SSam Ravnborg depends on BUG 373b93a531eSJan Beulich select GENERIC_BUG_RELATIVE_POINTERS if X86_64 374b93a531eSJan Beulich 375b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS 376b93a531eSJan Beulich bool 3778d5fffb9SSam Ravnborg 3788d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC 3793120e25eSJan Beulich def_bool y 3803120e25eSJan Beulich depends on ISA_DMA_API 3818d5fffb9SSam Ravnborg 3821032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY 3831032c0baSSam Ravnborg def_bool y 3841032c0baSSam Ravnborg 3859a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX 3869a0b8415Svenkatesh.pallipadi@intel.com def_bool y 3878d5fffb9SSam Ravnborg 388801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE 389801e4062SJohannes Berg def_bool y 390801e4062SJohannes Berg 391f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 392f4cb5700SJohannes Berg def_bool y 393f4cb5700SJohannes Berg 3948d5fffb9SSam Ravnborgconfig AUDIT_ARCH 395e0fd24a3SJan Beulich def_bool y if X86_64 3968d5fffb9SSam Ravnborg 397d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET 398d6f2d75aSAndrey Ryabinin hex 399d6f2d75aSAndrey Ryabinin depends on KASAN 400d6f2d75aSAndrey Ryabinin default 0xdffffc0000000000 401d6f2d75aSAndrey Ryabinin 40269575d38SShane Wangconfig HAVE_INTEL_TXT 40369575d38SShane Wang def_bool y 4046ea30386SKees Cook depends on INTEL_IOMMU && ACPI 40569575d38SShane Wang 4066b0c3d44SSam Ravnborgconfig X86_64_SMP 4076b0c3d44SSam Ravnborg def_bool y 4086b0c3d44SSam Ravnborg depends on X86_64 && SMP 4096b0c3d44SSam Ravnborg 4102b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES 4112b144498SSrikar Dronamraju def_bool y 4122b144498SSrikar Dronamraju 413d20642f0SRob Herringconfig FIX_EARLYCON_MEM 414d20642f0SRob Herring def_bool y 415d20642f0SRob Herring 41694d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK 41794d49eb3SKirill A. Shutemov bool 41894d49eb3SKirill A. Shutemov 41998233368SKirill A. Shutemovconfig PGTABLE_LEVELS 42098233368SKirill A. Shutemov int 42177ef56e4SKirill A. Shutemov default 5 if X86_5LEVEL 42298233368SKirill A. Shutemov default 4 if X86_64 42398233368SKirill A. Shutemov default 3 if X86_PAE 42498233368SKirill A. Shutemov default 2 42598233368SKirill A. Shutemov 4262a61f474SMasahiro Yamadaconfig CC_HAS_SANE_STACKPROTECTOR 4272a61f474SMasahiro Yamada bool 4281b866781SNathan Chancellor default $(success,$(srctree)/scripts/gcc-x86_64-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) if 64BIT 4291b866781SNathan Chancellor default $(success,$(srctree)/scripts/gcc-x86_32-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) 4302a61f474SMasahiro Yamada help 4312a61f474SMasahiro Yamada We have to make sure stack protector is unconditionally disabled if 4323fb0fdb3SAndy Lutomirski the compiler produces broken code or if it does not let us control 4333fb0fdb3SAndy Lutomirski the segment on 32-bit kernels. 4342a61f474SMasahiro Yamada 435506f1d07SSam Ravnborgmenu "Processor type and features" 436506f1d07SSam Ravnborg 437506f1d07SSam Ravnborgconfig SMP 438506f1d07SSam Ravnborg bool "Symmetric multi-processing support" 439a7f7f624SMasahiro Yamada help 440506f1d07SSam Ravnborg This enables support for systems with more than one CPU. If you have 4414a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 4424a474157SRobert Graffham than one CPU, say Y. 443506f1d07SSam Ravnborg 4444a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 445506f1d07SSam Ravnborg machines, but will use only one CPU of a multiprocessor machine. If 446506f1d07SSam Ravnborg you say Y here, the kernel will run on many, but not all, 4474a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 448506f1d07SSam Ravnborg will run faster if you say N here. 449506f1d07SSam Ravnborg 450506f1d07SSam Ravnborg Note that if you say Y here and choose architecture "586" or 451506f1d07SSam Ravnborg "Pentium" under "Processor family", the kernel will not work on 486 452506f1d07SSam Ravnborg architectures. Similarly, multiprocessor kernels for the "PPro" 453506f1d07SSam Ravnborg architecture may not work on all Pentium based boards. 454506f1d07SSam Ravnborg 455506f1d07SSam Ravnborg People using multiprocessor machines who say Y here should also say 456506f1d07SSam Ravnborg Y to "Enhanced Real Time Clock Support", below. The "Advanced Power 457506f1d07SSam Ravnborg Management" code will be disabled if you say Y here. 458506f1d07SSam Ravnborg 459ff61f079SJonathan Corbet See also <file:Documentation/arch/x86/i386/IO-APIC.rst>, 4604f4cfa6cSMauro Carvalho Chehab <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at 461506f1d07SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 462506f1d07SSam Ravnborg 463506f1d07SSam Ravnborg If you don't know what to do here, say N. 464506f1d07SSam Ravnborg 46506cd9a7dSYinghai Luconfig X86_X2APIC 46606cd9a7dSYinghai Lu bool "Support x2apic" 46719e3d60dSJan Kiszka depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) 468a7f7f624SMasahiro Yamada help 46906cd9a7dSYinghai Lu This enables x2apic support on CPUs that have this feature. 47006cd9a7dSYinghai Lu 47106cd9a7dSYinghai Lu This allows 32-bit apic IDs (so it can support very large systems), 47206cd9a7dSYinghai Lu and accesses the local apic via MSRs not via mmio. 47306cd9a7dSYinghai Lu 474b8d1d163SDaniel Sneddon Some Intel systems circa 2022 and later are locked into x2APIC mode 475b8d1d163SDaniel Sneddon and can not fall back to the legacy APIC modes if SGX or TDX are 476e3998434SMateusz Jończyk enabled in the BIOS. They will boot with very reduced functionality 477e3998434SMateusz Jończyk without enabling this option. 478b8d1d163SDaniel Sneddon 47906cd9a7dSYinghai Lu If you don't know what to do here, say N. 48006cd9a7dSYinghai Lu 4817fec07fdSJacob Panconfig X86_POSTED_MSI 4827fec07fdSJacob Pan bool "Enable MSI and MSI-x delivery by posted interrupts" 4837fec07fdSJacob Pan depends on X86_64 && IRQ_REMAP 4847fec07fdSJacob Pan help 4857fec07fdSJacob Pan This enables MSIs that are under interrupt remapping to be delivered as 4867fec07fdSJacob Pan posted interrupts to the host kernel. Interrupt throughput can 4877fec07fdSJacob Pan potentially be improved by coalescing CPU notifications during high 4887fec07fdSJacob Pan frequency bursts. 4897fec07fdSJacob Pan 4907fec07fdSJacob Pan If you don't know what to do here, say N. 4917fec07fdSJacob Pan 4926695c85bSYinghai Luconfig X86_MPPARSE 4934590d98fSAndy Shevchenko bool "Enable MPS table" if ACPI 4947a527688SJan Beulich default y 4955ab74722SIngo Molnar depends on X86_LOCAL_APIC 496a7f7f624SMasahiro Yamada help 4976695c85bSYinghai Lu For old smp systems that do not have proper acpi support. Newer systems 4986695c85bSYinghai Lu (esp with 64bit cpus) with acpi support, MADT and DSDT will override it 4996695c85bSYinghai Lu 500e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL 501e6d42931SJohannes Weiner bool "x86 CPU resource control support" 5026fe07ce3SBabu Moger depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD) 50359fe5a77SThomas Gleixner select KERNFS 504e79f15a4SChen Yu select PROC_CPU_RESCTRL if PROC_FS 50578e99b4aSFenghua Yu help 506e6d42931SJohannes Weiner Enable x86 CPU resource control support. 5076fe07ce3SBabu Moger 5086fe07ce3SBabu Moger Provide support for the allocation and monitoring of system resources 5096fe07ce3SBabu Moger usage by the CPU. 5106fe07ce3SBabu Moger 5116fe07ce3SBabu Moger Intel calls this Intel Resource Director Technology 5126fe07ce3SBabu Moger (Intel(R) RDT). More information about RDT can be found in the 5136fe07ce3SBabu Moger Intel x86 Architecture Software Developer Manual. 5146fe07ce3SBabu Moger 5156fe07ce3SBabu Moger AMD calls this AMD Platform Quality of Service (AMD QoS). 5166fe07ce3SBabu Moger More information about AMD QoS can be found in the AMD64 Technology 5176fe07ce3SBabu Moger Platform Quality of Service Extensions manual. 51878e99b4aSFenghua Yu 51978e99b4aSFenghua Yu Say N if unsure. 52078e99b4aSFenghua Yu 5212cce9591SH. Peter Anvin (Intel)config X86_FRED 5222cce9591SH. Peter Anvin (Intel) bool "Flexible Return and Event Delivery" 5232cce9591SH. Peter Anvin (Intel) depends on X86_64 5242cce9591SH. Peter Anvin (Intel) help 5252cce9591SH. Peter Anvin (Intel) When enabled, try to use Flexible Return and Event Delivery 5262cce9591SH. Peter Anvin (Intel) instead of the legacy SYSCALL/SYSENTER/IDT architecture for 5272cce9591SH. Peter Anvin (Intel) ring transitions and exception/interrupt handling if the 5283c41786cSPaul Menzel system supports it. 5292cce9591SH. Peter Anvin (Intel) 530a0d0bb4dSRandy Dunlapconfig X86_BIGSMP 531a0d0bb4dSRandy Dunlap bool "Support for big SMP systems with more than 8 CPUs" 53271d99ea4SMasahiro Yamada depends on SMP && X86_32 533a7f7f624SMasahiro Yamada help 534e133f6eaSRandy Dunlap This option is needed for the systems that have more than 8 CPUs. 535a0d0bb4dSRandy Dunlap 536c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM 537c5c606d9SRavikiran G Thirumalai bool "Support for extended (non-PC) x86 platforms" 538c5c606d9SRavikiran G Thirumalai default y 539a7f7f624SMasahiro Yamada help 54006ac8346SIngo Molnar If you disable this option then the kernel will only support 54106ac8346SIngo Molnar standard PC platforms. (which covers the vast majority of 54206ac8346SIngo Molnar systems out there.) 54306ac8346SIngo Molnar 5448425091fSRavikiran G Thirumalai If you enable this option then you'll be able to select support 54571d99ea4SMasahiro Yamada for the following non-PC x86 platforms, depending on the value of 54671d99ea4SMasahiro Yamada CONFIG_64BIT. 54771d99ea4SMasahiro Yamada 54871d99ea4SMasahiro Yamada 32-bit platforms (CONFIG_64BIT=n): 549cb7b8023SBen Hutchings Goldfish (Android emulator) 5508425091fSRavikiran G Thirumalai AMD Elan 5518425091fSRavikiran G Thirumalai RDC R-321x SoC 5528425091fSRavikiran G Thirumalai SGI 320/540 (Visual Workstation) 55383125a3aSAlessandro Rubini STA2X11-based (e.g. Northville) 5543f4110a4SThomas Gleixner Moorestown MID devices 55506ac8346SIngo Molnar 55671d99ea4SMasahiro Yamada 64-bit platforms (CONFIG_64BIT=y): 55744b111b5SSteffen Persvold Numascale NumaChip 5588425091fSRavikiran G Thirumalai ScaleMP vSMP 5598425091fSRavikiran G Thirumalai SGI Ultraviolet 5608425091fSRavikiran G Thirumalai 5618425091fSRavikiran G Thirumalai If you have one of these systems, or if you want to build a 5628425091fSRavikiran G Thirumalai generic distribution kernel, say Y here - otherwise say N. 56371d99ea4SMasahiro Yamada 564c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms 565c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 56644b111b5SSteffen Persvoldconfig X86_NUMACHIP 56744b111b5SSteffen Persvold bool "Numascale NumaChip" 56844b111b5SSteffen Persvold depends on X86_64 56944b111b5SSteffen Persvold depends on X86_EXTENDED_PLATFORM 57044b111b5SSteffen Persvold depends on NUMA 57144b111b5SSteffen Persvold depends on SMP 57244b111b5SSteffen Persvold depends on X86_X2APIC 573f9726bfdSDaniel J Blueman depends on PCI_MMCONFIG 574a7f7f624SMasahiro Yamada help 57544b111b5SSteffen Persvold Adds support for Numascale NumaChip large-SMP systems. Needed to 57644b111b5SSteffen Persvold enable more than ~168 cores. 57744b111b5SSteffen Persvold If you don't have one of these, you should say N here. 57803b48632SNick Piggin 5796a48565eSIngo Molnarconfig X86_VSMP 580c5c606d9SRavikiran G Thirumalai bool "ScaleMP vSMP" 5816276a074SBorislav Petkov select HYPERVISOR_GUEST 5826a48565eSIngo Molnar select PARAVIRT 5836a48565eSIngo Molnar depends on X86_64 && PCI 584c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 585ead91d4bSShai Fultheim depends on SMP 586a7f7f624SMasahiro Yamada help 5876a48565eSIngo Molnar Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is 5886a48565eSIngo Molnar supposed to run on these EM64T-based machines. Only choose this option 5896a48565eSIngo Molnar if you have one of these machines. 5906a48565eSIngo Molnar 591c5c606d9SRavikiran G Thirumalaiconfig X86_UV 592c5c606d9SRavikiran G Thirumalai bool "SGI Ultraviolet" 593c5c606d9SRavikiran G Thirumalai depends on X86_64 594c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 59554c28d29SJack Steiner depends on NUMA 5961ecb4ae5SAndrew Morton depends on EFI 597c2209ea5SIngo Molnar depends on KEXEC_CORE 5989d6c26e7SSuresh Siddha depends on X86_X2APIC 5991222e564SIngo Molnar depends on PCI 600a7f7f624SMasahiro Yamada help 601c5c606d9SRavikiran G Thirumalai This option is needed in order to support SGI Ultraviolet systems. 602c5c606d9SRavikiran G Thirumalai If you don't have one of these, you should say N here. 603c5c606d9SRavikiran G Thirumalai 604c5c606d9SRavikiran G Thirumalai# Following is an alphabetically sorted list of 32 bit extended platforms 605c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 606506f1d07SSam Ravnborg 607ddd70cf9SJun Nakajimaconfig X86_GOLDFISH 608ddd70cf9SJun Nakajima bool "Goldfish (Virtual Platform)" 609cb7b8023SBen Hutchings depends on X86_EXTENDED_PLATFORM 610a7f7f624SMasahiro Yamada help 611ddd70cf9SJun Nakajima Enable support for the Goldfish virtual platform used primarily 612ddd70cf9SJun Nakajima for Android development. Unless you are building for the Android 613ddd70cf9SJun Nakajima Goldfish emulator say N here. 614ddd70cf9SJun Nakajima 615c751e17bSThomas Gleixnerconfig X86_INTEL_CE 616c751e17bSThomas Gleixner bool "CE4100 TV platform" 617c751e17bSThomas Gleixner depends on PCI 618c751e17bSThomas Gleixner depends on PCI_GODIRECT 6196084a6e2SJiang Liu depends on X86_IO_APIC 620c751e17bSThomas Gleixner depends on X86_32 621c751e17bSThomas Gleixner depends on X86_EXTENDED_PLATFORM 62237bc9f50SDirk Brandewie select X86_REBOOTFIXUPS 623da6b737bSSebastian Andrzej Siewior select OF 624da6b737bSSebastian Andrzej Siewior select OF_EARLY_FLATTREE 625a7f7f624SMasahiro Yamada help 626c751e17bSThomas Gleixner Select for the Intel CE media processor (CE4100) SOC. 627c751e17bSThomas Gleixner This option compiles in support for the CE4100 SOC for settop 628c751e17bSThomas Gleixner boxes and media devices. 629c751e17bSThomas Gleixner 6304cb9b00fSDavid Cohenconfig X86_INTEL_MID 63143605ef1SAlan Cox bool "Intel MID platform support" 63243605ef1SAlan Cox depends on X86_EXTENDED_PLATFORM 633edc6bc78SDavid Cohen depends on X86_PLATFORM_DEVICES 6341ea7c673SAlan Cox depends on PCI 6353fda5bb4SAndy Shevchenko depends on X86_64 || (PCI_GOANY && X86_32) 6361ea7c673SAlan Cox depends on X86_IO_APIC 6374cb9b00fSDavid Cohen select I2C 6387c9c3a1eSAlan Cox select DW_APB_TIMER 63954b34aa0SMika Westerberg select INTEL_SCU_PCI 640a7f7f624SMasahiro Yamada help 6414cb9b00fSDavid Cohen Select to build a kernel capable of supporting Intel MID (Mobile 6424cb9b00fSDavid Cohen Internet Device) platform systems which do not have the PCI legacy 6434cb9b00fSDavid Cohen interfaces. If you are building for a PC class system say N here. 6441ea7c673SAlan Cox 6454cb9b00fSDavid Cohen Intel MID platforms are based on an Intel processor and chipset which 6464cb9b00fSDavid Cohen consume less power than most of the x86 derivatives. 64743605ef1SAlan Cox 6488bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK 6498bbc2a13SBryan O'Donoghue bool "Intel Quark platform support" 6508bbc2a13SBryan O'Donoghue depends on X86_32 6518bbc2a13SBryan O'Donoghue depends on X86_EXTENDED_PLATFORM 6528bbc2a13SBryan O'Donoghue depends on X86_PLATFORM_DEVICES 6538bbc2a13SBryan O'Donoghue depends on X86_TSC 6548bbc2a13SBryan O'Donoghue depends on PCI 6558bbc2a13SBryan O'Donoghue depends on PCI_GOANY 6568bbc2a13SBryan O'Donoghue depends on X86_IO_APIC 6578bbc2a13SBryan O'Donoghue select IOSF_MBI 6588bbc2a13SBryan O'Donoghue select INTEL_IMR 6599ab6eb51SAndy Shevchenko select COMMON_CLK 660a7f7f624SMasahiro Yamada help 6618bbc2a13SBryan O'Donoghue Select to include support for Quark X1000 SoC. 6628bbc2a13SBryan O'Donoghue Say Y here if you have a Quark based system such as the Arduino 6638bbc2a13SBryan O'Donoghue compatible Intel Galileo. 6648bbc2a13SBryan O'Donoghue 6653d48aab1SMika Westerbergconfig X86_INTEL_LPSS 6663d48aab1SMika Westerberg bool "Intel Low Power Subsystem Support" 6675962dd22SSinan Kaya depends on X86 && ACPI && PCI 6683d48aab1SMika Westerberg select COMMON_CLK 6690f531431SMathias Nyman select PINCTRL 670eebb3e8dSAndy Shevchenko select IOSF_MBI 671a7f7f624SMasahiro Yamada help 6723d48aab1SMika Westerberg Select to build support for Intel Low Power Subsystem such as 6733d48aab1SMika Westerberg found on Intel Lynxpoint PCH. Selecting this option enables 6740f531431SMathias Nyman things like clock tree (common clock framework) and pincontrol 6750f531431SMathias Nyman which are needed by the LPSS peripheral drivers. 6763d48aab1SMika Westerberg 67792082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE 67892082a88SKen Xue bool "AMD ACPI2Platform devices support" 67992082a88SKen Xue depends on ACPI 68092082a88SKen Xue select COMMON_CLK 68192082a88SKen Xue select PINCTRL 682a7f7f624SMasahiro Yamada help 68392082a88SKen Xue Select to interpret AMD specific ACPI device to platform device 68492082a88SKen Xue such as I2C, UART, GPIO found on AMD Carrizo and later chipsets. 68592082a88SKen Xue I2C and UART depend on COMMON_CLK to set clock. GPIO driver is 68692082a88SKen Xue implemented under PINCTRL subsystem. 68792082a88SKen Xue 688ced3ce76SDavid E. Boxconfig IOSF_MBI 689ced3ce76SDavid E. Box tristate "Intel SoC IOSF Sideband support for SoC platforms" 690ced3ce76SDavid E. Box depends on PCI 691a7f7f624SMasahiro Yamada help 692ced3ce76SDavid E. Box This option enables sideband register access support for Intel SoC 693ced3ce76SDavid E. Box platforms. On these platforms the IOSF sideband is used in lieu of 694ced3ce76SDavid E. Box MSR's for some register accesses, mostly but not limited to thermal 695ced3ce76SDavid E. Box and power. Drivers may query the availability of this device to 696ced3ce76SDavid E. Box determine if they need the sideband in order to work on these 697ced3ce76SDavid E. Box platforms. The sideband is available on the following SoC products. 698ced3ce76SDavid E. Box This list is not meant to be exclusive. 699ced3ce76SDavid E. Box - BayTrail 700ced3ce76SDavid E. Box - Braswell 701ced3ce76SDavid E. Box - Quark 702ced3ce76SDavid E. Box 703ced3ce76SDavid E. Box You should say Y if you are running a kernel on one of these SoC's. 704ced3ce76SDavid E. Box 705ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG 706ed2226bdSDavid E. Box bool "Enable IOSF sideband access through debugfs" 707ed2226bdSDavid E. Box depends on IOSF_MBI && DEBUG_FS 708a7f7f624SMasahiro Yamada help 709ed2226bdSDavid E. Box Select this option to expose the IOSF sideband access registers (MCR, 710ed2226bdSDavid E. Box MDR, MCRX) through debugfs to write and read register information from 711ed2226bdSDavid E. Box different units on the SoC. This is most useful for obtaining device 712ed2226bdSDavid E. Box state information for debug and analysis. As this is a general access 713ed2226bdSDavid E. Box mechanism, users of this option would have specific knowledge of the 714ed2226bdSDavid E. Box device they want to access. 715ed2226bdSDavid E. Box 716ed2226bdSDavid E. Box If you don't require the option or are in doubt, say N. 717ed2226bdSDavid E. Box 718c5c606d9SRavikiran G Thirumalaiconfig X86_RDC321X 719c5c606d9SRavikiran G Thirumalai bool "RDC R-321x SoC" 720506f1d07SSam Ravnborg depends on X86_32 721c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 722c5c606d9SRavikiran G Thirumalai select M486 723c5c606d9SRavikiran G Thirumalai select X86_REBOOTFIXUPS 724a7f7f624SMasahiro Yamada help 725c5c606d9SRavikiran G Thirumalai This option is needed for RDC R-321x system-on-chip, also known 726c5c606d9SRavikiran G Thirumalai as R-8610-(G). 727c5c606d9SRavikiran G Thirumalai If you don't have one of these chips, you should say N here. 728c5c606d9SRavikiran G Thirumalai 729e0c7ae37SIngo Molnarconfig X86_32_NON_STANDARD 7309c398017SIngo Molnar bool "Support non-standard 32-bit SMP architectures" 7319c398017SIngo Molnar depends on X86_32 && SMP 732c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 733a7f7f624SMasahiro Yamada help 734b5660ba7SH. Peter Anvin This option compiles in the bigsmp and STA2X11 default 735b5660ba7SH. Peter Anvin subarchitectures. It is intended for a generic binary 736b5660ba7SH. Peter Anvin kernel. If you select them all, kernel will probe it one by 737b5660ba7SH. Peter Anvin one and will fallback to default. 738d49c4288SYinghai Lu 739c5c606d9SRavikiran G Thirumalai# Alphabetically sorted list of Non standard 32 bit platforms 740d49c4288SYinghai Lu 741d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE 7426fc108a0SJan Beulich def_bool y 743d949f36fSLinus Torvalds # MCE code calls memory_failure(): 744d949f36fSLinus Torvalds depends on X86_MCE 745d949f36fSLinus Torvalds # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags: 746d949f36fSLinus Torvalds # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH: 747d949f36fSLinus Torvalds depends on X86_64 || !SPARSEMEM 748d949f36fSLinus Torvalds select ARCH_SUPPORTS_MEMORY_FAILURE 749d949f36fSLinus Torvalds 75083125a3aSAlessandro Rubiniconfig STA2X11 75183125a3aSAlessandro Rubini bool "STA2X11 Companion Chip Support" 75283125a3aSAlessandro Rubini depends on X86_32_NON_STANDARD && PCI 75383125a3aSAlessandro Rubini select SWIOTLB 75483125a3aSAlessandro Rubini select MFD_STA2X11 7550145071bSLinus Walleij select GPIOLIB 756a7f7f624SMasahiro Yamada help 75783125a3aSAlessandro Rubini This adds support for boards based on the STA2X11 IO-Hub, 75883125a3aSAlessandro Rubini a.k.a. "ConneXt". The chip is used in place of the standard 75983125a3aSAlessandro Rubini PC chipset, so all "standard" peripherals are missing. If this 76083125a3aSAlessandro Rubini option is selected the kernel will still be able to boot on 76183125a3aSAlessandro Rubini standard PC machines. 76283125a3aSAlessandro Rubini 76382148d1dSShérabconfig X86_32_IRIS 76482148d1dSShérab tristate "Eurobraille/Iris poweroff module" 76582148d1dSShérab depends on X86_32 766a7f7f624SMasahiro Yamada help 76782148d1dSShérab The Iris machines from EuroBraille do not have APM or ACPI support 76882148d1dSShérab to shut themselves down properly. A special I/O sequence is 76982148d1dSShérab needed to do so, which is what this module does at 77082148d1dSShérab kernel shutdown. 77182148d1dSShérab 77282148d1dSShérab This is only for Iris machines from EuroBraille. 77382148d1dSShérab 77482148d1dSShérab If unused, say N. 77582148d1dSShérab 776ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 7773c2362e6SHarvey Harrison def_bool y 7783c2362e6SHarvey Harrison prompt "Single-depth WCHAN output" 779a87d0914SKen Chen depends on X86 780a7f7f624SMasahiro Yamada help 781506f1d07SSam Ravnborg Calculate simpler /proc/<PID>/wchan values. If this option 782506f1d07SSam Ravnborg is disabled then wchan values will recurse back to the 783506f1d07SSam Ravnborg caller function. This provides more accurate wchan values, 784506f1d07SSam Ravnborg at the expense of slightly more scheduling overhead. 785506f1d07SSam Ravnborg 786506f1d07SSam Ravnborg If in doubt, say "Y". 787506f1d07SSam Ravnborg 7886276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST 7896276a074SBorislav Petkov bool "Linux guest support" 790a7f7f624SMasahiro Yamada help 7916276a074SBorislav Petkov Say Y here to enable options for running Linux under various hyper- 7926276a074SBorislav Petkov visors. This option enables basic hypervisor detection and platform 7936276a074SBorislav Petkov setup. 794506f1d07SSam Ravnborg 7956276a074SBorislav Petkov If you say N, all options in this submenu will be skipped and 7966276a074SBorislav Petkov disabled, and Linux guest support won't be built in. 797506f1d07SSam Ravnborg 7986276a074SBorislav Petkovif HYPERVISOR_GUEST 799506f1d07SSam Ravnborg 800e61bd94aSEduardo Pereira Habkostconfig PARAVIRT 801e61bd94aSEduardo Pereira Habkost bool "Enable paravirtualization code" 802a0e2bf7cSJuergen Gross depends on HAVE_STATIC_CALL 803a7f7f624SMasahiro Yamada help 804e61bd94aSEduardo Pereira Habkost This changes the kernel so it can modify itself when it is run 805e61bd94aSEduardo Pereira Habkost under a hypervisor, potentially improving performance significantly 806e61bd94aSEduardo Pereira Habkost over full virtualization. However, when run without a hypervisor 807e61bd94aSEduardo Pereira Habkost the kernel is theoretically slower and slightly larger. 808e61bd94aSEduardo Pereira Habkost 809c00a280aSJuergen Grossconfig PARAVIRT_XXL 810c00a280aSJuergen Gross bool 811c00a280aSJuergen Gross 8126276a074SBorislav Petkovconfig PARAVIRT_DEBUG 8136276a074SBorislav Petkov bool "paravirt-ops debugging" 8146276a074SBorislav Petkov depends on PARAVIRT && DEBUG_KERNEL 815a7f7f624SMasahiro Yamada help 8166276a074SBorislav Petkov Enable to debug paravirt_ops internals. Specifically, BUG if 8176276a074SBorislav Petkov a paravirt_op is missing when it is called. 8186276a074SBorislav Petkov 819b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS 820b4ecc126SJeremy Fitzhardinge bool "Paravirtualization layer for spinlocks" 8216ea30386SKees Cook depends on PARAVIRT && SMP 822a7f7f624SMasahiro Yamada help 823b4ecc126SJeremy Fitzhardinge Paravirtualized spinlocks allow a pvops backend to replace the 824b4ecc126SJeremy Fitzhardinge spinlock implementation with something virtualization-friendly 825b4ecc126SJeremy Fitzhardinge (for example, block the virtual CPU rather than spinning). 826b4ecc126SJeremy Fitzhardinge 8274c4e4f61SRaghavendra K T It has a minimal impact on native kernels and gives a nice performance 8284c4e4f61SRaghavendra K T benefit on paravirtualized KVM / Xen kernels. 829b4ecc126SJeremy Fitzhardinge 8304c4e4f61SRaghavendra K T If you are unsure how to answer this question, answer Y. 831b4ecc126SJeremy Fitzhardinge 832ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR 833ecca2502SZhao Yakui def_bool n 834ecca2502SZhao Yakui 8356276a074SBorislav Petkovsource "arch/x86/xen/Kconfig" 8366276a074SBorislav Petkov 8376276a074SBorislav Petkovconfig KVM_GUEST 8386276a074SBorislav Petkov bool "KVM Guest support (including kvmclock)" 8396276a074SBorislav Petkov depends on PARAVIRT 8406276a074SBorislav Petkov select PARAVIRT_CLOCK 841a1c4423bSMarcelo Tosatti select ARCH_CPUIDLE_HALTPOLL 842b1d40575SVitaly Kuznetsov select X86_HV_CALLBACK_VECTOR 8436276a074SBorislav Petkov default y 844a7f7f624SMasahiro Yamada help 8456276a074SBorislav Petkov This option enables various optimizations for running under the KVM 8466276a074SBorislav Petkov hypervisor. It includes a paravirtualized clock, so that instead 8476276a074SBorislav Petkov of relying on a PIT (or probably other) emulation by the 8486276a074SBorislav Petkov underlying device model, the host provides the guest with 8496276a074SBorislav Petkov timing infrastructure such as time of day, and system time 8506276a074SBorislav Petkov 851a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL 852a1c4423bSMarcelo Tosatti def_bool n 853a1c4423bSMarcelo Tosatti prompt "Disable host haltpoll when loading haltpoll driver" 854a1c4423bSMarcelo Tosatti help 855a1c4423bSMarcelo Tosatti If virtualized under KVM, disable host haltpoll. 856a1c4423bSMarcelo Tosatti 8577733607fSMaran Wilsonconfig PVH 8587733607fSMaran Wilson bool "Support for running PVH guests" 859a7f7f624SMasahiro Yamada help 8607733607fSMaran Wilson This option enables the PVH entry point for guest virtual machines 8617733607fSMaran Wilson as specified in the x86/HVM direct boot ABI. 8627733607fSMaran Wilson 8636276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING 8646276a074SBorislav Petkov bool "Paravirtual steal time accounting" 8656276a074SBorislav Petkov depends on PARAVIRT 866a7f7f624SMasahiro Yamada help 8676276a074SBorislav Petkov Select this option to enable fine granularity task steal time 8686276a074SBorislav Petkov accounting. Time spent executing other tasks in parallel with 8696276a074SBorislav Petkov the current vCPU is discounted from the vCPU power. To account for 8706276a074SBorislav Petkov that, there can be a small performance impact. 8716276a074SBorislav Petkov 8726276a074SBorislav Petkov If in doubt, say N here. 8736276a074SBorislav Petkov 8747af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK 8757af192c9SGerd Hoffmann bool 8767af192c9SGerd Hoffmann 8774a362601SJan Kiszkaconfig JAILHOUSE_GUEST 8784a362601SJan Kiszka bool "Jailhouse non-root cell support" 879abde587bSArnd Bergmann depends on X86_64 && PCI 88087e65d05SJan Kiszka select X86_PM_TIMER 881a7f7f624SMasahiro Yamada help 8824a362601SJan Kiszka This option allows to run Linux as guest in a Jailhouse non-root 8834a362601SJan Kiszka cell. You can leave this option disabled if you only want to start 8844a362601SJan Kiszka Jailhouse and run Linux afterwards in the root cell. 8854a362601SJan Kiszka 886ec7972c9SZhao Yakuiconfig ACRN_GUEST 887ec7972c9SZhao Yakui bool "ACRN Guest support" 888ec7972c9SZhao Yakui depends on X86_64 889498ad393SZhao Yakui select X86_HV_CALLBACK_VECTOR 890ec7972c9SZhao Yakui help 891ec7972c9SZhao Yakui This option allows to run Linux as guest in the ACRN hypervisor. ACRN is 892ec7972c9SZhao Yakui a flexible, lightweight reference open-source hypervisor, built with 893ec7972c9SZhao Yakui real-time and safety-criticality in mind. It is built for embedded 894ec7972c9SZhao Yakui IOT with small footprint and real-time features. More details can be 895ec7972c9SZhao Yakui found in https://projectacrn.org/. 896ec7972c9SZhao Yakui 89759bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST 89859bd54a8SKuppuswamy Sathyanarayanan bool "Intel TDX (Trust Domain Extensions) - Guest Support" 89959bd54a8SKuppuswamy Sathyanarayanan depends on X86_64 && CPU_SUP_INTEL 90059bd54a8SKuppuswamy Sathyanarayanan depends on X86_X2APIC 90175d090fdSKirill A. Shutemov depends on EFI_STUB 90241394e33SKirill A. Shutemov select ARCH_HAS_CC_PLATFORM 903968b4931SKirill A. Shutemov select X86_MEM_ENCRYPT 90477a512e3SSean Christopherson select X86_MCE 90575d090fdSKirill A. Shutemov select UNACCEPTED_MEMORY 90659bd54a8SKuppuswamy Sathyanarayanan help 90759bd54a8SKuppuswamy Sathyanarayanan Support running as a guest under Intel TDX. Without this support, 90859bd54a8SKuppuswamy Sathyanarayanan the guest kernel can not boot or run under TDX. 90959bd54a8SKuppuswamy Sathyanarayanan TDX includes memory encryption and integrity capabilities 91059bd54a8SKuppuswamy Sathyanarayanan which protect the confidentiality and integrity of guest 91159bd54a8SKuppuswamy Sathyanarayanan memory contents and CPU state. TDX guests are protected from 91259bd54a8SKuppuswamy Sathyanarayanan some attacks from the VMM. 91359bd54a8SKuppuswamy Sathyanarayanan 9146276a074SBorislav Petkovendif # HYPERVISOR_GUEST 91597349135SJeremy Fitzhardinge 916506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu" 917506f1d07SSam Ravnborg 918506f1d07SSam Ravnborgconfig HPET_TIMER 9193c2362e6SHarvey Harrison def_bool X86_64 920506f1d07SSam Ravnborg prompt "HPET Timer Support" if X86_32 921a7f7f624SMasahiro Yamada help 922506f1d07SSam Ravnborg Use the IA-PC HPET (High Precision Event Timer) to manage 923506f1d07SSam Ravnborg time in preference to the PIT and RTC, if a HPET is 924506f1d07SSam Ravnborg present. 925506f1d07SSam Ravnborg HPET is the next generation timer replacing legacy 8254s. 926506f1d07SSam Ravnborg The HPET provides a stable time base on SMP 927506f1d07SSam Ravnborg systems, unlike the TSC, but it is more expensive to access, 9284e7f9df2SMichael S. Tsirkin as it is off-chip. The interface used is documented 9294e7f9df2SMichael S. Tsirkin in the HPET spec, revision 1. 930506f1d07SSam Ravnborg 931506f1d07SSam Ravnborg You can safely choose Y here. However, HPET will only be 932506f1d07SSam Ravnborg activated if the platform and the BIOS support this feature. 933506f1d07SSam Ravnborg Otherwise the 8254 will be used for timing services. 934506f1d07SSam Ravnborg 935506f1d07SSam Ravnborg Choose N to continue using the legacy 8254 timer. 936506f1d07SSam Ravnborg 937506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC 9383c2362e6SHarvey Harrison def_bool y 9393228e1dcSAnand K Mistry depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 940506f1d07SSam Ravnborg 9416a108a14SDavid Rientjes# Mark as expert because too many people got it wrong. 942506f1d07SSam Ravnborg# The code disables itself when not needed. 9437ae9392cSThomas Petazzoniconfig DMI 9447ae9392cSThomas Petazzoni default y 945cf074402SArd Biesheuvel select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 9466a108a14SDavid Rientjes bool "Enable DMI scanning" if EXPERT 947a7f7f624SMasahiro Yamada help 9487ae9392cSThomas Petazzoni Enabled scanning of DMI to identify machine quirks. Say Y 9497ae9392cSThomas Petazzoni here unless you have verified that your setup is not 9507ae9392cSThomas Petazzoni affected by entries in the DMI blacklist. Required by PNP 9517ae9392cSThomas Petazzoni BIOS code. 9527ae9392cSThomas Petazzoni 953506f1d07SSam Ravnborgconfig GART_IOMMU 95438901f1cSAndi Kleen bool "Old AMD GART IOMMU support" 955a4ce5a48SChristoph Hellwig select IOMMU_HELPER 956506f1d07SSam Ravnborg select SWIOTLB 95723ac4ae8SAndreas Herrmann depends on X86_64 && PCI && AMD_NB 958a7f7f624SMasahiro Yamada help 959ced3c42cSIngo Molnar Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron 960ced3c42cSIngo Molnar GART based hardware IOMMUs. 961ced3c42cSIngo Molnar 962ced3c42cSIngo Molnar The GART supports full DMA access for devices with 32-bit access 963ced3c42cSIngo Molnar limitations, on systems with more than 3 GB. This is usually needed 964ced3c42cSIngo Molnar for USB, sound, many IDE/SATA chipsets and some other devices. 965ced3c42cSIngo Molnar 966ced3c42cSIngo Molnar Newer systems typically have a modern AMD IOMMU, supported via 967ced3c42cSIngo Molnar the CONFIG_AMD_IOMMU=y config option. 968ced3c42cSIngo Molnar 969ced3c42cSIngo Molnar In normal configurations this driver is only active when needed: 970ced3c42cSIngo Molnar there's more than 3 GB of memory and the system contains a 971ced3c42cSIngo Molnar 32-bit limited device. 972ced3c42cSIngo Molnar 973ced3c42cSIngo Molnar If unsure, say Y. 974506f1d07SSam Ravnborg 9758b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT 9768b766b0fSMichal Suchanek bool 9778b766b0fSMichal Suchanek help 9788b766b0fSMichal Suchanek If true, at least one selected framebuffer driver can take advantage 9798b766b0fSMichal Suchanek of VESA video modes set at an early boot stage via the vga= parameter. 9808b766b0fSMichal Suchanek 9811184dc2fSMike Travisconfig MAXSMP 982ddb0c5a6SSamuel Thibault bool "Enable Maximum number of SMP Processors and NUMA Nodes" 9836ea30386SKees Cook depends on X86_64 && SMP && DEBUG_KERNEL 98436f5101aSMike Travis select CPUMASK_OFFSTACK 985a7f7f624SMasahiro Yamada help 986ddb0c5a6SSamuel Thibault Enable maximum number of CPUS and NUMA Nodes for this architecture. 9871184dc2fSMike Travis If unsure, say N. 988506f1d07SSam Ravnborg 989aec6487eSIngo Molnar# 990aec6487eSIngo Molnar# The maximum number of CPUs supported: 991aec6487eSIngo Molnar# 992aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT, 993aec6487eSIngo Molnar# and which can be configured interactively in the 994aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range. 995aec6487eSIngo Molnar# 996aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on 997aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel. 998aec6487eSIngo Molnar# 999aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable 1000aec6487eSIngo Molnar# interactive configuration. ) 1001aec6487eSIngo Molnar# 1002a0d0bb4dSRandy Dunlap 1003aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN 1004a0d0bb4dSRandy Dunlap int 1005aec6487eSIngo Molnar default NR_CPUS_RANGE_END if MAXSMP 1006a0d0bb4dSRandy Dunlap default 1 if !SMP 1007a0d0bb4dSRandy Dunlap default 2 1008a0d0bb4dSRandy Dunlap 1009aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1010a0d0bb4dSRandy Dunlap int 1011a0d0bb4dSRandy Dunlap depends on X86_32 1012aec6487eSIngo Molnar default 64 if SMP && X86_BIGSMP 1013aec6487eSIngo Molnar default 8 if SMP && !X86_BIGSMP 1014a0d0bb4dSRandy Dunlap default 1 if !SMP 1015a0d0bb4dSRandy Dunlap 1016aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1017a0d0bb4dSRandy Dunlap int 1018a0d0bb4dSRandy Dunlap depends on X86_64 10191edae1aeSScott Wood default 8192 if SMP && CPUMASK_OFFSTACK 10201edae1aeSScott Wood default 512 if SMP && !CPUMASK_OFFSTACK 1021a0d0bb4dSRandy Dunlap default 1 if !SMP 1022aec6487eSIngo Molnar 1023aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1024aec6487eSIngo Molnar int 1025aec6487eSIngo Molnar depends on X86_32 1026aec6487eSIngo Molnar default 32 if X86_BIGSMP 1027aec6487eSIngo Molnar default 8 if SMP 1028aec6487eSIngo Molnar default 1 if !SMP 1029aec6487eSIngo Molnar 1030aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1031aec6487eSIngo Molnar int 1032aec6487eSIngo Molnar depends on X86_64 1033a0d0bb4dSRandy Dunlap default 8192 if MAXSMP 1034a0d0bb4dSRandy Dunlap default 64 if SMP 1035aec6487eSIngo Molnar default 1 if !SMP 1036a0d0bb4dSRandy Dunlap 1037506f1d07SSam Ravnborgconfig NR_CPUS 103836f5101aSMike Travis int "Maximum number of CPUs" if SMP && !MAXSMP 1039aec6487eSIngo Molnar range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END 1040aec6487eSIngo Molnar default NR_CPUS_DEFAULT 1041a7f7f624SMasahiro Yamada help 1042506f1d07SSam Ravnborg This allows you to specify the maximum number of CPUs which this 1043bb61ccc7SJosh Boyer kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum 1044cad14bb9SKirill A. Shutemov supported value is 8192, otherwise the maximum value is 512. The 1045506f1d07SSam Ravnborg minimum value which makes sense is 2. 1046506f1d07SSam Ravnborg 1047aec6487eSIngo Molnar This is purely to save memory: each supported CPU adds about 8KB 1048aec6487eSIngo Molnar to the kernel image. 1049506f1d07SSam Ravnborg 105066558b73STim Chenconfig SCHED_CLUSTER 105166558b73STim Chen bool "Cluster scheduler support" 105266558b73STim Chen depends on SMP 105366558b73STim Chen default y 105466558b73STim Chen help 105566558b73STim Chen Cluster scheduler support improves the CPU scheduler's decision 105666558b73STim Chen making when dealing with machines that have clusters of CPUs. 105766558b73STim Chen Cluster usually means a couple of CPUs which are placed closely 105866558b73STim Chen by sharing mid-level caches, last-level cache tags or internal 105966558b73STim Chen busses. 106066558b73STim Chen 1061506f1d07SSam Ravnborgconfig SCHED_SMT 1062dbe73364SThomas Gleixner def_bool y if SMP 1063506f1d07SSam Ravnborg 1064506f1d07SSam Ravnborgconfig SCHED_MC 10653c2362e6SHarvey Harrison def_bool y 10663c2362e6SHarvey Harrison prompt "Multi-core scheduler support" 1067c8e56d20SBorislav Petkov depends on SMP 1068a7f7f624SMasahiro Yamada help 1069506f1d07SSam Ravnborg Multi-core scheduler support improves the CPU scheduler's decision 1070506f1d07SSam Ravnborg making when dealing with multi-core CPU chips at a cost of slightly 1071506f1d07SSam Ravnborg increased overhead in some places. If unsure say N here. 1072506f1d07SSam Ravnborg 1073de966cf4STim Chenconfig SCHED_MC_PRIO 1074de966cf4STim Chen bool "CPU core priorities scheduler support" 10753598e577SMeng Li depends on SCHED_MC 10763598e577SMeng Li select X86_INTEL_PSTATE if CPU_SUP_INTEL 10773598e577SMeng Li select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI 10780a21fc12SIngo Molnar select CPU_FREQ 1079de966cf4STim Chen default y 1080a7f7f624SMasahiro Yamada help 1081de966cf4STim Chen Intel Turbo Boost Max Technology 3.0 enabled CPUs have a 1082de966cf4STim Chen core ordering determined at manufacturing time, which allows 1083de966cf4STim Chen certain cores to reach higher turbo frequencies (when running 1084de966cf4STim Chen single threaded workloads) than others. 1085de966cf4STim Chen 1086de966cf4STim Chen Enabling this kernel feature teaches the scheduler about 1087de966cf4STim Chen the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the 1088de966cf4STim Chen scheduler's CPU selection logic accordingly, so that higher 1089de966cf4STim Chen overall system performance can be achieved. 1090de966cf4STim Chen 1091de966cf4STim Chen This feature will have no effect on CPUs without this feature. 1092de966cf4STim Chen 1093de966cf4STim Chen If unsure say Y here. 10945e76b2abSTim Chen 109530b8b006SThomas Gleixnerconfig UP_LATE_INIT 109630b8b006SThomas Gleixner def_bool y 1097ba360f88SThomas Gleixner depends on !SMP && X86_LOCAL_APIC 109830b8b006SThomas Gleixner 1099506f1d07SSam Ravnborgconfig X86_UP_APIC 110050849eefSJan Beulich bool "Local APIC support on uniprocessors" if !PCI_MSI 110150849eefSJan Beulich default PCI_MSI 110238a1dfdaSBryan O'Donoghue depends on X86_32 && !SMP && !X86_32_NON_STANDARD 1103a7f7f624SMasahiro Yamada help 1104506f1d07SSam Ravnborg A local APIC (Advanced Programmable Interrupt Controller) is an 1105506f1d07SSam Ravnborg integrated interrupt controller in the CPU. If you have a single-CPU 1106506f1d07SSam Ravnborg system which has a processor with a local APIC, you can say Y here to 1107506f1d07SSam Ravnborg enable and use it. If you say Y here even though your machine doesn't 1108506f1d07SSam Ravnborg have a local APIC, then the kernel will still run with no slowdown at 1109506f1d07SSam Ravnborg all. The local APIC supports CPU-generated self-interrupts (timer, 1110506f1d07SSam Ravnborg performance counters), and the NMI watchdog which detects hard 1111506f1d07SSam Ravnborg lockups. 1112506f1d07SSam Ravnborg 1113506f1d07SSam Ravnborgconfig X86_UP_IOAPIC 1114506f1d07SSam Ravnborg bool "IO-APIC support on uniprocessors" 1115506f1d07SSam Ravnborg depends on X86_UP_APIC 1116a7f7f624SMasahiro Yamada help 1117506f1d07SSam Ravnborg An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an 1118506f1d07SSam Ravnborg SMP-capable replacement for PC-style interrupt controllers. Most 1119506f1d07SSam Ravnborg SMP systems and many recent uniprocessor systems have one. 1120506f1d07SSam Ravnborg 1121506f1d07SSam Ravnborg If you have a single-CPU system with an IO-APIC, you can say Y here 1122506f1d07SSam Ravnborg to use it. If you say Y here even though your machine doesn't have 1123506f1d07SSam Ravnborg an IO-APIC, then the kernel will still run with no slowdown at all. 1124506f1d07SSam Ravnborg 1125506f1d07SSam Ravnborgconfig X86_LOCAL_APIC 11263c2362e6SHarvey Harrison def_bool y 11270dbc6078SThomas Petazzoni depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI 1128b5dc8e6cSJiang Liu select IRQ_DOMAIN_HIERARCHY 1129506f1d07SSam Ravnborg 11302b5e22afSKirill A. Shutemovconfig ACPI_MADT_WAKEUP 11312b5e22afSKirill A. Shutemov def_bool y 11322b5e22afSKirill A. Shutemov depends on X86_64 11332b5e22afSKirill A. Shutemov depends on ACPI 11342b5e22afSKirill A. Shutemov depends on SMP 11352b5e22afSKirill A. Shutemov depends on X86_LOCAL_APIC 11362b5e22afSKirill A. Shutemov 1137506f1d07SSam Ravnborgconfig X86_IO_APIC 1138b1da1e71SJan Beulich def_bool y 1139b1da1e71SJan Beulich depends on X86_LOCAL_APIC || X86_UP_IOAPIC 1140506f1d07SSam Ravnborg 114141b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS 114241b9eb26SStefan Assmann bool "Reroute for broken boot IRQs" 114341b9eb26SStefan Assmann depends on X86_IO_APIC 1144a7f7f624SMasahiro Yamada help 114541b9eb26SStefan Assmann This option enables a workaround that fixes a source of 114641b9eb26SStefan Assmann spurious interrupts. This is recommended when threaded 114741b9eb26SStefan Assmann interrupt handling is used on systems where the generation of 114841b9eb26SStefan Assmann superfluous "boot interrupts" cannot be disabled. 114941b9eb26SStefan Assmann 115041b9eb26SStefan Assmann Some chipsets generate a legacy INTx "boot IRQ" when the IRQ 115141b9eb26SStefan Assmann entry in the chipset's IO-APIC is masked (as, e.g. the RT 115241b9eb26SStefan Assmann kernel does during interrupt handling). On chipsets where this 115341b9eb26SStefan Assmann boot IRQ generation cannot be disabled, this workaround keeps 115441b9eb26SStefan Assmann the original IRQ line masked so that only the equivalent "boot 115541b9eb26SStefan Assmann IRQ" is delivered to the CPUs. The workaround also tells the 115641b9eb26SStefan Assmann kernel to set up the IRQ handler on the boot IRQ line. In this 115741b9eb26SStefan Assmann way only one interrupt is delivered to the kernel. Otherwise 115841b9eb26SStefan Assmann the spurious second interrupt may cause the kernel to bring 115941b9eb26SStefan Assmann down (vital) interrupt lines. 116041b9eb26SStefan Assmann 116141b9eb26SStefan Assmann Only affects "broken" chipsets. Interrupt sharing may be 116241b9eb26SStefan Assmann increased on these systems. 116341b9eb26SStefan Assmann 1164506f1d07SSam Ravnborgconfig X86_MCE 1165bab9bc65SAndi Kleen bool "Machine Check / overheating reporting" 1166648ed940SChen, Gong select GENERIC_ALLOCATOR 1167e57dbaf7SBorislav Petkov default y 1168a7f7f624SMasahiro Yamada help 1169bab9bc65SAndi Kleen Machine Check support allows the processor to notify the 1170bab9bc65SAndi Kleen kernel if it detects a problem (e.g. overheating, data corruption). 1171506f1d07SSam Ravnborg The action the kernel takes depends on the severity of the problem, 1172bab9bc65SAndi Kleen ranging from warning messages to halting the machine. 11734efc0670SAndi Kleen 11745de97c9fSTony Luckconfig X86_MCELOG_LEGACY 11755de97c9fSTony Luck bool "Support for deprecated /dev/mcelog character device" 11765de97c9fSTony Luck depends on X86_MCE 1177a7f7f624SMasahiro Yamada help 11785de97c9fSTony Luck Enable support for /dev/mcelog which is needed by the old mcelog 11795de97c9fSTony Luck userspace logging daemon. Consider switching to the new generation 11805de97c9fSTony Luck rasdaemon solution. 11815de97c9fSTony Luck 1182506f1d07SSam Ravnborgconfig X86_MCE_INTEL 11833c2362e6SHarvey Harrison def_bool y 11843c2362e6SHarvey Harrison prompt "Intel MCE features" 1185c1ebf835SAndi Kleen depends on X86_MCE && X86_LOCAL_APIC 1186a7f7f624SMasahiro Yamada help 1187506f1d07SSam Ravnborg Additional support for intel specific MCE features such as 1188506f1d07SSam Ravnborg the thermal monitor. 1189506f1d07SSam Ravnborg 1190506f1d07SSam Ravnborgconfig X86_MCE_AMD 11913c2362e6SHarvey Harrison def_bool y 11923c2362e6SHarvey Harrison prompt "AMD MCE features" 1193f5382de9SYazen Ghannam depends on X86_MCE && X86_LOCAL_APIC && AMD_NB 1194a7f7f624SMasahiro Yamada help 1195506f1d07SSam Ravnborg Additional support for AMD specific MCE features such as 1196506f1d07SSam Ravnborg the DRAM Error Threshold. 1197506f1d07SSam Ravnborg 11984efc0670SAndi Kleenconfig X86_ANCIENT_MCE 11996fc108a0SJan Beulich bool "Support for old Pentium 5 / WinChip machine checks" 1200c31d9633SAndi Kleen depends on X86_32 && X86_MCE 1201a7f7f624SMasahiro Yamada help 12024efc0670SAndi Kleen Include support for machine check handling on old Pentium 5 or WinChip 12035065a706SMasanari Iida systems. These typically need to be enabled explicitly on the command 12044efc0670SAndi Kleen line. 12054efc0670SAndi Kleen 1206b2762686SAndi Kleenconfig X86_MCE_THRESHOLD 1207b2762686SAndi Kleen depends on X86_MCE_AMD || X86_MCE_INTEL 12086fc108a0SJan Beulich def_bool y 1209b2762686SAndi Kleen 1210ea149b36SAndi Kleenconfig X86_MCE_INJECT 1211bc8e80d5SBorislav Petkov depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS 1212ea149b36SAndi Kleen tristate "Machine check injector support" 1213a7f7f624SMasahiro Yamada help 1214ea149b36SAndi Kleen Provide support for injecting machine checks for testing purposes. 1215ea149b36SAndi Kleen If you don't know what a machine check is and you don't do kernel 1216ea149b36SAndi Kleen QA it is safe to say n. 1217ea149b36SAndi Kleen 121807dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig" 1219e633c65aSKan Liang 12205aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86 12211e642812SIngo Molnar bool "Legacy VM86 support" 1222506f1d07SSam Ravnborg depends on X86_32 1223a7f7f624SMasahiro Yamada help 12245aef51c3SAndy Lutomirski This option allows user programs to put the CPU into V8086 12255aef51c3SAndy Lutomirski mode, which is an 80286-era approximation of 16-bit real mode. 12265aef51c3SAndy Lutomirski 12275aef51c3SAndy Lutomirski Some very old versions of X and/or vbetool require this option 12285aef51c3SAndy Lutomirski for user mode setting. Similarly, DOSEMU will use it if 12295aef51c3SAndy Lutomirski available to accelerate real mode DOS programs. However, any 12305aef51c3SAndy Lutomirski recent version of DOSEMU, X, or vbetool should be fully 12315aef51c3SAndy Lutomirski functional even without kernel VM86 support, as they will all 12321e642812SIngo Molnar fall back to software emulation. Nevertheless, if you are using 12331e642812SIngo Molnar a 16-bit DOS program where 16-bit performance matters, vm86 12341e642812SIngo Molnar mode might be faster than emulation and you might want to 12351e642812SIngo Molnar enable this option. 12365aef51c3SAndy Lutomirski 12371e642812SIngo Molnar Note that any app that works on a 64-bit kernel is unlikely to 12381e642812SIngo Molnar need this option, as 64-bit kernels don't, and can't, support 12391e642812SIngo Molnar V8086 mode. This option is also unrelated to 16-bit protected 12401e642812SIngo Molnar mode and is not needed to run most 16-bit programs under Wine. 12415aef51c3SAndy Lutomirski 12421e642812SIngo Molnar Enabling this option increases the complexity of the kernel 12431e642812SIngo Molnar and slows down exception handling a tiny bit. 12445aef51c3SAndy Lutomirski 12451e642812SIngo Molnar If unsure, say N here. 12465aef51c3SAndy Lutomirski 12475aef51c3SAndy Lutomirskiconfig VM86 12485aef51c3SAndy Lutomirski bool 12495aef51c3SAndy Lutomirski default X86_LEGACY_VM86 125034273f41SH. Peter Anvin 125134273f41SH. Peter Anvinconfig X86_16BIT 125234273f41SH. Peter Anvin bool "Enable support for 16-bit segments" if EXPERT 125334273f41SH. Peter Anvin default y 1254a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 1255a7f7f624SMasahiro Yamada help 125634273f41SH. Peter Anvin This option is required by programs like Wine to run 16-bit 125734273f41SH. Peter Anvin protected mode legacy code on x86 processors. Disabling 125834273f41SH. Peter Anvin this option saves about 300 bytes on i386, or around 6K text 125934273f41SH. Peter Anvin plus 16K runtime memory on x86-64, 126034273f41SH. Peter Anvin 126134273f41SH. Peter Anvinconfig X86_ESPFIX32 126234273f41SH. Peter Anvin def_bool y 126334273f41SH. Peter Anvin depends on X86_16BIT && X86_32 1264506f1d07SSam Ravnborg 1265197725deSH. Peter Anvinconfig X86_ESPFIX64 1266197725deSH. Peter Anvin def_bool y 126734273f41SH. Peter Anvin depends on X86_16BIT && X86_64 1268506f1d07SSam Ravnborg 12691ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION 12701ad83c85SAndy Lutomirski bool "Enable vsyscall emulation" if EXPERT 12711ad83c85SAndy Lutomirski default y 12721ad83c85SAndy Lutomirski depends on X86_64 1273a7f7f624SMasahiro Yamada help 12741ad83c85SAndy Lutomirski This enables emulation of the legacy vsyscall page. Disabling 12751ad83c85SAndy Lutomirski it is roughly equivalent to booting with vsyscall=none, except 12761ad83c85SAndy Lutomirski that it will also disable the helpful warning if a program 12771ad83c85SAndy Lutomirski tries to use a vsyscall. With this option set to N, offending 12781ad83c85SAndy Lutomirski programs will just segfault, citing addresses of the form 12791ad83c85SAndy Lutomirski 0xffffffffff600?00. 12801ad83c85SAndy Lutomirski 12811ad83c85SAndy Lutomirski This option is required by many programs built before 2013, and 12821ad83c85SAndy Lutomirski care should be used even with newer programs if set to N. 12831ad83c85SAndy Lutomirski 12841ad83c85SAndy Lutomirski Disabling this option saves about 7K of kernel size and 12851ad83c85SAndy Lutomirski possibly 4K of additional runtime pagetable memory. 12861ad83c85SAndy Lutomirski 1287111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM 1288111e7b15SThomas Gleixner bool "IOPERM and IOPL Emulation" 1289a24ca997SThomas Gleixner default y 1290a7f7f624SMasahiro Yamada help 1291111e7b15SThomas Gleixner This enables the ioperm() and iopl() syscalls which are necessary 1292111e7b15SThomas Gleixner for legacy applications. 1293111e7b15SThomas Gleixner 1294c8137aceSThomas Gleixner Legacy IOPL support is an overbroad mechanism which allows user 1295c8137aceSThomas Gleixner space aside of accessing all 65536 I/O ports also to disable 1296c8137aceSThomas Gleixner interrupts. To gain this access the caller needs CAP_SYS_RAWIO 1297c8137aceSThomas Gleixner capabilities and permission from potentially active security 1298c8137aceSThomas Gleixner modules. 1299c8137aceSThomas Gleixner 1300c8137aceSThomas Gleixner The emulation restricts the functionality of the syscall to 1301c8137aceSThomas Gleixner only allowing the full range I/O port access, but prevents the 1302a24ca997SThomas Gleixner ability to disable interrupts from user space which would be 1303a24ca997SThomas Gleixner granted if the hardware IOPL mechanism would be used. 1304c8137aceSThomas Gleixner 1305506f1d07SSam Ravnborgconfig TOSHIBA 1306506f1d07SSam Ravnborg tristate "Toshiba Laptop support" 1307506f1d07SSam Ravnborg depends on X86_32 1308a7f7f624SMasahiro Yamada help 1309506f1d07SSam Ravnborg This adds a driver to safely access the System Management Mode of 1310506f1d07SSam Ravnborg the CPU on Toshiba portables with a genuine Toshiba BIOS. It does 1311506f1d07SSam Ravnborg not work on models with a Phoenix BIOS. The System Management Mode 1312506f1d07SSam Ravnborg is used to set the BIOS and power saving options on Toshiba portables. 1313506f1d07SSam Ravnborg 1314506f1d07SSam Ravnborg For information on utilities to make use of this driver see the 1315506f1d07SSam Ravnborg Toshiba Linux utilities web site at: 1316506f1d07SSam Ravnborg <http://www.buzzard.org.uk/toshiba/>. 1317506f1d07SSam Ravnborg 1318506f1d07SSam Ravnborg Say Y if you intend to run this kernel on a Toshiba portable. 1319506f1d07SSam Ravnborg Say N otherwise. 1320506f1d07SSam Ravnborg 1321506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS 13229ba16087SJan Beulich bool "Enable X86 board specific fixups for reboot" 13239ba16087SJan Beulich depends on X86_32 1324a7f7f624SMasahiro Yamada help 1325506f1d07SSam Ravnborg This enables chipset and/or board specific fixups to be done 1326506f1d07SSam Ravnborg in order to get reboot to work correctly. This is only needed on 1327506f1d07SSam Ravnborg some combinations of hardware and BIOS. The symptom, for which 1328506f1d07SSam Ravnborg this config is intended, is when reboot ends with a stalled/hung 1329506f1d07SSam Ravnborg system. 1330506f1d07SSam Ravnborg 1331506f1d07SSam Ravnborg Currently, the only fixup is for the Geode machines using 13325e3a77e9SFlorian Fainelli CS5530A and CS5536 chipsets and the RDC R-321x SoC. 1333506f1d07SSam Ravnborg 1334506f1d07SSam Ravnborg Say Y if you want to enable the fixup. Currently, it's safe to 1335506f1d07SSam Ravnborg enable this option even if you don't need it. 1336506f1d07SSam Ravnborg Say N otherwise. 1337506f1d07SSam Ravnborg 1338506f1d07SSam Ravnborgconfig MICROCODE 1339e6bcfdd7SThomas Gleixner def_bool y 134080030e3dSBorislav Petkov depends on CPU_SUP_AMD || CPU_SUP_INTEL 134180cc9f10SPeter Oruba 1342fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32 1343fdbd4381SThomas Gleixner def_bool y 1344fdbd4381SThomas Gleixner depends on MICROCODE && X86_32 && BLK_DEV_INITRD 1345fdbd4381SThomas Gleixner 1346a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING 1347a77a94f8SBorislav Petkov bool "Late microcode loading (DANGEROUS)" 1348c02f48e0SBorislav Petkov default n 1349634ac23aSThomas Gleixner depends on MICROCODE && SMP 1350a7f7f624SMasahiro Yamada help 1351a77a94f8SBorislav Petkov Loading microcode late, when the system is up and executing instructions 1352a77a94f8SBorislav Petkov is a tricky business and should be avoided if possible. Just the sequence 1353a77a94f8SBorislav Petkov of synchronizing all cores and SMT threads is one fragile dance which does 1354a77a94f8SBorislav Petkov not guarantee that cores might not softlock after the loading. Therefore, 13559407bda8SThomas Gleixner use this at your own risk. Late loading taints the kernel unless the 13569407bda8SThomas Gleixner microcode header indicates that it is safe for late loading via the 13579407bda8SThomas Gleixner minimal revision check. This minimal revision check can be enforced on 13589407bda8SThomas Gleixner the kernel command line with "microcode.minrev=Y". 13599407bda8SThomas Gleixner 13609407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV 13619407bda8SThomas Gleixner bool "Enforce late microcode loading minimal revision check" 13629407bda8SThomas Gleixner default n 13639407bda8SThomas Gleixner depends on MICROCODE_LATE_LOADING 13649407bda8SThomas Gleixner help 13659407bda8SThomas Gleixner To prevent that users load microcode late which modifies already 13669407bda8SThomas Gleixner in use features, newer microcode patches have a minimum revision field 13679407bda8SThomas Gleixner in the microcode header, which tells the kernel which minimum 13689407bda8SThomas Gleixner revision must be active in the CPU to safely load that new microcode 13699407bda8SThomas Gleixner late into the running system. If disabled the check will not 13709407bda8SThomas Gleixner be enforced but the kernel will be tainted when the minimal 13719407bda8SThomas Gleixner revision check fails. 13729407bda8SThomas Gleixner 13739407bda8SThomas Gleixner This minimal revision check can also be controlled via the 13749407bda8SThomas Gleixner "microcode.minrev" parameter on the kernel command line. 13759407bda8SThomas Gleixner 13769407bda8SThomas Gleixner If unsure say Y. 1377506f1d07SSam Ravnborg 1378506f1d07SSam Ravnborgconfig X86_MSR 1379506f1d07SSam Ravnborg tristate "/dev/cpu/*/msr - Model-specific register support" 1380a7f7f624SMasahiro Yamada help 1381506f1d07SSam Ravnborg This device gives privileged processes access to the x86 1382506f1d07SSam Ravnborg Model-Specific Registers (MSRs). It is a character device with 1383506f1d07SSam Ravnborg major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. 1384506f1d07SSam Ravnborg MSR accesses are directed to a specific CPU on multi-processor 1385506f1d07SSam Ravnborg systems. 1386506f1d07SSam Ravnborg 1387506f1d07SSam Ravnborgconfig X86_CPUID 1388506f1d07SSam Ravnborg tristate "/dev/cpu/*/cpuid - CPU information support" 1389a7f7f624SMasahiro Yamada help 1390506f1d07SSam Ravnborg This device gives processes access to the x86 CPUID instruction to 1391506f1d07SSam Ravnborg be executed on a specific processor. It is a character device 1392506f1d07SSam Ravnborg with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to 1393506f1d07SSam Ravnborg /dev/cpu/31/cpuid. 1394506f1d07SSam Ravnborg 1395506f1d07SSam Ravnborgchoice 1396506f1d07SSam Ravnborg prompt "High Memory Support" 13976fc108a0SJan Beulich default HIGHMEM4G 1398506f1d07SSam Ravnborg depends on X86_32 1399506f1d07SSam Ravnborg 1400506f1d07SSam Ravnborgconfig NOHIGHMEM 1401506f1d07SSam Ravnborg bool "off" 1402a7f7f624SMasahiro Yamada help 1403506f1d07SSam Ravnborg Linux can use up to 64 Gigabytes of physical memory on x86 systems. 1404506f1d07SSam Ravnborg However, the address space of 32-bit x86 processors is only 4 1405506f1d07SSam Ravnborg Gigabytes large. That means that, if you have a large amount of 1406506f1d07SSam Ravnborg physical memory, not all of it can be "permanently mapped" by the 1407506f1d07SSam Ravnborg kernel. The physical memory that's not permanently mapped is called 1408506f1d07SSam Ravnborg "high memory". 1409506f1d07SSam Ravnborg 1410506f1d07SSam Ravnborg If you are compiling a kernel which will never run on a machine with 1411506f1d07SSam Ravnborg more than 1 Gigabyte total physical RAM, answer "off" here (default 1412506f1d07SSam Ravnborg choice and suitable for most users). This will result in a "3GB/1GB" 1413506f1d07SSam Ravnborg split: 3GB are mapped so that each process sees a 3GB virtual memory 1414506f1d07SSam Ravnborg space and the remaining part of the 4GB virtual memory space is used 1415506f1d07SSam Ravnborg by the kernel to permanently map as much physical memory as 1416506f1d07SSam Ravnborg possible. 1417506f1d07SSam Ravnborg 1418506f1d07SSam Ravnborg If the machine has between 1 and 4 Gigabytes physical RAM, then 1419506f1d07SSam Ravnborg answer "4GB" here. 1420506f1d07SSam Ravnborg 1421506f1d07SSam Ravnborg If more than 4 Gigabytes is used then answer "64GB" here. This 1422506f1d07SSam Ravnborg selection turns Intel PAE (Physical Address Extension) mode on. 1423506f1d07SSam Ravnborg PAE implements 3-level paging on IA32 processors. PAE is fully 1424506f1d07SSam Ravnborg supported by Linux, PAE mode is implemented on all recent Intel 1425506f1d07SSam Ravnborg processors (Pentium Pro and better). NOTE: If you say "64GB" here, 1426506f1d07SSam Ravnborg then the kernel will not boot on CPUs that don't support PAE! 1427506f1d07SSam Ravnborg 1428506f1d07SSam Ravnborg The actual amount of total physical memory will either be 1429506f1d07SSam Ravnborg auto detected or can be forced by using a kernel command line option 1430506f1d07SSam Ravnborg such as "mem=256M". (Try "man bootparam" or see the documentation of 1431506f1d07SSam Ravnborg your boot loader (lilo or loadlin) about how to pass options to the 1432506f1d07SSam Ravnborg kernel at boot time.) 1433506f1d07SSam Ravnborg 1434506f1d07SSam Ravnborg If unsure, say "off". 1435506f1d07SSam Ravnborg 1436506f1d07SSam Ravnborgconfig HIGHMEM4G 1437506f1d07SSam Ravnborg bool "4GB" 1438a7f7f624SMasahiro Yamada help 1439506f1d07SSam Ravnborg Select this if you have a 32-bit processor and between 1 and 4 1440506f1d07SSam Ravnborg gigabytes of physical RAM. 1441506f1d07SSam Ravnborg 1442506f1d07SSam Ravnborgconfig HIGHMEM64G 1443506f1d07SSam Ravnborg bool "64GB" 144488a2b4edSArnd Bergmann depends on X86_HAVE_PAE 1445506f1d07SSam Ravnborg select X86_PAE 1446a7f7f624SMasahiro Yamada help 1447506f1d07SSam Ravnborg Select this if you have a 32-bit processor and more than 4 1448506f1d07SSam Ravnborg gigabytes of physical RAM. 1449506f1d07SSam Ravnborg 1450506f1d07SSam Ravnborgendchoice 1451506f1d07SSam Ravnborg 1452506f1d07SSam Ravnborgchoice 14536a108a14SDavid Rientjes prompt "Memory split" if EXPERT 1454506f1d07SSam Ravnborg default VMSPLIT_3G 1455506f1d07SSam Ravnborg depends on X86_32 1456a7f7f624SMasahiro Yamada help 1457506f1d07SSam Ravnborg Select the desired split between kernel and user memory. 1458506f1d07SSam Ravnborg 1459506f1d07SSam Ravnborg If the address range available to the kernel is less than the 1460506f1d07SSam Ravnborg physical memory installed, the remaining memory will be available 1461506f1d07SSam Ravnborg as "high memory". Accessing high memory is a little more costly 1462506f1d07SSam Ravnborg than low memory, as it needs to be mapped into the kernel first. 1463506f1d07SSam Ravnborg Note that increasing the kernel address space limits the range 1464506f1d07SSam Ravnborg available to user programs, making the address space there 1465506f1d07SSam Ravnborg tighter. Selecting anything other than the default 3G/1G split 1466506f1d07SSam Ravnborg will also likely make your kernel incompatible with binary-only 1467506f1d07SSam Ravnborg kernel modules. 1468506f1d07SSam Ravnborg 1469506f1d07SSam Ravnborg If you are not absolutely sure what you are doing, leave this 1470506f1d07SSam Ravnborg option alone! 1471506f1d07SSam Ravnborg 1472506f1d07SSam Ravnborg config VMSPLIT_3G 1473506f1d07SSam Ravnborg bool "3G/1G user/kernel split" 1474506f1d07SSam Ravnborg config VMSPLIT_3G_OPT 1475506f1d07SSam Ravnborg depends on !X86_PAE 1476506f1d07SSam Ravnborg bool "3G/1G user/kernel split (for full 1G low memory)" 1477506f1d07SSam Ravnborg config VMSPLIT_2G 1478506f1d07SSam Ravnborg bool "2G/2G user/kernel split" 1479506f1d07SSam Ravnborg config VMSPLIT_2G_OPT 1480506f1d07SSam Ravnborg depends on !X86_PAE 1481506f1d07SSam Ravnborg bool "2G/2G user/kernel split (for full 2G low memory)" 1482506f1d07SSam Ravnborg config VMSPLIT_1G 1483506f1d07SSam Ravnborg bool "1G/3G user/kernel split" 1484506f1d07SSam Ravnborgendchoice 1485506f1d07SSam Ravnborg 1486506f1d07SSam Ravnborgconfig PAGE_OFFSET 1487506f1d07SSam Ravnborg hex 1488506f1d07SSam Ravnborg default 0xB0000000 if VMSPLIT_3G_OPT 1489506f1d07SSam Ravnborg default 0x80000000 if VMSPLIT_2G 1490506f1d07SSam Ravnborg default 0x78000000 if VMSPLIT_2G_OPT 1491506f1d07SSam Ravnborg default 0x40000000 if VMSPLIT_1G 1492506f1d07SSam Ravnborg default 0xC0000000 1493506f1d07SSam Ravnborg depends on X86_32 1494506f1d07SSam Ravnborg 1495506f1d07SSam Ravnborgconfig HIGHMEM 14963c2362e6SHarvey Harrison def_bool y 1497506f1d07SSam Ravnborg depends on X86_32 && (HIGHMEM64G || HIGHMEM4G) 1498506f1d07SSam Ravnborg 1499506f1d07SSam Ravnborgconfig X86_PAE 15009ba16087SJan Beulich bool "PAE (Physical Address Extension) Support" 150188a2b4edSArnd Bergmann depends on X86_32 && X86_HAVE_PAE 1502d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 15039d99c712SChristian Melki select SWIOTLB 1504a7f7f624SMasahiro Yamada help 1505506f1d07SSam Ravnborg PAE is required for NX support, and furthermore enables 1506506f1d07SSam Ravnborg larger swapspace support for non-overcommit purposes. It 1507506f1d07SSam Ravnborg has the cost of more pagetable lookup overhead, and also 1508506f1d07SSam Ravnborg consumes more pagetable space per process. 1509506f1d07SSam Ravnborg 151077ef56e4SKirill A. Shutemovconfig X86_5LEVEL 151177ef56e4SKirill A. Shutemov bool "Enable 5-level page tables support" 151218ec1eafSKirill A. Shutemov default y 1513eedb92abSKirill A. Shutemov select DYNAMIC_MEMORY_LAYOUT 1514162434e7SKirill A. Shutemov select SPARSEMEM_VMEMMAP 151577ef56e4SKirill A. Shutemov depends on X86_64 1516a7f7f624SMasahiro Yamada help 151777ef56e4SKirill A. Shutemov 5-level paging enables access to larger address space: 151877ef56e4SKirill A. Shutemov up to 128 PiB of virtual address space and 4 PiB of 151977ef56e4SKirill A. Shutemov physical address space. 152077ef56e4SKirill A. Shutemov 152177ef56e4SKirill A. Shutemov It will be supported by future Intel CPUs. 152277ef56e4SKirill A. Shutemov 15236657fca0SKirill A. Shutemov A kernel with the option enabled can be booted on machines that 15246657fca0SKirill A. Shutemov support 4- or 5-level paging. 152577ef56e4SKirill A. Shutemov 1526ff61f079SJonathan Corbet See Documentation/arch/x86/x86_64/5level-paging.rst for more 152777ef56e4SKirill A. Shutemov information. 152877ef56e4SKirill A. Shutemov 152977ef56e4SKirill A. Shutemov Say N if unsure. 153077ef56e4SKirill A. Shutemov 153110971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES 1532e5008abeSLuis R. Rodriguez def_bool y 15332e1da13fSVlastimil Babka depends on X86_64 1534a7f7f624SMasahiro Yamada help 153510971ab2SIngo Molnar Certain kernel features effectively disable kernel 153610971ab2SIngo Molnar linear 1 GB mappings (even if the CPU otherwise 153710971ab2SIngo Molnar supports them), so don't confuse the user by printing 153810971ab2SIngo Molnar that we have them enabled. 15399e899816SNick Piggin 15405c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS 15415c280cf6SThomas Gleixner bool "Enable statistic for Change Page Attribute" 15425c280cf6SThomas Gleixner depends on DEBUG_FS 1543a7f7f624SMasahiro Yamada help 1544b75baaf3SIngo Molnar Expose statistics about the Change Page Attribute mechanism, which 1545a943245aSColin Ian King helps to determine the effectiveness of preserving large and huge 15465c280cf6SThomas Gleixner page mappings when mapping protections are changed. 15475c280cf6SThomas Gleixner 154820f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT 154920f07a04SKirill A. Shutemov select ARCH_HAS_FORCE_DMA_UNENCRYPTED 155020f07a04SKirill A. Shutemov select DYNAMIC_PHYSICAL_MASK 155120f07a04SKirill A. Shutemov def_bool n 155220f07a04SKirill A. Shutemov 15537744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT 15547744ccdbSTom Lendacky bool "AMD Secure Memory Encryption (SME) support" 15557744ccdbSTom Lendacky depends on X86_64 && CPU_SUP_AMD 15566c321179STom Lendacky depends on EFI_STUB 155782fef0adSDavid Rientjes select DMA_COHERENT_POOL 1558ce9084baSArd Biesheuvel select ARCH_USE_MEMREMAP_PROT 1559597cfe48SJoerg Roedel select INSTRUCTION_DECODER 1560aa5a4611STom Lendacky select ARCH_HAS_CC_PLATFORM 156120f07a04SKirill A. Shutemov select X86_MEM_ENCRYPT 15626c321179STom Lendacky select UNACCEPTED_MEMORY 1563a7f7f624SMasahiro Yamada help 15647744ccdbSTom Lendacky Say yes to enable support for the encryption of system memory. 15657744ccdbSTom Lendacky This requires an AMD processor that supports Secure Memory 15667744ccdbSTom Lendacky Encryption (SME). 15677744ccdbSTom Lendacky 1568506f1d07SSam Ravnborg# Common NUMA Features 1569506f1d07SSam Ravnborgconfig NUMA 1570e133f6eaSRandy Dunlap bool "NUMA Memory Allocation and Scheduler Support" 1571506f1d07SSam Ravnborg depends on SMP 1572b5660ba7SH. Peter Anvin depends on X86_64 || (X86_32 && HIGHMEM64G && X86_BIGSMP) 1573b5660ba7SH. Peter Anvin default y if X86_BIGSMP 15747ecd19cfSKefeng Wang select USE_PERCPU_NUMA_NODE_ID 15750c436a58SSaurabh Sengar select OF_NUMA if OF 1576a7f7f624SMasahiro Yamada help 1577e133f6eaSRandy Dunlap Enable NUMA (Non-Uniform Memory Access) support. 1578fd51b2d7SKOSAKI Motohiro 1579506f1d07SSam Ravnborg The kernel will try to allocate memory used by a CPU on the 1580506f1d07SSam Ravnborg local memory controller of the CPU and add some more 1581506f1d07SSam Ravnborg NUMA awareness to the kernel. 1582506f1d07SSam Ravnborg 1583c280ea5eSIngo Molnar For 64-bit this is recommended if the system is Intel Core i7 1584fd51b2d7SKOSAKI Motohiro (or later), AMD Opteron, or EM64T NUMA. 1585fd51b2d7SKOSAKI Motohiro 1586b5660ba7SH. Peter Anvin For 32-bit this is only needed if you boot a 32-bit 15877cf6c945SDavid Rientjes kernel on a 64-bit NUMA platform. 1588fd51b2d7SKOSAKI Motohiro 1589fd51b2d7SKOSAKI Motohiro Otherwise, you should say N. 1590506f1d07SSam Ravnborg 1591eec1d4faSHans Rosenfeldconfig AMD_NUMA 15923c2362e6SHarvey Harrison def_bool y 15933c2362e6SHarvey Harrison prompt "Old style AMD Opteron NUMA detection" 15945da0ef9aSTejun Heo depends on X86_64 && NUMA && PCI 1595a7f7f624SMasahiro Yamada help 1596eec1d4faSHans Rosenfeld Enable AMD NUMA node topology detection. You should say Y here if 1597eec1d4faSHans Rosenfeld you have a multi processor AMD system. This uses an old method to 1598eec1d4faSHans Rosenfeld read the NUMA configuration directly from the builtin Northbridge 1599eec1d4faSHans Rosenfeld of Opteron. It is recommended to use X86_64_ACPI_NUMA instead, 1600eec1d4faSHans Rosenfeld which also takes priority if both are compiled in. 1601506f1d07SSam Ravnborg 1602506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA 16033c2362e6SHarvey Harrison def_bool y 16043c2362e6SHarvey Harrison prompt "ACPI NUMA detection" 1605506f1d07SSam Ravnborg depends on X86_64 && NUMA && ACPI && PCI 1606506f1d07SSam Ravnborg select ACPI_NUMA 1607a7f7f624SMasahiro Yamada help 1608506f1d07SSam Ravnborg Enable ACPI SRAT based node topology detection. 1609506f1d07SSam Ravnborg 1610506f1d07SSam Ravnborgconfig NODES_SHIFT 1611d25e26b6SLinus Torvalds int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP 161251591e31SDavid Rientjes range 1 10 161351591e31SDavid Rientjes default "10" if MAXSMP 1614506f1d07SSam Ravnborg default "6" if X86_64 1615506f1d07SSam Ravnborg default "3" 1616a9ee6cf5SMike Rapoport depends on NUMA 1617a7f7f624SMasahiro Yamada help 16181184dc2fSMike Travis Specify the maximum number of NUMA Nodes available on the target 1619692105b8SMatt LaPlante system. Increases memory reserved to accommodate various tables. 1620506f1d07SSam Ravnborg 1621506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE 1622506f1d07SSam Ravnborg def_bool y 16233b16651fSTejun Heo depends on X86_32 && !NUMA 1624506f1d07SSam Ravnborg 1625506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE 1626506f1d07SSam Ravnborg def_bool y 16276ea30386SKees Cook depends on X86_64 || NUMA || X86_32 || X86_32_NON_STANDARD 1628506f1d07SSam Ravnborg select SPARSEMEM_STATIC if X86_32 1629506f1d07SSam Ravnborg select SPARSEMEM_VMEMMAP_ENABLE if X86_64 1630506f1d07SSam Ravnborg 16313b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT 16326ad57f7fSMike Rapoport def_bool X86_64 || (NUMA && X86_32) 16333b16651fSTejun Heo 1634506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL 1635506f1d07SSam Ravnborg def_bool y 16364eda2bc3SDavid Hildenbrand depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE 1637506f1d07SSam Ravnborg 1638506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE 1639a0842b70SToshi Kani bool "Enable sysfs memory/probe interface" 16405c11f00bSDavid Hildenbrand depends on MEMORY_HOTPLUG 1641a0842b70SToshi Kani help 1642a0842b70SToshi Kani This option enables a sysfs memory/probe interface for testing. 1643cb1aaebeSMauro Carvalho Chehab See Documentation/admin-guide/mm/memory-hotplug.rst for more information. 1644a0842b70SToshi Kani If you are unsure how to answer this question, answer N. 1645506f1d07SSam Ravnborg 16463b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT 16473b16651fSTejun Heo def_bool y 16483b16651fSTejun Heo depends on X86_64 && PROC_KCORE 16493b16651fSTejun Heo 1650a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE 1651a29815a3SAvi Kivity hex 1652a29815a3SAvi Kivity default 0 if X86_32 1653a29815a3SAvi Kivity default 0xdead000000000000 if X86_64 1654a29815a3SAvi Kivity 16557a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE 16567a67832cSDan Williams bool 16577a67832cSDan Williams 1658ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY 16597a67832cSDan Williams tristate "Support non-standard NVDIMMs and ADR protected memory" 16609f53f9faSDan Williams depends on PHYS_ADDR_T_64BIT 16619f53f9faSDan Williams depends on BLK_DEV 16627a67832cSDan Williams select X86_PMEM_LEGACY_DEVICE 16637b27a862SDan Williams select NUMA_KEEP_MEMINFO if NUMA 16649f53f9faSDan Williams select LIBNVDIMM 1665ec776ef6SChristoph Hellwig help 1666ec776ef6SChristoph Hellwig Treat memory marked using the non-standard e820 type of 12 as used 1667ec776ef6SChristoph Hellwig by the Intel Sandy Bridge-EP reference BIOS as protected memory. 1668ec776ef6SChristoph Hellwig The kernel will offer these regions to the 'pmem' driver so 1669ec776ef6SChristoph Hellwig they can be used for persistent storage. 1670ec776ef6SChristoph Hellwig 1671ec776ef6SChristoph Hellwig Say Y if unsure. 1672ec776ef6SChristoph Hellwig 1673506f1d07SSam Ravnborgconfig HIGHPTE 1674506f1d07SSam Ravnborg bool "Allocate 3rd-level pagetables from highmem" 16756fc108a0SJan Beulich depends on HIGHMEM 1676a7f7f624SMasahiro Yamada help 1677506f1d07SSam Ravnborg The VM uses one page table entry for each page of physical memory. 1678506f1d07SSam Ravnborg For systems with a lot of RAM, this can be wasteful of precious 1679506f1d07SSam Ravnborg low memory. Setting this option will put user-space page table 1680506f1d07SSam Ravnborg entries in high memory. 1681506f1d07SSam Ravnborg 16829f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION 16839f077871SJeremy Fitzhardinge bool "Check for low memory corruption" 1684a7f7f624SMasahiro Yamada help 16859f077871SJeremy Fitzhardinge Periodically check for memory corruption in low memory, which 16869f077871SJeremy Fitzhardinge is suspected to be caused by BIOS. Even when enabled in the 16879f077871SJeremy Fitzhardinge configuration, it is disabled at runtime. Enable it by 16889f077871SJeremy Fitzhardinge setting "memory_corruption_check=1" on the kernel command 16899f077871SJeremy Fitzhardinge line. By default it scans the low 64k of memory every 60 16909f077871SJeremy Fitzhardinge seconds; see the memory_corruption_check_size and 16919f077871SJeremy Fitzhardinge memory_corruption_check_period parameters in 16928c27ceffSMauro Carvalho Chehab Documentation/admin-guide/kernel-parameters.rst to adjust this. 16939f077871SJeremy Fitzhardinge 16949f077871SJeremy Fitzhardinge When enabled with the default parameters, this option has 16959f077871SJeremy Fitzhardinge almost no overhead, as it reserves a relatively small amount 16969f077871SJeremy Fitzhardinge of memory and scans it infrequently. It both detects corruption 16979f077871SJeremy Fitzhardinge and prevents it from affecting the running system. 16989f077871SJeremy Fitzhardinge 16999f077871SJeremy Fitzhardinge It is, however, intended as a diagnostic tool; if repeatable 17009f077871SJeremy Fitzhardinge BIOS-originated corruption always affects the same memory, 17019f077871SJeremy Fitzhardinge you can use memmap= to prevent the kernel from using that 17029f077871SJeremy Fitzhardinge memory. 17039f077871SJeremy Fitzhardinge 1704c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK 1705c885df50SJeremy Fitzhardinge bool "Set the default setting of memory_corruption_check" 1706c885df50SJeremy Fitzhardinge depends on X86_CHECK_BIOS_CORRUPTION 1707c885df50SJeremy Fitzhardinge default y 1708a7f7f624SMasahiro Yamada help 1709c885df50SJeremy Fitzhardinge Set whether the default state of memory_corruption_check is 1710c885df50SJeremy Fitzhardinge on or off. 1711c885df50SJeremy Fitzhardinge 1712506f1d07SSam Ravnborgconfig MATH_EMULATION 1713506f1d07SSam Ravnborg bool 1714a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 171587d6021bSArnd Bergmann prompt "Math emulation" if X86_32 && (M486SX || MELAN) 1716a7f7f624SMasahiro Yamada help 1717506f1d07SSam Ravnborg Linux can emulate a math coprocessor (used for floating point 1718506f1d07SSam Ravnborg operations) if you don't have one. 486DX and Pentium processors have 1719506f1d07SSam Ravnborg a math coprocessor built in, 486SX and 386 do not, unless you added 1720506f1d07SSam Ravnborg a 487DX or 387, respectively. (The messages during boot time can 1721506f1d07SSam Ravnborg give you some hints here ["man dmesg"].) Everyone needs either a 1722506f1d07SSam Ravnborg coprocessor or this emulation. 1723506f1d07SSam Ravnborg 1724506f1d07SSam Ravnborg If you don't have a math coprocessor, you need to say Y here; if you 1725506f1d07SSam Ravnborg say Y here even though you have a coprocessor, the coprocessor will 1726506f1d07SSam Ravnborg be used nevertheless. (This behavior can be changed with the kernel 1727506f1d07SSam Ravnborg command line option "no387", which comes handy if your coprocessor 1728506f1d07SSam Ravnborg is broken. Try "man bootparam" or see the documentation of your boot 1729506f1d07SSam Ravnborg loader (lilo or loadlin) about how to pass options to the kernel at 1730506f1d07SSam Ravnborg boot time.) This means that it is a good idea to say Y here if you 1731506f1d07SSam Ravnborg intend to use this kernel on different machines. 1732506f1d07SSam Ravnborg 1733506f1d07SSam Ravnborg More information about the internals of the Linux math coprocessor 1734506f1d07SSam Ravnborg emulation can be found in <file:arch/x86/math-emu/README>. 1735506f1d07SSam Ravnborg 1736506f1d07SSam Ravnborg If you are not sure, say Y; apart from resulting in a 66 KB bigger 1737506f1d07SSam Ravnborg kernel, it won't hurt. 1738506f1d07SSam Ravnborg 1739506f1d07SSam Ravnborgconfig MTRR 17406fc108a0SJan Beulich def_bool y 17416a108a14SDavid Rientjes prompt "MTRR (Memory Type Range Register) support" if EXPERT 1742a7f7f624SMasahiro Yamada help 1743506f1d07SSam Ravnborg On Intel P6 family processors (Pentium Pro, Pentium II and later) 1744506f1d07SSam Ravnborg the Memory Type Range Registers (MTRRs) may be used to control 1745506f1d07SSam Ravnborg processor access to memory ranges. This is most useful if you have 1746506f1d07SSam Ravnborg a video (VGA) card on a PCI or AGP bus. Enabling write-combining 1747506f1d07SSam Ravnborg allows bus write transfers to be combined into a larger transfer 1748506f1d07SSam Ravnborg before bursting over the PCI/AGP bus. This can increase performance 1749506f1d07SSam Ravnborg of image write operations 2.5 times or more. Saying Y here creates a 1750506f1d07SSam Ravnborg /proc/mtrr file which may be used to manipulate your processor's 1751506f1d07SSam Ravnborg MTRRs. Typically the X server should use this. 1752506f1d07SSam Ravnborg 1753506f1d07SSam Ravnborg This code has a reasonably generic interface so that similar 1754506f1d07SSam Ravnborg control registers on other processors can be easily supported 1755506f1d07SSam Ravnborg as well: 1756506f1d07SSam Ravnborg 1757506f1d07SSam Ravnborg The Cyrix 6x86, 6x86MX and M II processors have Address Range 1758506f1d07SSam Ravnborg Registers (ARRs) which provide a similar functionality to MTRRs. For 1759506f1d07SSam Ravnborg these, the ARRs are used to emulate the MTRRs. 1760506f1d07SSam Ravnborg The AMD K6-2 (stepping 8 and above) and K6-3 processors have two 1761506f1d07SSam Ravnborg MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing 1762506f1d07SSam Ravnborg write-combining. All of these processors are supported by this code 1763506f1d07SSam Ravnborg and it makes sense to say Y here if you have one of them. 1764506f1d07SSam Ravnborg 1765506f1d07SSam Ravnborg Saying Y here also fixes a problem with buggy SMP BIOSes which only 1766506f1d07SSam Ravnborg set the MTRRs for the boot CPU and not for the secondary CPUs. This 1767506f1d07SSam Ravnborg can lead to all sorts of problems, so it's good to say Y here. 1768506f1d07SSam Ravnborg 1769506f1d07SSam Ravnborg You can safely say Y even if your machine doesn't have MTRRs, you'll 1770506f1d07SSam Ravnborg just add about 9 KB to your kernel. 1771506f1d07SSam Ravnborg 1772ff61f079SJonathan Corbet See <file:Documentation/arch/x86/mtrr.rst> for more information. 1773506f1d07SSam Ravnborg 177495ffa243SYinghai Luconfig MTRR_SANITIZER 17752ffb3501SYinghai Lu def_bool y 177695ffa243SYinghai Lu prompt "MTRR cleanup support" 177795ffa243SYinghai Lu depends on MTRR 1778a7f7f624SMasahiro Yamada help 1779aba3728cSThomas Gleixner Convert MTRR layout from continuous to discrete, so X drivers can 1780aba3728cSThomas Gleixner add writeback entries. 178195ffa243SYinghai Lu 1782aba3728cSThomas Gleixner Can be disabled with disable_mtrr_cleanup on the kernel command line. 1783692105b8SMatt LaPlante The largest mtrr entry size for a continuous block can be set with 1784aba3728cSThomas Gleixner mtrr_chunk_size. 178595ffa243SYinghai Lu 17862ffb3501SYinghai Lu If unsure, say Y. 178795ffa243SYinghai Lu 178895ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT 1789f5098d62SYinghai Lu int "MTRR cleanup enable value (0-1)" 1790f5098d62SYinghai Lu range 0 1 1791f5098d62SYinghai Lu default "0" 179295ffa243SYinghai Lu depends on MTRR_SANITIZER 1793a7f7f624SMasahiro Yamada help 1794f5098d62SYinghai Lu Enable mtrr cleanup default value 179595ffa243SYinghai Lu 179612031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT 179712031a62SYinghai Lu int "MTRR cleanup spare reg num (0-7)" 179812031a62SYinghai Lu range 0 7 179912031a62SYinghai Lu default "1" 180012031a62SYinghai Lu depends on MTRR_SANITIZER 1801a7f7f624SMasahiro Yamada help 180212031a62SYinghai Lu mtrr cleanup spare entries default, it can be changed via 1803aba3728cSThomas Gleixner mtrr_spare_reg_nr=N on the kernel command line. 180412031a62SYinghai Lu 18052e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT 18066fc108a0SJan Beulich def_bool y 18076a108a14SDavid Rientjes prompt "x86 PAT support" if EXPERT 18082a8a2719SIngo Molnar depends on MTRR 18097a87225aSMatthew Wilcox (Oracle) select ARCH_USES_PG_ARCH_2 1810a7f7f624SMasahiro Yamada help 18112e5d9c85Svenkatesh.pallipadi@intel.com Use PAT attributes to setup page level cache control. 1812042b78e4SVenki Pallipadi 18132e5d9c85Svenkatesh.pallipadi@intel.com PATs are the modern equivalents of MTRRs and are much more 18142e5d9c85Svenkatesh.pallipadi@intel.com flexible than MTRRs. 18152e5d9c85Svenkatesh.pallipadi@intel.com 18162e5d9c85Svenkatesh.pallipadi@intel.com Say N here if you see bootup problems (boot crash, boot hang, 1817042b78e4SVenki Pallipadi spontaneous reboots) or a non-working video driver. 18182e5d9c85Svenkatesh.pallipadi@intel.com 18192e5d9c85Svenkatesh.pallipadi@intel.com If unsure, say Y. 18202e5d9c85Svenkatesh.pallipadi@intel.com 1821b971880fSBabu Mogerconfig X86_UMIP 1822796ebc81SRicardo Neri def_bool y 1823b971880fSBabu Moger prompt "User Mode Instruction Prevention" if EXPERT 1824a7f7f624SMasahiro Yamada help 1825b971880fSBabu Moger User Mode Instruction Prevention (UMIP) is a security feature in 1826b971880fSBabu Moger some x86 processors. If enabled, a general protection fault is 1827b971880fSBabu Moger issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are 1828b971880fSBabu Moger executed in user mode. These instructions unnecessarily expose 1829b971880fSBabu Moger information about the hardware state. 1830796ebc81SRicardo Neri 1831796ebc81SRicardo Neri The vast majority of applications do not use these instructions. 1832796ebc81SRicardo Neri For the very few that do, software emulation is provided in 1833796ebc81SRicardo Neri specific cases in protected and virtual-8086 modes. Emulated 1834796ebc81SRicardo Neri results are dummy. 1835aa35f896SRicardo Neri 1836156ff4a5SPeter Zijlstraconfig CC_HAS_IBT 1837156ff4a5SPeter Zijlstra # GCC >= 9 and binutils >= 2.29 1838156ff4a5SPeter Zijlstra # Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654 1839156ff4a5SPeter Zijlstra # Clang/LLVM >= 14 1840262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f 1841262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332 1842156ff4a5SPeter Zijlstra def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \ 1843262448f3SNathan Chancellor (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \ 1844156ff4a5SPeter Zijlstra $(as-instr,endbr64) 1845156ff4a5SPeter Zijlstra 184618e66b69SRick Edgecombeconfig X86_CET 184718e66b69SRick Edgecombe def_bool n 184818e66b69SRick Edgecombe help 184918e66b69SRick Edgecombe CET features configured (Shadow stack or IBT) 185018e66b69SRick Edgecombe 1851156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT 1852156ff4a5SPeter Zijlstra prompt "Indirect Branch Tracking" 18534fd5f70cSKees Cook def_bool y 185403f16cd0SJosh Poimboeuf depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL 1855f6a2c2b2SNathan Chancellor # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f 1856f6a2c2b2SNathan Chancellor depends on !LD_IS_LLD || LLD_VERSION >= 140000 185703f16cd0SJosh Poimboeuf select OBJTOOL 185818e66b69SRick Edgecombe select X86_CET 1859156ff4a5SPeter Zijlstra help 1860156ff4a5SPeter Zijlstra Build the kernel with support for Indirect Branch Tracking, a 1861156ff4a5SPeter Zijlstra hardware support course-grain forward-edge Control Flow Integrity 1862156ff4a5SPeter Zijlstra protection. It enforces that all indirect calls must land on 1863156ff4a5SPeter Zijlstra an ENDBR instruction, as such, the compiler will instrument the 1864156ff4a5SPeter Zijlstra code with them to make this happen. 1865156ff4a5SPeter Zijlstra 1866ed53a0d9SPeter Zijlstra In addition to building the kernel with IBT, seal all functions that 18674cdfc11bSNur Hussein are not indirect call targets, avoiding them ever becoming one. 1868ed53a0d9SPeter Zijlstra 1869ed53a0d9SPeter Zijlstra This requires LTO like objtool runs and will slow down the build. It 1870ed53a0d9SPeter Zijlstra does significantly reduce the number of ENDBR instructions in the 1871ed53a0d9SPeter Zijlstra kernel image. 1872ed53a0d9SPeter Zijlstra 187335e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS 187438f3e775SBabu Moger prompt "Memory Protection Keys" 187535e97790SDave Hansen def_bool y 1876284244a9SDave Hansen # Note: only available in 64-bit mode 187738f3e775SBabu Moger depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD) 187852c8e601SIngo Molnar select ARCH_USES_HIGH_VMA_FLAGS 187952c8e601SIngo Molnar select ARCH_HAS_PKEYS 1880a7f7f624SMasahiro Yamada help 1881284244a9SDave Hansen Memory Protection Keys provides a mechanism for enforcing 1882284244a9SDave Hansen page-based protections, but without requiring modification of the 1883284244a9SDave Hansen page tables when an application changes protection domains. 1884284244a9SDave Hansen 18851eecbcdcSMauro Carvalho Chehab For details, see Documentation/core-api/protection-keys.rst 1886284244a9SDave Hansen 1887284244a9SDave Hansen If unsure, say y. 188835e97790SDave Hansen 18895626f8d4SJoey Goulyconfig ARCH_PKEY_BITS 18905626f8d4SJoey Gouly int 18915626f8d4SJoey Gouly default 4 18925626f8d4SJoey Gouly 1893db616173SMichal Hockochoice 1894db616173SMichal Hocko prompt "TSX enable mode" 1895db616173SMichal Hocko depends on CPU_SUP_INTEL 1896db616173SMichal Hocko default X86_INTEL_TSX_MODE_OFF 1897db616173SMichal Hocko help 1898db616173SMichal Hocko Intel's TSX (Transactional Synchronization Extensions) feature 1899db616173SMichal Hocko allows to optimize locking protocols through lock elision which 1900db616173SMichal Hocko can lead to a noticeable performance boost. 1901db616173SMichal Hocko 1902db616173SMichal Hocko On the other hand it has been shown that TSX can be exploited 1903db616173SMichal Hocko to form side channel attacks (e.g. TAA) and chances are there 1904db616173SMichal Hocko will be more of those attacks discovered in the future. 1905db616173SMichal Hocko 1906db616173SMichal Hocko Therefore TSX is not enabled by default (aka tsx=off). An admin 1907db616173SMichal Hocko might override this decision by tsx=on the command line parameter. 1908db616173SMichal Hocko Even with TSX enabled, the kernel will attempt to enable the best 1909db616173SMichal Hocko possible TAA mitigation setting depending on the microcode available 1910db616173SMichal Hocko for the particular machine. 1911db616173SMichal Hocko 1912db616173SMichal Hocko This option allows to set the default tsx mode between tsx=on, =off 1913db616173SMichal Hocko and =auto. See Documentation/admin-guide/kernel-parameters.txt for more 1914db616173SMichal Hocko details. 1915db616173SMichal Hocko 1916db616173SMichal Hocko Say off if not sure, auto if TSX is in use but it should be used on safe 1917db616173SMichal Hocko platforms or on if TSX is in use and the security aspect of tsx is not 1918db616173SMichal Hocko relevant. 1919db616173SMichal Hocko 1920db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF 1921db616173SMichal Hocko bool "off" 1922db616173SMichal Hocko help 1923db616173SMichal Hocko TSX is disabled if possible - equals to tsx=off command line parameter. 1924db616173SMichal Hocko 1925db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON 1926db616173SMichal Hocko bool "on" 1927db616173SMichal Hocko help 1928db616173SMichal Hocko TSX is always enabled on TSX capable HW - equals the tsx=on command 1929db616173SMichal Hocko line parameter. 1930db616173SMichal Hocko 1931db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO 1932db616173SMichal Hocko bool "auto" 1933db616173SMichal Hocko help 1934db616173SMichal Hocko TSX is enabled on TSX capable HW that is believed to be safe against 1935db616173SMichal Hocko side channel attacks- equals the tsx=auto command line parameter. 1936db616173SMichal Hockoendchoice 1937db616173SMichal Hocko 1938e7e05452SSean Christophersonconfig X86_SGX 1939e7e05452SSean Christopherson bool "Software Guard eXtensions (SGX)" 1940b8d1d163SDaniel Sneddon depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC 1941e7e05452SSean Christopherson depends on CRYPTO=y 1942e7e05452SSean Christopherson depends on CRYPTO_SHA256=y 1943e7e05452SSean Christopherson select MMU_NOTIFIER 1944901ddbb9SJarkko Sakkinen select NUMA_KEEP_MEMINFO if NUMA 194540e0e784STony Luck select XARRAY_MULTI 1946e7e05452SSean Christopherson help 1947e7e05452SSean Christopherson Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions 1948e7e05452SSean Christopherson that can be used by applications to set aside private regions of code 1949e7e05452SSean Christopherson and data, referred to as enclaves. An enclave's private memory can 1950e7e05452SSean Christopherson only be accessed by code running within the enclave. Accesses from 1951e7e05452SSean Christopherson outside the enclave, including other enclaves, are disallowed by 1952e7e05452SSean Christopherson hardware. 1953e7e05452SSean Christopherson 1954e7e05452SSean Christopherson If unsure, say N. 1955e7e05452SSean Christopherson 195618e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK 195718e66b69SRick Edgecombe bool "X86 userspace shadow stack" 195818e66b69SRick Edgecombe depends on AS_WRUSS 195918e66b69SRick Edgecombe depends on X86_64 196018e66b69SRick Edgecombe select ARCH_USES_HIGH_VMA_FLAGS 1961bcc9d04eSMark Brown select ARCH_HAS_USER_SHADOW_STACK 196218e66b69SRick Edgecombe select X86_CET 196318e66b69SRick Edgecombe help 196418e66b69SRick Edgecombe Shadow stack protection is a hardware feature that detects function 196518e66b69SRick Edgecombe return address corruption. This helps mitigate ROP attacks. 196618e66b69SRick Edgecombe Applications must be enabled to use it, and old userspace does not 196718e66b69SRick Edgecombe get protection "for free". 196818e66b69SRick Edgecombe 196918e66b69SRick Edgecombe CPUs supporting shadow stacks were first released in 2020. 197018e66b69SRick Edgecombe 197154acee60SDave Hansen See Documentation/arch/x86/shstk.rst for more information. 197218e66b69SRick Edgecombe 197318e66b69SRick Edgecombe If unsure, say N. 197418e66b69SRick Edgecombe 1975c33621b4SKai Huangconfig INTEL_TDX_HOST 1976c33621b4SKai Huang bool "Intel Trust Domain Extensions (TDX) host support" 1977c33621b4SKai Huang depends on CPU_SUP_INTEL 1978c33621b4SKai Huang depends on X86_64 1979c33621b4SKai Huang depends on KVM_INTEL 19803115cabdSKai Huang depends on X86_X2APIC 1981abe8dbabSKai Huang select ARCH_KEEP_MEMBLOCK 1982ac3a2208SKai Huang depends on CONTIG_ALLOC 1983cb8eb06dSDave Hansen depends on !KEXEC_CORE 198483e1bdc9SKai Huang depends on X86_MCE 1985c33621b4SKai Huang help 1986c33621b4SKai Huang Intel Trust Domain Extensions (TDX) protects guest VMs from malicious 1987c33621b4SKai Huang host and certain physical attacks. This option enables necessary TDX 1988c33621b4SKai Huang support in the host kernel to run confidential VMs. 1989c33621b4SKai Huang 1990c33621b4SKai Huang If unsure, say N. 1991c33621b4SKai Huang 1992506f1d07SSam Ravnborgconfig EFI 19939ba16087SJan Beulich bool "EFI runtime service support" 19945b83683fSHuang, Ying depends on ACPI 1995f6ce5002SSergey Vlasov select UCS2_STRING 1996022ee6c5SArd Biesheuvel select EFI_RUNTIME_WRAPPERS 19971ff2fc02STom Lendacky select ARCH_USE_MEMREMAP_PROT 1998aba7e066SArd Biesheuvel select EFI_RUNTIME_MAP if KEXEC_CORE 1999a7f7f624SMasahiro Yamada help 20008b2cb7a8SHuang, Ying This enables the kernel to use EFI runtime services that are 2001506f1d07SSam Ravnborg available (such as the EFI variable services). 2002506f1d07SSam Ravnborg 20038b2cb7a8SHuang, Ying This option is only useful on systems that have EFI firmware. 20048b2cb7a8SHuang, Ying In addition, you should use the latest ELILO loader available 20058b2cb7a8SHuang, Ying at <http://elilo.sourceforge.net> in order to take advantage 20068b2cb7a8SHuang, Ying of EFI runtime services. However, even with this option, the 20078b2cb7a8SHuang, Ying resultant kernel should continue to boot on existing non-EFI 20088b2cb7a8SHuang, Ying platforms. 2009506f1d07SSam Ravnborg 2010291f3632SMatt Flemingconfig EFI_STUB 2011291f3632SMatt Fleming bool "EFI stub support" 2012c6dbd3e5SPeter Zijlstra depends on EFI 20137b2a583aSMatt Fleming select RELOCATABLE 2014a7f7f624SMasahiro Yamada help 2015291f3632SMatt Fleming This kernel feature allows a bzImage to be loaded directly 2016291f3632SMatt Fleming by EFI firmware without the use of a bootloader. 2017291f3632SMatt Fleming 20184f4cfa6cSMauro Carvalho Chehab See Documentation/admin-guide/efi-stub.rst for more information. 20190c759662SMatt Fleming 2020cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL 2021cc3fdda2SArd Biesheuvel bool "EFI handover protocol (DEPRECATED)" 2022cc3fdda2SArd Biesheuvel depends on EFI_STUB 2023cc3fdda2SArd Biesheuvel default y 2024cc3fdda2SArd Biesheuvel help 2025cc3fdda2SArd Biesheuvel Select this in order to include support for the deprecated EFI 2026cc3fdda2SArd Biesheuvel handover protocol, which defines alternative entry points into the 2027cc3fdda2SArd Biesheuvel EFI stub. This is a practice that has no basis in the UEFI 2028cc3fdda2SArd Biesheuvel specification, and requires a priori knowledge on the part of the 2029cc3fdda2SArd Biesheuvel bootloader about Linux/x86 specific ways of passing the command line 2030cc3fdda2SArd Biesheuvel and initrd, and where in memory those assets may be loaded. 2031cc3fdda2SArd Biesheuvel 2032cc3fdda2SArd Biesheuvel If in doubt, say Y. Even though the corresponding support is not 2033cc3fdda2SArd Biesheuvel present in upstream GRUB or other bootloaders, most distros build 2034cc3fdda2SArd Biesheuvel GRUB with numerous downstream patches applied, and may rely on the 2035cc3fdda2SArd Biesheuvel handover protocol as as result. 2036cc3fdda2SArd Biesheuvel 20377d453eeeSMatt Flemingconfig EFI_MIXED 20387d453eeeSMatt Fleming bool "EFI mixed-mode support" 20397d453eeeSMatt Fleming depends on EFI_STUB && X86_64 2040a7f7f624SMasahiro Yamada help 20417d453eeeSMatt Fleming Enabling this feature allows a 64-bit kernel to be booted 20427d453eeeSMatt Fleming on a 32-bit firmware, provided that your CPU supports 64-bit 20437d453eeeSMatt Fleming mode. 20447d453eeeSMatt Fleming 20457d453eeeSMatt Fleming Note that it is not possible to boot a mixed-mode enabled 20467d453eeeSMatt Fleming kernel via the EFI boot stub - a bootloader that supports 20477d453eeeSMatt Fleming the EFI handover protocol must be used. 20487d453eeeSMatt Fleming 20497d453eeeSMatt Fleming If unsure, say N. 20507d453eeeSMatt Fleming 20511fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP 20521fff234dSArd Biesheuvel bool "Export EFI runtime maps to sysfs" if EXPERT 20531fff234dSArd Biesheuvel depends on EFI 20541fff234dSArd Biesheuvel help 20551fff234dSArd Biesheuvel Export EFI runtime memory regions to /sys/firmware/efi/runtime-map. 20561fff234dSArd Biesheuvel That memory map is required by the 2nd kernel to set up EFI virtual 20571fff234dSArd Biesheuvel mappings after kexec, but can also be used for debugging purposes. 20581fff234dSArd Biesheuvel 20591fff234dSArd Biesheuvel See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map. 20601fff234dSArd Biesheuvel 20618636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz" 2062506f1d07SSam Ravnborg 20636af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC 20646af51380SEric DeVolder def_bool y 2065506f1d07SSam Ravnborg 20666af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE 2067c1ad12eeSArnd Bergmann def_bool X86_64 2068506f1d07SSam Ravnborg 20696af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE 20706af51380SEric DeVolder def_bool y 20716af51380SEric DeVolder depends on KEXEC_FILE 2072b69a2afdSJonathan McDowell select HAVE_IMA_KEXEC if IMA 207374ca317cSVivek Goyal 2074e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY 2075c1ad12eeSArnd Bergmann def_bool y 2076b799a09fSAKASHI Takahiro 20776af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG 20786af51380SEric DeVolder def_bool y 207999d5cadfSJiri Bohac 20806af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE 20816af51380SEric DeVolder def_bool y 208299d5cadfSJiri Bohac 20836af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG 20846af51380SEric DeVolder def_bool y 208599d5cadfSJiri Bohac 20866af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP 20876af51380SEric DeVolder def_bool y 20888e7d8381SVivek Goyal 20896af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP 20906af51380SEric DeVolder def_bool X86_64 || (X86_32 && HIGHMEM) 20918e7d8381SVivek Goyal 209231daa343SDave Vasilevskyconfig ARCH_DEFAULT_CRASH_DUMP 209331daa343SDave Vasilevsky def_bool y 209431daa343SDave Vasilevsky 2095ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG 2096ea53ad9cSEric DeVolder def_bool y 20973ab83521SHuang Ying 20989c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 209985fcde40SBaoquan He def_bool CRASH_RESERVE 21009c08a2a1SBaoquan He 2101506f1d07SSam Ravnborgconfig PHYSICAL_START 21026a108a14SDavid Rientjes hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 2103ceefccc9SH. Peter Anvin default "0x1000000" 2104a7f7f624SMasahiro Yamada help 2105506f1d07SSam Ravnborg This gives the physical address where the kernel is loaded. 2106506f1d07SSam Ravnborg 210743b1d3e6SChris Koch If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage 210843b1d3e6SChris Koch will decompress itself to above physical address and run from there. 210943b1d3e6SChris Koch Otherwise, bzImage will run from the address where it has been loaded 211043b1d3e6SChris Koch by the boot loader. The only exception is if it is loaded below the 211143b1d3e6SChris Koch above physical address, in which case it will relocate itself there. 2112506f1d07SSam Ravnborg 2113506f1d07SSam Ravnborg In normal kdump cases one does not have to set/change this option 2114506f1d07SSam Ravnborg as now bzImage can be compiled as a completely relocatable image 2115506f1d07SSam Ravnborg (CONFIG_RELOCATABLE=y) and be used to load and run from a different 2116506f1d07SSam Ravnborg address. This option is mainly useful for the folks who don't want 2117506f1d07SSam Ravnborg to use a bzImage for capturing the crash dump and want to use a 2118506f1d07SSam Ravnborg vmlinux instead. vmlinux is not relocatable hence a kernel needs 2119506f1d07SSam Ravnborg to be specifically compiled to run from a specific memory area 2120506f1d07SSam Ravnborg (normally a reserved region) and this option comes handy. 2121506f1d07SSam Ravnborg 2122ceefccc9SH. Peter Anvin So if you are using bzImage for capturing the crash dump, 2123ceefccc9SH. Peter Anvin leave the value here unchanged to 0x1000000 and set 2124ceefccc9SH. Peter Anvin CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux 2125ceefccc9SH. Peter Anvin for capturing the crash dump change this value to start of 2126ceefccc9SH. Peter Anvin the reserved region. In other words, it can be set based on 2127ceefccc9SH. Peter Anvin the "X" value as specified in the "crashkernel=YM@XM" 2128ceefccc9SH. Peter Anvin command line boot parameter passed to the panic-ed 2129330d4810SMauro Carvalho Chehab kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst 2130ceefccc9SH. Peter Anvin for more details about crash dumps. 2131506f1d07SSam Ravnborg 2132506f1d07SSam Ravnborg Usage of bzImage for capturing the crash dump is recommended as 2133506f1d07SSam Ravnborg one does not have to build two kernels. Same kernel can be used 2134506f1d07SSam Ravnborg as production kernel and capture kernel. Above option should have 2135506f1d07SSam Ravnborg gone away after relocatable bzImage support is introduced. But it 2136506f1d07SSam Ravnborg is present because there are users out there who continue to use 2137506f1d07SSam Ravnborg vmlinux for dump capture. This option should go away down the 2138506f1d07SSam Ravnborg line. 2139506f1d07SSam Ravnborg 2140506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2141506f1d07SSam Ravnborg 2142506f1d07SSam Ravnborgconfig RELOCATABLE 214326717808SH. Peter Anvin bool "Build a relocatable kernel" 214426717808SH. Peter Anvin default y 2145a7f7f624SMasahiro Yamada help 2146506f1d07SSam Ravnborg This builds a kernel image that retains relocation information 2147506f1d07SSam Ravnborg so it can be loaded someplace besides the default 1MB. 2148506f1d07SSam Ravnborg The relocations tend to make the kernel binary about 10% larger, 2149506f1d07SSam Ravnborg but are discarded at runtime. 2150506f1d07SSam Ravnborg 2151506f1d07SSam Ravnborg One use is for the kexec on panic case where the recovery kernel 2152506f1d07SSam Ravnborg must live at a different physical address than the primary 2153506f1d07SSam Ravnborg kernel. 2154506f1d07SSam Ravnborg 2155506f1d07SSam Ravnborg Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address 2156506f1d07SSam Ravnborg it has been loaded at and the compile time physical address 21578ab3820fSKees Cook (CONFIG_PHYSICAL_START) is used as the minimum location. 2158506f1d07SSam Ravnborg 21598ab3820fSKees Cookconfig RANDOMIZE_BASE 2160e8581e3dSBaoquan He bool "Randomize the address of the kernel image (KASLR)" 21618ab3820fSKees Cook depends on RELOCATABLE 21626807c846SIngo Molnar default y 2163a7f7f624SMasahiro Yamada help 2164e8581e3dSBaoquan He In support of Kernel Address Space Layout Randomization (KASLR), 2165e8581e3dSBaoquan He this randomizes the physical address at which the kernel image 2166e8581e3dSBaoquan He is decompressed and the virtual address where the kernel 2167e8581e3dSBaoquan He image is mapped, as a security feature that deters exploit 2168e8581e3dSBaoquan He attempts relying on knowledge of the location of kernel 2169e8581e3dSBaoquan He code internals. 2170e8581e3dSBaoquan He 2171ed9f007eSKees Cook On 64-bit, the kernel physical and virtual addresses are 2172ed9f007eSKees Cook randomized separately. The physical address will be anywhere 2173ed9f007eSKees Cook between 16MB and the top of physical memory (up to 64TB). The 2174ed9f007eSKees Cook virtual address will be randomized from 16MB up to 1GB (9 bits 2175ed9f007eSKees Cook of entropy). Note that this also reduces the memory space 2176ed9f007eSKees Cook available to kernel modules from 1.5GB to 1GB. 2177ed9f007eSKees Cook 2178ed9f007eSKees Cook On 32-bit, the kernel physical and virtual addresses are 2179ed9f007eSKees Cook randomized together. They will be randomized from 16MB up to 2180ed9f007eSKees Cook 512MB (8 bits of entropy). 21818ab3820fSKees Cook 2182a653f356SKees Cook Entropy is generated using the RDRAND instruction if it is 2183e8581e3dSBaoquan He supported. If RDTSC is supported, its value is mixed into 2184e8581e3dSBaoquan He the entropy pool as well. If neither RDRAND nor RDTSC are 2185ed9f007eSKees Cook supported, then entropy is read from the i8254 timer. The 2186ed9f007eSKees Cook usable entropy is limited by the kernel being built using 2187ed9f007eSKees Cook 2GB addressing, and that PHYSICAL_ALIGN must be at a 2188ed9f007eSKees Cook minimum of 2MB. As a result, only 10 bits of entropy are 2189ed9f007eSKees Cook theoretically possible, but the implementations are further 2190ed9f007eSKees Cook limited due to memory layouts. 2191e8581e3dSBaoquan He 21926807c846SIngo Molnar If unsure, say Y. 2193da2b6fb9SKees Cook 21948ab3820fSKees Cook# Relocation on x86 needs some additional build support 2195845adf72SH. Peter Anvinconfig X86_NEED_RELOCS 2196845adf72SH. Peter Anvin def_bool y 21978ab3820fSKees Cook depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE) 2198845adf72SH. Peter Anvin 2199506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN 2200a0215061SKees Cook hex "Alignment value to which kernel should be aligned" 22018ab3820fSKees Cook default "0x200000" 2202a0215061SKees Cook range 0x2000 0x1000000 if X86_32 2203a0215061SKees Cook range 0x200000 0x1000000 if X86_64 2204a7f7f624SMasahiro Yamada help 2205506f1d07SSam Ravnborg This value puts the alignment restrictions on physical address 2206506f1d07SSam Ravnborg where kernel is loaded and run from. Kernel is compiled for an 2207506f1d07SSam Ravnborg address which meets above alignment restriction. 2208506f1d07SSam Ravnborg 2209506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2210506f1d07SSam Ravnborg CONFIG_RELOCATABLE is set, kernel will move itself to nearest 2211506f1d07SSam Ravnborg address aligned to above value and run from there. 2212506f1d07SSam Ravnborg 2213506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2214506f1d07SSam Ravnborg CONFIG_RELOCATABLE is not set, kernel will ignore the run time 2215506f1d07SSam Ravnborg load address and decompress itself to the address it has been 2216506f1d07SSam Ravnborg compiled for and run from there. The address for which kernel is 2217506f1d07SSam Ravnborg compiled already meets above alignment restrictions. Hence the 2218506f1d07SSam Ravnborg end result is that kernel runs from a physical address meeting 2219506f1d07SSam Ravnborg above alignment restrictions. 2220506f1d07SSam Ravnborg 2221a0215061SKees Cook On 32-bit this value must be a multiple of 0x2000. On 64-bit 2222a0215061SKees Cook this value must be a multiple of 0x200000. 2223a0215061SKees Cook 2224506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2225506f1d07SSam Ravnborg 2226eedb92abSKirill A. Shutemovconfig DYNAMIC_MEMORY_LAYOUT 2227eedb92abSKirill A. Shutemov bool 2228a7f7f624SMasahiro Yamada help 2229eedb92abSKirill A. Shutemov This option makes base addresses of vmalloc and vmemmap as well as 2230eedb92abSKirill A. Shutemov __PAGE_OFFSET movable during boot. 2231eedb92abSKirill A. Shutemov 22320483e1faSThomas Garnierconfig RANDOMIZE_MEMORY 22330483e1faSThomas Garnier bool "Randomize the kernel memory sections" 22340483e1faSThomas Garnier depends on X86_64 22350483e1faSThomas Garnier depends on RANDOMIZE_BASE 2236eedb92abSKirill A. Shutemov select DYNAMIC_MEMORY_LAYOUT 22370483e1faSThomas Garnier default RANDOMIZE_BASE 2238a7f7f624SMasahiro Yamada help 22390483e1faSThomas Garnier Randomizes the base virtual address of kernel memory sections 22400483e1faSThomas Garnier (physical memory mapping, vmalloc & vmemmap). This security feature 22410483e1faSThomas Garnier makes exploits relying on predictable memory locations less reliable. 22420483e1faSThomas Garnier 22430483e1faSThomas Garnier The order of allocations remains unchanged. Entropy is generated in 22440483e1faSThomas Garnier the same way as RANDOMIZE_BASE. Current implementation in the optimal 22450483e1faSThomas Garnier configuration have in average 30,000 different possible virtual 22460483e1faSThomas Garnier addresses for each memory section. 22470483e1faSThomas Garnier 22486807c846SIngo Molnar If unsure, say Y. 22490483e1faSThomas Garnier 225090397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING 225190397a41SThomas Garnier hex "Physical memory mapping padding" if EXPERT 225290397a41SThomas Garnier depends on RANDOMIZE_MEMORY 225390397a41SThomas Garnier default "0xa" if MEMORY_HOTPLUG 225490397a41SThomas Garnier default "0x0" 225590397a41SThomas Garnier range 0x1 0x40 if MEMORY_HOTPLUG 225690397a41SThomas Garnier range 0x0 0x40 2257a7f7f624SMasahiro Yamada help 225890397a41SThomas Garnier Define the padding in terabytes added to the existing physical 225990397a41SThomas Garnier memory size during kernel memory randomization. It is useful 226090397a41SThomas Garnier for memory hotplug support but reduces the entropy available for 226190397a41SThomas Garnier address randomization. 226290397a41SThomas Garnier 226390397a41SThomas Garnier If unsure, leave at the default value. 226490397a41SThomas Garnier 22656449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING 22666449dcb0SKirill A. Shutemov bool "Linear Address Masking support" 22676449dcb0SKirill A. Shutemov depends on X86_64 22683267cb6dSPawan Gupta depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS 22696449dcb0SKirill A. Shutemov help 22706449dcb0SKirill A. Shutemov Linear Address Masking (LAM) modifies the checking that is applied 22716449dcb0SKirill A. Shutemov to 64-bit linear addresses, allowing software to use of the 22726449dcb0SKirill A. Shutemov untranslated address bits for metadata. 22736449dcb0SKirill A. Shutemov 22746449dcb0SKirill A. Shutemov The capability can be used for efficient address sanitizers (ASAN) 22756449dcb0SKirill A. Shutemov implementation and for optimizations in JITs. 22766449dcb0SKirill A. Shutemov 2277506f1d07SSam Ravnborgconfig HOTPLUG_CPU 2278bebd024eSThomas Gleixner def_bool y 227940b31360SStephen Rothwell depends on SMP 2280506f1d07SSam Ravnborg 2281506f1d07SSam Ravnborgconfig COMPAT_VDSO 2282b0b49f26SAndy Lutomirski def_bool n 2283b0b49f26SAndy Lutomirski prompt "Disable the 32-bit vDSO (needed for glibc 2.3.3)" 2284953fee1dSIngo Molnar depends on COMPAT_32 2285a7f7f624SMasahiro Yamada help 2286b0b49f26SAndy Lutomirski Certain buggy versions of glibc will crash if they are 2287b0b49f26SAndy Lutomirski presented with a 32-bit vDSO that is not mapped at the address 2288b0b49f26SAndy Lutomirski indicated in its segment table. 2289e84446deSRandy Dunlap 2290b0b49f26SAndy Lutomirski The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a 2291b0b49f26SAndy Lutomirski and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and 2292b0b49f26SAndy Lutomirski 49ad572a70b8aeb91e57483a11dd1b77e31c4468. Glibc 2.3.3 is 2293b0b49f26SAndy Lutomirski the only released version with the bug, but OpenSUSE 9 2294b0b49f26SAndy Lutomirski contains a buggy "glibc 2.3.2". 2295506f1d07SSam Ravnborg 2296b0b49f26SAndy Lutomirski The symptom of the bug is that everything crashes on startup, saying: 2297b0b49f26SAndy Lutomirski dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed! 2298b0b49f26SAndy Lutomirski 2299b0b49f26SAndy Lutomirski Saying Y here changes the default value of the vdso32 boot 2300b0b49f26SAndy Lutomirski option from 1 to 0, which turns off the 32-bit vDSO entirely. 2301b0b49f26SAndy Lutomirski This works around the glibc bug but hurts performance. 2302b0b49f26SAndy Lutomirski 2303b0b49f26SAndy Lutomirski If unsure, say N: if you are compiling your own kernel, you 2304b0b49f26SAndy Lutomirski are unlikely to be using a buggy version of glibc. 2305506f1d07SSam Ravnborg 23063dc33bd3SKees Cookchoice 23073dc33bd3SKees Cook prompt "vsyscall table for legacy applications" 23083dc33bd3SKees Cook depends on X86_64 2309625b7b7fSAndy Lutomirski default LEGACY_VSYSCALL_XONLY 23103dc33bd3SKees Cook help 23113dc33bd3SKees Cook Legacy user code that does not know how to find the vDSO expects 23123dc33bd3SKees Cook to be able to issue three syscalls by calling fixed addresses in 23133dc33bd3SKees Cook kernel space. Since this location is not randomized with ASLR, 23143dc33bd3SKees Cook it can be used to assist security vulnerability exploitation. 23153dc33bd3SKees Cook 23163dc33bd3SKees Cook This setting can be changed at boot time via the kernel command 2317bf00745eSAndy Lutomirski line parameter vsyscall=[emulate|xonly|none]. Emulate mode 2318bf00745eSAndy Lutomirski is deprecated and can only be enabled using the kernel command 2319bf00745eSAndy Lutomirski line. 23203dc33bd3SKees Cook 23213dc33bd3SKees Cook On a system with recent enough glibc (2.14 or newer) and no 23223dc33bd3SKees Cook static binaries, you can say None without a performance penalty 23233dc33bd3SKees Cook to improve security. 23243dc33bd3SKees Cook 2325bd49e16eSAndy Lutomirski If unsure, select "Emulate execution only". 23263dc33bd3SKees Cook 2327bd49e16eSAndy Lutomirski config LEGACY_VSYSCALL_XONLY 2328bd49e16eSAndy Lutomirski bool "Emulate execution only" 2329bd49e16eSAndy Lutomirski help 2330bd49e16eSAndy Lutomirski The kernel traps and emulates calls into the fixed vsyscall 2331bd49e16eSAndy Lutomirski address mapping and does not allow reads. This 2332bd49e16eSAndy Lutomirski configuration is recommended when userspace might use the 2333bd49e16eSAndy Lutomirski legacy vsyscall area but support for legacy binary 2334bd49e16eSAndy Lutomirski instrumentation of legacy code is not needed. It mitigates 2335bd49e16eSAndy Lutomirski certain uses of the vsyscall area as an ASLR-bypassing 2336bd49e16eSAndy Lutomirski buffer. 23373dc33bd3SKees Cook 23383dc33bd3SKees Cook config LEGACY_VSYSCALL_NONE 23393dc33bd3SKees Cook bool "None" 23403dc33bd3SKees Cook help 23413dc33bd3SKees Cook There will be no vsyscall mapping at all. This will 23423dc33bd3SKees Cook eliminate any risk of ASLR bypass due to the vsyscall 23433dc33bd3SKees Cook fixed address mapping. Attempts to use the vsyscalls 23443dc33bd3SKees Cook will be reported to dmesg, so that either old or 23453dc33bd3SKees Cook malicious userspace programs can be identified. 23463dc33bd3SKees Cook 23473dc33bd3SKees Cookendchoice 23483dc33bd3SKees Cook 2349516cbf37STim Birdconfig CMDLINE_BOOL 2350516cbf37STim Bird bool "Built-in kernel command line" 2351a7f7f624SMasahiro Yamada help 2352516cbf37STim Bird Allow for specifying boot arguments to the kernel at 2353516cbf37STim Bird build time. On some systems (e.g. embedded ones), it is 2354516cbf37STim Bird necessary or convenient to provide some or all of the 2355516cbf37STim Bird kernel boot arguments with the kernel itself (that is, 2356516cbf37STim Bird to not rely on the boot loader to provide them.) 2357516cbf37STim Bird 2358516cbf37STim Bird To compile command line arguments into the kernel, 2359516cbf37STim Bird set this option to 'Y', then fill in the 236069711ca1SSébastien Hinderer boot arguments in CONFIG_CMDLINE. 2361516cbf37STim Bird 2362516cbf37STim Bird Systems with fully functional boot loaders (i.e. non-embedded) 2363516cbf37STim Bird should leave this option set to 'N'. 2364516cbf37STim Bird 2365516cbf37STim Birdconfig CMDLINE 2366516cbf37STim Bird string "Built-in kernel command string" 2367516cbf37STim Bird depends on CMDLINE_BOOL 2368516cbf37STim Bird default "" 2369a7f7f624SMasahiro Yamada help 2370516cbf37STim Bird Enter arguments here that should be compiled into the kernel 2371516cbf37STim Bird image and used at boot time. If the boot loader provides a 2372516cbf37STim Bird command line at boot time, it is appended to this string to 2373516cbf37STim Bird form the full kernel command line, when the system boots. 2374516cbf37STim Bird 2375516cbf37STim Bird However, you can use the CONFIG_CMDLINE_OVERRIDE option to 2376516cbf37STim Bird change this behavior. 2377516cbf37STim Bird 2378516cbf37STim Bird In most cases, the command line (whether built-in or provided 2379516cbf37STim Bird by the boot loader) should specify the device for the root 2380516cbf37STim Bird file system. 2381516cbf37STim Bird 2382516cbf37STim Birdconfig CMDLINE_OVERRIDE 2383516cbf37STim Bird bool "Built-in command line overrides boot loader arguments" 2384645e6466SAnders Roxell depends on CMDLINE_BOOL && CMDLINE != "" 2385a7f7f624SMasahiro Yamada help 2386516cbf37STim Bird Set this option to 'Y' to have the kernel ignore the boot loader 2387516cbf37STim Bird command line, and use ONLY the built-in command line. 2388516cbf37STim Bird 2389516cbf37STim Bird This is used to work around broken boot loaders. This should 2390516cbf37STim Bird be set to 'N' under normal conditions. 2391516cbf37STim Bird 2392a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL 2393a5b9e5a2SAndy Lutomirski bool "Enable the LDT (local descriptor table)" if EXPERT 2394a5b9e5a2SAndy Lutomirski default y 2395a7f7f624SMasahiro Yamada help 2396a5b9e5a2SAndy Lutomirski Linux can allow user programs to install a per-process x86 2397a5b9e5a2SAndy Lutomirski Local Descriptor Table (LDT) using the modify_ldt(2) system 2398a5b9e5a2SAndy Lutomirski call. This is required to run 16-bit or segmented code such as 2399a5b9e5a2SAndy Lutomirski DOSEMU or some Wine programs. It is also used by some very old 2400a5b9e5a2SAndy Lutomirski threading libraries. 2401a5b9e5a2SAndy Lutomirski 2402a5b9e5a2SAndy Lutomirski Enabling this feature adds a small amount of overhead to 2403a5b9e5a2SAndy Lutomirski context switches and increases the low-level kernel attack 2404a5b9e5a2SAndy Lutomirski surface. Disabling it removes the modify_ldt(2) system call. 2405a5b9e5a2SAndy Lutomirski 2406a5b9e5a2SAndy Lutomirski Saying 'N' here may make sense for embedded or server kernels. 2407a5b9e5a2SAndy Lutomirski 24083aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE 24093aac3ebeSThomas Gleixner bool "Enforce strict size checking for sigaltstack" 24103aac3ebeSThomas Gleixner depends on DYNAMIC_SIGFRAME 24113aac3ebeSThomas Gleixner help 24123aac3ebeSThomas Gleixner For historical reasons MINSIGSTKSZ is a constant which became 24133aac3ebeSThomas Gleixner already too small with AVX512 support. Add a mechanism to 24143aac3ebeSThomas Gleixner enforce strict checking of the sigaltstack size against the 24153aac3ebeSThomas Gleixner real size of the FPU frame. This option enables the check 24163aac3ebeSThomas Gleixner by default. It can also be controlled via the kernel command 24173aac3ebeSThomas Gleixner line option 'strict_sas_size' independent of this config 24183aac3ebeSThomas Gleixner switch. Enabling it might break existing applications which 24193aac3ebeSThomas Gleixner allocate a too small sigaltstack but 'work' because they 24203aac3ebeSThomas Gleixner never get a signal delivered. 24213aac3ebeSThomas Gleixner 24223aac3ebeSThomas Gleixner Say 'N' unless you want to really enforce this check. 24233aac3ebeSThomas Gleixner 2424d6f635bcSKees Cookconfig CFI_AUTO_DEFAULT 2425d6f635bcSKees Cook bool "Attempt to use FineIBT by default at boot time" 2426d6f635bcSKees Cook depends on FINEIBT 2427d6f635bcSKees Cook default y 2428d6f635bcSKees Cook help 2429d6f635bcSKees Cook Attempt to use FineIBT by default at boot time. If enabled, 2430d6f635bcSKees Cook this is the same as booting with "cfi=auto". If disabled, 2431d6f635bcSKees Cook this is the same as booting with "cfi=kcfi". 2432d6f635bcSKees Cook 2433b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig" 2434b700e7f0SSeth Jennings 2435350afa8aSRavi Bangoriaconfig X86_BUS_LOCK_DETECT 2436350afa8aSRavi Bangoria bool "Split Lock Detect and Bus Lock Detect support" 2437408eb741SRavi Bangoria depends on CPU_SUP_INTEL || CPU_SUP_AMD 2438350afa8aSRavi Bangoria default y 2439350afa8aSRavi Bangoria help 2440350afa8aSRavi Bangoria Enable Split Lock Detect and Bus Lock Detect functionalities. 2441350afa8aSRavi Bangoria See <file:Documentation/arch/x86/buslock.rst> for more information. 2442350afa8aSRavi Bangoria 2443506f1d07SSam Ravnborgendmenu 2444506f1d07SSam Ravnborg 24451ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS 244647ff30ccSUros Bizjak def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null) 244747ff30ccSUros Bizjak depends on CC_IS_GCC 24481ca3683cSUros Bizjak 24499ebe5500SUros Bizjakconfig CC_HAS_NAMED_AS_FIXED_SANITIZERS 2450f61f02d1SUros Bizjak def_bool CC_IS_GCC && GCC_VERSION >= 130300 24511ca3683cSUros Bizjak 24521ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT 24531ca3683cSUros Bizjak def_bool y 2454e29aad08SUros Bizjak depends on CC_HAS_NAMED_AS 2455e29aad08SUros Bizjak # 24569ebe5500SUros Bizjak # -fsanitize=kernel-address (KASAN) and -fsanitize=thread 24579ebe5500SUros Bizjak # (KCSAN) are incompatible with named address spaces with 24589ebe5500SUros Bizjak # GCC < 13.3 - see GCC PR sanitizer/111736. 2459e29aad08SUros Bizjak # 24609ebe5500SUros Bizjak depends on !(KASAN || KCSAN) || CC_HAS_NAMED_AS_FIXED_SANITIZERS 24611ca3683cSUros Bizjak 2462f43b9876SPeter Zijlstraconfig CC_HAS_SLS 2463f43b9876SPeter Zijlstra def_bool $(cc-option,-mharden-sls=all) 2464f43b9876SPeter Zijlstra 2465f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK 2466f43b9876SPeter Zijlstra def_bool $(cc-option,-mfunction-return=thunk-extern) 2467f43b9876SPeter Zijlstra 2468bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING 2469bea75b33SThomas Gleixner def_bool $(cc-option,-fpatchable-function-entry=16,16) 2470bea75b33SThomas Gleixner 2471bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI 2472bea75b33SThomas Gleixner int 2473bea75b33SThomas Gleixner default 59 if FUNCTION_ALIGNMENT_64B 2474bea75b33SThomas Gleixner default 27 if FUNCTION_ALIGNMENT_32B 2475bea75b33SThomas Gleixner default 11 if FUNCTION_ALIGNMENT_16B 2476bea75b33SThomas Gleixner default 3 if FUNCTION_ALIGNMENT_8B 2477bea75b33SThomas Gleixner default 0 2478bea75b33SThomas Gleixner 2479bea75b33SThomas Gleixner# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG 2480bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/ 2481bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES 2482bea75b33SThomas Gleixner int 2483bea75b33SThomas Gleixner default FUNCTION_PADDING_CFI if CFI_CLANG 2484bea75b33SThomas Gleixner default FUNCTION_ALIGNMENT 2485bea75b33SThomas Gleixner 2486931ab636SPeter Zijlstraconfig CALL_PADDING 2487931ab636SPeter Zijlstra def_bool n 2488931ab636SPeter Zijlstra depends on CC_HAS_ENTRY_PADDING && OBJTOOL 2489931ab636SPeter Zijlstra select FUNCTION_ALIGNMENT_16B 2490931ab636SPeter Zijlstra 2491931ab636SPeter Zijlstraconfig FINEIBT 2492931ab636SPeter Zijlstra def_bool y 2493aefb2f2eSBreno Leitao depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE 2494931ab636SPeter Zijlstra select CALL_PADDING 2495931ab636SPeter Zijlstra 24968f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS 24978f7c0d8bSThomas Gleixner def_bool y 24980911b8c5SBreno Leitao depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL 24998f7c0d8bSThomas Gleixner 25008f7c0d8bSThomas Gleixnerconfig CALL_THUNKS 25018f7c0d8bSThomas Gleixner def_bool n 2502931ab636SPeter Zijlstra select CALL_PADDING 25038f7c0d8bSThomas Gleixner 2504b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS 2505b341b20dSPeter Zijlstra def_bool y 2506931ab636SPeter Zijlstra depends on CALL_PADDING && !CFI_CLANG 2507b341b20dSPeter Zijlstra 2508fe42754bSSean Christophersonmenuconfig CPU_MITIGATIONS 2509fe42754bSSean Christopherson bool "Mitigations for CPU vulnerabilities" 2510f43b9876SPeter Zijlstra default y 2511f43b9876SPeter Zijlstra help 2512fe42754bSSean Christopherson Say Y here to enable options which enable mitigations for hardware 2513fe42754bSSean Christopherson vulnerabilities (usually related to speculative execution). 2514ce0abef6SSean Christopherson Mitigations can be disabled or restricted to SMT systems at runtime 2515ce0abef6SSean Christopherson via the "mitigations" kernel parameter. 2516f43b9876SPeter Zijlstra 2517ce0abef6SSean Christopherson If you say N, all mitigations will be disabled. This CANNOT be 2518ce0abef6SSean Christopherson overridden at runtime. 2519ce0abef6SSean Christopherson 2520ce0abef6SSean Christopherson Say 'Y', unless you really know what you are doing. 2521f43b9876SPeter Zijlstra 2522fe42754bSSean Christophersonif CPU_MITIGATIONS 2523f43b9876SPeter Zijlstra 2524ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION 2525f43b9876SPeter Zijlstra bool "Remove the kernel mapping in user mode" 2526f43b9876SPeter Zijlstra default y 2527f43b9876SPeter Zijlstra depends on (X86_64 || X86_PAE) 2528f43b9876SPeter Zijlstra help 2529f43b9876SPeter Zijlstra This feature reduces the number of hardware side channels by 2530f43b9876SPeter Zijlstra ensuring that the majority of kernel addresses are not mapped 2531f43b9876SPeter Zijlstra into userspace. 2532f43b9876SPeter Zijlstra 2533ff61f079SJonathan Corbet See Documentation/arch/x86/pti.rst for more details. 2534f43b9876SPeter Zijlstra 2535aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE 2536f43b9876SPeter Zijlstra bool "Avoid speculative indirect branches in kernel" 2537f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2538f43b9876SPeter Zijlstra default y 2539f43b9876SPeter Zijlstra help 2540f43b9876SPeter Zijlstra Compile kernel with the retpoline compiler options to guard against 2541f43b9876SPeter Zijlstra kernel-to-user data leaks by avoiding speculative indirect 2542f43b9876SPeter Zijlstra branches. Requires a compiler with -mindirect-branch=thunk-extern 2543f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2544f43b9876SPeter Zijlstra 25450911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK 2546f43b9876SPeter Zijlstra bool "Enable return-thunks" 2547aefb2f2eSBreno Leitao depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK 2548f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2549b648ab48SBen Hutchings default y if X86_64 2550f43b9876SPeter Zijlstra help 2551f43b9876SPeter Zijlstra Compile the kernel with the return-thunks compiler option to guard 2552f43b9876SPeter Zijlstra against kernel-to-user data leaks by avoiding return speculation. 2553f43b9876SPeter Zijlstra Requires a compiler with -mfunction-return=thunk-extern 2554f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2555f43b9876SPeter Zijlstra 2556ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY 2557f43b9876SPeter Zijlstra bool "Enable UNRET on kernel entry" 25580911b8c5SBreno Leitao depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64 2559f43b9876SPeter Zijlstra default y 2560f43b9876SPeter Zijlstra help 2561f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=unret mitigation. 2562f43b9876SPeter Zijlstra 25635fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING 256480e4c1cdSThomas Gleixner bool "Mitigate RSB underflow with call depth tracking" 256580e4c1cdSThomas Gleixner depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS 256680e4c1cdSThomas Gleixner select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 256780e4c1cdSThomas Gleixner select CALL_THUNKS 256880e4c1cdSThomas Gleixner default y 256980e4c1cdSThomas Gleixner help 257080e4c1cdSThomas Gleixner Compile the kernel with call depth tracking to mitigate the Intel 257186e39b94SBreno Leitao SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off 257286e39b94SBreno Leitao by default and needs to be enabled on the kernel command line via the 257386e39b94SBreno Leitao retbleed=stuff option. For non-affected systems the overhead of this 257486e39b94SBreno Leitao option is marginal as the call depth tracking is using run-time 257586e39b94SBreno Leitao generated call thunks in a compiler generated padding area and call 257686e39b94SBreno Leitao patching. This increases text size by ~5%. For non affected systems 257786e39b94SBreno Leitao this space is unused. On affected SKL systems this results in a 257886e39b94SBreno Leitao significant performance gain over the IBRS mitigation. 257980e4c1cdSThomas Gleixner 2580e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG 2581e81dc127SThomas Gleixner bool "Enable call thunks and call depth tracking debugging" 25825fa31af3SBreno Leitao depends on MITIGATION_CALL_DEPTH_TRACKING 2583e81dc127SThomas Gleixner select FUNCTION_ALIGNMENT_32B 2584e81dc127SThomas Gleixner default n 2585e81dc127SThomas Gleixner help 2586e81dc127SThomas Gleixner Enable call/ret counters for imbalance detection and build in 2587e81dc127SThomas Gleixner a noisy dmesg about callthunks generation and call patching for 2588e81dc127SThomas Gleixner trouble shooting. The debug prints need to be enabled on the 2589e81dc127SThomas Gleixner kernel command line with 'debug-callthunks'. 259054628de6SRandy Dunlap Only enable this when you are debugging call thunks as this 259154628de6SRandy Dunlap creates a noticeable runtime overhead. If unsure say N. 259280e4c1cdSThomas Gleixner 2593e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY 2594f43b9876SPeter Zijlstra bool "Enable IBPB on kernel entry" 2595b648ab48SBen Hutchings depends on CPU_SUP_AMD && X86_64 2596f43b9876SPeter Zijlstra default y 2597f43b9876SPeter Zijlstra help 2598f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=ibpb mitigation. 2599f43b9876SPeter Zijlstra 26001da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY 2601f43b9876SPeter Zijlstra bool "Enable IBRS on kernel entry" 2602b648ab48SBen Hutchings depends on CPU_SUP_INTEL && X86_64 2603f43b9876SPeter Zijlstra default y 2604f43b9876SPeter Zijlstra help 2605f43b9876SPeter Zijlstra Compile the kernel with support for the spectre_v2=ibrs mitigation. 2606f43b9876SPeter Zijlstra This mitigates both spectre_v2 and retbleed at great cost to 2607f43b9876SPeter Zijlstra performance. 2608f43b9876SPeter Zijlstra 2609a033eec9SBreno Leitaoconfig MITIGATION_SRSO 2610fb3bd914SBorislav Petkov (AMD) bool "Mitigate speculative RAS overflow on AMD" 26110911b8c5SBreno Leitao depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK 2612fb3bd914SBorislav Petkov (AMD) default y 2613fb3bd914SBorislav Petkov (AMD) help 2614fb3bd914SBorislav Petkov (AMD) Enable the SRSO mitigation needed on AMD Zen1-4 machines. 2615fb3bd914SBorislav Petkov (AMD) 26167b75782fSBreno Leitaoconfig MITIGATION_SLS 2617f43b9876SPeter Zijlstra bool "Mitigate Straight-Line-Speculation" 2618f43b9876SPeter Zijlstra depends on CC_HAS_SLS && X86_64 2619f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2620f43b9876SPeter Zijlstra default n 2621f43b9876SPeter Zijlstra help 2622f43b9876SPeter Zijlstra Compile the kernel with straight-line-speculation options to guard 2623f43b9876SPeter Zijlstra against straight line speculation. The kernel image might be slightly 2624f43b9876SPeter Zijlstra larger. 2625f43b9876SPeter Zijlstra 2626225f2bd0SBreno Leitaoconfig MITIGATION_GDS 2627225f2bd0SBreno Leitao bool "Mitigate Gather Data Sampling" 2628225f2bd0SBreno Leitao depends on CPU_SUP_INTEL 2629225f2bd0SBreno Leitao default y 2630225f2bd0SBreno Leitao help 2631225f2bd0SBreno Leitao Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware 2632225f2bd0SBreno Leitao vulnerability which allows unprivileged speculative access to data 2633225f2bd0SBreno Leitao which was previously stored in vector registers. The attacker uses gather 2634225f2bd0SBreno Leitao instructions to infer the stale vector register data. 2635225f2bd0SBreno Leitao 26368076fcdeSPawan Guptaconfig MITIGATION_RFDS 26378076fcdeSPawan Gupta bool "RFDS Mitigation" 26388076fcdeSPawan Gupta depends on CPU_SUP_INTEL 26398076fcdeSPawan Gupta default y 26408076fcdeSPawan Gupta help 26418076fcdeSPawan Gupta Enable mitigation for Register File Data Sampling (RFDS) by default. 26428076fcdeSPawan Gupta RFDS is a hardware vulnerability which affects Intel Atom CPUs. It 26438076fcdeSPawan Gupta allows unprivileged speculative access to stale data previously 26448076fcdeSPawan Gupta stored in floating point, vector and integer registers. 26458076fcdeSPawan Gupta See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst> 26468076fcdeSPawan Gupta 26474f511739SJosh Poimboeufconfig MITIGATION_SPECTRE_BHI 26484f511739SJosh Poimboeuf bool "Mitigate Spectre-BHB (Branch History Injection)" 2649ec9404e4SPawan Gupta depends on CPU_SUP_INTEL 26504f511739SJosh Poimboeuf default y 2651ec9404e4SPawan Gupta help 2652ec9404e4SPawan Gupta Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks 2653ec9404e4SPawan Gupta where the branch history buffer is poisoned to speculatively steer 2654ec9404e4SPawan Gupta indirect branches. 2655ec9404e4SPawan Gupta See <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2656ec9404e4SPawan Gupta 265794045568SBreno Leitaoconfig MITIGATION_MDS 265894045568SBreno Leitao bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug" 265994045568SBreno Leitao depends on CPU_SUP_INTEL 266094045568SBreno Leitao default y 266194045568SBreno Leitao help 266294045568SBreno Leitao Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is 266394045568SBreno Leitao a hardware vulnerability which allows unprivileged speculative access 266494045568SBreno Leitao to data which is available in various CPU internal buffers. 266594045568SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/mds.rst> 2666b8da0b33SBreno Leitao 2667b8da0b33SBreno Leitaoconfig MITIGATION_TAA 2668b8da0b33SBreno Leitao bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug" 2669b8da0b33SBreno Leitao depends on CPU_SUP_INTEL 2670b8da0b33SBreno Leitao default y 2671b8da0b33SBreno Leitao help 2672b8da0b33SBreno Leitao Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware 2673b8da0b33SBreno Leitao vulnerability that allows unprivileged speculative access to data 2674b8da0b33SBreno Leitao which is available in various CPU internal buffers by using 2675b8da0b33SBreno Leitao asynchronous aborts within an Intel TSX transactional region. 2676b8da0b33SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst> 2677163f9fe6SBreno Leitao 2678163f9fe6SBreno Leitaoconfig MITIGATION_MMIO_STALE_DATA 2679163f9fe6SBreno Leitao bool "Mitigate MMIO Stale Data hardware bug" 2680163f9fe6SBreno Leitao depends on CPU_SUP_INTEL 2681163f9fe6SBreno Leitao default y 2682163f9fe6SBreno Leitao help 2683163f9fe6SBreno Leitao Enable mitigation for MMIO Stale Data hardware bugs. Processor MMIO 2684163f9fe6SBreno Leitao Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO) 2685163f9fe6SBreno Leitao vulnerabilities that can expose data. The vulnerabilities require the 2686163f9fe6SBreno Leitao attacker to have access to MMIO. 2687163f9fe6SBreno Leitao See also 2688163f9fe6SBreno Leitao <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst> 26893a4ee4ffSBreno Leitao 26903a4ee4ffSBreno Leitaoconfig MITIGATION_L1TF 26913a4ee4ffSBreno Leitao bool "Mitigate L1 Terminal Fault (L1TF) hardware bug" 26923a4ee4ffSBreno Leitao depends on CPU_SUP_INTEL 26933a4ee4ffSBreno Leitao default y 26943a4ee4ffSBreno Leitao help 26953a4ee4ffSBreno Leitao Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a 26963a4ee4ffSBreno Leitao hardware vulnerability which allows unprivileged speculative access to data 26973a4ee4ffSBreno Leitao available in the Level 1 Data Cache. 26983a4ee4ffSBreno Leitao See <file:Documentation/admin-guide/hw-vuln/l1tf.rst 2699894e2885SBreno Leitao 2700894e2885SBreno Leitaoconfig MITIGATION_RETBLEED 2701894e2885SBreno Leitao bool "Mitigate RETBleed hardware bug" 2702894e2885SBreno Leitao depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY 2703894e2885SBreno Leitao default y 2704894e2885SBreno Leitao help 2705894e2885SBreno Leitao Enable mitigation for RETBleed (Arbitrary Speculative Code Execution 2706894e2885SBreno Leitao with Return Instructions) vulnerability. RETBleed is a speculative 2707894e2885SBreno Leitao execution attack which takes advantage of microarchitectural behavior 2708894e2885SBreno Leitao in many modern microprocessors, similar to Spectre v2. An 2709894e2885SBreno Leitao unprivileged attacker can use these flaws to bypass conventional 2710894e2885SBreno Leitao memory security restrictions to gain read access to privileged memory 2711894e2885SBreno Leitao that would otherwise be inaccessible. 2712ca01c0d8SBreno Leitao 2713ca01c0d8SBreno Leitaoconfig MITIGATION_SPECTRE_V1 2714ca01c0d8SBreno Leitao bool "Mitigate SPECTRE V1 hardware bug" 2715ca01c0d8SBreno Leitao default y 2716ca01c0d8SBreno Leitao help 2717ca01c0d8SBreno Leitao Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a 2718ca01c0d8SBreno Leitao class of side channel attacks that takes advantage of speculative 2719ca01c0d8SBreno Leitao execution that bypasses conditional branch instructions used for 2720ca01c0d8SBreno Leitao memory access bounds check. 2721ca01c0d8SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2722a0b02e3fSBreno Leitao 272372c70f48SBreno Leitaoconfig MITIGATION_SPECTRE_V2 272472c70f48SBreno Leitao bool "Mitigate SPECTRE V2 hardware bug" 272572c70f48SBreno Leitao default y 272672c70f48SBreno Leitao help 272772c70f48SBreno Leitao Enable mitigation for Spectre V2 (Branch Target Injection). Spectre 272872c70f48SBreno Leitao V2 is a class of side channel attacks that takes advantage of 272972c70f48SBreno Leitao indirect branch predictors inside the processor. In Spectre variant 2 273072c70f48SBreno Leitao attacks, the attacker can steer speculative indirect branches in the 273172c70f48SBreno Leitao victim to gadget code by poisoning the branch target buffer of a CPU 273272c70f48SBreno Leitao used for predicting indirect branch addresses. 273372c70f48SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 273472c70f48SBreno Leitao 2735a0b02e3fSBreno Leitaoconfig MITIGATION_SRBDS 2736a0b02e3fSBreno Leitao bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug" 2737a0b02e3fSBreno Leitao depends on CPU_SUP_INTEL 2738a0b02e3fSBreno Leitao default y 2739a0b02e3fSBreno Leitao help 2740a0b02e3fSBreno Leitao Enable mitigation for Special Register Buffer Data Sampling (SRBDS). 2741a0b02e3fSBreno Leitao SRBDS is a hardware vulnerability that allows Microarchitectural Data 2742a0b02e3fSBreno Leitao Sampling (MDS) techniques to infer values returned from special 2743a0b02e3fSBreno Leitao register accesses. An unprivileged user can extract values returned 2744a0b02e3fSBreno Leitao from RDRAND and RDSEED executed on another core or sibling thread 2745a0b02e3fSBreno Leitao using MDS techniques. 2746a0b02e3fSBreno Leitao See also 2747a0b02e3fSBreno Leitao <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst> 2748b908cdabSBreno Leitao 2749b908cdabSBreno Leitaoconfig MITIGATION_SSB 2750b908cdabSBreno Leitao bool "Mitigate Speculative Store Bypass (SSB) hardware bug" 2751b908cdabSBreno Leitao default y 2752b908cdabSBreno Leitao help 2753b908cdabSBreno Leitao Enable mitigation for Speculative Store Bypass (SSB). SSB is a 2754b908cdabSBreno Leitao hardware security vulnerability and its exploitation takes advantage 2755b908cdabSBreno Leitao of speculative execution in a similar way to the Meltdown and Spectre 2756b908cdabSBreno Leitao security vulnerabilities. 2757b908cdabSBreno Leitao 2758f43b9876SPeter Zijlstraendif 2759f43b9876SPeter Zijlstra 27603072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES 27613072e413SMichal Hocko def_bool y 27625c11f00bSDavid Hildenbrand depends on ARCH_ENABLE_MEMORY_HOTPLUG 27633072e413SMichal Hocko 2764da85f865SBjorn Helgaasmenu "Power management and ACPI options" 2765e279b6c1SSam Ravnborg 2766e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER 27673c2362e6SHarvey Harrison def_bool y 276844556530SZhimin Gu depends on HIBERNATION 2769e279b6c1SSam Ravnborg 2770e279b6c1SSam Ravnborgsource "kernel/power/Kconfig" 2771e279b6c1SSam Ravnborg 2772e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig" 2773e279b6c1SSam Ravnborg 2774a6b68076SAndi Kleenconfig X86_APM_BOOT 27756fc108a0SJan Beulich def_bool y 2776282e5aabSPaul Bolle depends on APM 2777a6b68076SAndi Kleen 2778e279b6c1SSam Ravnborgmenuconfig APM 2779e279b6c1SSam Ravnborg tristate "APM (Advanced Power Management) BIOS support" 2780efefa6f6SIngo Molnar depends on X86_32 && PM_SLEEP 2781a7f7f624SMasahiro Yamada help 2782e279b6c1SSam Ravnborg APM is a BIOS specification for saving power using several different 2783e279b6c1SSam Ravnborg techniques. This is mostly useful for battery powered laptops with 2784e279b6c1SSam Ravnborg APM compliant BIOSes. If you say Y here, the system time will be 2785e279b6c1SSam Ravnborg reset after a RESUME operation, the /proc/apm device will provide 2786e279b6c1SSam Ravnborg battery status information, and user-space programs will receive 2787e279b6c1SSam Ravnborg notification of APM "events" (e.g. battery status change). 2788e279b6c1SSam Ravnborg 2789e279b6c1SSam Ravnborg If you select "Y" here, you can disable actual use of the APM 2790e279b6c1SSam Ravnborg BIOS by passing the "apm=off" option to the kernel at boot time. 2791e279b6c1SSam Ravnborg 2792e279b6c1SSam Ravnborg Note that the APM support is almost completely disabled for 2793e279b6c1SSam Ravnborg machines with more than one CPU. 2794e279b6c1SSam Ravnborg 2795e279b6c1SSam Ravnborg In order to use APM, you will need supporting software. For location 2796151f4e2bSMauro Carvalho Chehab and more information, read <file:Documentation/power/apm-acpi.rst> 27972dc98fd3SMichael Witten and the Battery Powered Linux mini-HOWTO, available from 2798e279b6c1SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 2799e279b6c1SSam Ravnborg 2800e279b6c1SSam Ravnborg This driver does not spin down disk drives (see the hdparm(8) 2801e279b6c1SSam Ravnborg manpage ("man 8 hdparm") for that), and it doesn't turn off 2802e279b6c1SSam Ravnborg VESA-compliant "green" monitors. 2803e279b6c1SSam Ravnborg 2804e279b6c1SSam Ravnborg This driver does not support the TI 4000M TravelMate and the ACER 2805e279b6c1SSam Ravnborg 486/DX4/75 because they don't have compliant BIOSes. Many "green" 2806e279b6c1SSam Ravnborg desktop machines also don't have compliant BIOSes, and this driver 2807e279b6c1SSam Ravnborg may cause those machines to panic during the boot phase. 2808e279b6c1SSam Ravnborg 2809e279b6c1SSam Ravnborg Generally, if you don't have a battery in your machine, there isn't 2810e279b6c1SSam Ravnborg much point in using this driver and you should say N. If you get 2811e279b6c1SSam Ravnborg random kernel OOPSes or reboots that don't seem to be related to 2812e279b6c1SSam Ravnborg anything, try disabling/enabling this option (or disabling/enabling 2813e279b6c1SSam Ravnborg APM in your BIOS). 2814e279b6c1SSam Ravnborg 2815e279b6c1SSam Ravnborg Some other things you should try when experiencing seemingly random, 2816e279b6c1SSam Ravnborg "weird" problems: 2817e279b6c1SSam Ravnborg 2818e279b6c1SSam Ravnborg 1) make sure that you have enough swap space and that it is 2819e279b6c1SSam Ravnborg enabled. 28207987448fSStephen Kitt 2) pass the "idle=poll" option to the kernel 2821e279b6c1SSam Ravnborg 3) switch on floating point emulation in the kernel and pass 2822e279b6c1SSam Ravnborg the "no387" option to the kernel 2823e279b6c1SSam Ravnborg 4) pass the "floppy=nodma" option to the kernel 2824e279b6c1SSam Ravnborg 5) pass the "mem=4M" option to the kernel (thereby disabling 2825e279b6c1SSam Ravnborg all but the first 4 MB of RAM) 2826e279b6c1SSam Ravnborg 6) make sure that the CPU is not over clocked. 2827e279b6c1SSam Ravnborg 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/> 2828e279b6c1SSam Ravnborg 8) disable the cache from your BIOS settings 2829e279b6c1SSam Ravnborg 9) install a fan for the video card or exchange video RAM 2830e279b6c1SSam Ravnborg 10) install a better fan for the CPU 2831e279b6c1SSam Ravnborg 11) exchange RAM chips 2832e279b6c1SSam Ravnborg 12) exchange the motherboard. 2833e279b6c1SSam Ravnborg 2834e279b6c1SSam Ravnborg To compile this driver as a module, choose M here: the 2835e279b6c1SSam Ravnborg module will be called apm. 2836e279b6c1SSam Ravnborg 2837e279b6c1SSam Ravnborgif APM 2838e279b6c1SSam Ravnborg 2839e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND 2840e279b6c1SSam Ravnborg bool "Ignore USER SUSPEND" 2841a7f7f624SMasahiro Yamada help 2842e279b6c1SSam Ravnborg This option will ignore USER SUSPEND requests. On machines with a 2843e279b6c1SSam Ravnborg compliant APM BIOS, you want to say N. However, on the NEC Versa M 2844e279b6c1SSam Ravnborg series notebooks, it is necessary to say Y because of a BIOS bug. 2845e279b6c1SSam Ravnborg 2846e279b6c1SSam Ravnborgconfig APM_DO_ENABLE 2847e279b6c1SSam Ravnborg bool "Enable PM at boot time" 2848a7f7f624SMasahiro Yamada help 2849e279b6c1SSam Ravnborg Enable APM features at boot time. From page 36 of the APM BIOS 2850e279b6c1SSam Ravnborg specification: "When disabled, the APM BIOS does not automatically 2851e279b6c1SSam Ravnborg power manage devices, enter the Standby State, enter the Suspend 2852e279b6c1SSam Ravnborg State, or take power saving steps in response to CPU Idle calls." 2853e279b6c1SSam Ravnborg This driver will make CPU Idle calls when Linux is idle (unless this 2854e279b6c1SSam Ravnborg feature is turned off -- see "Do CPU IDLE calls", below). This 2855e279b6c1SSam Ravnborg should always save battery power, but more complicated APM features 2856e279b6c1SSam Ravnborg will be dependent on your BIOS implementation. You may need to turn 2857e279b6c1SSam Ravnborg this option off if your computer hangs at boot time when using APM 2858e279b6c1SSam Ravnborg support, or if it beeps continuously instead of suspending. Turn 2859e279b6c1SSam Ravnborg this off if you have a NEC UltraLite Versa 33/C or a Toshiba 2860e279b6c1SSam Ravnborg T400CDT. This is off by default since most machines do fine without 2861e279b6c1SSam Ravnborg this feature. 2862e279b6c1SSam Ravnborg 2863e279b6c1SSam Ravnborgconfig APM_CPU_IDLE 2864dd8af076SLen Brown depends on CPU_IDLE 2865e279b6c1SSam Ravnborg bool "Make CPU Idle calls when idle" 2866a7f7f624SMasahiro Yamada help 2867e279b6c1SSam Ravnborg Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. 2868e279b6c1SSam Ravnborg On some machines, this can activate improved power savings, such as 2869e279b6c1SSam Ravnborg a slowed CPU clock rate, when the machine is idle. These idle calls 2870e279b6c1SSam Ravnborg are made after the idle loop has run for some length of time (e.g., 2871e279b6c1SSam Ravnborg 333 mS). On some machines, this will cause a hang at boot time or 2872e279b6c1SSam Ravnborg whenever the CPU becomes idle. (On machines with more than one CPU, 2873e279b6c1SSam Ravnborg this option does nothing.) 2874e279b6c1SSam Ravnborg 2875e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK 2876e279b6c1SSam Ravnborg bool "Enable console blanking using APM" 2877a7f7f624SMasahiro Yamada help 2878e279b6c1SSam Ravnborg Enable console blanking using the APM. Some laptops can use this to 2879e279b6c1SSam Ravnborg turn off the LCD backlight when the screen blanker of the Linux 2880e279b6c1SSam Ravnborg virtual console blanks the screen. Note that this is only used by 2881e279b6c1SSam Ravnborg the virtual console screen blanker, and won't turn off the backlight 2882e279b6c1SSam Ravnborg when using the X Window system. This also doesn't have anything to 2883e279b6c1SSam Ravnborg do with your VESA-compliant power-saving monitor. Further, this 2884e279b6c1SSam Ravnborg option doesn't work for all laptops -- it might not turn off your 2885e279b6c1SSam Ravnborg backlight at all, or it might print a lot of errors to the console, 2886e279b6c1SSam Ravnborg especially if you are using gpm. 2887e279b6c1SSam Ravnborg 2888e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS 2889e279b6c1SSam Ravnborg bool "Allow interrupts during APM BIOS calls" 2890a7f7f624SMasahiro Yamada help 2891e279b6c1SSam Ravnborg Normally we disable external interrupts while we are making calls to 2892e279b6c1SSam Ravnborg the APM BIOS as a measure to lessen the effects of a badly behaving 2893e279b6c1SSam Ravnborg BIOS implementation. The BIOS should reenable interrupts if it 2894e279b6c1SSam Ravnborg needs to. Unfortunately, some BIOSes do not -- especially those in 2895e279b6c1SSam Ravnborg many of the newer IBM Thinkpads. If you experience hangs when you 2896e279b6c1SSam Ravnborg suspend, try setting this to Y. Otherwise, say N. 2897e279b6c1SSam Ravnborg 2898e279b6c1SSam Ravnborgendif # APM 2899e279b6c1SSam Ravnborg 2900bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig" 2901e279b6c1SSam Ravnborg 2902e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig" 2903e279b6c1SSam Ravnborg 290427471fdbSAndy Henroidsource "drivers/idle/Kconfig" 290527471fdbSAndy Henroid 2906e279b6c1SSam Ravnborgendmenu 2907e279b6c1SSam Ravnborg 2908e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)" 2909e279b6c1SSam Ravnborg 2910e279b6c1SSam Ravnborgchoice 2911e279b6c1SSam Ravnborg prompt "PCI access mode" 2912efefa6f6SIngo Molnar depends on X86_32 && PCI 2913e279b6c1SSam Ravnborg default PCI_GOANY 2914a7f7f624SMasahiro Yamada help 2915e279b6c1SSam Ravnborg On PCI systems, the BIOS can be used to detect the PCI devices and 2916e279b6c1SSam Ravnborg determine their configuration. However, some old PCI motherboards 2917e279b6c1SSam Ravnborg have BIOS bugs and may crash if this is done. Also, some embedded 2918e279b6c1SSam Ravnborg PCI-based systems don't have any BIOS at all. Linux can also try to 2919e279b6c1SSam Ravnborg detect the PCI hardware directly without using the BIOS. 2920e279b6c1SSam Ravnborg 2921e279b6c1SSam Ravnborg With this option, you can specify how Linux should detect the 2922e279b6c1SSam Ravnborg PCI devices. If you choose "BIOS", the BIOS will be used, 2923e279b6c1SSam Ravnborg if you choose "Direct", the BIOS won't be used, and if you 2924e279b6c1SSam Ravnborg choose "MMConfig", then PCI Express MMCONFIG will be used. 2925e279b6c1SSam Ravnborg If you choose "Any", the kernel will try MMCONFIG, then the 2926e279b6c1SSam Ravnborg direct access method and falls back to the BIOS if that doesn't 2927e279b6c1SSam Ravnborg work. If unsure, go with the default, which is "Any". 2928e279b6c1SSam Ravnborg 2929e279b6c1SSam Ravnborgconfig PCI_GOBIOS 2930e279b6c1SSam Ravnborg bool "BIOS" 2931e279b6c1SSam Ravnborg 2932e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG 2933e279b6c1SSam Ravnborg bool "MMConfig" 2934e279b6c1SSam Ravnborg 2935e279b6c1SSam Ravnborgconfig PCI_GODIRECT 2936e279b6c1SSam Ravnborg bool "Direct" 2937e279b6c1SSam Ravnborg 29383ef0e1f8SAndres Salomonconfig PCI_GOOLPC 293976fb6570SDaniel Drake bool "OLPC XO-1" 29403ef0e1f8SAndres Salomon depends on OLPC 29413ef0e1f8SAndres Salomon 29422bdd1b03SAndres Salomonconfig PCI_GOANY 29432bdd1b03SAndres Salomon bool "Any" 29442bdd1b03SAndres Salomon 2945e279b6c1SSam Ravnborgendchoice 2946e279b6c1SSam Ravnborg 2947e279b6c1SSam Ravnborgconfig PCI_BIOS 29483c2362e6SHarvey Harrison def_bool y 2949efefa6f6SIngo Molnar depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY) 2950e279b6c1SSam Ravnborg 2951e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct. 2952e279b6c1SSam Ravnborgconfig PCI_DIRECT 29533c2362e6SHarvey Harrison def_bool y 29540aba496fSShaohua Li depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG)) 2955e279b6c1SSam Ravnborg 2956e279b6c1SSam Ravnborgconfig PCI_MMCONFIG 2957b45c9f36SJan Kiszka bool "Support mmconfig PCI config space access" if X86_64 2958b45c9f36SJan Kiszka default y 29594590d98fSAndy Shevchenko depends on PCI && (ACPI || JAILHOUSE_GUEST) 2960b45c9f36SJan Kiszka depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG) 2961e279b6c1SSam Ravnborg 29623ef0e1f8SAndres Salomonconfig PCI_OLPC 29632bdd1b03SAndres Salomon def_bool y 29642bdd1b03SAndres Salomon depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY) 29653ef0e1f8SAndres Salomon 2966b5401a96SAlex Nixonconfig PCI_XEN 2967b5401a96SAlex Nixon def_bool y 2968b5401a96SAlex Nixon depends on PCI && XEN 2969b5401a96SAlex Nixon 29708364e1f8SJan Kiszkaconfig MMCONF_FAM10H 29718364e1f8SJan Kiszka def_bool y 29728364e1f8SJan Kiszka depends on X86_64 && PCI_MMCONFIG && ACPI 2973e279b6c1SSam Ravnborg 29743f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK 29756a108a14SDavid Rientjes bool "Read CNB20LE Host Bridge Windows" if EXPERT 29766ea30386SKees Cook depends on PCI 29773f6ea84aSIra W. Snyder help 29783f6ea84aSIra W. Snyder Read the PCI windows out of the CNB20LE host bridge. This allows 29793f6ea84aSIra W. Snyder PCI hotplug to work on systems with the CNB20LE chipset which do 29803f6ea84aSIra W. Snyder not have ACPI. 29813f6ea84aSIra W. Snyder 298264a5fed6SBjorn Helgaas There's no public spec for this chipset, and this functionality 298364a5fed6SBjorn Helgaas is known to be incomplete. 298464a5fed6SBjorn Helgaas 298564a5fed6SBjorn Helgaas You should say N unless you know you need this. 298664a5fed6SBjorn Helgaas 29873a495511SWilliam Breathitt Grayconfig ISA_BUS 298817a2a129SWilliam Breathitt Gray bool "ISA bus support on modern systems" if EXPERT 29893a495511SWilliam Breathitt Gray help 299017a2a129SWilliam Breathitt Gray Expose ISA bus device drivers and options available for selection and 299117a2a129SWilliam Breathitt Gray configuration. Enable this option if your target machine has an ISA 299217a2a129SWilliam Breathitt Gray bus. ISA is an older system, displaced by PCI and newer bus 299317a2a129SWilliam Breathitt Gray architectures -- if your target machine is modern, it probably does 299417a2a129SWilliam Breathitt Gray not have an ISA bus. 29953a495511SWilliam Breathitt Gray 29963a495511SWilliam Breathitt Gray If unsure, say N. 29973a495511SWilliam Breathitt Gray 29981c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA. 2999e279b6c1SSam Ravnborgconfig ISA_DMA_API 30001c00f016SDavid Rientjes bool "ISA-style DMA support" if (X86_64 && EXPERT) 30011c00f016SDavid Rientjes default y 30021c00f016SDavid Rientjes help 30031c00f016SDavid Rientjes Enables ISA-style DMA support for devices requiring such controllers. 30041c00f016SDavid Rientjes If unsure, say Y. 3005e279b6c1SSam Ravnborg 300651e68d05SLinus Torvaldsif X86_32 300751e68d05SLinus Torvalds 3008e279b6c1SSam Ravnborgconfig ISA 3009e279b6c1SSam Ravnborg bool "ISA support" 3010a7f7f624SMasahiro Yamada help 3011e279b6c1SSam Ravnborg Find out whether you have ISA slots on your motherboard. ISA is the 3012e279b6c1SSam Ravnborg name of a bus system, i.e. the way the CPU talks to the other stuff 3013e279b6c1SSam Ravnborg inside your box. Other bus systems are PCI, EISA, MicroChannel 3014e279b6c1SSam Ravnborg (MCA) or VESA. ISA is an older system, now being displaced by PCI; 3015e279b6c1SSam Ravnborg newer boards don't support it. If you have ISA, say Y, otherwise N. 3016e279b6c1SSam Ravnborg 3017e279b6c1SSam Ravnborgconfig SCx200 3018e279b6c1SSam Ravnborg tristate "NatSemi SCx200 support" 3019a7f7f624SMasahiro Yamada help 3020e279b6c1SSam Ravnborg This provides basic support for National Semiconductor's 3021e279b6c1SSam Ravnborg (now AMD's) Geode processors. The driver probes for the 3022e279b6c1SSam Ravnborg PCI-IDs of several on-chip devices, so its a good dependency 3023e279b6c1SSam Ravnborg for other scx200_* drivers. 3024e279b6c1SSam Ravnborg 3025e279b6c1SSam Ravnborg If compiled as a module, the driver is named scx200. 3026e279b6c1SSam Ravnborg 3027e279b6c1SSam Ravnborgconfig SCx200HR_TIMER 3028e279b6c1SSam Ravnborg tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" 3029592913ecSJohn Stultz depends on SCx200 3030e279b6c1SSam Ravnborg default y 3031a7f7f624SMasahiro Yamada help 3032e279b6c1SSam Ravnborg This driver provides a clocksource built upon the on-chip 3033e279b6c1SSam Ravnborg 27MHz high-resolution timer. Its also a workaround for 3034e279b6c1SSam Ravnborg NSC Geode SC-1100's buggy TSC, which loses time when the 3035e279b6c1SSam Ravnborg processor goes idle (as is done by the scheduler). The 3036e279b6c1SSam Ravnborg other workaround is idle=poll boot option. 3037e279b6c1SSam Ravnborg 30383ef0e1f8SAndres Salomonconfig OLPC 30393ef0e1f8SAndres Salomon bool "One Laptop Per Child support" 304054008979SThomas Gleixner depends on !X86_PAE 30413c554946SAndres Salomon select GPIOLIB 3042dc3119e7SThomas Gleixner select OF 304345bb1674SDaniel Drake select OF_PROMTREE 3044b4e51854SGrant Likely select IRQ_DOMAIN 30450c3d931bSLubomir Rintel select OLPC_EC 3046a7f7f624SMasahiro Yamada help 30473ef0e1f8SAndres Salomon Add support for detecting the unique features of the OLPC 30483ef0e1f8SAndres Salomon XO hardware. 30493ef0e1f8SAndres Salomon 3050a3128588SDaniel Drakeconfig OLPC_XO1_PM 3051a3128588SDaniel Drake bool "OLPC XO-1 Power Management" 3052fa112cf1SBorislav Petkov depends on OLPC && MFD_CS5535=y && PM_SLEEP 3053a7f7f624SMasahiro Yamada help 305497c4cb71SDaniel Drake Add support for poweroff and suspend of the OLPC XO-1 laptop. 3055bf1ebf00SDaniel Drake 3056cfee9597SDaniel Drakeconfig OLPC_XO1_RTC 3057cfee9597SDaniel Drake bool "OLPC XO-1 Real Time Clock" 3058cfee9597SDaniel Drake depends on OLPC_XO1_PM && RTC_DRV_CMOS 3059a7f7f624SMasahiro Yamada help 3060cfee9597SDaniel Drake Add support for the XO-1 real time clock, which can be used as a 3061cfee9597SDaniel Drake programmable wakeup source. 3062cfee9597SDaniel Drake 30637feda8e9SDaniel Drakeconfig OLPC_XO1_SCI 30647feda8e9SDaniel Drake bool "OLPC XO-1 SCI extras" 306592e830f2SArnd Bergmann depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y 3066ed8e47feSRandy Dunlap depends on INPUT=y 3067d8d01a63SDaniel Drake select POWER_SUPPLY 3068a7f7f624SMasahiro Yamada help 30697feda8e9SDaniel Drake Add support for SCI-based features of the OLPC XO-1 laptop: 30707bc74b3dSDaniel Drake - EC-driven system wakeups 30717feda8e9SDaniel Drake - Power button 30727bc74b3dSDaniel Drake - Ebook switch 30732cf2baeaSDaniel Drake - Lid switch 3074e1040ac6SDaniel Drake - AC adapter status updates 3075e1040ac6SDaniel Drake - Battery status updates 30767feda8e9SDaniel Drake 3077a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI 3078a0f30f59SDaniel Drake bool "OLPC XO-1.5 SCI extras" 3079d8d01a63SDaniel Drake depends on OLPC && ACPI 3080d8d01a63SDaniel Drake select POWER_SUPPLY 3081a7f7f624SMasahiro Yamada help 3082a0f30f59SDaniel Drake Add support for SCI-based features of the OLPC XO-1.5 laptop: 3083a0f30f59SDaniel Drake - EC-driven system wakeups 3084a0f30f59SDaniel Drake - AC adapter status updates 3085a0f30f59SDaniel Drake - Battery status updates 3086e279b6c1SSam Ravnborg 3087298c9babSDmitry Torokhovconfig GEODE_COMMON 3088298c9babSDmitry Torokhov bool 3089298c9babSDmitry Torokhov 3090d4f3e350SEd Wildgooseconfig ALIX 3091d4f3e350SEd Wildgoose bool "PCEngines ALIX System Support (LED setup)" 3092d4f3e350SEd Wildgoose select GPIOLIB 3093298c9babSDmitry Torokhov select GEODE_COMMON 3094a7f7f624SMasahiro Yamada help 3095d4f3e350SEd Wildgoose This option enables system support for the PCEngines ALIX. 3096d4f3e350SEd Wildgoose At present this just sets up LEDs for GPIO control on 3097d4f3e350SEd Wildgoose ALIX2/3/6 boards. However, other system specific setup should 3098d4f3e350SEd Wildgoose get added here. 3099d4f3e350SEd Wildgoose 3100d4f3e350SEd Wildgoose Note: You must still enable the drivers for GPIO and LED support 3101d4f3e350SEd Wildgoose (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs 3102d4f3e350SEd Wildgoose 3103d4f3e350SEd Wildgoose Note: You have to set alix.force=1 for boards with Award BIOS. 3104d4f3e350SEd Wildgoose 3105da4e3302SPhilip Prindevilleconfig NET5501 3106da4e3302SPhilip Prindeville bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)" 3107da4e3302SPhilip Prindeville select GPIOLIB 3108298c9babSDmitry Torokhov select GEODE_COMMON 3109a7f7f624SMasahiro Yamada help 3110da4e3302SPhilip Prindeville This option enables system support for the Soekris Engineering net5501. 3111da4e3302SPhilip Prindeville 31123197059aSPhilip A. Prindevilleconfig GEOS 31133197059aSPhilip A. Prindeville bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)" 31143197059aSPhilip A. Prindeville select GPIOLIB 3115298c9babSDmitry Torokhov select GEODE_COMMON 31163197059aSPhilip A. Prindeville depends on DMI 3117a7f7f624SMasahiro Yamada help 31183197059aSPhilip A. Prindeville This option enables system support for the Traverse Technologies GEOS. 31193197059aSPhilip A. Prindeville 31207d029125SVivien Didelotconfig TS5500 31217d029125SVivien Didelot bool "Technologic Systems TS-5500 platform support" 31227d029125SVivien Didelot depends on MELAN 31237d029125SVivien Didelot select CHECK_SIGNATURE 31247d029125SVivien Didelot select NEW_LEDS 31257d029125SVivien Didelot select LEDS_CLASS 3126a7f7f624SMasahiro Yamada help 31277d029125SVivien Didelot This option enables system support for the Technologic Systems TS-5500. 31287d029125SVivien Didelot 3129e279b6c1SSam Ravnborgendif # X86_32 3130e279b6c1SSam Ravnborg 313123ac4ae8SAndreas Herrmannconfig AMD_NB 3132e279b6c1SSam Ravnborg def_bool y 31330e152cd7SBorislav Petkov depends on CPU_SUP_AMD && PCI 3134e279b6c1SSam Ravnborg 3135e279b6c1SSam Ravnborgendmenu 3136e279b6c1SSam Ravnborg 31371572497cSChristoph Hellwigmenu "Binary Emulations" 3138e279b6c1SSam Ravnborg 3139e279b6c1SSam Ravnborgconfig IA32_EMULATION 3140e279b6c1SSam Ravnborg bool "IA32 Emulation" 3141e279b6c1SSam Ravnborg depends on X86_64 314239f88911SIngo Molnar select ARCH_WANT_OLD_COMPAT_IPC 3143d1603990SRandy Dunlap select BINFMT_ELF 314439f88911SIngo Molnar select COMPAT_OLD_SIGACTION 3145a7f7f624SMasahiro Yamada help 31465fd92e65SH. J. Lu Include code to run legacy 32-bit programs under a 31475fd92e65SH. J. Lu 64-bit kernel. You should likely turn this on, unless you're 31485fd92e65SH. J. Lu 100% sure that you don't have any 32-bit programs left. 3149e279b6c1SSam Ravnborg 3150a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED 3151a11e0975SNikolay Borisov bool "IA32 emulation disabled by default" 3152a11e0975SNikolay Borisov default n 3153a11e0975SNikolay Borisov depends on IA32_EMULATION 3154a11e0975SNikolay Borisov help 3155a11e0975SNikolay Borisov Make IA32 emulation disabled by default. This prevents loading 32-bit 3156a11e0975SNikolay Borisov processes and access to 32-bit syscalls. If unsure, leave it to its 3157a11e0975SNikolay Borisov default value. 3158a11e0975SNikolay Borisov 315983a44a4fSMasahiro Yamadaconfig X86_X32_ABI 31606ea30386SKees Cook bool "x32 ABI for 64-bit mode" 31619b54050bSBrian Gerst depends on X86_64 3162aaeed6ecSNathan Chancellor # llvm-objcopy does not convert x86_64 .note.gnu.property or 3163aaeed6ecSNathan Chancellor # compressed debug sections to x86_x32 properly: 3164aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/514 3165aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/1141 3166aaeed6ecSNathan Chancellor depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm) 3167a7f7f624SMasahiro Yamada help 31685fd92e65SH. J. Lu Include code to run binaries for the x32 native 32-bit ABI 31695fd92e65SH. J. Lu for 64-bit processors. An x32 process gets access to the 31705fd92e65SH. J. Lu full 64-bit register file and wide data path while leaving 31715fd92e65SH. J. Lu pointers at 32 bits for smaller memory footprint. 31725fd92e65SH. J. Lu 3173953fee1dSIngo Molnarconfig COMPAT_32 3174953fee1dSIngo Molnar def_bool y 3175953fee1dSIngo Molnar depends on IA32_EMULATION || X86_32 3176953fee1dSIngo Molnar select HAVE_UID16 3177953fee1dSIngo Molnar select OLD_SIGSUSPEND3 3178953fee1dSIngo Molnar 3179e279b6c1SSam Ravnborgconfig COMPAT 31803c2362e6SHarvey Harrison def_bool y 318183a44a4fSMasahiro Yamada depends on IA32_EMULATION || X86_X32_ABI 3182e279b6c1SSam Ravnborg 3183e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT 31843120e25eSJan Beulich def_bool y 3185a9251280SLinus Torvalds depends on COMPAT 3186ee009e4aSDavid Howells 3187e279b6c1SSam Ravnborgendmenu 3188e279b6c1SSam Ravnborg 3189e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP 3190e5beae16SKeith Packard def_bool y 3191e5beae16SKeith Packard depends on X86_32 3192e5beae16SKeith Packard 3193edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig" 31945e8ebd84SJason A. Donenfeld 31955e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler" 3196