1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 2daa93fabSSam Ravnborg# Select 32 or 64 bit 3daa93fabSSam Ravnborgconfig 64BIT 4104daea1SMasahiro Yamada bool "64-bit kernel" if "$(ARCH)" = "x86" 5104daea1SMasahiro Yamada default "$(ARCH)" != "i386" 6a7f7f624SMasahiro Yamada help 7daa93fabSSam Ravnborg Say yes to build a 64-bit kernel - formerly known as x86_64 8daa93fabSSam Ravnborg Say no to build a 32-bit kernel - formerly known as i386 9daa93fabSSam Ravnborg 10daa93fabSSam Ravnborgconfig X86_32 113120e25eSJan Beulich def_bool y 123120e25eSJan Beulich depends on !64BIT 13341c787eSIngo Molnar # Options that are inherently 32-bit kernel only: 14341c787eSIngo Molnar select ARCH_WANT_IPC_PARSE_VERSION 15341c787eSIngo Molnar select CLKSRC_I8253 16341c787eSIngo Molnar select CLONE_BACKWARDS 17157e118bSThomas Gleixner select GENERIC_VDSO_32 18117ed454SThomas Gleixner select HAVE_DEBUG_STACKOVERFLOW 19157e118bSThomas Gleixner select KMAP_LOCAL 20341c787eSIngo Molnar select MODULES_USE_ELF_REL 21341c787eSIngo Molnar select OLD_SIGACTION 222ca408d9SBrian Gerst select ARCH_SPLIT_ARG64 23daa93fabSSam Ravnborg 24daa93fabSSam Ravnborgconfig X86_64 253120e25eSJan Beulich def_bool y 263120e25eSJan Beulich depends on 64BIT 27d94e0685SIngo Molnar # Options that are inherently 64-bit kernel only: 284eb0716eSAlexandre Ghiti select ARCH_HAS_GIGANTIC_PAGE 29c12d3362SArd Biesheuvel select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 300bff0aaeSSuren Baghdasaryan select ARCH_SUPPORTS_PER_VMA_LOCK 31d94e0685SIngo Molnar select HAVE_ARCH_SOFT_DIRTY 32d94e0685SIngo Molnar select MODULES_USE_ELF_RELA 33f616ab59SChristoph Hellwig select NEED_DMA_MAP_STATE 3409230cbcSChristoph Hellwig select SWIOTLB 357facdc42SAl Viro select ARCH_HAS_ELFCORE_COMPAT 3663703f37SKefeng Wang select ZONE_DMA32 371032c0baSSam Ravnborg 38518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE 39518049d9SSteven Rostedt (VMware) def_bool y 40518049d9SSteven Rostedt (VMware) depends on X86_32 41518049d9SSteven Rostedt (VMware) depends on FUNCTION_TRACER 42518049d9SSteven Rostedt (VMware) select DYNAMIC_FTRACE 43518049d9SSteven Rostedt (VMware) help 44518049d9SSteven Rostedt (VMware) We keep the static function tracing (!DYNAMIC_FTRACE) around 45518049d9SSteven Rostedt (VMware) in order to test the non static function tracing in the 46518049d9SSteven Rostedt (VMware) generic code, as other architectures still use it. But we 47518049d9SSteven Rostedt (VMware) only need to keep it around for x86_64. No need to keep it 48518049d9SSteven Rostedt (VMware) for x86_32. For x86_32, force DYNAMIC_FTRACE. 49d94e0685SIngo Molnar# 50d94e0685SIngo Molnar# Arch settings 51d94e0685SIngo Molnar# 52d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be 53d94e0685SIngo Molnar# ported to 32-bit as well. ) 54d94e0685SIngo Molnar# 558d5fffb9SSam Ravnborgconfig X86 563c2362e6SHarvey Harrison def_bool y 57c763ea26SIngo Molnar # 58c763ea26SIngo Molnar # Note: keep this list sorted alphabetically 59c763ea26SIngo Molnar # 606471b825SIngo Molnar select ACPI_LEGACY_TABLES_LOOKUP if ACPI 616e0a0ea1SGraeme Gregory select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 62a02f66bbSJames Morse select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 63942fa985SYury Norov select ARCH_32BIT_OFF_T if X86_32 642a21ad57SThomas Gleixner select ARCH_CLOCKSOURCE_INIT 651f6d3a8fSMasami Hiramatsu select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE 661e866974SAnshuman Khandual select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION 675c11f00bSDavid Hildenbrand select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64 6891024b3cSAnshuman Khandual select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 69cebc774fSAnshuman Khandual select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE) 701e866974SAnshuman Khandual select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE 7191dda51aSAleksey Makarov select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 72c2280be8SAnshuman Khandual select ARCH_HAS_CACHE_LINE_SIZE 731156b441SDavidlohr Bueso select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION 747c7077a7SThomas Gleixner select ARCH_HAS_CPU_FINALIZE_INIT 758f23f5dbSJason Gunthorpe select ARCH_HAS_CPU_PASID if IOMMU_SVA 762792d84eSKees Cook select ARCH_HAS_CURRENT_STACK_POINTER 77fa5b6ec9SLaura Abbott select ARCH_HAS_DEBUG_VIRTUAL 78399145f9SAnshuman Khandual select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE 7921266be9SDan Williams select ARCH_HAS_DEVMEM_IS_ALLOWED 80b1a57bbfSDouglas Anderson select ARCH_HAS_EARLY_DEBUG if KGDB 816471b825SIngo Molnar select ARCH_HAS_ELF_RANDOMIZE 8272d93104SLinus Torvalds select ARCH_HAS_FAST_MULTIPLIER 836974f0c4SDaniel Micay select ARCH_HAS_FORTIFY_SOURCE 84957e3facSRiku Voipio select ARCH_HAS_GCOV_PROFILE_ALL 85bece04b5SMarco Elver select ARCH_HAS_KCOV if X86_64 860c9c1d56SThiago Jung Bauermann select ARCH_HAS_MEM_ENCRYPT 8710bcc80eSMathieu Desnoyers select ARCH_HAS_MEMBARRIER_SYNC_CORE 8849f88c70SPaul E. McKenney select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 890ebeea8cSDaniel Borkmann select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 90c763ea26SIngo Molnar select ARCH_HAS_PMEM_API if X86_64 9117596731SRobin Murphy select ARCH_HAS_PTE_DEVMAP if X86_64 923010a5eaSLaurent Dufour select ARCH_HAS_PTE_SPECIAL 9371ce1ab5SKinsey Ho select ARCH_HAS_HW_PTE_YOUNG 94eed9a328SYu Zhao select ARCH_HAS_NONLEAF_PMD_YOUNG if PGTABLE_LEVELS > 2 950aed55afSDan Williams select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64 96ec6347bbSDan Williams select ARCH_HAS_COPY_MC if X86_64 97d2852a22SDaniel Borkmann select ARCH_HAS_SET_MEMORY 98d253ca0cSRick Edgecombe select ARCH_HAS_SET_DIRECT_MAP 99ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_KERNEL_RWX 100ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_MODULE_RWX 101ac1ab12aSMathieu Desnoyers select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 10225c619e5SBrian Gerst select ARCH_HAS_SYSCALL_WRAPPER 103918327e9SKees Cook select ARCH_HAS_UBSAN 1047e01ccb4SZong Li select ARCH_HAS_DEBUG_WX 10563703f37SKefeng Wang select ARCH_HAS_ZONE_DMA_SET if EXPERT 1066471b825SIngo Molnar select ARCH_HAVE_NMI_SAFE_CMPXCHG 10704d5ea46SAneesh Kumar K.V select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE 1086471b825SIngo Molnar select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI 10977fbbc81SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 1105e2c18c0SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 1113599fe12SThomas Gleixner select ARCH_STACKWALK 1122c870e61SArnd Bergmann select ARCH_SUPPORTS_ACPI 1136471b825SIngo Molnar select ARCH_SUPPORTS_ATOMIC_RMW 1145d6ad668SMike Rapoport select ARCH_SUPPORTS_DEBUG_PAGEALLOC 115d283d422SPasha Tatashin select ARCH_SUPPORTS_PAGE_TABLE_CHECK if X86_64 1166471b825SIngo Molnar select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 11714df3267SThomas Gleixner select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP if NR_CPUS <= 4096 1183c516f89SSami Tolvanen select ARCH_SUPPORTS_CFI_CLANG if X86_64 1193c516f89SSami Tolvanen select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG 120583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG 121583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG_THIN 1226471b825SIngo Molnar select ARCH_USE_BUILTIN_BSWAP 123a432b7c0SUros Bizjak select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64 124dce44566SAnshuman Khandual select ARCH_USE_MEMTEST 1256471b825SIngo Molnar select ARCH_USE_QUEUED_RWLOCKS 1266471b825SIngo Molnar select ARCH_USE_QUEUED_SPINLOCKS 1272ce0d7f9SMark Brown select ARCH_USE_SYM_ANNOTATIONS 128ce4a4e56SAndy Lutomirski select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH 12981c22041SDaniel Borkmann select ARCH_WANT_DEFAULT_BPF_JIT if X86_64 130c763ea26SIngo Molnar select ARCH_WANTS_DYNAMIC_TASK_STRUCT 13151c2ee6dSNick Desaulniers select ARCH_WANTS_NO_INSTR 13207431506SAnshuman Khandual select ARCH_WANT_GENERAL_HUGETLB 1333876d4a3SAlexandre Ghiti select ARCH_WANT_HUGE_PMD_SHARE 13459612b24SNathan Chancellor select ARCH_WANT_LD_ORPHAN_WARN 1350b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64 1360b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64 13738d8b4e6SHuang Ying select ARCH_WANTS_THP_SWAP if X86_64 138b5f06f64SBalbir Singh select ARCH_HAS_PARANOID_L1D_FLUSH 13910916706SShile Zhang select BUILDTIME_TABLE_SORT 1406471b825SIngo Molnar select CLKEVT_I8253 1416471b825SIngo Molnar select CLOCKSOURCE_VALIDATE_LAST_CYCLE 1426471b825SIngo Molnar select CLOCKSOURCE_WATCHDOG 1437cf8f44aSAlexander Potapenko # Word-size accesses may read uninitialized data past the trailing \0 1447cf8f44aSAlexander Potapenko # in strings and cause false KMSAN reports. 1457cf8f44aSAlexander Potapenko select DCACHE_WORD_ACCESS if !KMSAN 1463aac3ebeSThomas Gleixner select DYNAMIC_SIGFRAME 14745471cd9SLinus Torvalds select EDAC_ATOMIC_SCRUB 14845471cd9SLinus Torvalds select EDAC_SUPPORT 1496471b825SIngo Molnar select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC) 150cb81deefSThomas Gleixner select GENERIC_CLOCKEVENTS_BROADCAST_IDLE if GENERIC_CLOCKEVENTS_BROADCAST 1516471b825SIngo Molnar select GENERIC_CLOCKEVENTS_MIN_ADJUST 1526471b825SIngo Molnar select GENERIC_CMOS_UPDATE 1536471b825SIngo Molnar select GENERIC_CPU_AUTOPROBE 1545b95f94cSJames Morse select GENERIC_CPU_DEVICES 15561dc0f55SThomas Gleixner select GENERIC_CPU_VULNERABILITIES 1566471b825SIngo Molnar select GENERIC_EARLY_IOREMAP 15727d6b4d1SThomas Gleixner select GENERIC_ENTRY 1586471b825SIngo Molnar select GENERIC_IOMAP 159c7d6c9ddSThomas Gleixner select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1600fa115daSThomas Gleixner select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC 161ad7a929fSThomas Gleixner select GENERIC_IRQ_MIGRATION if SMP 1626471b825SIngo Molnar select GENERIC_IRQ_PROBE 163c201c917SThomas Gleixner select GENERIC_IRQ_RESERVATION_MODE 1646471b825SIngo Molnar select GENERIC_IRQ_SHOW 1656471b825SIngo Molnar select GENERIC_PENDING_IRQ if SMP 1662ae27137SSteven Price select GENERIC_PTDUMP 1676471b825SIngo Molnar select GENERIC_SMP_IDLE_THREAD 1686471b825SIngo Molnar select GENERIC_TIME_VSYSCALL 1697ac87074SVincenzo Frascino select GENERIC_GETTIMEOFDAY 170550a77a7SDmitry Safonov select GENERIC_VDSO_TIME_NS 1716ca297d4SPeter Zijlstra select GUP_GET_PXX_LOW_HIGH if X86_PAE 17217e5888eSHans de Goede select HARDIRQS_SW_RESEND 1737edaeb68SThomas Gleixner select HARDLOCKUP_CHECK_TIMESTAMP if X86_64 174fcbfe812SNiklas Schnelle select HAS_IOPORT 1756471b825SIngo Molnar select HAVE_ACPI_APEI if ACPI 1766471b825SIngo Molnar select HAVE_ACPI_APEI_NMI if ACPI 1772a19be61SVlastimil Babka select HAVE_ALIGNED_STRUCT_PAGE 1786471b825SIngo Molnar select HAVE_ARCH_AUDITSYSCALL 1796471b825SIngo Molnar select HAVE_ARCH_HUGE_VMAP if X86_64 || X86_PAE 180eed1fceeSSong Liu select HAVE_ARCH_HUGE_VMALLOC if X86_64 1816471b825SIngo Molnar select HAVE_ARCH_JUMP_LABEL 182b34006c4SArd Biesheuvel select HAVE_ARCH_JUMP_LABEL_RELATIVE 183d17a1d97SAndrey Ryabinin select HAVE_ARCH_KASAN if X86_64 1840609ae01SDaniel Axtens select HAVE_ARCH_KASAN_VMALLOC if X86_64 1851dc0da6eSAlexander Potapenko select HAVE_ARCH_KFENCE 1864ca8cc8dSAlexander Potapenko select HAVE_ARCH_KMSAN if X86_64 1876471b825SIngo Molnar select HAVE_ARCH_KGDB 1889e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_BITS if MMU 1899e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 1901b028f78SDmitry Safonov select HAVE_ARCH_COMPAT_MMAP_BASES if MMU && COMPAT 191271ca788SArd Biesheuvel select HAVE_ARCH_PREL32_RELOCATIONS 1926471b825SIngo Molnar select HAVE_ARCH_SECCOMP_FILTER 193f7d83c1cSKees Cook select HAVE_ARCH_THREAD_STRUCT_WHITELIST 194afaef01cSAlexander Popov select HAVE_ARCH_STACKLEAK 1956471b825SIngo Molnar select HAVE_ARCH_TRACEHOOK 1966471b825SIngo Molnar select HAVE_ARCH_TRANSPARENT_HUGEPAGE 197a00cc7d9SMatthew Wilcox select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 198b64d8d1eSPeter Xu select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD 1997677f7fdSAxel Rasmussen select HAVE_ARCH_USERFAULTFD_MINOR if X86_64 && USERFAULTFD 200e37e43a4SAndy Lutomirski select HAVE_ARCH_VMAP_STACK if X86_64 201fe950f60SKees Cook select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 202c763ea26SIngo Molnar select HAVE_ARCH_WITHIN_STACK_FRAMES 2032ff2b7ecSMasahiro Yamada select HAVE_ASM_MODVERSIONS 2046471b825SIngo Molnar select HAVE_CMPXCHG_DOUBLE 2056471b825SIngo Molnar select HAVE_CMPXCHG_LOCAL 20624a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER if X86_64 20724a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER_OFFSTACK if HAVE_CONTEXT_TRACKING_USER 2086471b825SIngo Molnar select HAVE_C_RECORDMCOUNT 20903f16cd0SJosh Poimboeuf select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL 210280981d6SSathvika Vasireddy select HAVE_OBJTOOL_NOP_MCOUNT if HAVE_OBJTOOL_MCOUNT 2114ed308c4SSteven Rostedt (Google) select HAVE_BUILDTIME_MCOUNT_SORT 2126471b825SIngo Molnar select HAVE_DEBUG_KMEMLEAK 2139c5a3621SAkinobu Mita select HAVE_DMA_CONTIGUOUS 214677aa9f7SSteven Rostedt select HAVE_DYNAMIC_FTRACE 21506aeaaeaSMasami Hiramatsu select HAVE_DYNAMIC_FTRACE_WITH_REGS 21602a474caSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_ARGS if X86_64 217562955feSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 218c316eb44SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT if X86_64 219503e4510SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT_MULTI if X86_64 22003f5781bSWang YanQing select HAVE_EBPF_JIT 22158340a07SJohannes Berg select HAVE_EFFICIENT_UNALIGNED_ACCESS 2226630a8e5SChristoph Hellwig select HAVE_EISA 2235f56a5dfSJiri Slaby select HAVE_EXIT_THREAD 22467a929e0SChristoph Hellwig select HAVE_FAST_GUP 225644e0e8dSSteven Rostedt (VMware) select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE 2266471b825SIngo Molnar select HAVE_FTRACE_MCOUNT_RECORD 227d938ba17SDonglin Peng select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER 2284a30e4c9SSteven Rostedt (VMware) select HAVE_FUNCTION_GRAPH_TRACER if X86_32 || (X86_64 && DYNAMIC_FTRACE) 2296471b825SIngo Molnar select HAVE_FUNCTION_TRACER 2306b90bd4bSEmese Revfy select HAVE_GCC_PLUGINS 2310067f129SK.Prasad select HAVE_HW_BREAKPOINT 2326471b825SIngo Molnar select HAVE_IOREMAP_PROT 233624db9eaSThomas Gleixner select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64 2346471b825SIngo Molnar select HAVE_IRQ_TIME_ACCOUNTING 2354ab7674fSJosh Poimboeuf select HAVE_JUMP_LABEL_HACK if HAVE_OBJTOOL 2366471b825SIngo Molnar select HAVE_KERNEL_BZIP2 2376471b825SIngo Molnar select HAVE_KERNEL_GZIP 2386471b825SIngo Molnar select HAVE_KERNEL_LZ4 2396471b825SIngo Molnar select HAVE_KERNEL_LZMA 2406471b825SIngo Molnar select HAVE_KERNEL_LZO 2416471b825SIngo Molnar select HAVE_KERNEL_XZ 242fb46d057SNick Terrell select HAVE_KERNEL_ZSTD 2436471b825SIngo Molnar select HAVE_KPROBES 2446471b825SIngo Molnar select HAVE_KPROBES_ON_FTRACE 245540adea3SMasami Hiramatsu select HAVE_FUNCTION_ERROR_INJECTION 2466471b825SIngo Molnar select HAVE_KRETPROBES 247f3a112c0SMasami Hiramatsu select HAVE_RETHOOK 2486471b825SIngo Molnar select HAVE_LIVEPATCH if X86_64 2490102752eSFrederic Weisbecker select HAVE_MIXED_BREAKPOINTS_REGS 250ee9f8fceSJosh Poimboeuf select HAVE_MOD_ARCH_SPECIFIC 2519f132f7eSJoel Fernandes (Google) select HAVE_MOVE_PMD 252be37c98dSKalesh Singh select HAVE_MOVE_PUD 25322102f45SJosh Poimboeuf select HAVE_NOINSTR_HACK if HAVE_OBJTOOL 25442a0bb3fSPetr Mladek select HAVE_NMI 255489e355bSJosh Poimboeuf select HAVE_NOINSTR_VALIDATION if HAVE_OBJTOOL 25603f16cd0SJosh Poimboeuf select HAVE_OBJTOOL if X86_64 2576471b825SIngo Molnar select HAVE_OPTPROBES 2585394f1e9SArnd Bergmann select HAVE_PAGE_SIZE_4KB 2596471b825SIngo Molnar select HAVE_PCSPKR_PLATFORM 2606471b825SIngo Molnar select HAVE_PERF_EVENTS 261c01d4323SFrederic Weisbecker select HAVE_PERF_EVENTS_NMI 26292e5aae4SNicholas Piggin select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI 263eb01d42aSChristoph Hellwig select HAVE_PCI 264c5e63197SJiri Olsa select HAVE_PERF_REGS 265c5ebcedbSJiri Olsa select HAVE_PERF_USER_STACK_DUMP 266ff2e6d72SPeter Zijlstra select MMU_GATHER_RCU_TABLE_FREE if PARAVIRT 2671e9fdf21SPeter Zijlstra select MMU_GATHER_MERGE_VMAS 26800998085SThomas Gleixner select HAVE_POSIX_CPU_TIMERS_TASK_WORK 2696471b825SIngo Molnar select HAVE_REGS_AND_STACK_ACCESS_API 27003f16cd0SJosh Poimboeuf select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC || STACK_VALIDATION 2713c88ee19SMasami Hiramatsu select HAVE_FUNCTION_ARG_ACCESS_API 2727ecd19cfSKefeng Wang select HAVE_SETUP_PER_CPU_AREA 273cd1a41ceSThomas Gleixner select HAVE_SOFTIRQ_ON_OWN_STACK 274d148eac0SMasahiro Yamada select HAVE_STACKPROTECTOR if CC_HAS_SANE_STACKPROTECTOR 27503f16cd0SJosh Poimboeuf select HAVE_STACK_VALIDATION if HAVE_OBJTOOL 276e6d6c071SJosh Poimboeuf select HAVE_STATIC_CALL 27703f16cd0SJosh Poimboeuf select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL 27899cf983cSMark Rutland select HAVE_PREEMPT_DYNAMIC_CALL 279d6761b8fSMathieu Desnoyers select HAVE_RSEQ 28009498135SMiguel Ojeda select HAVE_RUST if X86_64 2816471b825SIngo Molnar select HAVE_SYSCALL_TRACEPOINTS 2825f3da8c0SJosh Poimboeuf select HAVE_UACCESS_VALIDATION if HAVE_OBJTOOL 2836471b825SIngo Molnar select HAVE_UNSTABLE_SCHED_CLOCK 2847c68af6eSAvi Kivity select HAVE_USER_RETURN_NOTIFIER 2857ac87074SVincenzo Frascino select HAVE_GENERIC_VDSO 2860c7ffa32SThomas Gleixner select HOTPLUG_PARALLEL if SMP && X86_64 28705736e4aSThomas Gleixner select HOTPLUG_SMT if SMP 2880c7ffa32SThomas Gleixner select HOTPLUG_SPLIT_STARTUP if SMP && X86_32 289c0185808SThomas Gleixner select IRQ_FORCED_THREADING 290c2508ec5SLinus Torvalds select LOCK_MM_AND_FIND_VMA 2917ecd19cfSKefeng Wang select NEED_PER_CPU_EMBED_FIRST_CHUNK 2927ecd19cfSKefeng Wang select NEED_PER_CPU_PAGE_FIRST_CHUNK 29386596f0aSChristoph Hellwig select NEED_SG_DMA_LENGTH 2942eac9c2dSChristoph Hellwig select PCI_DOMAINS if PCI 295625210cfSSinan Kaya select PCI_LOCKLESS_CONFIG if PCI 2966471b825SIngo Molnar select PERF_EVENTS 2973195ef59SPrarit Bhargava select RTC_LIB 298d6faca40SArnd Bergmann select RTC_MC146818_LIB 2996471b825SIngo Molnar select SPARSE_IRQ 3006471b825SIngo Molnar select SYSCTL_EXCEPTION_TRACE 30115f4eae7SAndy Lutomirski select THREAD_INFO_IN_TASK 3024aae683fSMasahiro Yamada select TRACE_IRQFLAGS_SUPPORT 3034510bffbSMark Rutland select TRACE_IRQFLAGS_NMI_SUPPORT 3046471b825SIngo Molnar select USER_STACKTRACE_SUPPORT 3053b02a051SIngo Molnar select HAVE_ARCH_KCSAN if X86_64 3060c608dadSAubrey Li select PROC_PID_ARCH_STATUS if PROC_FS 30750468e43SJarkko Sakkinen select HAVE_ARCH_NODE_DEV_GROUP if X86_SGX 308d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_16B if X86_64 || X86_ALIGNMENT_16 309d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_4B 3109e2b4be3SNayna Jain imply IMA_SECURE_AND_OR_TRUSTED_BOOT if EFI 311ceea991aSJiri Olsa select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 3127d8330a5SBalbir Singh 313ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER 3143120e25eSJan Beulich def_bool y 3153120e25eSJan Beulich depends on KPROBES || PERF_EVENTS || UPROBES 316ba7e4d13SIngo Molnar 31751b26adaSLinus Torvaldsconfig OUTPUT_FORMAT 31851b26adaSLinus Torvalds string 31951b26adaSLinus Torvalds default "elf32-i386" if X86_32 32051b26adaSLinus Torvalds default "elf64-x86-64" if X86_64 32151b26adaSLinus Torvalds 3228d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT 3233c2362e6SHarvey Harrison def_bool y 3248d5fffb9SSam Ravnborg 3258d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT 3263c2362e6SHarvey Harrison def_bool y 3278d5fffb9SSam Ravnborg 3288d5fffb9SSam Ravnborgconfig MMU 3293c2362e6SHarvey Harrison def_bool y 3308d5fffb9SSam Ravnborg 3319e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN 3329e08f57dSDaniel Cashman default 28 if 64BIT 3339e08f57dSDaniel Cashman default 8 3349e08f57dSDaniel Cashman 3359e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX 3369e08f57dSDaniel Cashman default 32 if 64BIT 3379e08f57dSDaniel Cashman default 16 3389e08f57dSDaniel Cashman 3399e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3409e08f57dSDaniel Cashman default 8 3419e08f57dSDaniel Cashman 3429e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3439e08f57dSDaniel Cashman default 16 3449e08f57dSDaniel Cashman 3458d5fffb9SSam Ravnborgconfig SBUS 3468d5fffb9SSam Ravnborg bool 3478d5fffb9SSam Ravnborg 3488d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA 3493120e25eSJan Beulich def_bool y 3503120e25eSJan Beulich depends on ISA_DMA_API 3518d5fffb9SSam Ravnborg 352d911c67eSAlexander Potapenkoconfig GENERIC_CSUM 353d911c67eSAlexander Potapenko bool 354d911c67eSAlexander Potapenko default y if KMSAN || KASAN 355d911c67eSAlexander Potapenko 3568d5fffb9SSam Ravnborgconfig GENERIC_BUG 3573c2362e6SHarvey Harrison def_bool y 3588d5fffb9SSam Ravnborg depends on BUG 359b93a531eSJan Beulich select GENERIC_BUG_RELATIVE_POINTERS if X86_64 360b93a531eSJan Beulich 361b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS 362b93a531eSJan Beulich bool 3638d5fffb9SSam Ravnborg 3648d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC 3653120e25eSJan Beulich def_bool y 3663120e25eSJan Beulich depends on ISA_DMA_API 3678d5fffb9SSam Ravnborg 3681032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY 3691032c0baSSam Ravnborg def_bool y 3701032c0baSSam Ravnborg 3719a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX 3729a0b8415Svenkatesh.pallipadi@intel.com def_bool y 3738d5fffb9SSam Ravnborg 374801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE 375801e4062SJohannes Berg def_bool y 376801e4062SJohannes Berg 377f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 378f4cb5700SJohannes Berg def_bool y 379f4cb5700SJohannes Berg 3808d5fffb9SSam Ravnborgconfig AUDIT_ARCH 381e0fd24a3SJan Beulich def_bool y if X86_64 3828d5fffb9SSam Ravnborg 383d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET 384d6f2d75aSAndrey Ryabinin hex 385d6f2d75aSAndrey Ryabinin depends on KASAN 386d6f2d75aSAndrey Ryabinin default 0xdffffc0000000000 387d6f2d75aSAndrey Ryabinin 38869575d38SShane Wangconfig HAVE_INTEL_TXT 38969575d38SShane Wang def_bool y 3906ea30386SKees Cook depends on INTEL_IOMMU && ACPI 39169575d38SShane Wang 3926b0c3d44SSam Ravnborgconfig X86_64_SMP 3936b0c3d44SSam Ravnborg def_bool y 3946b0c3d44SSam Ravnborg depends on X86_64 && SMP 3956b0c3d44SSam Ravnborg 3962b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES 3972b144498SSrikar Dronamraju def_bool y 3982b144498SSrikar Dronamraju 399d20642f0SRob Herringconfig FIX_EARLYCON_MEM 400d20642f0SRob Herring def_bool y 401d20642f0SRob Herring 40294d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK 40394d49eb3SKirill A. Shutemov bool 40494d49eb3SKirill A. Shutemov 40598233368SKirill A. Shutemovconfig PGTABLE_LEVELS 40698233368SKirill A. Shutemov int 40777ef56e4SKirill A. Shutemov default 5 if X86_5LEVEL 40898233368SKirill A. Shutemov default 4 if X86_64 40998233368SKirill A. Shutemov default 3 if X86_PAE 41098233368SKirill A. Shutemov default 2 41198233368SKirill A. Shutemov 4122a61f474SMasahiro Yamadaconfig CC_HAS_SANE_STACKPROTECTOR 4132a61f474SMasahiro Yamada bool 4141b866781SNathan Chancellor default $(success,$(srctree)/scripts/gcc-x86_64-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) if 64BIT 4151b866781SNathan Chancellor default $(success,$(srctree)/scripts/gcc-x86_32-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) 4162a61f474SMasahiro Yamada help 4172a61f474SMasahiro Yamada We have to make sure stack protector is unconditionally disabled if 4183fb0fdb3SAndy Lutomirski the compiler produces broken code or if it does not let us control 4193fb0fdb3SAndy Lutomirski the segment on 32-bit kernels. 4202a61f474SMasahiro Yamada 421506f1d07SSam Ravnborgmenu "Processor type and features" 422506f1d07SSam Ravnborg 423506f1d07SSam Ravnborgconfig SMP 424506f1d07SSam Ravnborg bool "Symmetric multi-processing support" 425a7f7f624SMasahiro Yamada help 426506f1d07SSam Ravnborg This enables support for systems with more than one CPU. If you have 4274a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 4284a474157SRobert Graffham than one CPU, say Y. 429506f1d07SSam Ravnborg 4304a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 431506f1d07SSam Ravnborg machines, but will use only one CPU of a multiprocessor machine. If 432506f1d07SSam Ravnborg you say Y here, the kernel will run on many, but not all, 4334a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 434506f1d07SSam Ravnborg will run faster if you say N here. 435506f1d07SSam Ravnborg 436506f1d07SSam Ravnborg Note that if you say Y here and choose architecture "586" or 437506f1d07SSam Ravnborg "Pentium" under "Processor family", the kernel will not work on 486 438506f1d07SSam Ravnborg architectures. Similarly, multiprocessor kernels for the "PPro" 439506f1d07SSam Ravnborg architecture may not work on all Pentium based boards. 440506f1d07SSam Ravnborg 441506f1d07SSam Ravnborg People using multiprocessor machines who say Y here should also say 442506f1d07SSam Ravnborg Y to "Enhanced Real Time Clock Support", below. The "Advanced Power 443506f1d07SSam Ravnborg Management" code will be disabled if you say Y here. 444506f1d07SSam Ravnborg 445ff61f079SJonathan Corbet See also <file:Documentation/arch/x86/i386/IO-APIC.rst>, 4464f4cfa6cSMauro Carvalho Chehab <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at 447506f1d07SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 448506f1d07SSam Ravnborg 449506f1d07SSam Ravnborg If you don't know what to do here, say N. 450506f1d07SSam Ravnborg 45106cd9a7dSYinghai Luconfig X86_X2APIC 45206cd9a7dSYinghai Lu bool "Support x2apic" 45319e3d60dSJan Kiszka depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) 454a7f7f624SMasahiro Yamada help 45506cd9a7dSYinghai Lu This enables x2apic support on CPUs that have this feature. 45606cd9a7dSYinghai Lu 45706cd9a7dSYinghai Lu This allows 32-bit apic IDs (so it can support very large systems), 45806cd9a7dSYinghai Lu and accesses the local apic via MSRs not via mmio. 45906cd9a7dSYinghai Lu 460b8d1d163SDaniel Sneddon Some Intel systems circa 2022 and later are locked into x2APIC mode 461b8d1d163SDaniel Sneddon and can not fall back to the legacy APIC modes if SGX or TDX are 462e3998434SMateusz Jończyk enabled in the BIOS. They will boot with very reduced functionality 463e3998434SMateusz Jończyk without enabling this option. 464b8d1d163SDaniel Sneddon 46506cd9a7dSYinghai Lu If you don't know what to do here, say N. 46606cd9a7dSYinghai Lu 4676695c85bSYinghai Luconfig X86_MPPARSE 4684590d98fSAndy Shevchenko bool "Enable MPS table" if ACPI 4697a527688SJan Beulich default y 4705ab74722SIngo Molnar depends on X86_LOCAL_APIC 471a7f7f624SMasahiro Yamada help 4726695c85bSYinghai Lu For old smp systems that do not have proper acpi support. Newer systems 4736695c85bSYinghai Lu (esp with 64bit cpus) with acpi support, MADT and DSDT will override it 4746695c85bSYinghai Lu 475ddd70cf9SJun Nakajimaconfig GOLDFISH 476ddd70cf9SJun Nakajima def_bool y 477ddd70cf9SJun Nakajima depends on X86_GOLDFISH 478ddd70cf9SJun Nakajima 479e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL 480e6d42931SJohannes Weiner bool "x86 CPU resource control support" 4816fe07ce3SBabu Moger depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD) 48259fe5a77SThomas Gleixner select KERNFS 483e79f15a4SChen Yu select PROC_CPU_RESCTRL if PROC_FS 48478e99b4aSFenghua Yu help 485e6d42931SJohannes Weiner Enable x86 CPU resource control support. 4866fe07ce3SBabu Moger 4876fe07ce3SBabu Moger Provide support for the allocation and monitoring of system resources 4886fe07ce3SBabu Moger usage by the CPU. 4896fe07ce3SBabu Moger 4906fe07ce3SBabu Moger Intel calls this Intel Resource Director Technology 4916fe07ce3SBabu Moger (Intel(R) RDT). More information about RDT can be found in the 4926fe07ce3SBabu Moger Intel x86 Architecture Software Developer Manual. 4936fe07ce3SBabu Moger 4946fe07ce3SBabu Moger AMD calls this AMD Platform Quality of Service (AMD QoS). 4956fe07ce3SBabu Moger More information about AMD QoS can be found in the AMD64 Technology 4966fe07ce3SBabu Moger Platform Quality of Service Extensions manual. 49778e99b4aSFenghua Yu 49878e99b4aSFenghua Yu Say N if unsure. 49978e99b4aSFenghua Yu 5002cce9591SH. Peter Anvin (Intel)config X86_FRED 5012cce9591SH. Peter Anvin (Intel) bool "Flexible Return and Event Delivery" 5022cce9591SH. Peter Anvin (Intel) depends on X86_64 5032cce9591SH. Peter Anvin (Intel) help 5042cce9591SH. Peter Anvin (Intel) When enabled, try to use Flexible Return and Event Delivery 5052cce9591SH. Peter Anvin (Intel) instead of the legacy SYSCALL/SYSENTER/IDT architecture for 5062cce9591SH. Peter Anvin (Intel) ring transitions and exception/interrupt handling if the 507*3c41786cSPaul Menzel system supports it. 5082cce9591SH. Peter Anvin (Intel) 5098425091fSRavikiran G Thirumalaiif X86_32 510a0d0bb4dSRandy Dunlapconfig X86_BIGSMP 511a0d0bb4dSRandy Dunlap bool "Support for big SMP systems with more than 8 CPUs" 512a0d0bb4dSRandy Dunlap depends on SMP 513a7f7f624SMasahiro Yamada help 514e133f6eaSRandy Dunlap This option is needed for the systems that have more than 8 CPUs. 515a0d0bb4dSRandy Dunlap 516c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM 517c5c606d9SRavikiran G Thirumalai bool "Support for extended (non-PC) x86 platforms" 518c5c606d9SRavikiran G Thirumalai default y 519a7f7f624SMasahiro Yamada help 52006ac8346SIngo Molnar If you disable this option then the kernel will only support 52106ac8346SIngo Molnar standard PC platforms. (which covers the vast majority of 52206ac8346SIngo Molnar systems out there.) 52306ac8346SIngo Molnar 5248425091fSRavikiran G Thirumalai If you enable this option then you'll be able to select support 5258425091fSRavikiran G Thirumalai for the following (non-PC) 32 bit x86 platforms: 526cb7b8023SBen Hutchings Goldfish (Android emulator) 5278425091fSRavikiran G Thirumalai AMD Elan 5288425091fSRavikiran G Thirumalai RDC R-321x SoC 5298425091fSRavikiran G Thirumalai SGI 320/540 (Visual Workstation) 53083125a3aSAlessandro Rubini STA2X11-based (e.g. Northville) 5313f4110a4SThomas Gleixner Moorestown MID devices 53206ac8346SIngo Molnar 53306ac8346SIngo Molnar If you have one of these systems, or if you want to build a 53406ac8346SIngo Molnar generic distribution kernel, say Y here - otherwise say N. 535758cd94aSJuerg Haefligerendif # X86_32 53606ac8346SIngo Molnar 5378425091fSRavikiran G Thirumalaiif X86_64 5388425091fSRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM 5398425091fSRavikiran G Thirumalai bool "Support for extended (non-PC) x86 platforms" 5408425091fSRavikiran G Thirumalai default y 541a7f7f624SMasahiro Yamada help 5428425091fSRavikiran G Thirumalai If you disable this option then the kernel will only support 5438425091fSRavikiran G Thirumalai standard PC platforms. (which covers the vast majority of 5448425091fSRavikiran G Thirumalai systems out there.) 5458425091fSRavikiran G Thirumalai 5468425091fSRavikiran G Thirumalai If you enable this option then you'll be able to select support 5478425091fSRavikiran G Thirumalai for the following (non-PC) 64 bit x86 platforms: 54844b111b5SSteffen Persvold Numascale NumaChip 5498425091fSRavikiran G Thirumalai ScaleMP vSMP 5508425091fSRavikiran G Thirumalai SGI Ultraviolet 5518425091fSRavikiran G Thirumalai 5528425091fSRavikiran G Thirumalai If you have one of these systems, or if you want to build a 5538425091fSRavikiran G Thirumalai generic distribution kernel, say Y here - otherwise say N. 554758cd94aSJuerg Haefligerendif # X86_64 555c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms 556c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 55744b111b5SSteffen Persvoldconfig X86_NUMACHIP 55844b111b5SSteffen Persvold bool "Numascale NumaChip" 55944b111b5SSteffen Persvold depends on X86_64 56044b111b5SSteffen Persvold depends on X86_EXTENDED_PLATFORM 56144b111b5SSteffen Persvold depends on NUMA 56244b111b5SSteffen Persvold depends on SMP 56344b111b5SSteffen Persvold depends on X86_X2APIC 564f9726bfdSDaniel J Blueman depends on PCI_MMCONFIG 565a7f7f624SMasahiro Yamada help 56644b111b5SSteffen Persvold Adds support for Numascale NumaChip large-SMP systems. Needed to 56744b111b5SSteffen Persvold enable more than ~168 cores. 56844b111b5SSteffen Persvold If you don't have one of these, you should say N here. 56903b48632SNick Piggin 5706a48565eSIngo Molnarconfig X86_VSMP 571c5c606d9SRavikiran G Thirumalai bool "ScaleMP vSMP" 5726276a074SBorislav Petkov select HYPERVISOR_GUEST 5736a48565eSIngo Molnar select PARAVIRT 5746a48565eSIngo Molnar depends on X86_64 && PCI 575c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 576ead91d4bSShai Fultheim depends on SMP 577a7f7f624SMasahiro Yamada help 5786a48565eSIngo Molnar Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is 5796a48565eSIngo Molnar supposed to run on these EM64T-based machines. Only choose this option 5806a48565eSIngo Molnar if you have one of these machines. 5816a48565eSIngo Molnar 582c5c606d9SRavikiran G Thirumalaiconfig X86_UV 583c5c606d9SRavikiran G Thirumalai bool "SGI Ultraviolet" 584c5c606d9SRavikiran G Thirumalai depends on X86_64 585c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 58654c28d29SJack Steiner depends on NUMA 5871ecb4ae5SAndrew Morton depends on EFI 588c2209ea5SIngo Molnar depends on KEXEC_CORE 5899d6c26e7SSuresh Siddha depends on X86_X2APIC 5901222e564SIngo Molnar depends on PCI 591a7f7f624SMasahiro Yamada help 592c5c606d9SRavikiran G Thirumalai This option is needed in order to support SGI Ultraviolet systems. 593c5c606d9SRavikiran G Thirumalai If you don't have one of these, you should say N here. 594c5c606d9SRavikiran G Thirumalai 595c5c606d9SRavikiran G Thirumalai# Following is an alphabetically sorted list of 32 bit extended platforms 596c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 597506f1d07SSam Ravnborg 598ddd70cf9SJun Nakajimaconfig X86_GOLDFISH 599ddd70cf9SJun Nakajima bool "Goldfish (Virtual Platform)" 600cb7b8023SBen Hutchings depends on X86_EXTENDED_PLATFORM 601a7f7f624SMasahiro Yamada help 602ddd70cf9SJun Nakajima Enable support for the Goldfish virtual platform used primarily 603ddd70cf9SJun Nakajima for Android development. Unless you are building for the Android 604ddd70cf9SJun Nakajima Goldfish emulator say N here. 605ddd70cf9SJun Nakajima 606c751e17bSThomas Gleixnerconfig X86_INTEL_CE 607c751e17bSThomas Gleixner bool "CE4100 TV platform" 608c751e17bSThomas Gleixner depends on PCI 609c751e17bSThomas Gleixner depends on PCI_GODIRECT 6106084a6e2SJiang Liu depends on X86_IO_APIC 611c751e17bSThomas Gleixner depends on X86_32 612c751e17bSThomas Gleixner depends on X86_EXTENDED_PLATFORM 61337bc9f50SDirk Brandewie select X86_REBOOTFIXUPS 614da6b737bSSebastian Andrzej Siewior select OF 615da6b737bSSebastian Andrzej Siewior select OF_EARLY_FLATTREE 616a7f7f624SMasahiro Yamada help 617c751e17bSThomas Gleixner Select for the Intel CE media processor (CE4100) SOC. 618c751e17bSThomas Gleixner This option compiles in support for the CE4100 SOC for settop 619c751e17bSThomas Gleixner boxes and media devices. 620c751e17bSThomas Gleixner 6214cb9b00fSDavid Cohenconfig X86_INTEL_MID 62243605ef1SAlan Cox bool "Intel MID platform support" 62343605ef1SAlan Cox depends on X86_EXTENDED_PLATFORM 624edc6bc78SDavid Cohen depends on X86_PLATFORM_DEVICES 6251ea7c673SAlan Cox depends on PCI 6263fda5bb4SAndy Shevchenko depends on X86_64 || (PCI_GOANY && X86_32) 6271ea7c673SAlan Cox depends on X86_IO_APIC 6284cb9b00fSDavid Cohen select I2C 6297c9c3a1eSAlan Cox select DW_APB_TIMER 63054b34aa0SMika Westerberg select INTEL_SCU_PCI 631a7f7f624SMasahiro Yamada help 6324cb9b00fSDavid Cohen Select to build a kernel capable of supporting Intel MID (Mobile 6334cb9b00fSDavid Cohen Internet Device) platform systems which do not have the PCI legacy 6344cb9b00fSDavid Cohen interfaces. If you are building for a PC class system say N here. 6351ea7c673SAlan Cox 6364cb9b00fSDavid Cohen Intel MID platforms are based on an Intel processor and chipset which 6374cb9b00fSDavid Cohen consume less power than most of the x86 derivatives. 63843605ef1SAlan Cox 6398bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK 6408bbc2a13SBryan O'Donoghue bool "Intel Quark platform support" 6418bbc2a13SBryan O'Donoghue depends on X86_32 6428bbc2a13SBryan O'Donoghue depends on X86_EXTENDED_PLATFORM 6438bbc2a13SBryan O'Donoghue depends on X86_PLATFORM_DEVICES 6448bbc2a13SBryan O'Donoghue depends on X86_TSC 6458bbc2a13SBryan O'Donoghue depends on PCI 6468bbc2a13SBryan O'Donoghue depends on PCI_GOANY 6478bbc2a13SBryan O'Donoghue depends on X86_IO_APIC 6488bbc2a13SBryan O'Donoghue select IOSF_MBI 6498bbc2a13SBryan O'Donoghue select INTEL_IMR 6509ab6eb51SAndy Shevchenko select COMMON_CLK 651a7f7f624SMasahiro Yamada help 6528bbc2a13SBryan O'Donoghue Select to include support for Quark X1000 SoC. 6538bbc2a13SBryan O'Donoghue Say Y here if you have a Quark based system such as the Arduino 6548bbc2a13SBryan O'Donoghue compatible Intel Galileo. 6558bbc2a13SBryan O'Donoghue 6563d48aab1SMika Westerbergconfig X86_INTEL_LPSS 6573d48aab1SMika Westerberg bool "Intel Low Power Subsystem Support" 6585962dd22SSinan Kaya depends on X86 && ACPI && PCI 6593d48aab1SMika Westerberg select COMMON_CLK 6600f531431SMathias Nyman select PINCTRL 661eebb3e8dSAndy Shevchenko select IOSF_MBI 662a7f7f624SMasahiro Yamada help 6633d48aab1SMika Westerberg Select to build support for Intel Low Power Subsystem such as 6643d48aab1SMika Westerberg found on Intel Lynxpoint PCH. Selecting this option enables 6650f531431SMathias Nyman things like clock tree (common clock framework) and pincontrol 6660f531431SMathias Nyman which are needed by the LPSS peripheral drivers. 6673d48aab1SMika Westerberg 66892082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE 66992082a88SKen Xue bool "AMD ACPI2Platform devices support" 67092082a88SKen Xue depends on ACPI 67192082a88SKen Xue select COMMON_CLK 67292082a88SKen Xue select PINCTRL 673a7f7f624SMasahiro Yamada help 67492082a88SKen Xue Select to interpret AMD specific ACPI device to platform device 67592082a88SKen Xue such as I2C, UART, GPIO found on AMD Carrizo and later chipsets. 67692082a88SKen Xue I2C and UART depend on COMMON_CLK to set clock. GPIO driver is 67792082a88SKen Xue implemented under PINCTRL subsystem. 67892082a88SKen Xue 679ced3ce76SDavid E. Boxconfig IOSF_MBI 680ced3ce76SDavid E. Box tristate "Intel SoC IOSF Sideband support for SoC platforms" 681ced3ce76SDavid E. Box depends on PCI 682a7f7f624SMasahiro Yamada help 683ced3ce76SDavid E. Box This option enables sideband register access support for Intel SoC 684ced3ce76SDavid E. Box platforms. On these platforms the IOSF sideband is used in lieu of 685ced3ce76SDavid E. Box MSR's for some register accesses, mostly but not limited to thermal 686ced3ce76SDavid E. Box and power. Drivers may query the availability of this device to 687ced3ce76SDavid E. Box determine if they need the sideband in order to work on these 688ced3ce76SDavid E. Box platforms. The sideband is available on the following SoC products. 689ced3ce76SDavid E. Box This list is not meant to be exclusive. 690ced3ce76SDavid E. Box - BayTrail 691ced3ce76SDavid E. Box - Braswell 692ced3ce76SDavid E. Box - Quark 693ced3ce76SDavid E. Box 694ced3ce76SDavid E. Box You should say Y if you are running a kernel on one of these SoC's. 695ced3ce76SDavid E. Box 696ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG 697ed2226bdSDavid E. Box bool "Enable IOSF sideband access through debugfs" 698ed2226bdSDavid E. Box depends on IOSF_MBI && DEBUG_FS 699a7f7f624SMasahiro Yamada help 700ed2226bdSDavid E. Box Select this option to expose the IOSF sideband access registers (MCR, 701ed2226bdSDavid E. Box MDR, MCRX) through debugfs to write and read register information from 702ed2226bdSDavid E. Box different units on the SoC. This is most useful for obtaining device 703ed2226bdSDavid E. Box state information for debug and analysis. As this is a general access 704ed2226bdSDavid E. Box mechanism, users of this option would have specific knowledge of the 705ed2226bdSDavid E. Box device they want to access. 706ed2226bdSDavid E. Box 707ed2226bdSDavid E. Box If you don't require the option or are in doubt, say N. 708ed2226bdSDavid E. Box 709c5c606d9SRavikiran G Thirumalaiconfig X86_RDC321X 710c5c606d9SRavikiran G Thirumalai bool "RDC R-321x SoC" 711506f1d07SSam Ravnborg depends on X86_32 712c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 713c5c606d9SRavikiran G Thirumalai select M486 714c5c606d9SRavikiran G Thirumalai select X86_REBOOTFIXUPS 715a7f7f624SMasahiro Yamada help 716c5c606d9SRavikiran G Thirumalai This option is needed for RDC R-321x system-on-chip, also known 717c5c606d9SRavikiran G Thirumalai as R-8610-(G). 718c5c606d9SRavikiran G Thirumalai If you don't have one of these chips, you should say N here. 719c5c606d9SRavikiran G Thirumalai 720e0c7ae37SIngo Molnarconfig X86_32_NON_STANDARD 7219c398017SIngo Molnar bool "Support non-standard 32-bit SMP architectures" 7229c398017SIngo Molnar depends on X86_32 && SMP 723c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 724a7f7f624SMasahiro Yamada help 725b5660ba7SH. Peter Anvin This option compiles in the bigsmp and STA2X11 default 726b5660ba7SH. Peter Anvin subarchitectures. It is intended for a generic binary 727b5660ba7SH. Peter Anvin kernel. If you select them all, kernel will probe it one by 728b5660ba7SH. Peter Anvin one and will fallback to default. 729d49c4288SYinghai Lu 730c5c606d9SRavikiran G Thirumalai# Alphabetically sorted list of Non standard 32 bit platforms 731d49c4288SYinghai Lu 732d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE 7336fc108a0SJan Beulich def_bool y 734d949f36fSLinus Torvalds # MCE code calls memory_failure(): 735d949f36fSLinus Torvalds depends on X86_MCE 736d949f36fSLinus Torvalds # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags: 737d949f36fSLinus Torvalds # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH: 738d949f36fSLinus Torvalds depends on X86_64 || !SPARSEMEM 739d949f36fSLinus Torvalds select ARCH_SUPPORTS_MEMORY_FAILURE 740d949f36fSLinus Torvalds 74183125a3aSAlessandro Rubiniconfig STA2X11 74283125a3aSAlessandro Rubini bool "STA2X11 Companion Chip Support" 74383125a3aSAlessandro Rubini depends on X86_32_NON_STANDARD && PCI 74483125a3aSAlessandro Rubini select SWIOTLB 74583125a3aSAlessandro Rubini select MFD_STA2X11 7460145071bSLinus Walleij select GPIOLIB 747a7f7f624SMasahiro Yamada help 74883125a3aSAlessandro Rubini This adds support for boards based on the STA2X11 IO-Hub, 74983125a3aSAlessandro Rubini a.k.a. "ConneXt". The chip is used in place of the standard 75083125a3aSAlessandro Rubini PC chipset, so all "standard" peripherals are missing. If this 75183125a3aSAlessandro Rubini option is selected the kernel will still be able to boot on 75283125a3aSAlessandro Rubini standard PC machines. 75383125a3aSAlessandro Rubini 75482148d1dSShérabconfig X86_32_IRIS 75582148d1dSShérab tristate "Eurobraille/Iris poweroff module" 75682148d1dSShérab depends on X86_32 757a7f7f624SMasahiro Yamada help 75882148d1dSShérab The Iris machines from EuroBraille do not have APM or ACPI support 75982148d1dSShérab to shut themselves down properly. A special I/O sequence is 76082148d1dSShérab needed to do so, which is what this module does at 76182148d1dSShérab kernel shutdown. 76282148d1dSShérab 76382148d1dSShérab This is only for Iris machines from EuroBraille. 76482148d1dSShérab 76582148d1dSShérab If unused, say N. 76682148d1dSShérab 767ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 7683c2362e6SHarvey Harrison def_bool y 7693c2362e6SHarvey Harrison prompt "Single-depth WCHAN output" 770a87d0914SKen Chen depends on X86 771a7f7f624SMasahiro Yamada help 772506f1d07SSam Ravnborg Calculate simpler /proc/<PID>/wchan values. If this option 773506f1d07SSam Ravnborg is disabled then wchan values will recurse back to the 774506f1d07SSam Ravnborg caller function. This provides more accurate wchan values, 775506f1d07SSam Ravnborg at the expense of slightly more scheduling overhead. 776506f1d07SSam Ravnborg 777506f1d07SSam Ravnborg If in doubt, say "Y". 778506f1d07SSam Ravnborg 7796276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST 7806276a074SBorislav Petkov bool "Linux guest support" 781a7f7f624SMasahiro Yamada help 7826276a074SBorislav Petkov Say Y here to enable options for running Linux under various hyper- 7836276a074SBorislav Petkov visors. This option enables basic hypervisor detection and platform 7846276a074SBorislav Petkov setup. 785506f1d07SSam Ravnborg 7866276a074SBorislav Petkov If you say N, all options in this submenu will be skipped and 7876276a074SBorislav Petkov disabled, and Linux guest support won't be built in. 788506f1d07SSam Ravnborg 7896276a074SBorislav Petkovif HYPERVISOR_GUEST 790506f1d07SSam Ravnborg 791e61bd94aSEduardo Pereira Habkostconfig PARAVIRT 792e61bd94aSEduardo Pereira Habkost bool "Enable paravirtualization code" 793a0e2bf7cSJuergen Gross depends on HAVE_STATIC_CALL 794a7f7f624SMasahiro Yamada help 795e61bd94aSEduardo Pereira Habkost This changes the kernel so it can modify itself when it is run 796e61bd94aSEduardo Pereira Habkost under a hypervisor, potentially improving performance significantly 797e61bd94aSEduardo Pereira Habkost over full virtualization. However, when run without a hypervisor 798e61bd94aSEduardo Pereira Habkost the kernel is theoretically slower and slightly larger. 799e61bd94aSEduardo Pereira Habkost 800c00a280aSJuergen Grossconfig PARAVIRT_XXL 801c00a280aSJuergen Gross bool 802c00a280aSJuergen Gross 8036276a074SBorislav Petkovconfig PARAVIRT_DEBUG 8046276a074SBorislav Petkov bool "paravirt-ops debugging" 8056276a074SBorislav Petkov depends on PARAVIRT && DEBUG_KERNEL 806a7f7f624SMasahiro Yamada help 8076276a074SBorislav Petkov Enable to debug paravirt_ops internals. Specifically, BUG if 8086276a074SBorislav Petkov a paravirt_op is missing when it is called. 8096276a074SBorislav Petkov 810b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS 811b4ecc126SJeremy Fitzhardinge bool "Paravirtualization layer for spinlocks" 8126ea30386SKees Cook depends on PARAVIRT && SMP 813a7f7f624SMasahiro Yamada help 814b4ecc126SJeremy Fitzhardinge Paravirtualized spinlocks allow a pvops backend to replace the 815b4ecc126SJeremy Fitzhardinge spinlock implementation with something virtualization-friendly 816b4ecc126SJeremy Fitzhardinge (for example, block the virtual CPU rather than spinning). 817b4ecc126SJeremy Fitzhardinge 8184c4e4f61SRaghavendra K T It has a minimal impact on native kernels and gives a nice performance 8194c4e4f61SRaghavendra K T benefit on paravirtualized KVM / Xen kernels. 820b4ecc126SJeremy Fitzhardinge 8214c4e4f61SRaghavendra K T If you are unsure how to answer this question, answer Y. 822b4ecc126SJeremy Fitzhardinge 823ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR 824ecca2502SZhao Yakui def_bool n 825ecca2502SZhao Yakui 8266276a074SBorislav Petkovsource "arch/x86/xen/Kconfig" 8276276a074SBorislav Petkov 8286276a074SBorislav Petkovconfig KVM_GUEST 8296276a074SBorislav Petkov bool "KVM Guest support (including kvmclock)" 8306276a074SBorislav Petkov depends on PARAVIRT 8316276a074SBorislav Petkov select PARAVIRT_CLOCK 832a1c4423bSMarcelo Tosatti select ARCH_CPUIDLE_HALTPOLL 833b1d40575SVitaly Kuznetsov select X86_HV_CALLBACK_VECTOR 8346276a074SBorislav Petkov default y 835a7f7f624SMasahiro Yamada help 8366276a074SBorislav Petkov This option enables various optimizations for running under the KVM 8376276a074SBorislav Petkov hypervisor. It includes a paravirtualized clock, so that instead 8386276a074SBorislav Petkov of relying on a PIT (or probably other) emulation by the 8396276a074SBorislav Petkov underlying device model, the host provides the guest with 8406276a074SBorislav Petkov timing infrastructure such as time of day, and system time 8416276a074SBorislav Petkov 842a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL 843a1c4423bSMarcelo Tosatti def_bool n 844a1c4423bSMarcelo Tosatti prompt "Disable host haltpoll when loading haltpoll driver" 845a1c4423bSMarcelo Tosatti help 846a1c4423bSMarcelo Tosatti If virtualized under KVM, disable host haltpoll. 847a1c4423bSMarcelo Tosatti 8487733607fSMaran Wilsonconfig PVH 8497733607fSMaran Wilson bool "Support for running PVH guests" 850a7f7f624SMasahiro Yamada help 8517733607fSMaran Wilson This option enables the PVH entry point for guest virtual machines 8527733607fSMaran Wilson as specified in the x86/HVM direct boot ABI. 8537733607fSMaran Wilson 8546276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING 8556276a074SBorislav Petkov bool "Paravirtual steal time accounting" 8566276a074SBorislav Petkov depends on PARAVIRT 857a7f7f624SMasahiro Yamada help 8586276a074SBorislav Petkov Select this option to enable fine granularity task steal time 8596276a074SBorislav Petkov accounting. Time spent executing other tasks in parallel with 8606276a074SBorislav Petkov the current vCPU is discounted from the vCPU power. To account for 8616276a074SBorislav Petkov that, there can be a small performance impact. 8626276a074SBorislav Petkov 8636276a074SBorislav Petkov If in doubt, say N here. 8646276a074SBorislav Petkov 8657af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK 8667af192c9SGerd Hoffmann bool 8677af192c9SGerd Hoffmann 8684a362601SJan Kiszkaconfig JAILHOUSE_GUEST 8694a362601SJan Kiszka bool "Jailhouse non-root cell support" 870abde587bSArnd Bergmann depends on X86_64 && PCI 87187e65d05SJan Kiszka select X86_PM_TIMER 872a7f7f624SMasahiro Yamada help 8734a362601SJan Kiszka This option allows to run Linux as guest in a Jailhouse non-root 8744a362601SJan Kiszka cell. You can leave this option disabled if you only want to start 8754a362601SJan Kiszka Jailhouse and run Linux afterwards in the root cell. 8764a362601SJan Kiszka 877ec7972c9SZhao Yakuiconfig ACRN_GUEST 878ec7972c9SZhao Yakui bool "ACRN Guest support" 879ec7972c9SZhao Yakui depends on X86_64 880498ad393SZhao Yakui select X86_HV_CALLBACK_VECTOR 881ec7972c9SZhao Yakui help 882ec7972c9SZhao Yakui This option allows to run Linux as guest in the ACRN hypervisor. ACRN is 883ec7972c9SZhao Yakui a flexible, lightweight reference open-source hypervisor, built with 884ec7972c9SZhao Yakui real-time and safety-criticality in mind. It is built for embedded 885ec7972c9SZhao Yakui IOT with small footprint and real-time features. More details can be 886ec7972c9SZhao Yakui found in https://projectacrn.org/. 887ec7972c9SZhao Yakui 88859bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST 88959bd54a8SKuppuswamy Sathyanarayanan bool "Intel TDX (Trust Domain Extensions) - Guest Support" 89059bd54a8SKuppuswamy Sathyanarayanan depends on X86_64 && CPU_SUP_INTEL 89159bd54a8SKuppuswamy Sathyanarayanan depends on X86_X2APIC 89275d090fdSKirill A. Shutemov depends on EFI_STUB 89341394e33SKirill A. Shutemov select ARCH_HAS_CC_PLATFORM 894968b4931SKirill A. Shutemov select X86_MEM_ENCRYPT 89577a512e3SSean Christopherson select X86_MCE 89675d090fdSKirill A. Shutemov select UNACCEPTED_MEMORY 89759bd54a8SKuppuswamy Sathyanarayanan help 89859bd54a8SKuppuswamy Sathyanarayanan Support running as a guest under Intel TDX. Without this support, 89959bd54a8SKuppuswamy Sathyanarayanan the guest kernel can not boot or run under TDX. 90059bd54a8SKuppuswamy Sathyanarayanan TDX includes memory encryption and integrity capabilities 90159bd54a8SKuppuswamy Sathyanarayanan which protect the confidentiality and integrity of guest 90259bd54a8SKuppuswamy Sathyanarayanan memory contents and CPU state. TDX guests are protected from 90359bd54a8SKuppuswamy Sathyanarayanan some attacks from the VMM. 90459bd54a8SKuppuswamy Sathyanarayanan 9056276a074SBorislav Petkovendif # HYPERVISOR_GUEST 90697349135SJeremy Fitzhardinge 907506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu" 908506f1d07SSam Ravnborg 909506f1d07SSam Ravnborgconfig HPET_TIMER 9103c2362e6SHarvey Harrison def_bool X86_64 911506f1d07SSam Ravnborg prompt "HPET Timer Support" if X86_32 912a7f7f624SMasahiro Yamada help 913506f1d07SSam Ravnborg Use the IA-PC HPET (High Precision Event Timer) to manage 914506f1d07SSam Ravnborg time in preference to the PIT and RTC, if a HPET is 915506f1d07SSam Ravnborg present. 916506f1d07SSam Ravnborg HPET is the next generation timer replacing legacy 8254s. 917506f1d07SSam Ravnborg The HPET provides a stable time base on SMP 918506f1d07SSam Ravnborg systems, unlike the TSC, but it is more expensive to access, 9194e7f9df2SMichael S. Tsirkin as it is off-chip. The interface used is documented 9204e7f9df2SMichael S. Tsirkin in the HPET spec, revision 1. 921506f1d07SSam Ravnborg 922506f1d07SSam Ravnborg You can safely choose Y here. However, HPET will only be 923506f1d07SSam Ravnborg activated if the platform and the BIOS support this feature. 924506f1d07SSam Ravnborg Otherwise the 8254 will be used for timing services. 925506f1d07SSam Ravnborg 926506f1d07SSam Ravnborg Choose N to continue using the legacy 8254 timer. 927506f1d07SSam Ravnborg 928506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC 9293c2362e6SHarvey Harrison def_bool y 9303228e1dcSAnand K Mistry depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 931506f1d07SSam Ravnborg 9326a108a14SDavid Rientjes# Mark as expert because too many people got it wrong. 933506f1d07SSam Ravnborg# The code disables itself when not needed. 9347ae9392cSThomas Petazzoniconfig DMI 9357ae9392cSThomas Petazzoni default y 936cf074402SArd Biesheuvel select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 9376a108a14SDavid Rientjes bool "Enable DMI scanning" if EXPERT 938a7f7f624SMasahiro Yamada help 9397ae9392cSThomas Petazzoni Enabled scanning of DMI to identify machine quirks. Say Y 9407ae9392cSThomas Petazzoni here unless you have verified that your setup is not 9417ae9392cSThomas Petazzoni affected by entries in the DMI blacklist. Required by PNP 9427ae9392cSThomas Petazzoni BIOS code. 9437ae9392cSThomas Petazzoni 944506f1d07SSam Ravnborgconfig GART_IOMMU 94538901f1cSAndi Kleen bool "Old AMD GART IOMMU support" 9462f9237d4SChristoph Hellwig select DMA_OPS 947a4ce5a48SChristoph Hellwig select IOMMU_HELPER 948506f1d07SSam Ravnborg select SWIOTLB 94923ac4ae8SAndreas Herrmann depends on X86_64 && PCI && AMD_NB 950a7f7f624SMasahiro Yamada help 951ced3c42cSIngo Molnar Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron 952ced3c42cSIngo Molnar GART based hardware IOMMUs. 953ced3c42cSIngo Molnar 954ced3c42cSIngo Molnar The GART supports full DMA access for devices with 32-bit access 955ced3c42cSIngo Molnar limitations, on systems with more than 3 GB. This is usually needed 956ced3c42cSIngo Molnar for USB, sound, many IDE/SATA chipsets and some other devices. 957ced3c42cSIngo Molnar 958ced3c42cSIngo Molnar Newer systems typically have a modern AMD IOMMU, supported via 959ced3c42cSIngo Molnar the CONFIG_AMD_IOMMU=y config option. 960ced3c42cSIngo Molnar 961ced3c42cSIngo Molnar In normal configurations this driver is only active when needed: 962ced3c42cSIngo Molnar there's more than 3 GB of memory and the system contains a 963ced3c42cSIngo Molnar 32-bit limited device. 964ced3c42cSIngo Molnar 965ced3c42cSIngo Molnar If unsure, say Y. 966506f1d07SSam Ravnborg 9678b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT 9688b766b0fSMichal Suchanek bool 9698b766b0fSMichal Suchanek help 9708b766b0fSMichal Suchanek If true, at least one selected framebuffer driver can take advantage 9718b766b0fSMichal Suchanek of VESA video modes set at an early boot stage via the vga= parameter. 9728b766b0fSMichal Suchanek 9731184dc2fSMike Travisconfig MAXSMP 974ddb0c5a6SSamuel Thibault bool "Enable Maximum number of SMP Processors and NUMA Nodes" 9756ea30386SKees Cook depends on X86_64 && SMP && DEBUG_KERNEL 97636f5101aSMike Travis select CPUMASK_OFFSTACK 977a7f7f624SMasahiro Yamada help 978ddb0c5a6SSamuel Thibault Enable maximum number of CPUS and NUMA Nodes for this architecture. 9791184dc2fSMike Travis If unsure, say N. 980506f1d07SSam Ravnborg 981aec6487eSIngo Molnar# 982aec6487eSIngo Molnar# The maximum number of CPUs supported: 983aec6487eSIngo Molnar# 984aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT, 985aec6487eSIngo Molnar# and which can be configured interactively in the 986aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range. 987aec6487eSIngo Molnar# 988aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on 989aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel. 990aec6487eSIngo Molnar# 991aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable 992aec6487eSIngo Molnar# interactive configuration. ) 993aec6487eSIngo Molnar# 994a0d0bb4dSRandy Dunlap 995aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN 996a0d0bb4dSRandy Dunlap int 997aec6487eSIngo Molnar default NR_CPUS_RANGE_END if MAXSMP 998a0d0bb4dSRandy Dunlap default 1 if !SMP 999a0d0bb4dSRandy Dunlap default 2 1000a0d0bb4dSRandy Dunlap 1001aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1002a0d0bb4dSRandy Dunlap int 1003a0d0bb4dSRandy Dunlap depends on X86_32 1004aec6487eSIngo Molnar default 64 if SMP && X86_BIGSMP 1005aec6487eSIngo Molnar default 8 if SMP && !X86_BIGSMP 1006a0d0bb4dSRandy Dunlap default 1 if !SMP 1007a0d0bb4dSRandy Dunlap 1008aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1009a0d0bb4dSRandy Dunlap int 1010a0d0bb4dSRandy Dunlap depends on X86_64 10111edae1aeSScott Wood default 8192 if SMP && CPUMASK_OFFSTACK 10121edae1aeSScott Wood default 512 if SMP && !CPUMASK_OFFSTACK 1013a0d0bb4dSRandy Dunlap default 1 if !SMP 1014aec6487eSIngo Molnar 1015aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1016aec6487eSIngo Molnar int 1017aec6487eSIngo Molnar depends on X86_32 1018aec6487eSIngo Molnar default 32 if X86_BIGSMP 1019aec6487eSIngo Molnar default 8 if SMP 1020aec6487eSIngo Molnar default 1 if !SMP 1021aec6487eSIngo Molnar 1022aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1023aec6487eSIngo Molnar int 1024aec6487eSIngo Molnar depends on X86_64 1025a0d0bb4dSRandy Dunlap default 8192 if MAXSMP 1026a0d0bb4dSRandy Dunlap default 64 if SMP 1027aec6487eSIngo Molnar default 1 if !SMP 1028a0d0bb4dSRandy Dunlap 1029506f1d07SSam Ravnborgconfig NR_CPUS 103036f5101aSMike Travis int "Maximum number of CPUs" if SMP && !MAXSMP 1031aec6487eSIngo Molnar range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END 1032aec6487eSIngo Molnar default NR_CPUS_DEFAULT 1033a7f7f624SMasahiro Yamada help 1034506f1d07SSam Ravnborg This allows you to specify the maximum number of CPUs which this 1035bb61ccc7SJosh Boyer kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum 1036cad14bb9SKirill A. Shutemov supported value is 8192, otherwise the maximum value is 512. The 1037506f1d07SSam Ravnborg minimum value which makes sense is 2. 1038506f1d07SSam Ravnborg 1039aec6487eSIngo Molnar This is purely to save memory: each supported CPU adds about 8KB 1040aec6487eSIngo Molnar to the kernel image. 1041506f1d07SSam Ravnborg 104266558b73STim Chenconfig SCHED_CLUSTER 104366558b73STim Chen bool "Cluster scheduler support" 104466558b73STim Chen depends on SMP 104566558b73STim Chen default y 104666558b73STim Chen help 104766558b73STim Chen Cluster scheduler support improves the CPU scheduler's decision 104866558b73STim Chen making when dealing with machines that have clusters of CPUs. 104966558b73STim Chen Cluster usually means a couple of CPUs which are placed closely 105066558b73STim Chen by sharing mid-level caches, last-level cache tags or internal 105166558b73STim Chen busses. 105266558b73STim Chen 1053506f1d07SSam Ravnborgconfig SCHED_SMT 1054dbe73364SThomas Gleixner def_bool y if SMP 1055506f1d07SSam Ravnborg 1056506f1d07SSam Ravnborgconfig SCHED_MC 10573c2362e6SHarvey Harrison def_bool y 10583c2362e6SHarvey Harrison prompt "Multi-core scheduler support" 1059c8e56d20SBorislav Petkov depends on SMP 1060a7f7f624SMasahiro Yamada help 1061506f1d07SSam Ravnborg Multi-core scheduler support improves the CPU scheduler's decision 1062506f1d07SSam Ravnborg making when dealing with multi-core CPU chips at a cost of slightly 1063506f1d07SSam Ravnborg increased overhead in some places. If unsure say N here. 1064506f1d07SSam Ravnborg 1065de966cf4STim Chenconfig SCHED_MC_PRIO 1066de966cf4STim Chen bool "CPU core priorities scheduler support" 10673598e577SMeng Li depends on SCHED_MC 10683598e577SMeng Li select X86_INTEL_PSTATE if CPU_SUP_INTEL 10693598e577SMeng Li select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI 10700a21fc12SIngo Molnar select CPU_FREQ 1071de966cf4STim Chen default y 1072a7f7f624SMasahiro Yamada help 1073de966cf4STim Chen Intel Turbo Boost Max Technology 3.0 enabled CPUs have a 1074de966cf4STim Chen core ordering determined at manufacturing time, which allows 1075de966cf4STim Chen certain cores to reach higher turbo frequencies (when running 1076de966cf4STim Chen single threaded workloads) than others. 1077de966cf4STim Chen 1078de966cf4STim Chen Enabling this kernel feature teaches the scheduler about 1079de966cf4STim Chen the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the 1080de966cf4STim Chen scheduler's CPU selection logic accordingly, so that higher 1081de966cf4STim Chen overall system performance can be achieved. 1082de966cf4STim Chen 1083de966cf4STim Chen This feature will have no effect on CPUs without this feature. 1084de966cf4STim Chen 1085de966cf4STim Chen If unsure say Y here. 10865e76b2abSTim Chen 108730b8b006SThomas Gleixnerconfig UP_LATE_INIT 108830b8b006SThomas Gleixner def_bool y 1089ba360f88SThomas Gleixner depends on !SMP && X86_LOCAL_APIC 109030b8b006SThomas Gleixner 1091506f1d07SSam Ravnborgconfig X86_UP_APIC 109250849eefSJan Beulich bool "Local APIC support on uniprocessors" if !PCI_MSI 109350849eefSJan Beulich default PCI_MSI 109438a1dfdaSBryan O'Donoghue depends on X86_32 && !SMP && !X86_32_NON_STANDARD 1095a7f7f624SMasahiro Yamada help 1096506f1d07SSam Ravnborg A local APIC (Advanced Programmable Interrupt Controller) is an 1097506f1d07SSam Ravnborg integrated interrupt controller in the CPU. If you have a single-CPU 1098506f1d07SSam Ravnborg system which has a processor with a local APIC, you can say Y here to 1099506f1d07SSam Ravnborg enable and use it. If you say Y here even though your machine doesn't 1100506f1d07SSam Ravnborg have a local APIC, then the kernel will still run with no slowdown at 1101506f1d07SSam Ravnborg all. The local APIC supports CPU-generated self-interrupts (timer, 1102506f1d07SSam Ravnborg performance counters), and the NMI watchdog which detects hard 1103506f1d07SSam Ravnborg lockups. 1104506f1d07SSam Ravnborg 1105506f1d07SSam Ravnborgconfig X86_UP_IOAPIC 1106506f1d07SSam Ravnborg bool "IO-APIC support on uniprocessors" 1107506f1d07SSam Ravnborg depends on X86_UP_APIC 1108a7f7f624SMasahiro Yamada help 1109506f1d07SSam Ravnborg An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an 1110506f1d07SSam Ravnborg SMP-capable replacement for PC-style interrupt controllers. Most 1111506f1d07SSam Ravnborg SMP systems and many recent uniprocessor systems have one. 1112506f1d07SSam Ravnborg 1113506f1d07SSam Ravnborg If you have a single-CPU system with an IO-APIC, you can say Y here 1114506f1d07SSam Ravnborg to use it. If you say Y here even though your machine doesn't have 1115506f1d07SSam Ravnborg an IO-APIC, then the kernel will still run with no slowdown at all. 1116506f1d07SSam Ravnborg 1117506f1d07SSam Ravnborgconfig X86_LOCAL_APIC 11183c2362e6SHarvey Harrison def_bool y 11190dbc6078SThomas Petazzoni depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI 1120b5dc8e6cSJiang Liu select IRQ_DOMAIN_HIERARCHY 1121506f1d07SSam Ravnborg 1122506f1d07SSam Ravnborgconfig X86_IO_APIC 1123b1da1e71SJan Beulich def_bool y 1124b1da1e71SJan Beulich depends on X86_LOCAL_APIC || X86_UP_IOAPIC 1125506f1d07SSam Ravnborg 112641b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS 112741b9eb26SStefan Assmann bool "Reroute for broken boot IRQs" 112841b9eb26SStefan Assmann depends on X86_IO_APIC 1129a7f7f624SMasahiro Yamada help 113041b9eb26SStefan Assmann This option enables a workaround that fixes a source of 113141b9eb26SStefan Assmann spurious interrupts. This is recommended when threaded 113241b9eb26SStefan Assmann interrupt handling is used on systems where the generation of 113341b9eb26SStefan Assmann superfluous "boot interrupts" cannot be disabled. 113441b9eb26SStefan Assmann 113541b9eb26SStefan Assmann Some chipsets generate a legacy INTx "boot IRQ" when the IRQ 113641b9eb26SStefan Assmann entry in the chipset's IO-APIC is masked (as, e.g. the RT 113741b9eb26SStefan Assmann kernel does during interrupt handling). On chipsets where this 113841b9eb26SStefan Assmann boot IRQ generation cannot be disabled, this workaround keeps 113941b9eb26SStefan Assmann the original IRQ line masked so that only the equivalent "boot 114041b9eb26SStefan Assmann IRQ" is delivered to the CPUs. The workaround also tells the 114141b9eb26SStefan Assmann kernel to set up the IRQ handler on the boot IRQ line. In this 114241b9eb26SStefan Assmann way only one interrupt is delivered to the kernel. Otherwise 114341b9eb26SStefan Assmann the spurious second interrupt may cause the kernel to bring 114441b9eb26SStefan Assmann down (vital) interrupt lines. 114541b9eb26SStefan Assmann 114641b9eb26SStefan Assmann Only affects "broken" chipsets. Interrupt sharing may be 114741b9eb26SStefan Assmann increased on these systems. 114841b9eb26SStefan Assmann 1149506f1d07SSam Ravnborgconfig X86_MCE 1150bab9bc65SAndi Kleen bool "Machine Check / overheating reporting" 1151648ed940SChen, Gong select GENERIC_ALLOCATOR 1152e57dbaf7SBorislav Petkov default y 1153a7f7f624SMasahiro Yamada help 1154bab9bc65SAndi Kleen Machine Check support allows the processor to notify the 1155bab9bc65SAndi Kleen kernel if it detects a problem (e.g. overheating, data corruption). 1156506f1d07SSam Ravnborg The action the kernel takes depends on the severity of the problem, 1157bab9bc65SAndi Kleen ranging from warning messages to halting the machine. 11584efc0670SAndi Kleen 11595de97c9fSTony Luckconfig X86_MCELOG_LEGACY 11605de97c9fSTony Luck bool "Support for deprecated /dev/mcelog character device" 11615de97c9fSTony Luck depends on X86_MCE 1162a7f7f624SMasahiro Yamada help 11635de97c9fSTony Luck Enable support for /dev/mcelog which is needed by the old mcelog 11645de97c9fSTony Luck userspace logging daemon. Consider switching to the new generation 11655de97c9fSTony Luck rasdaemon solution. 11665de97c9fSTony Luck 1167506f1d07SSam Ravnborgconfig X86_MCE_INTEL 11683c2362e6SHarvey Harrison def_bool y 11693c2362e6SHarvey Harrison prompt "Intel MCE features" 1170c1ebf835SAndi Kleen depends on X86_MCE && X86_LOCAL_APIC 1171a7f7f624SMasahiro Yamada help 1172506f1d07SSam Ravnborg Additional support for intel specific MCE features such as 1173506f1d07SSam Ravnborg the thermal monitor. 1174506f1d07SSam Ravnborg 1175506f1d07SSam Ravnborgconfig X86_MCE_AMD 11763c2362e6SHarvey Harrison def_bool y 11773c2362e6SHarvey Harrison prompt "AMD MCE features" 1178f5382de9SYazen Ghannam depends on X86_MCE && X86_LOCAL_APIC && AMD_NB 1179a7f7f624SMasahiro Yamada help 1180506f1d07SSam Ravnborg Additional support for AMD specific MCE features such as 1181506f1d07SSam Ravnborg the DRAM Error Threshold. 1182506f1d07SSam Ravnborg 11834efc0670SAndi Kleenconfig X86_ANCIENT_MCE 11846fc108a0SJan Beulich bool "Support for old Pentium 5 / WinChip machine checks" 1185c31d9633SAndi Kleen depends on X86_32 && X86_MCE 1186a7f7f624SMasahiro Yamada help 11874efc0670SAndi Kleen Include support for machine check handling on old Pentium 5 or WinChip 11885065a706SMasanari Iida systems. These typically need to be enabled explicitly on the command 11894efc0670SAndi Kleen line. 11904efc0670SAndi Kleen 1191b2762686SAndi Kleenconfig X86_MCE_THRESHOLD 1192b2762686SAndi Kleen depends on X86_MCE_AMD || X86_MCE_INTEL 11936fc108a0SJan Beulich def_bool y 1194b2762686SAndi Kleen 1195ea149b36SAndi Kleenconfig X86_MCE_INJECT 1196bc8e80d5SBorislav Petkov depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS 1197ea149b36SAndi Kleen tristate "Machine check injector support" 1198a7f7f624SMasahiro Yamada help 1199ea149b36SAndi Kleen Provide support for injecting machine checks for testing purposes. 1200ea149b36SAndi Kleen If you don't know what a machine check is and you don't do kernel 1201ea149b36SAndi Kleen QA it is safe to say n. 1202ea149b36SAndi Kleen 120307dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig" 1204e633c65aSKan Liang 12055aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86 12061e642812SIngo Molnar bool "Legacy VM86 support" 1207506f1d07SSam Ravnborg depends on X86_32 1208a7f7f624SMasahiro Yamada help 12095aef51c3SAndy Lutomirski This option allows user programs to put the CPU into V8086 12105aef51c3SAndy Lutomirski mode, which is an 80286-era approximation of 16-bit real mode. 12115aef51c3SAndy Lutomirski 12125aef51c3SAndy Lutomirski Some very old versions of X and/or vbetool require this option 12135aef51c3SAndy Lutomirski for user mode setting. Similarly, DOSEMU will use it if 12145aef51c3SAndy Lutomirski available to accelerate real mode DOS programs. However, any 12155aef51c3SAndy Lutomirski recent version of DOSEMU, X, or vbetool should be fully 12165aef51c3SAndy Lutomirski functional even without kernel VM86 support, as they will all 12171e642812SIngo Molnar fall back to software emulation. Nevertheless, if you are using 12181e642812SIngo Molnar a 16-bit DOS program where 16-bit performance matters, vm86 12191e642812SIngo Molnar mode might be faster than emulation and you might want to 12201e642812SIngo Molnar enable this option. 12215aef51c3SAndy Lutomirski 12221e642812SIngo Molnar Note that any app that works on a 64-bit kernel is unlikely to 12231e642812SIngo Molnar need this option, as 64-bit kernels don't, and can't, support 12241e642812SIngo Molnar V8086 mode. This option is also unrelated to 16-bit protected 12251e642812SIngo Molnar mode and is not needed to run most 16-bit programs under Wine. 12265aef51c3SAndy Lutomirski 12271e642812SIngo Molnar Enabling this option increases the complexity of the kernel 12281e642812SIngo Molnar and slows down exception handling a tiny bit. 12295aef51c3SAndy Lutomirski 12301e642812SIngo Molnar If unsure, say N here. 12315aef51c3SAndy Lutomirski 12325aef51c3SAndy Lutomirskiconfig VM86 12335aef51c3SAndy Lutomirski bool 12345aef51c3SAndy Lutomirski default X86_LEGACY_VM86 123534273f41SH. Peter Anvin 123634273f41SH. Peter Anvinconfig X86_16BIT 123734273f41SH. Peter Anvin bool "Enable support for 16-bit segments" if EXPERT 123834273f41SH. Peter Anvin default y 1239a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 1240a7f7f624SMasahiro Yamada help 124134273f41SH. Peter Anvin This option is required by programs like Wine to run 16-bit 124234273f41SH. Peter Anvin protected mode legacy code on x86 processors. Disabling 124334273f41SH. Peter Anvin this option saves about 300 bytes on i386, or around 6K text 124434273f41SH. Peter Anvin plus 16K runtime memory on x86-64, 124534273f41SH. Peter Anvin 124634273f41SH. Peter Anvinconfig X86_ESPFIX32 124734273f41SH. Peter Anvin def_bool y 124834273f41SH. Peter Anvin depends on X86_16BIT && X86_32 1249506f1d07SSam Ravnborg 1250197725deSH. Peter Anvinconfig X86_ESPFIX64 1251197725deSH. Peter Anvin def_bool y 125234273f41SH. Peter Anvin depends on X86_16BIT && X86_64 1253506f1d07SSam Ravnborg 12541ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION 12551ad83c85SAndy Lutomirski bool "Enable vsyscall emulation" if EXPERT 12561ad83c85SAndy Lutomirski default y 12571ad83c85SAndy Lutomirski depends on X86_64 1258a7f7f624SMasahiro Yamada help 12591ad83c85SAndy Lutomirski This enables emulation of the legacy vsyscall page. Disabling 12601ad83c85SAndy Lutomirski it is roughly equivalent to booting with vsyscall=none, except 12611ad83c85SAndy Lutomirski that it will also disable the helpful warning if a program 12621ad83c85SAndy Lutomirski tries to use a vsyscall. With this option set to N, offending 12631ad83c85SAndy Lutomirski programs will just segfault, citing addresses of the form 12641ad83c85SAndy Lutomirski 0xffffffffff600?00. 12651ad83c85SAndy Lutomirski 12661ad83c85SAndy Lutomirski This option is required by many programs built before 2013, and 12671ad83c85SAndy Lutomirski care should be used even with newer programs if set to N. 12681ad83c85SAndy Lutomirski 12691ad83c85SAndy Lutomirski Disabling this option saves about 7K of kernel size and 12701ad83c85SAndy Lutomirski possibly 4K of additional runtime pagetable memory. 12711ad83c85SAndy Lutomirski 1272111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM 1273111e7b15SThomas Gleixner bool "IOPERM and IOPL Emulation" 1274a24ca997SThomas Gleixner default y 1275a7f7f624SMasahiro Yamada help 1276111e7b15SThomas Gleixner This enables the ioperm() and iopl() syscalls which are necessary 1277111e7b15SThomas Gleixner for legacy applications. 1278111e7b15SThomas Gleixner 1279c8137aceSThomas Gleixner Legacy IOPL support is an overbroad mechanism which allows user 1280c8137aceSThomas Gleixner space aside of accessing all 65536 I/O ports also to disable 1281c8137aceSThomas Gleixner interrupts. To gain this access the caller needs CAP_SYS_RAWIO 1282c8137aceSThomas Gleixner capabilities and permission from potentially active security 1283c8137aceSThomas Gleixner modules. 1284c8137aceSThomas Gleixner 1285c8137aceSThomas Gleixner The emulation restricts the functionality of the syscall to 1286c8137aceSThomas Gleixner only allowing the full range I/O port access, but prevents the 1287a24ca997SThomas Gleixner ability to disable interrupts from user space which would be 1288a24ca997SThomas Gleixner granted if the hardware IOPL mechanism would be used. 1289c8137aceSThomas Gleixner 1290506f1d07SSam Ravnborgconfig TOSHIBA 1291506f1d07SSam Ravnborg tristate "Toshiba Laptop support" 1292506f1d07SSam Ravnborg depends on X86_32 1293a7f7f624SMasahiro Yamada help 1294506f1d07SSam Ravnborg This adds a driver to safely access the System Management Mode of 1295506f1d07SSam Ravnborg the CPU on Toshiba portables with a genuine Toshiba BIOS. It does 1296506f1d07SSam Ravnborg not work on models with a Phoenix BIOS. The System Management Mode 1297506f1d07SSam Ravnborg is used to set the BIOS and power saving options on Toshiba portables. 1298506f1d07SSam Ravnborg 1299506f1d07SSam Ravnborg For information on utilities to make use of this driver see the 1300506f1d07SSam Ravnborg Toshiba Linux utilities web site at: 1301506f1d07SSam Ravnborg <http://www.buzzard.org.uk/toshiba/>. 1302506f1d07SSam Ravnborg 1303506f1d07SSam Ravnborg Say Y if you intend to run this kernel on a Toshiba portable. 1304506f1d07SSam Ravnborg Say N otherwise. 1305506f1d07SSam Ravnborg 1306506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS 13079ba16087SJan Beulich bool "Enable X86 board specific fixups for reboot" 13089ba16087SJan Beulich depends on X86_32 1309a7f7f624SMasahiro Yamada help 1310506f1d07SSam Ravnborg This enables chipset and/or board specific fixups to be done 1311506f1d07SSam Ravnborg in order to get reboot to work correctly. This is only needed on 1312506f1d07SSam Ravnborg some combinations of hardware and BIOS. The symptom, for which 1313506f1d07SSam Ravnborg this config is intended, is when reboot ends with a stalled/hung 1314506f1d07SSam Ravnborg system. 1315506f1d07SSam Ravnborg 1316506f1d07SSam Ravnborg Currently, the only fixup is for the Geode machines using 13175e3a77e9SFlorian Fainelli CS5530A and CS5536 chipsets and the RDC R-321x SoC. 1318506f1d07SSam Ravnborg 1319506f1d07SSam Ravnborg Say Y if you want to enable the fixup. Currently, it's safe to 1320506f1d07SSam Ravnborg enable this option even if you don't need it. 1321506f1d07SSam Ravnborg Say N otherwise. 1322506f1d07SSam Ravnborg 1323506f1d07SSam Ravnborgconfig MICROCODE 1324e6bcfdd7SThomas Gleixner def_bool y 132580030e3dSBorislav Petkov depends on CPU_SUP_AMD || CPU_SUP_INTEL 132680cc9f10SPeter Oruba 1327fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32 1328fdbd4381SThomas Gleixner def_bool y 1329fdbd4381SThomas Gleixner depends on MICROCODE && X86_32 && BLK_DEV_INITRD 1330fdbd4381SThomas Gleixner 1331a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING 1332a77a94f8SBorislav Petkov bool "Late microcode loading (DANGEROUS)" 1333c02f48e0SBorislav Petkov default n 1334634ac23aSThomas Gleixner depends on MICROCODE && SMP 1335a7f7f624SMasahiro Yamada help 1336a77a94f8SBorislav Petkov Loading microcode late, when the system is up and executing instructions 1337a77a94f8SBorislav Petkov is a tricky business and should be avoided if possible. Just the sequence 1338a77a94f8SBorislav Petkov of synchronizing all cores and SMT threads is one fragile dance which does 1339a77a94f8SBorislav Petkov not guarantee that cores might not softlock after the loading. Therefore, 13409407bda8SThomas Gleixner use this at your own risk. Late loading taints the kernel unless the 13419407bda8SThomas Gleixner microcode header indicates that it is safe for late loading via the 13429407bda8SThomas Gleixner minimal revision check. This minimal revision check can be enforced on 13439407bda8SThomas Gleixner the kernel command line with "microcode.minrev=Y". 13449407bda8SThomas Gleixner 13459407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV 13469407bda8SThomas Gleixner bool "Enforce late microcode loading minimal revision check" 13479407bda8SThomas Gleixner default n 13489407bda8SThomas Gleixner depends on MICROCODE_LATE_LOADING 13499407bda8SThomas Gleixner help 13509407bda8SThomas Gleixner To prevent that users load microcode late which modifies already 13519407bda8SThomas Gleixner in use features, newer microcode patches have a minimum revision field 13529407bda8SThomas Gleixner in the microcode header, which tells the kernel which minimum 13539407bda8SThomas Gleixner revision must be active in the CPU to safely load that new microcode 13549407bda8SThomas Gleixner late into the running system. If disabled the check will not 13559407bda8SThomas Gleixner be enforced but the kernel will be tainted when the minimal 13569407bda8SThomas Gleixner revision check fails. 13579407bda8SThomas Gleixner 13589407bda8SThomas Gleixner This minimal revision check can also be controlled via the 13599407bda8SThomas Gleixner "microcode.minrev" parameter on the kernel command line. 13609407bda8SThomas Gleixner 13619407bda8SThomas Gleixner If unsure say Y. 1362506f1d07SSam Ravnborg 1363506f1d07SSam Ravnborgconfig X86_MSR 1364506f1d07SSam Ravnborg tristate "/dev/cpu/*/msr - Model-specific register support" 1365a7f7f624SMasahiro Yamada help 1366506f1d07SSam Ravnborg This device gives privileged processes access to the x86 1367506f1d07SSam Ravnborg Model-Specific Registers (MSRs). It is a character device with 1368506f1d07SSam Ravnborg major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. 1369506f1d07SSam Ravnborg MSR accesses are directed to a specific CPU on multi-processor 1370506f1d07SSam Ravnborg systems. 1371506f1d07SSam Ravnborg 1372506f1d07SSam Ravnborgconfig X86_CPUID 1373506f1d07SSam Ravnborg tristate "/dev/cpu/*/cpuid - CPU information support" 1374a7f7f624SMasahiro Yamada help 1375506f1d07SSam Ravnborg This device gives processes access to the x86 CPUID instruction to 1376506f1d07SSam Ravnborg be executed on a specific processor. It is a character device 1377506f1d07SSam Ravnborg with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to 1378506f1d07SSam Ravnborg /dev/cpu/31/cpuid. 1379506f1d07SSam Ravnborg 1380506f1d07SSam Ravnborgchoice 1381506f1d07SSam Ravnborg prompt "High Memory Support" 13826fc108a0SJan Beulich default HIGHMEM4G 1383506f1d07SSam Ravnborg depends on X86_32 1384506f1d07SSam Ravnborg 1385506f1d07SSam Ravnborgconfig NOHIGHMEM 1386506f1d07SSam Ravnborg bool "off" 1387a7f7f624SMasahiro Yamada help 1388506f1d07SSam Ravnborg Linux can use up to 64 Gigabytes of physical memory on x86 systems. 1389506f1d07SSam Ravnborg However, the address space of 32-bit x86 processors is only 4 1390506f1d07SSam Ravnborg Gigabytes large. That means that, if you have a large amount of 1391506f1d07SSam Ravnborg physical memory, not all of it can be "permanently mapped" by the 1392506f1d07SSam Ravnborg kernel. The physical memory that's not permanently mapped is called 1393506f1d07SSam Ravnborg "high memory". 1394506f1d07SSam Ravnborg 1395506f1d07SSam Ravnborg If you are compiling a kernel which will never run on a machine with 1396506f1d07SSam Ravnborg more than 1 Gigabyte total physical RAM, answer "off" here (default 1397506f1d07SSam Ravnborg choice and suitable for most users). This will result in a "3GB/1GB" 1398506f1d07SSam Ravnborg split: 3GB are mapped so that each process sees a 3GB virtual memory 1399506f1d07SSam Ravnborg space and the remaining part of the 4GB virtual memory space is used 1400506f1d07SSam Ravnborg by the kernel to permanently map as much physical memory as 1401506f1d07SSam Ravnborg possible. 1402506f1d07SSam Ravnborg 1403506f1d07SSam Ravnborg If the machine has between 1 and 4 Gigabytes physical RAM, then 1404506f1d07SSam Ravnborg answer "4GB" here. 1405506f1d07SSam Ravnborg 1406506f1d07SSam Ravnborg If more than 4 Gigabytes is used then answer "64GB" here. This 1407506f1d07SSam Ravnborg selection turns Intel PAE (Physical Address Extension) mode on. 1408506f1d07SSam Ravnborg PAE implements 3-level paging on IA32 processors. PAE is fully 1409506f1d07SSam Ravnborg supported by Linux, PAE mode is implemented on all recent Intel 1410506f1d07SSam Ravnborg processors (Pentium Pro and better). NOTE: If you say "64GB" here, 1411506f1d07SSam Ravnborg then the kernel will not boot on CPUs that don't support PAE! 1412506f1d07SSam Ravnborg 1413506f1d07SSam Ravnborg The actual amount of total physical memory will either be 1414506f1d07SSam Ravnborg auto detected or can be forced by using a kernel command line option 1415506f1d07SSam Ravnborg such as "mem=256M". (Try "man bootparam" or see the documentation of 1416506f1d07SSam Ravnborg your boot loader (lilo or loadlin) about how to pass options to the 1417506f1d07SSam Ravnborg kernel at boot time.) 1418506f1d07SSam Ravnborg 1419506f1d07SSam Ravnborg If unsure, say "off". 1420506f1d07SSam Ravnborg 1421506f1d07SSam Ravnborgconfig HIGHMEM4G 1422506f1d07SSam Ravnborg bool "4GB" 1423a7f7f624SMasahiro Yamada help 1424506f1d07SSam Ravnborg Select this if you have a 32-bit processor and between 1 and 4 1425506f1d07SSam Ravnborg gigabytes of physical RAM. 1426506f1d07SSam Ravnborg 1427506f1d07SSam Ravnborgconfig HIGHMEM64G 1428506f1d07SSam Ravnborg bool "64GB" 142988a2b4edSArnd Bergmann depends on X86_HAVE_PAE 1430506f1d07SSam Ravnborg select X86_PAE 1431a7f7f624SMasahiro Yamada help 1432506f1d07SSam Ravnborg Select this if you have a 32-bit processor and more than 4 1433506f1d07SSam Ravnborg gigabytes of physical RAM. 1434506f1d07SSam Ravnborg 1435506f1d07SSam Ravnborgendchoice 1436506f1d07SSam Ravnborg 1437506f1d07SSam Ravnborgchoice 14386a108a14SDavid Rientjes prompt "Memory split" if EXPERT 1439506f1d07SSam Ravnborg default VMSPLIT_3G 1440506f1d07SSam Ravnborg depends on X86_32 1441a7f7f624SMasahiro Yamada help 1442506f1d07SSam Ravnborg Select the desired split between kernel and user memory. 1443506f1d07SSam Ravnborg 1444506f1d07SSam Ravnborg If the address range available to the kernel is less than the 1445506f1d07SSam Ravnborg physical memory installed, the remaining memory will be available 1446506f1d07SSam Ravnborg as "high memory". Accessing high memory is a little more costly 1447506f1d07SSam Ravnborg than low memory, as it needs to be mapped into the kernel first. 1448506f1d07SSam Ravnborg Note that increasing the kernel address space limits the range 1449506f1d07SSam Ravnborg available to user programs, making the address space there 1450506f1d07SSam Ravnborg tighter. Selecting anything other than the default 3G/1G split 1451506f1d07SSam Ravnborg will also likely make your kernel incompatible with binary-only 1452506f1d07SSam Ravnborg kernel modules. 1453506f1d07SSam Ravnborg 1454506f1d07SSam Ravnborg If you are not absolutely sure what you are doing, leave this 1455506f1d07SSam Ravnborg option alone! 1456506f1d07SSam Ravnborg 1457506f1d07SSam Ravnborg config VMSPLIT_3G 1458506f1d07SSam Ravnborg bool "3G/1G user/kernel split" 1459506f1d07SSam Ravnborg config VMSPLIT_3G_OPT 1460506f1d07SSam Ravnborg depends on !X86_PAE 1461506f1d07SSam Ravnborg bool "3G/1G user/kernel split (for full 1G low memory)" 1462506f1d07SSam Ravnborg config VMSPLIT_2G 1463506f1d07SSam Ravnborg bool "2G/2G user/kernel split" 1464506f1d07SSam Ravnborg config VMSPLIT_2G_OPT 1465506f1d07SSam Ravnborg depends on !X86_PAE 1466506f1d07SSam Ravnborg bool "2G/2G user/kernel split (for full 2G low memory)" 1467506f1d07SSam Ravnborg config VMSPLIT_1G 1468506f1d07SSam Ravnborg bool "1G/3G user/kernel split" 1469506f1d07SSam Ravnborgendchoice 1470506f1d07SSam Ravnborg 1471506f1d07SSam Ravnborgconfig PAGE_OFFSET 1472506f1d07SSam Ravnborg hex 1473506f1d07SSam Ravnborg default 0xB0000000 if VMSPLIT_3G_OPT 1474506f1d07SSam Ravnborg default 0x80000000 if VMSPLIT_2G 1475506f1d07SSam Ravnborg default 0x78000000 if VMSPLIT_2G_OPT 1476506f1d07SSam Ravnborg default 0x40000000 if VMSPLIT_1G 1477506f1d07SSam Ravnborg default 0xC0000000 1478506f1d07SSam Ravnborg depends on X86_32 1479506f1d07SSam Ravnborg 1480506f1d07SSam Ravnborgconfig HIGHMEM 14813c2362e6SHarvey Harrison def_bool y 1482506f1d07SSam Ravnborg depends on X86_32 && (HIGHMEM64G || HIGHMEM4G) 1483506f1d07SSam Ravnborg 1484506f1d07SSam Ravnborgconfig X86_PAE 14859ba16087SJan Beulich bool "PAE (Physical Address Extension) Support" 148688a2b4edSArnd Bergmann depends on X86_32 && X86_HAVE_PAE 1487d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 14889d99c712SChristian Melki select SWIOTLB 1489a7f7f624SMasahiro Yamada help 1490506f1d07SSam Ravnborg PAE is required for NX support, and furthermore enables 1491506f1d07SSam Ravnborg larger swapspace support for non-overcommit purposes. It 1492506f1d07SSam Ravnborg has the cost of more pagetable lookup overhead, and also 1493506f1d07SSam Ravnborg consumes more pagetable space per process. 1494506f1d07SSam Ravnborg 149577ef56e4SKirill A. Shutemovconfig X86_5LEVEL 149677ef56e4SKirill A. Shutemov bool "Enable 5-level page tables support" 149718ec1eafSKirill A. Shutemov default y 1498eedb92abSKirill A. Shutemov select DYNAMIC_MEMORY_LAYOUT 1499162434e7SKirill A. Shutemov select SPARSEMEM_VMEMMAP 150077ef56e4SKirill A. Shutemov depends on X86_64 1501a7f7f624SMasahiro Yamada help 150277ef56e4SKirill A. Shutemov 5-level paging enables access to larger address space: 150377ef56e4SKirill A. Shutemov up to 128 PiB of virtual address space and 4 PiB of 150477ef56e4SKirill A. Shutemov physical address space. 150577ef56e4SKirill A. Shutemov 150677ef56e4SKirill A. Shutemov It will be supported by future Intel CPUs. 150777ef56e4SKirill A. Shutemov 15086657fca0SKirill A. Shutemov A kernel with the option enabled can be booted on machines that 15096657fca0SKirill A. Shutemov support 4- or 5-level paging. 151077ef56e4SKirill A. Shutemov 1511ff61f079SJonathan Corbet See Documentation/arch/x86/x86_64/5level-paging.rst for more 151277ef56e4SKirill A. Shutemov information. 151377ef56e4SKirill A. Shutemov 151477ef56e4SKirill A. Shutemov Say N if unsure. 151577ef56e4SKirill A. Shutemov 151610971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES 1517e5008abeSLuis R. Rodriguez def_bool y 15182e1da13fSVlastimil Babka depends on X86_64 1519a7f7f624SMasahiro Yamada help 152010971ab2SIngo Molnar Certain kernel features effectively disable kernel 152110971ab2SIngo Molnar linear 1 GB mappings (even if the CPU otherwise 152210971ab2SIngo Molnar supports them), so don't confuse the user by printing 152310971ab2SIngo Molnar that we have them enabled. 15249e899816SNick Piggin 15255c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS 15265c280cf6SThomas Gleixner bool "Enable statistic for Change Page Attribute" 15275c280cf6SThomas Gleixner depends on DEBUG_FS 1528a7f7f624SMasahiro Yamada help 1529b75baaf3SIngo Molnar Expose statistics about the Change Page Attribute mechanism, which 1530a943245aSColin Ian King helps to determine the effectiveness of preserving large and huge 15315c280cf6SThomas Gleixner page mappings when mapping protections are changed. 15325c280cf6SThomas Gleixner 153320f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT 153420f07a04SKirill A. Shutemov select ARCH_HAS_FORCE_DMA_UNENCRYPTED 153520f07a04SKirill A. Shutemov select DYNAMIC_PHYSICAL_MASK 153620f07a04SKirill A. Shutemov def_bool n 153720f07a04SKirill A. Shutemov 15387744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT 15397744ccdbSTom Lendacky bool "AMD Secure Memory Encryption (SME) support" 15407744ccdbSTom Lendacky depends on X86_64 && CPU_SUP_AMD 15416c321179STom Lendacky depends on EFI_STUB 154282fef0adSDavid Rientjes select DMA_COHERENT_POOL 1543ce9084baSArd Biesheuvel select ARCH_USE_MEMREMAP_PROT 1544597cfe48SJoerg Roedel select INSTRUCTION_DECODER 1545aa5a4611STom Lendacky select ARCH_HAS_CC_PLATFORM 154620f07a04SKirill A. Shutemov select X86_MEM_ENCRYPT 15476c321179STom Lendacky select UNACCEPTED_MEMORY 1548a7f7f624SMasahiro Yamada help 15497744ccdbSTom Lendacky Say yes to enable support for the encryption of system memory. 15507744ccdbSTom Lendacky This requires an AMD processor that supports Secure Memory 15517744ccdbSTom Lendacky Encryption (SME). 15527744ccdbSTom Lendacky 1553506f1d07SSam Ravnborg# Common NUMA Features 1554506f1d07SSam Ravnborgconfig NUMA 1555e133f6eaSRandy Dunlap bool "NUMA Memory Allocation and Scheduler Support" 1556506f1d07SSam Ravnborg depends on SMP 1557b5660ba7SH. Peter Anvin depends on X86_64 || (X86_32 && HIGHMEM64G && X86_BIGSMP) 1558b5660ba7SH. Peter Anvin default y if X86_BIGSMP 15597ecd19cfSKefeng Wang select USE_PERCPU_NUMA_NODE_ID 15600c436a58SSaurabh Sengar select OF_NUMA if OF 1561a7f7f624SMasahiro Yamada help 1562e133f6eaSRandy Dunlap Enable NUMA (Non-Uniform Memory Access) support. 1563fd51b2d7SKOSAKI Motohiro 1564506f1d07SSam Ravnborg The kernel will try to allocate memory used by a CPU on the 1565506f1d07SSam Ravnborg local memory controller of the CPU and add some more 1566506f1d07SSam Ravnborg NUMA awareness to the kernel. 1567506f1d07SSam Ravnborg 1568c280ea5eSIngo Molnar For 64-bit this is recommended if the system is Intel Core i7 1569fd51b2d7SKOSAKI Motohiro (or later), AMD Opteron, or EM64T NUMA. 1570fd51b2d7SKOSAKI Motohiro 1571b5660ba7SH. Peter Anvin For 32-bit this is only needed if you boot a 32-bit 15727cf6c945SDavid Rientjes kernel on a 64-bit NUMA platform. 1573fd51b2d7SKOSAKI Motohiro 1574fd51b2d7SKOSAKI Motohiro Otherwise, you should say N. 1575506f1d07SSam Ravnborg 1576eec1d4faSHans Rosenfeldconfig AMD_NUMA 15773c2362e6SHarvey Harrison def_bool y 15783c2362e6SHarvey Harrison prompt "Old style AMD Opteron NUMA detection" 15795da0ef9aSTejun Heo depends on X86_64 && NUMA && PCI 1580a7f7f624SMasahiro Yamada help 1581eec1d4faSHans Rosenfeld Enable AMD NUMA node topology detection. You should say Y here if 1582eec1d4faSHans Rosenfeld you have a multi processor AMD system. This uses an old method to 1583eec1d4faSHans Rosenfeld read the NUMA configuration directly from the builtin Northbridge 1584eec1d4faSHans Rosenfeld of Opteron. It is recommended to use X86_64_ACPI_NUMA instead, 1585eec1d4faSHans Rosenfeld which also takes priority if both are compiled in. 1586506f1d07SSam Ravnborg 1587506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA 15883c2362e6SHarvey Harrison def_bool y 15893c2362e6SHarvey Harrison prompt "ACPI NUMA detection" 1590506f1d07SSam Ravnborg depends on X86_64 && NUMA && ACPI && PCI 1591506f1d07SSam Ravnborg select ACPI_NUMA 1592a7f7f624SMasahiro Yamada help 1593506f1d07SSam Ravnborg Enable ACPI SRAT based node topology detection. 1594506f1d07SSam Ravnborg 1595506f1d07SSam Ravnborgconfig NUMA_EMU 1596506f1d07SSam Ravnborg bool "NUMA emulation" 15971b7e03efSTejun Heo depends on NUMA 1598a7f7f624SMasahiro Yamada help 1599506f1d07SSam Ravnborg Enable NUMA emulation. A flat machine will be split 1600506f1d07SSam Ravnborg into virtual nodes when booted with "numa=fake=N", where N is the 1601506f1d07SSam Ravnborg number of nodes. This is only useful for debugging. 1602506f1d07SSam Ravnborg 1603506f1d07SSam Ravnborgconfig NODES_SHIFT 1604d25e26b6SLinus Torvalds int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP 160551591e31SDavid Rientjes range 1 10 160651591e31SDavid Rientjes default "10" if MAXSMP 1607506f1d07SSam Ravnborg default "6" if X86_64 1608506f1d07SSam Ravnborg default "3" 1609a9ee6cf5SMike Rapoport depends on NUMA 1610a7f7f624SMasahiro Yamada help 16111184dc2fSMike Travis Specify the maximum number of NUMA Nodes available on the target 1612692105b8SMatt LaPlante system. Increases memory reserved to accommodate various tables. 1613506f1d07SSam Ravnborg 1614506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE 1615506f1d07SSam Ravnborg def_bool y 16163b16651fSTejun Heo depends on X86_32 && !NUMA 1617506f1d07SSam Ravnborg 1618506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE 1619506f1d07SSam Ravnborg def_bool y 16206ea30386SKees Cook depends on X86_64 || NUMA || X86_32 || X86_32_NON_STANDARD 1621506f1d07SSam Ravnborg select SPARSEMEM_STATIC if X86_32 1622506f1d07SSam Ravnborg select SPARSEMEM_VMEMMAP_ENABLE if X86_64 1623506f1d07SSam Ravnborg 16243b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT 16256ad57f7fSMike Rapoport def_bool X86_64 || (NUMA && X86_32) 16263b16651fSTejun Heo 1627506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL 1628506f1d07SSam Ravnborg def_bool y 16294eda2bc3SDavid Hildenbrand depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE 1630506f1d07SSam Ravnborg 1631506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE 1632a0842b70SToshi Kani bool "Enable sysfs memory/probe interface" 16335c11f00bSDavid Hildenbrand depends on MEMORY_HOTPLUG 1634a0842b70SToshi Kani help 1635a0842b70SToshi Kani This option enables a sysfs memory/probe interface for testing. 1636cb1aaebeSMauro Carvalho Chehab See Documentation/admin-guide/mm/memory-hotplug.rst for more information. 1637a0842b70SToshi Kani If you are unsure how to answer this question, answer N. 1638506f1d07SSam Ravnborg 16393b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT 16403b16651fSTejun Heo def_bool y 16413b16651fSTejun Heo depends on X86_64 && PROC_KCORE 16423b16651fSTejun Heo 1643a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE 1644a29815a3SAvi Kivity hex 1645a29815a3SAvi Kivity default 0 if X86_32 1646a29815a3SAvi Kivity default 0xdead000000000000 if X86_64 1647a29815a3SAvi Kivity 16487a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE 16497a67832cSDan Williams bool 16507a67832cSDan Williams 1651ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY 16527a67832cSDan Williams tristate "Support non-standard NVDIMMs and ADR protected memory" 16539f53f9faSDan Williams depends on PHYS_ADDR_T_64BIT 16549f53f9faSDan Williams depends on BLK_DEV 16557a67832cSDan Williams select X86_PMEM_LEGACY_DEVICE 16567b27a862SDan Williams select NUMA_KEEP_MEMINFO if NUMA 16579f53f9faSDan Williams select LIBNVDIMM 1658ec776ef6SChristoph Hellwig help 1659ec776ef6SChristoph Hellwig Treat memory marked using the non-standard e820 type of 12 as used 1660ec776ef6SChristoph Hellwig by the Intel Sandy Bridge-EP reference BIOS as protected memory. 1661ec776ef6SChristoph Hellwig The kernel will offer these regions to the 'pmem' driver so 1662ec776ef6SChristoph Hellwig they can be used for persistent storage. 1663ec776ef6SChristoph Hellwig 1664ec776ef6SChristoph Hellwig Say Y if unsure. 1665ec776ef6SChristoph Hellwig 1666506f1d07SSam Ravnborgconfig HIGHPTE 1667506f1d07SSam Ravnborg bool "Allocate 3rd-level pagetables from highmem" 16686fc108a0SJan Beulich depends on HIGHMEM 1669a7f7f624SMasahiro Yamada help 1670506f1d07SSam Ravnborg The VM uses one page table entry for each page of physical memory. 1671506f1d07SSam Ravnborg For systems with a lot of RAM, this can be wasteful of precious 1672506f1d07SSam Ravnborg low memory. Setting this option will put user-space page table 1673506f1d07SSam Ravnborg entries in high memory. 1674506f1d07SSam Ravnborg 16759f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION 16769f077871SJeremy Fitzhardinge bool "Check for low memory corruption" 1677a7f7f624SMasahiro Yamada help 16789f077871SJeremy Fitzhardinge Periodically check for memory corruption in low memory, which 16799f077871SJeremy Fitzhardinge is suspected to be caused by BIOS. Even when enabled in the 16809f077871SJeremy Fitzhardinge configuration, it is disabled at runtime. Enable it by 16819f077871SJeremy Fitzhardinge setting "memory_corruption_check=1" on the kernel command 16829f077871SJeremy Fitzhardinge line. By default it scans the low 64k of memory every 60 16839f077871SJeremy Fitzhardinge seconds; see the memory_corruption_check_size and 16849f077871SJeremy Fitzhardinge memory_corruption_check_period parameters in 16858c27ceffSMauro Carvalho Chehab Documentation/admin-guide/kernel-parameters.rst to adjust this. 16869f077871SJeremy Fitzhardinge 16879f077871SJeremy Fitzhardinge When enabled with the default parameters, this option has 16889f077871SJeremy Fitzhardinge almost no overhead, as it reserves a relatively small amount 16899f077871SJeremy Fitzhardinge of memory and scans it infrequently. It both detects corruption 16909f077871SJeremy Fitzhardinge and prevents it from affecting the running system. 16919f077871SJeremy Fitzhardinge 16929f077871SJeremy Fitzhardinge It is, however, intended as a diagnostic tool; if repeatable 16939f077871SJeremy Fitzhardinge BIOS-originated corruption always affects the same memory, 16949f077871SJeremy Fitzhardinge you can use memmap= to prevent the kernel from using that 16959f077871SJeremy Fitzhardinge memory. 16969f077871SJeremy Fitzhardinge 1697c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK 1698c885df50SJeremy Fitzhardinge bool "Set the default setting of memory_corruption_check" 1699c885df50SJeremy Fitzhardinge depends on X86_CHECK_BIOS_CORRUPTION 1700c885df50SJeremy Fitzhardinge default y 1701a7f7f624SMasahiro Yamada help 1702c885df50SJeremy Fitzhardinge Set whether the default state of memory_corruption_check is 1703c885df50SJeremy Fitzhardinge on or off. 1704c885df50SJeremy Fitzhardinge 1705506f1d07SSam Ravnborgconfig MATH_EMULATION 1706506f1d07SSam Ravnborg bool 1707a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 170887d6021bSArnd Bergmann prompt "Math emulation" if X86_32 && (M486SX || MELAN) 1709a7f7f624SMasahiro Yamada help 1710506f1d07SSam Ravnborg Linux can emulate a math coprocessor (used for floating point 1711506f1d07SSam Ravnborg operations) if you don't have one. 486DX and Pentium processors have 1712506f1d07SSam Ravnborg a math coprocessor built in, 486SX and 386 do not, unless you added 1713506f1d07SSam Ravnborg a 487DX or 387, respectively. (The messages during boot time can 1714506f1d07SSam Ravnborg give you some hints here ["man dmesg"].) Everyone needs either a 1715506f1d07SSam Ravnborg coprocessor or this emulation. 1716506f1d07SSam Ravnborg 1717506f1d07SSam Ravnborg If you don't have a math coprocessor, you need to say Y here; if you 1718506f1d07SSam Ravnborg say Y here even though you have a coprocessor, the coprocessor will 1719506f1d07SSam Ravnborg be used nevertheless. (This behavior can be changed with the kernel 1720506f1d07SSam Ravnborg command line option "no387", which comes handy if your coprocessor 1721506f1d07SSam Ravnborg is broken. Try "man bootparam" or see the documentation of your boot 1722506f1d07SSam Ravnborg loader (lilo or loadlin) about how to pass options to the kernel at 1723506f1d07SSam Ravnborg boot time.) This means that it is a good idea to say Y here if you 1724506f1d07SSam Ravnborg intend to use this kernel on different machines. 1725506f1d07SSam Ravnborg 1726506f1d07SSam Ravnborg More information about the internals of the Linux math coprocessor 1727506f1d07SSam Ravnborg emulation can be found in <file:arch/x86/math-emu/README>. 1728506f1d07SSam Ravnborg 1729506f1d07SSam Ravnborg If you are not sure, say Y; apart from resulting in a 66 KB bigger 1730506f1d07SSam Ravnborg kernel, it won't hurt. 1731506f1d07SSam Ravnborg 1732506f1d07SSam Ravnborgconfig MTRR 17336fc108a0SJan Beulich def_bool y 17346a108a14SDavid Rientjes prompt "MTRR (Memory Type Range Register) support" if EXPERT 1735a7f7f624SMasahiro Yamada help 1736506f1d07SSam Ravnborg On Intel P6 family processors (Pentium Pro, Pentium II and later) 1737506f1d07SSam Ravnborg the Memory Type Range Registers (MTRRs) may be used to control 1738506f1d07SSam Ravnborg processor access to memory ranges. This is most useful if you have 1739506f1d07SSam Ravnborg a video (VGA) card on a PCI or AGP bus. Enabling write-combining 1740506f1d07SSam Ravnborg allows bus write transfers to be combined into a larger transfer 1741506f1d07SSam Ravnborg before bursting over the PCI/AGP bus. This can increase performance 1742506f1d07SSam Ravnborg of image write operations 2.5 times or more. Saying Y here creates a 1743506f1d07SSam Ravnborg /proc/mtrr file which may be used to manipulate your processor's 1744506f1d07SSam Ravnborg MTRRs. Typically the X server should use this. 1745506f1d07SSam Ravnborg 1746506f1d07SSam Ravnborg This code has a reasonably generic interface so that similar 1747506f1d07SSam Ravnborg control registers on other processors can be easily supported 1748506f1d07SSam Ravnborg as well: 1749506f1d07SSam Ravnborg 1750506f1d07SSam Ravnborg The Cyrix 6x86, 6x86MX and M II processors have Address Range 1751506f1d07SSam Ravnborg Registers (ARRs) which provide a similar functionality to MTRRs. For 1752506f1d07SSam Ravnborg these, the ARRs are used to emulate the MTRRs. 1753506f1d07SSam Ravnborg The AMD K6-2 (stepping 8 and above) and K6-3 processors have two 1754506f1d07SSam Ravnborg MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing 1755506f1d07SSam Ravnborg write-combining. All of these processors are supported by this code 1756506f1d07SSam Ravnborg and it makes sense to say Y here if you have one of them. 1757506f1d07SSam Ravnborg 1758506f1d07SSam Ravnborg Saying Y here also fixes a problem with buggy SMP BIOSes which only 1759506f1d07SSam Ravnborg set the MTRRs for the boot CPU and not for the secondary CPUs. This 1760506f1d07SSam Ravnborg can lead to all sorts of problems, so it's good to say Y here. 1761506f1d07SSam Ravnborg 1762506f1d07SSam Ravnborg You can safely say Y even if your machine doesn't have MTRRs, you'll 1763506f1d07SSam Ravnborg just add about 9 KB to your kernel. 1764506f1d07SSam Ravnborg 1765ff61f079SJonathan Corbet See <file:Documentation/arch/x86/mtrr.rst> for more information. 1766506f1d07SSam Ravnborg 176795ffa243SYinghai Luconfig MTRR_SANITIZER 17682ffb3501SYinghai Lu def_bool y 176995ffa243SYinghai Lu prompt "MTRR cleanup support" 177095ffa243SYinghai Lu depends on MTRR 1771a7f7f624SMasahiro Yamada help 1772aba3728cSThomas Gleixner Convert MTRR layout from continuous to discrete, so X drivers can 1773aba3728cSThomas Gleixner add writeback entries. 177495ffa243SYinghai Lu 1775aba3728cSThomas Gleixner Can be disabled with disable_mtrr_cleanup on the kernel command line. 1776692105b8SMatt LaPlante The largest mtrr entry size for a continuous block can be set with 1777aba3728cSThomas Gleixner mtrr_chunk_size. 177895ffa243SYinghai Lu 17792ffb3501SYinghai Lu If unsure, say Y. 178095ffa243SYinghai Lu 178195ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT 1782f5098d62SYinghai Lu int "MTRR cleanup enable value (0-1)" 1783f5098d62SYinghai Lu range 0 1 1784f5098d62SYinghai Lu default "0" 178595ffa243SYinghai Lu depends on MTRR_SANITIZER 1786a7f7f624SMasahiro Yamada help 1787f5098d62SYinghai Lu Enable mtrr cleanup default value 178895ffa243SYinghai Lu 178912031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT 179012031a62SYinghai Lu int "MTRR cleanup spare reg num (0-7)" 179112031a62SYinghai Lu range 0 7 179212031a62SYinghai Lu default "1" 179312031a62SYinghai Lu depends on MTRR_SANITIZER 1794a7f7f624SMasahiro Yamada help 179512031a62SYinghai Lu mtrr cleanup spare entries default, it can be changed via 1796aba3728cSThomas Gleixner mtrr_spare_reg_nr=N on the kernel command line. 179712031a62SYinghai Lu 17982e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT 17996fc108a0SJan Beulich def_bool y 18006a108a14SDavid Rientjes prompt "x86 PAT support" if EXPERT 18012a8a2719SIngo Molnar depends on MTRR 1802a7f7f624SMasahiro Yamada help 18032e5d9c85Svenkatesh.pallipadi@intel.com Use PAT attributes to setup page level cache control. 1804042b78e4SVenki Pallipadi 18052e5d9c85Svenkatesh.pallipadi@intel.com PATs are the modern equivalents of MTRRs and are much more 18062e5d9c85Svenkatesh.pallipadi@intel.com flexible than MTRRs. 18072e5d9c85Svenkatesh.pallipadi@intel.com 18082e5d9c85Svenkatesh.pallipadi@intel.com Say N here if you see bootup problems (boot crash, boot hang, 1809042b78e4SVenki Pallipadi spontaneous reboots) or a non-working video driver. 18102e5d9c85Svenkatesh.pallipadi@intel.com 18112e5d9c85Svenkatesh.pallipadi@intel.com If unsure, say Y. 18122e5d9c85Svenkatesh.pallipadi@intel.com 181346cf98cdSVenkatesh Pallipadiconfig ARCH_USES_PG_UNCACHED 181446cf98cdSVenkatesh Pallipadi def_bool y 181546cf98cdSVenkatesh Pallipadi depends on X86_PAT 181646cf98cdSVenkatesh Pallipadi 1817b971880fSBabu Mogerconfig X86_UMIP 1818796ebc81SRicardo Neri def_bool y 1819b971880fSBabu Moger prompt "User Mode Instruction Prevention" if EXPERT 1820a7f7f624SMasahiro Yamada help 1821b971880fSBabu Moger User Mode Instruction Prevention (UMIP) is a security feature in 1822b971880fSBabu Moger some x86 processors. If enabled, a general protection fault is 1823b971880fSBabu Moger issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are 1824b971880fSBabu Moger executed in user mode. These instructions unnecessarily expose 1825b971880fSBabu Moger information about the hardware state. 1826796ebc81SRicardo Neri 1827796ebc81SRicardo Neri The vast majority of applications do not use these instructions. 1828796ebc81SRicardo Neri For the very few that do, software emulation is provided in 1829796ebc81SRicardo Neri specific cases in protected and virtual-8086 modes. Emulated 1830796ebc81SRicardo Neri results are dummy. 1831aa35f896SRicardo Neri 1832156ff4a5SPeter Zijlstraconfig CC_HAS_IBT 1833156ff4a5SPeter Zijlstra # GCC >= 9 and binutils >= 2.29 1834156ff4a5SPeter Zijlstra # Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654 1835156ff4a5SPeter Zijlstra # Clang/LLVM >= 14 1836262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f 1837262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332 1838156ff4a5SPeter Zijlstra def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \ 1839262448f3SNathan Chancellor (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \ 1840156ff4a5SPeter Zijlstra $(as-instr,endbr64) 1841156ff4a5SPeter Zijlstra 184218e66b69SRick Edgecombeconfig X86_CET 184318e66b69SRick Edgecombe def_bool n 184418e66b69SRick Edgecombe help 184518e66b69SRick Edgecombe CET features configured (Shadow stack or IBT) 184618e66b69SRick Edgecombe 1847156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT 1848156ff4a5SPeter Zijlstra prompt "Indirect Branch Tracking" 18494fd5f70cSKees Cook def_bool y 185003f16cd0SJosh Poimboeuf depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL 1851f6a2c2b2SNathan Chancellor # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f 1852f6a2c2b2SNathan Chancellor depends on !LD_IS_LLD || LLD_VERSION >= 140000 185303f16cd0SJosh Poimboeuf select OBJTOOL 185418e66b69SRick Edgecombe select X86_CET 1855156ff4a5SPeter Zijlstra help 1856156ff4a5SPeter Zijlstra Build the kernel with support for Indirect Branch Tracking, a 1857156ff4a5SPeter Zijlstra hardware support course-grain forward-edge Control Flow Integrity 1858156ff4a5SPeter Zijlstra protection. It enforces that all indirect calls must land on 1859156ff4a5SPeter Zijlstra an ENDBR instruction, as such, the compiler will instrument the 1860156ff4a5SPeter Zijlstra code with them to make this happen. 1861156ff4a5SPeter Zijlstra 1862ed53a0d9SPeter Zijlstra In addition to building the kernel with IBT, seal all functions that 18634cdfc11bSNur Hussein are not indirect call targets, avoiding them ever becoming one. 1864ed53a0d9SPeter Zijlstra 1865ed53a0d9SPeter Zijlstra This requires LTO like objtool runs and will slow down the build. It 1866ed53a0d9SPeter Zijlstra does significantly reduce the number of ENDBR instructions in the 1867ed53a0d9SPeter Zijlstra kernel image. 1868ed53a0d9SPeter Zijlstra 186935e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS 187038f3e775SBabu Moger prompt "Memory Protection Keys" 187135e97790SDave Hansen def_bool y 1872284244a9SDave Hansen # Note: only available in 64-bit mode 187338f3e775SBabu Moger depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD) 187452c8e601SIngo Molnar select ARCH_USES_HIGH_VMA_FLAGS 187552c8e601SIngo Molnar select ARCH_HAS_PKEYS 1876a7f7f624SMasahiro Yamada help 1877284244a9SDave Hansen Memory Protection Keys provides a mechanism for enforcing 1878284244a9SDave Hansen page-based protections, but without requiring modification of the 1879284244a9SDave Hansen page tables when an application changes protection domains. 1880284244a9SDave Hansen 18811eecbcdcSMauro Carvalho Chehab For details, see Documentation/core-api/protection-keys.rst 1882284244a9SDave Hansen 1883284244a9SDave Hansen If unsure, say y. 188435e97790SDave Hansen 1885db616173SMichal Hockochoice 1886db616173SMichal Hocko prompt "TSX enable mode" 1887db616173SMichal Hocko depends on CPU_SUP_INTEL 1888db616173SMichal Hocko default X86_INTEL_TSX_MODE_OFF 1889db616173SMichal Hocko help 1890db616173SMichal Hocko Intel's TSX (Transactional Synchronization Extensions) feature 1891db616173SMichal Hocko allows to optimize locking protocols through lock elision which 1892db616173SMichal Hocko can lead to a noticeable performance boost. 1893db616173SMichal Hocko 1894db616173SMichal Hocko On the other hand it has been shown that TSX can be exploited 1895db616173SMichal Hocko to form side channel attacks (e.g. TAA) and chances are there 1896db616173SMichal Hocko will be more of those attacks discovered in the future. 1897db616173SMichal Hocko 1898db616173SMichal Hocko Therefore TSX is not enabled by default (aka tsx=off). An admin 1899db616173SMichal Hocko might override this decision by tsx=on the command line parameter. 1900db616173SMichal Hocko Even with TSX enabled, the kernel will attempt to enable the best 1901db616173SMichal Hocko possible TAA mitigation setting depending on the microcode available 1902db616173SMichal Hocko for the particular machine. 1903db616173SMichal Hocko 1904db616173SMichal Hocko This option allows to set the default tsx mode between tsx=on, =off 1905db616173SMichal Hocko and =auto. See Documentation/admin-guide/kernel-parameters.txt for more 1906db616173SMichal Hocko details. 1907db616173SMichal Hocko 1908db616173SMichal Hocko Say off if not sure, auto if TSX is in use but it should be used on safe 1909db616173SMichal Hocko platforms or on if TSX is in use and the security aspect of tsx is not 1910db616173SMichal Hocko relevant. 1911db616173SMichal Hocko 1912db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF 1913db616173SMichal Hocko bool "off" 1914db616173SMichal Hocko help 1915db616173SMichal Hocko TSX is disabled if possible - equals to tsx=off command line parameter. 1916db616173SMichal Hocko 1917db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON 1918db616173SMichal Hocko bool "on" 1919db616173SMichal Hocko help 1920db616173SMichal Hocko TSX is always enabled on TSX capable HW - equals the tsx=on command 1921db616173SMichal Hocko line parameter. 1922db616173SMichal Hocko 1923db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO 1924db616173SMichal Hocko bool "auto" 1925db616173SMichal Hocko help 1926db616173SMichal Hocko TSX is enabled on TSX capable HW that is believed to be safe against 1927db616173SMichal Hocko side channel attacks- equals the tsx=auto command line parameter. 1928db616173SMichal Hockoendchoice 1929db616173SMichal Hocko 1930e7e05452SSean Christophersonconfig X86_SGX 1931e7e05452SSean Christopherson bool "Software Guard eXtensions (SGX)" 1932b8d1d163SDaniel Sneddon depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC 1933e7e05452SSean Christopherson depends on CRYPTO=y 1934e7e05452SSean Christopherson depends on CRYPTO_SHA256=y 1935e7e05452SSean Christopherson select MMU_NOTIFIER 1936901ddbb9SJarkko Sakkinen select NUMA_KEEP_MEMINFO if NUMA 193740e0e784STony Luck select XARRAY_MULTI 1938e7e05452SSean Christopherson help 1939e7e05452SSean Christopherson Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions 1940e7e05452SSean Christopherson that can be used by applications to set aside private regions of code 1941e7e05452SSean Christopherson and data, referred to as enclaves. An enclave's private memory can 1942e7e05452SSean Christopherson only be accessed by code running within the enclave. Accesses from 1943e7e05452SSean Christopherson outside the enclave, including other enclaves, are disallowed by 1944e7e05452SSean Christopherson hardware. 1945e7e05452SSean Christopherson 1946e7e05452SSean Christopherson If unsure, say N. 1947e7e05452SSean Christopherson 194818e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK 194918e66b69SRick Edgecombe bool "X86 userspace shadow stack" 195018e66b69SRick Edgecombe depends on AS_WRUSS 195118e66b69SRick Edgecombe depends on X86_64 195218e66b69SRick Edgecombe select ARCH_USES_HIGH_VMA_FLAGS 195318e66b69SRick Edgecombe select X86_CET 195418e66b69SRick Edgecombe help 195518e66b69SRick Edgecombe Shadow stack protection is a hardware feature that detects function 195618e66b69SRick Edgecombe return address corruption. This helps mitigate ROP attacks. 195718e66b69SRick Edgecombe Applications must be enabled to use it, and old userspace does not 195818e66b69SRick Edgecombe get protection "for free". 195918e66b69SRick Edgecombe 196018e66b69SRick Edgecombe CPUs supporting shadow stacks were first released in 2020. 196118e66b69SRick Edgecombe 196254acee60SDave Hansen See Documentation/arch/x86/shstk.rst for more information. 196318e66b69SRick Edgecombe 196418e66b69SRick Edgecombe If unsure, say N. 196518e66b69SRick Edgecombe 1966c33621b4SKai Huangconfig INTEL_TDX_HOST 1967c33621b4SKai Huang bool "Intel Trust Domain Extensions (TDX) host support" 1968c33621b4SKai Huang depends on CPU_SUP_INTEL 1969c33621b4SKai Huang depends on X86_64 1970c33621b4SKai Huang depends on KVM_INTEL 19713115cabdSKai Huang depends on X86_X2APIC 1972abe8dbabSKai Huang select ARCH_KEEP_MEMBLOCK 1973ac3a2208SKai Huang depends on CONTIG_ALLOC 1974cb8eb06dSDave Hansen depends on !KEXEC_CORE 197583e1bdc9SKai Huang depends on X86_MCE 1976c33621b4SKai Huang help 1977c33621b4SKai Huang Intel Trust Domain Extensions (TDX) protects guest VMs from malicious 1978c33621b4SKai Huang host and certain physical attacks. This option enables necessary TDX 1979c33621b4SKai Huang support in the host kernel to run confidential VMs. 1980c33621b4SKai Huang 1981c33621b4SKai Huang If unsure, say N. 1982c33621b4SKai Huang 1983506f1d07SSam Ravnborgconfig EFI 19849ba16087SJan Beulich bool "EFI runtime service support" 19855b83683fSHuang, Ying depends on ACPI 1986f6ce5002SSergey Vlasov select UCS2_STRING 1987022ee6c5SArd Biesheuvel select EFI_RUNTIME_WRAPPERS 19881ff2fc02STom Lendacky select ARCH_USE_MEMREMAP_PROT 1989aba7e066SArd Biesheuvel select EFI_RUNTIME_MAP if KEXEC_CORE 1990a7f7f624SMasahiro Yamada help 19918b2cb7a8SHuang, Ying This enables the kernel to use EFI runtime services that are 1992506f1d07SSam Ravnborg available (such as the EFI variable services). 1993506f1d07SSam Ravnborg 19948b2cb7a8SHuang, Ying This option is only useful on systems that have EFI firmware. 19958b2cb7a8SHuang, Ying In addition, you should use the latest ELILO loader available 19968b2cb7a8SHuang, Ying at <http://elilo.sourceforge.net> in order to take advantage 19978b2cb7a8SHuang, Ying of EFI runtime services. However, even with this option, the 19988b2cb7a8SHuang, Ying resultant kernel should continue to boot on existing non-EFI 19998b2cb7a8SHuang, Ying platforms. 2000506f1d07SSam Ravnborg 2001291f3632SMatt Flemingconfig EFI_STUB 2002291f3632SMatt Fleming bool "EFI stub support" 2003c6dbd3e5SPeter Zijlstra depends on EFI 20047b2a583aSMatt Fleming select RELOCATABLE 2005a7f7f624SMasahiro Yamada help 2006291f3632SMatt Fleming This kernel feature allows a bzImage to be loaded directly 2007291f3632SMatt Fleming by EFI firmware without the use of a bootloader. 2008291f3632SMatt Fleming 20094f4cfa6cSMauro Carvalho Chehab See Documentation/admin-guide/efi-stub.rst for more information. 20100c759662SMatt Fleming 2011cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL 2012cc3fdda2SArd Biesheuvel bool "EFI handover protocol (DEPRECATED)" 2013cc3fdda2SArd Biesheuvel depends on EFI_STUB 2014cc3fdda2SArd Biesheuvel default y 2015cc3fdda2SArd Biesheuvel help 2016cc3fdda2SArd Biesheuvel Select this in order to include support for the deprecated EFI 2017cc3fdda2SArd Biesheuvel handover protocol, which defines alternative entry points into the 2018cc3fdda2SArd Biesheuvel EFI stub. This is a practice that has no basis in the UEFI 2019cc3fdda2SArd Biesheuvel specification, and requires a priori knowledge on the part of the 2020cc3fdda2SArd Biesheuvel bootloader about Linux/x86 specific ways of passing the command line 2021cc3fdda2SArd Biesheuvel and initrd, and where in memory those assets may be loaded. 2022cc3fdda2SArd Biesheuvel 2023cc3fdda2SArd Biesheuvel If in doubt, say Y. Even though the corresponding support is not 2024cc3fdda2SArd Biesheuvel present in upstream GRUB or other bootloaders, most distros build 2025cc3fdda2SArd Biesheuvel GRUB with numerous downstream patches applied, and may rely on the 2026cc3fdda2SArd Biesheuvel handover protocol as as result. 2027cc3fdda2SArd Biesheuvel 20287d453eeeSMatt Flemingconfig EFI_MIXED 20297d453eeeSMatt Fleming bool "EFI mixed-mode support" 20307d453eeeSMatt Fleming depends on EFI_STUB && X86_64 2031a7f7f624SMasahiro Yamada help 20327d453eeeSMatt Fleming Enabling this feature allows a 64-bit kernel to be booted 20337d453eeeSMatt Fleming on a 32-bit firmware, provided that your CPU supports 64-bit 20347d453eeeSMatt Fleming mode. 20357d453eeeSMatt Fleming 20367d453eeeSMatt Fleming Note that it is not possible to boot a mixed-mode enabled 20377d453eeeSMatt Fleming kernel via the EFI boot stub - a bootloader that supports 20387d453eeeSMatt Fleming the EFI handover protocol must be used. 20397d453eeeSMatt Fleming 20407d453eeeSMatt Fleming If unsure, say N. 20417d453eeeSMatt Fleming 20424059ba65SArd Biesheuvelconfig EFI_FAKE_MEMMAP 20434059ba65SArd Biesheuvel bool "Enable EFI fake memory map" 20444059ba65SArd Biesheuvel depends on EFI 20454059ba65SArd Biesheuvel help 20464059ba65SArd Biesheuvel Saying Y here will enable "efi_fake_mem" boot option. By specifying 20474059ba65SArd Biesheuvel this parameter, you can add arbitrary attribute to specific memory 20484059ba65SArd Biesheuvel range by updating original (firmware provided) EFI memmap. This is 20494059ba65SArd Biesheuvel useful for debugging of EFI memmap related feature, e.g., Address 20504059ba65SArd Biesheuvel Range Mirroring feature. 20514059ba65SArd Biesheuvel 20524059ba65SArd Biesheuvelconfig EFI_MAX_FAKE_MEM 20534059ba65SArd Biesheuvel int "maximum allowable number of ranges in efi_fake_mem boot option" 20544059ba65SArd Biesheuvel depends on EFI_FAKE_MEMMAP 20554059ba65SArd Biesheuvel range 1 128 20564059ba65SArd Biesheuvel default 8 20574059ba65SArd Biesheuvel help 20584059ba65SArd Biesheuvel Maximum allowable number of ranges in efi_fake_mem boot option. 20594059ba65SArd Biesheuvel Ranges can be set up to this value using comma-separated list. 20604059ba65SArd Biesheuvel The default value is 8. 20614059ba65SArd Biesheuvel 20621fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP 20631fff234dSArd Biesheuvel bool "Export EFI runtime maps to sysfs" if EXPERT 20641fff234dSArd Biesheuvel depends on EFI 20651fff234dSArd Biesheuvel help 20661fff234dSArd Biesheuvel Export EFI runtime memory regions to /sys/firmware/efi/runtime-map. 20671fff234dSArd Biesheuvel That memory map is required by the 2nd kernel to set up EFI virtual 20681fff234dSArd Biesheuvel mappings after kexec, but can also be used for debugging purposes. 20691fff234dSArd Biesheuvel 20701fff234dSArd Biesheuvel See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map. 20711fff234dSArd Biesheuvel 20728636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz" 2073506f1d07SSam Ravnborg 20746af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC 20756af51380SEric DeVolder def_bool y 2076506f1d07SSam Ravnborg 20776af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE 2078c1ad12eeSArnd Bergmann def_bool X86_64 2079506f1d07SSam Ravnborg 20806af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE 20816af51380SEric DeVolder def_bool y 20826af51380SEric DeVolder depends on KEXEC_FILE 2083b69a2afdSJonathan McDowell select HAVE_IMA_KEXEC if IMA 208474ca317cSVivek Goyal 2085e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY 2086c1ad12eeSArnd Bergmann def_bool y 2087b799a09fSAKASHI Takahiro 20886af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG 20896af51380SEric DeVolder def_bool y 209099d5cadfSJiri Bohac 20916af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE 20926af51380SEric DeVolder def_bool y 209399d5cadfSJiri Bohac 20946af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG 20956af51380SEric DeVolder def_bool y 209699d5cadfSJiri Bohac 20976af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP 20986af51380SEric DeVolder def_bool y 20998e7d8381SVivek Goyal 21006af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP 21016af51380SEric DeVolder def_bool X86_64 || (X86_32 && HIGHMEM) 21028e7d8381SVivek Goyal 2103ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG 2104ea53ad9cSEric DeVolder def_bool y 21053ab83521SHuang Ying 21069c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 210785fcde40SBaoquan He def_bool CRASH_RESERVE 21089c08a2a1SBaoquan He 2109506f1d07SSam Ravnborgconfig PHYSICAL_START 21106a108a14SDavid Rientjes hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 2111ceefccc9SH. Peter Anvin default "0x1000000" 2112a7f7f624SMasahiro Yamada help 2113506f1d07SSam Ravnborg This gives the physical address where the kernel is loaded. 2114506f1d07SSam Ravnborg 211543b1d3e6SChris Koch If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage 211643b1d3e6SChris Koch will decompress itself to above physical address and run from there. 211743b1d3e6SChris Koch Otherwise, bzImage will run from the address where it has been loaded 211843b1d3e6SChris Koch by the boot loader. The only exception is if it is loaded below the 211943b1d3e6SChris Koch above physical address, in which case it will relocate itself there. 2120506f1d07SSam Ravnborg 2121506f1d07SSam Ravnborg In normal kdump cases one does not have to set/change this option 2122506f1d07SSam Ravnborg as now bzImage can be compiled as a completely relocatable image 2123506f1d07SSam Ravnborg (CONFIG_RELOCATABLE=y) and be used to load and run from a different 2124506f1d07SSam Ravnborg address. This option is mainly useful for the folks who don't want 2125506f1d07SSam Ravnborg to use a bzImage for capturing the crash dump and want to use a 2126506f1d07SSam Ravnborg vmlinux instead. vmlinux is not relocatable hence a kernel needs 2127506f1d07SSam Ravnborg to be specifically compiled to run from a specific memory area 2128506f1d07SSam Ravnborg (normally a reserved region) and this option comes handy. 2129506f1d07SSam Ravnborg 2130ceefccc9SH. Peter Anvin So if you are using bzImage for capturing the crash dump, 2131ceefccc9SH. Peter Anvin leave the value here unchanged to 0x1000000 and set 2132ceefccc9SH. Peter Anvin CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux 2133ceefccc9SH. Peter Anvin for capturing the crash dump change this value to start of 2134ceefccc9SH. Peter Anvin the reserved region. In other words, it can be set based on 2135ceefccc9SH. Peter Anvin the "X" value as specified in the "crashkernel=YM@XM" 2136ceefccc9SH. Peter Anvin command line boot parameter passed to the panic-ed 2137330d4810SMauro Carvalho Chehab kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst 2138ceefccc9SH. Peter Anvin for more details about crash dumps. 2139506f1d07SSam Ravnborg 2140506f1d07SSam Ravnborg Usage of bzImage for capturing the crash dump is recommended as 2141506f1d07SSam Ravnborg one does not have to build two kernels. Same kernel can be used 2142506f1d07SSam Ravnborg as production kernel and capture kernel. Above option should have 2143506f1d07SSam Ravnborg gone away after relocatable bzImage support is introduced. But it 2144506f1d07SSam Ravnborg is present because there are users out there who continue to use 2145506f1d07SSam Ravnborg vmlinux for dump capture. This option should go away down the 2146506f1d07SSam Ravnborg line. 2147506f1d07SSam Ravnborg 2148506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2149506f1d07SSam Ravnborg 2150506f1d07SSam Ravnborgconfig RELOCATABLE 215126717808SH. Peter Anvin bool "Build a relocatable kernel" 215226717808SH. Peter Anvin default y 2153a7f7f624SMasahiro Yamada help 2154506f1d07SSam Ravnborg This builds a kernel image that retains relocation information 2155506f1d07SSam Ravnborg so it can be loaded someplace besides the default 1MB. 2156506f1d07SSam Ravnborg The relocations tend to make the kernel binary about 10% larger, 2157506f1d07SSam Ravnborg but are discarded at runtime. 2158506f1d07SSam Ravnborg 2159506f1d07SSam Ravnborg One use is for the kexec on panic case where the recovery kernel 2160506f1d07SSam Ravnborg must live at a different physical address than the primary 2161506f1d07SSam Ravnborg kernel. 2162506f1d07SSam Ravnborg 2163506f1d07SSam Ravnborg Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address 2164506f1d07SSam Ravnborg it has been loaded at and the compile time physical address 21658ab3820fSKees Cook (CONFIG_PHYSICAL_START) is used as the minimum location. 2166506f1d07SSam Ravnborg 21678ab3820fSKees Cookconfig RANDOMIZE_BASE 2168e8581e3dSBaoquan He bool "Randomize the address of the kernel image (KASLR)" 21698ab3820fSKees Cook depends on RELOCATABLE 21706807c846SIngo Molnar default y 2171a7f7f624SMasahiro Yamada help 2172e8581e3dSBaoquan He In support of Kernel Address Space Layout Randomization (KASLR), 2173e8581e3dSBaoquan He this randomizes the physical address at which the kernel image 2174e8581e3dSBaoquan He is decompressed and the virtual address where the kernel 2175e8581e3dSBaoquan He image is mapped, as a security feature that deters exploit 2176e8581e3dSBaoquan He attempts relying on knowledge of the location of kernel 2177e8581e3dSBaoquan He code internals. 2178e8581e3dSBaoquan He 2179ed9f007eSKees Cook On 64-bit, the kernel physical and virtual addresses are 2180ed9f007eSKees Cook randomized separately. The physical address will be anywhere 2181ed9f007eSKees Cook between 16MB and the top of physical memory (up to 64TB). The 2182ed9f007eSKees Cook virtual address will be randomized from 16MB up to 1GB (9 bits 2183ed9f007eSKees Cook of entropy). Note that this also reduces the memory space 2184ed9f007eSKees Cook available to kernel modules from 1.5GB to 1GB. 2185ed9f007eSKees Cook 2186ed9f007eSKees Cook On 32-bit, the kernel physical and virtual addresses are 2187ed9f007eSKees Cook randomized together. They will be randomized from 16MB up to 2188ed9f007eSKees Cook 512MB (8 bits of entropy). 21898ab3820fSKees Cook 2190a653f356SKees Cook Entropy is generated using the RDRAND instruction if it is 2191e8581e3dSBaoquan He supported. If RDTSC is supported, its value is mixed into 2192e8581e3dSBaoquan He the entropy pool as well. If neither RDRAND nor RDTSC are 2193ed9f007eSKees Cook supported, then entropy is read from the i8254 timer. The 2194ed9f007eSKees Cook usable entropy is limited by the kernel being built using 2195ed9f007eSKees Cook 2GB addressing, and that PHYSICAL_ALIGN must be at a 2196ed9f007eSKees Cook minimum of 2MB. As a result, only 10 bits of entropy are 2197ed9f007eSKees Cook theoretically possible, but the implementations are further 2198ed9f007eSKees Cook limited due to memory layouts. 2199e8581e3dSBaoquan He 22006807c846SIngo Molnar If unsure, say Y. 2201da2b6fb9SKees Cook 22028ab3820fSKees Cook# Relocation on x86 needs some additional build support 2203845adf72SH. Peter Anvinconfig X86_NEED_RELOCS 2204845adf72SH. Peter Anvin def_bool y 22058ab3820fSKees Cook depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE) 2206845adf72SH. Peter Anvin 2207506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN 2208a0215061SKees Cook hex "Alignment value to which kernel should be aligned" 22098ab3820fSKees Cook default "0x200000" 2210a0215061SKees Cook range 0x2000 0x1000000 if X86_32 2211a0215061SKees Cook range 0x200000 0x1000000 if X86_64 2212a7f7f624SMasahiro Yamada help 2213506f1d07SSam Ravnborg This value puts the alignment restrictions on physical address 2214506f1d07SSam Ravnborg where kernel is loaded and run from. Kernel is compiled for an 2215506f1d07SSam Ravnborg address which meets above alignment restriction. 2216506f1d07SSam Ravnborg 2217506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2218506f1d07SSam Ravnborg CONFIG_RELOCATABLE is set, kernel will move itself to nearest 2219506f1d07SSam Ravnborg address aligned to above value and run from there. 2220506f1d07SSam Ravnborg 2221506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2222506f1d07SSam Ravnborg CONFIG_RELOCATABLE is not set, kernel will ignore the run time 2223506f1d07SSam Ravnborg load address and decompress itself to the address it has been 2224506f1d07SSam Ravnborg compiled for and run from there. The address for which kernel is 2225506f1d07SSam Ravnborg compiled already meets above alignment restrictions. Hence the 2226506f1d07SSam Ravnborg end result is that kernel runs from a physical address meeting 2227506f1d07SSam Ravnborg above alignment restrictions. 2228506f1d07SSam Ravnborg 2229a0215061SKees Cook On 32-bit this value must be a multiple of 0x2000. On 64-bit 2230a0215061SKees Cook this value must be a multiple of 0x200000. 2231a0215061SKees Cook 2232506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2233506f1d07SSam Ravnborg 2234eedb92abSKirill A. Shutemovconfig DYNAMIC_MEMORY_LAYOUT 2235eedb92abSKirill A. Shutemov bool 2236a7f7f624SMasahiro Yamada help 2237eedb92abSKirill A. Shutemov This option makes base addresses of vmalloc and vmemmap as well as 2238eedb92abSKirill A. Shutemov __PAGE_OFFSET movable during boot. 2239eedb92abSKirill A. Shutemov 22400483e1faSThomas Garnierconfig RANDOMIZE_MEMORY 22410483e1faSThomas Garnier bool "Randomize the kernel memory sections" 22420483e1faSThomas Garnier depends on X86_64 22430483e1faSThomas Garnier depends on RANDOMIZE_BASE 2244eedb92abSKirill A. Shutemov select DYNAMIC_MEMORY_LAYOUT 22450483e1faSThomas Garnier default RANDOMIZE_BASE 2246a7f7f624SMasahiro Yamada help 22470483e1faSThomas Garnier Randomizes the base virtual address of kernel memory sections 22480483e1faSThomas Garnier (physical memory mapping, vmalloc & vmemmap). This security feature 22490483e1faSThomas Garnier makes exploits relying on predictable memory locations less reliable. 22500483e1faSThomas Garnier 22510483e1faSThomas Garnier The order of allocations remains unchanged. Entropy is generated in 22520483e1faSThomas Garnier the same way as RANDOMIZE_BASE. Current implementation in the optimal 22530483e1faSThomas Garnier configuration have in average 30,000 different possible virtual 22540483e1faSThomas Garnier addresses for each memory section. 22550483e1faSThomas Garnier 22566807c846SIngo Molnar If unsure, say Y. 22570483e1faSThomas Garnier 225890397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING 225990397a41SThomas Garnier hex "Physical memory mapping padding" if EXPERT 226090397a41SThomas Garnier depends on RANDOMIZE_MEMORY 226190397a41SThomas Garnier default "0xa" if MEMORY_HOTPLUG 226290397a41SThomas Garnier default "0x0" 226390397a41SThomas Garnier range 0x1 0x40 if MEMORY_HOTPLUG 226490397a41SThomas Garnier range 0x0 0x40 2265a7f7f624SMasahiro Yamada help 226690397a41SThomas Garnier Define the padding in terabytes added to the existing physical 226790397a41SThomas Garnier memory size during kernel memory randomization. It is useful 226890397a41SThomas Garnier for memory hotplug support but reduces the entropy available for 226990397a41SThomas Garnier address randomization. 227090397a41SThomas Garnier 227190397a41SThomas Garnier If unsure, leave at the default value. 227290397a41SThomas Garnier 22736449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING 22746449dcb0SKirill A. Shutemov bool "Linear Address Masking support" 22756449dcb0SKirill A. Shutemov depends on X86_64 22766449dcb0SKirill A. Shutemov help 22776449dcb0SKirill A. Shutemov Linear Address Masking (LAM) modifies the checking that is applied 22786449dcb0SKirill A. Shutemov to 64-bit linear addresses, allowing software to use of the 22796449dcb0SKirill A. Shutemov untranslated address bits for metadata. 22806449dcb0SKirill A. Shutemov 22816449dcb0SKirill A. Shutemov The capability can be used for efficient address sanitizers (ASAN) 22826449dcb0SKirill A. Shutemov implementation and for optimizations in JITs. 22836449dcb0SKirill A. Shutemov 2284506f1d07SSam Ravnborgconfig HOTPLUG_CPU 2285bebd024eSThomas Gleixner def_bool y 228640b31360SStephen Rothwell depends on SMP 2287506f1d07SSam Ravnborg 2288506f1d07SSam Ravnborgconfig COMPAT_VDSO 2289b0b49f26SAndy Lutomirski def_bool n 2290b0b49f26SAndy Lutomirski prompt "Disable the 32-bit vDSO (needed for glibc 2.3.3)" 2291953fee1dSIngo Molnar depends on COMPAT_32 2292a7f7f624SMasahiro Yamada help 2293b0b49f26SAndy Lutomirski Certain buggy versions of glibc will crash if they are 2294b0b49f26SAndy Lutomirski presented with a 32-bit vDSO that is not mapped at the address 2295b0b49f26SAndy Lutomirski indicated in its segment table. 2296e84446deSRandy Dunlap 2297b0b49f26SAndy Lutomirski The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a 2298b0b49f26SAndy Lutomirski and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and 2299b0b49f26SAndy Lutomirski 49ad572a70b8aeb91e57483a11dd1b77e31c4468. Glibc 2.3.3 is 2300b0b49f26SAndy Lutomirski the only released version with the bug, but OpenSUSE 9 2301b0b49f26SAndy Lutomirski contains a buggy "glibc 2.3.2". 2302506f1d07SSam Ravnborg 2303b0b49f26SAndy Lutomirski The symptom of the bug is that everything crashes on startup, saying: 2304b0b49f26SAndy Lutomirski dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed! 2305b0b49f26SAndy Lutomirski 2306b0b49f26SAndy Lutomirski Saying Y here changes the default value of the vdso32 boot 2307b0b49f26SAndy Lutomirski option from 1 to 0, which turns off the 32-bit vDSO entirely. 2308b0b49f26SAndy Lutomirski This works around the glibc bug but hurts performance. 2309b0b49f26SAndy Lutomirski 2310b0b49f26SAndy Lutomirski If unsure, say N: if you are compiling your own kernel, you 2311b0b49f26SAndy Lutomirski are unlikely to be using a buggy version of glibc. 2312506f1d07SSam Ravnborg 23133dc33bd3SKees Cookchoice 23143dc33bd3SKees Cook prompt "vsyscall table for legacy applications" 23153dc33bd3SKees Cook depends on X86_64 2316625b7b7fSAndy Lutomirski default LEGACY_VSYSCALL_XONLY 23173dc33bd3SKees Cook help 23183dc33bd3SKees Cook Legacy user code that does not know how to find the vDSO expects 23193dc33bd3SKees Cook to be able to issue three syscalls by calling fixed addresses in 23203dc33bd3SKees Cook kernel space. Since this location is not randomized with ASLR, 23213dc33bd3SKees Cook it can be used to assist security vulnerability exploitation. 23223dc33bd3SKees Cook 23233dc33bd3SKees Cook This setting can be changed at boot time via the kernel command 2324bf00745eSAndy Lutomirski line parameter vsyscall=[emulate|xonly|none]. Emulate mode 2325bf00745eSAndy Lutomirski is deprecated and can only be enabled using the kernel command 2326bf00745eSAndy Lutomirski line. 23273dc33bd3SKees Cook 23283dc33bd3SKees Cook On a system with recent enough glibc (2.14 or newer) and no 23293dc33bd3SKees Cook static binaries, you can say None without a performance penalty 23303dc33bd3SKees Cook to improve security. 23313dc33bd3SKees Cook 2332bd49e16eSAndy Lutomirski If unsure, select "Emulate execution only". 23333dc33bd3SKees Cook 2334bd49e16eSAndy Lutomirski config LEGACY_VSYSCALL_XONLY 2335bd49e16eSAndy Lutomirski bool "Emulate execution only" 2336bd49e16eSAndy Lutomirski help 2337bd49e16eSAndy Lutomirski The kernel traps and emulates calls into the fixed vsyscall 2338bd49e16eSAndy Lutomirski address mapping and does not allow reads. This 2339bd49e16eSAndy Lutomirski configuration is recommended when userspace might use the 2340bd49e16eSAndy Lutomirski legacy vsyscall area but support for legacy binary 2341bd49e16eSAndy Lutomirski instrumentation of legacy code is not needed. It mitigates 2342bd49e16eSAndy Lutomirski certain uses of the vsyscall area as an ASLR-bypassing 2343bd49e16eSAndy Lutomirski buffer. 23443dc33bd3SKees Cook 23453dc33bd3SKees Cook config LEGACY_VSYSCALL_NONE 23463dc33bd3SKees Cook bool "None" 23473dc33bd3SKees Cook help 23483dc33bd3SKees Cook There will be no vsyscall mapping at all. This will 23493dc33bd3SKees Cook eliminate any risk of ASLR bypass due to the vsyscall 23503dc33bd3SKees Cook fixed address mapping. Attempts to use the vsyscalls 23513dc33bd3SKees Cook will be reported to dmesg, so that either old or 23523dc33bd3SKees Cook malicious userspace programs can be identified. 23533dc33bd3SKees Cook 23543dc33bd3SKees Cookendchoice 23553dc33bd3SKees Cook 2356516cbf37STim Birdconfig CMDLINE_BOOL 2357516cbf37STim Bird bool "Built-in kernel command line" 2358a7f7f624SMasahiro Yamada help 2359516cbf37STim Bird Allow for specifying boot arguments to the kernel at 2360516cbf37STim Bird build time. On some systems (e.g. embedded ones), it is 2361516cbf37STim Bird necessary or convenient to provide some or all of the 2362516cbf37STim Bird kernel boot arguments with the kernel itself (that is, 2363516cbf37STim Bird to not rely on the boot loader to provide them.) 2364516cbf37STim Bird 2365516cbf37STim Bird To compile command line arguments into the kernel, 2366516cbf37STim Bird set this option to 'Y', then fill in the 236769711ca1SSébastien Hinderer boot arguments in CONFIG_CMDLINE. 2368516cbf37STim Bird 2369516cbf37STim Bird Systems with fully functional boot loaders (i.e. non-embedded) 2370516cbf37STim Bird should leave this option set to 'N'. 2371516cbf37STim Bird 2372516cbf37STim Birdconfig CMDLINE 2373516cbf37STim Bird string "Built-in kernel command string" 2374516cbf37STim Bird depends on CMDLINE_BOOL 2375516cbf37STim Bird default "" 2376a7f7f624SMasahiro Yamada help 2377516cbf37STim Bird Enter arguments here that should be compiled into the kernel 2378516cbf37STim Bird image and used at boot time. If the boot loader provides a 2379516cbf37STim Bird command line at boot time, it is appended to this string to 2380516cbf37STim Bird form the full kernel command line, when the system boots. 2381516cbf37STim Bird 2382516cbf37STim Bird However, you can use the CONFIG_CMDLINE_OVERRIDE option to 2383516cbf37STim Bird change this behavior. 2384516cbf37STim Bird 2385516cbf37STim Bird In most cases, the command line (whether built-in or provided 2386516cbf37STim Bird by the boot loader) should specify the device for the root 2387516cbf37STim Bird file system. 2388516cbf37STim Bird 2389516cbf37STim Birdconfig CMDLINE_OVERRIDE 2390516cbf37STim Bird bool "Built-in command line overrides boot loader arguments" 2391645e6466SAnders Roxell depends on CMDLINE_BOOL && CMDLINE != "" 2392a7f7f624SMasahiro Yamada help 2393516cbf37STim Bird Set this option to 'Y' to have the kernel ignore the boot loader 2394516cbf37STim Bird command line, and use ONLY the built-in command line. 2395516cbf37STim Bird 2396516cbf37STim Bird This is used to work around broken boot loaders. This should 2397516cbf37STim Bird be set to 'N' under normal conditions. 2398516cbf37STim Bird 2399a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL 2400a5b9e5a2SAndy Lutomirski bool "Enable the LDT (local descriptor table)" if EXPERT 2401a5b9e5a2SAndy Lutomirski default y 2402a7f7f624SMasahiro Yamada help 2403a5b9e5a2SAndy Lutomirski Linux can allow user programs to install a per-process x86 2404a5b9e5a2SAndy Lutomirski Local Descriptor Table (LDT) using the modify_ldt(2) system 2405a5b9e5a2SAndy Lutomirski call. This is required to run 16-bit or segmented code such as 2406a5b9e5a2SAndy Lutomirski DOSEMU or some Wine programs. It is also used by some very old 2407a5b9e5a2SAndy Lutomirski threading libraries. 2408a5b9e5a2SAndy Lutomirski 2409a5b9e5a2SAndy Lutomirski Enabling this feature adds a small amount of overhead to 2410a5b9e5a2SAndy Lutomirski context switches and increases the low-level kernel attack 2411a5b9e5a2SAndy Lutomirski surface. Disabling it removes the modify_ldt(2) system call. 2412a5b9e5a2SAndy Lutomirski 2413a5b9e5a2SAndy Lutomirski Saying 'N' here may make sense for embedded or server kernels. 2414a5b9e5a2SAndy Lutomirski 24153aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE 24163aac3ebeSThomas Gleixner bool "Enforce strict size checking for sigaltstack" 24173aac3ebeSThomas Gleixner depends on DYNAMIC_SIGFRAME 24183aac3ebeSThomas Gleixner help 24193aac3ebeSThomas Gleixner For historical reasons MINSIGSTKSZ is a constant which became 24203aac3ebeSThomas Gleixner already too small with AVX512 support. Add a mechanism to 24213aac3ebeSThomas Gleixner enforce strict checking of the sigaltstack size against the 24223aac3ebeSThomas Gleixner real size of the FPU frame. This option enables the check 24233aac3ebeSThomas Gleixner by default. It can also be controlled via the kernel command 24243aac3ebeSThomas Gleixner line option 'strict_sas_size' independent of this config 24253aac3ebeSThomas Gleixner switch. Enabling it might break existing applications which 24263aac3ebeSThomas Gleixner allocate a too small sigaltstack but 'work' because they 24273aac3ebeSThomas Gleixner never get a signal delivered. 24283aac3ebeSThomas Gleixner 24293aac3ebeSThomas Gleixner Say 'N' unless you want to really enforce this check. 24303aac3ebeSThomas Gleixner 2431b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig" 2432b700e7f0SSeth Jennings 2433506f1d07SSam Ravnborgendmenu 2434506f1d07SSam Ravnborg 24351ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS 24361ca3683cSUros Bizjak def_bool CC_IS_GCC && GCC_VERSION >= 120100 24371ca3683cSUros Bizjak 24381ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT 24391ca3683cSUros Bizjak def_bool y 2440e29aad08SUros Bizjak depends on CC_HAS_NAMED_AS 2441e29aad08SUros Bizjak # 2442e29aad08SUros Bizjak # -fsanitize=kernel-address (KASAN) is at the moment incompatible 2443e29aad08SUros Bizjak # with named address spaces - see GCC PR sanitizer/111736. 2444e29aad08SUros Bizjak # 2445e29aad08SUros Bizjak depends on !KASAN 24461ca3683cSUros Bizjak 2447f43b9876SPeter Zijlstraconfig CC_HAS_SLS 2448f43b9876SPeter Zijlstra def_bool $(cc-option,-mharden-sls=all) 2449f43b9876SPeter Zijlstra 2450f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK 2451f43b9876SPeter Zijlstra def_bool $(cc-option,-mfunction-return=thunk-extern) 2452f43b9876SPeter Zijlstra 2453bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING 2454bea75b33SThomas Gleixner def_bool $(cc-option,-fpatchable-function-entry=16,16) 2455bea75b33SThomas Gleixner 2456bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI 2457bea75b33SThomas Gleixner int 2458bea75b33SThomas Gleixner default 59 if FUNCTION_ALIGNMENT_64B 2459bea75b33SThomas Gleixner default 27 if FUNCTION_ALIGNMENT_32B 2460bea75b33SThomas Gleixner default 11 if FUNCTION_ALIGNMENT_16B 2461bea75b33SThomas Gleixner default 3 if FUNCTION_ALIGNMENT_8B 2462bea75b33SThomas Gleixner default 0 2463bea75b33SThomas Gleixner 2464bea75b33SThomas Gleixner# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG 2465bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/ 2466bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES 2467bea75b33SThomas Gleixner int 2468bea75b33SThomas Gleixner default FUNCTION_PADDING_CFI if CFI_CLANG 2469bea75b33SThomas Gleixner default FUNCTION_ALIGNMENT 2470bea75b33SThomas Gleixner 2471931ab636SPeter Zijlstraconfig CALL_PADDING 2472931ab636SPeter Zijlstra def_bool n 2473931ab636SPeter Zijlstra depends on CC_HAS_ENTRY_PADDING && OBJTOOL 2474931ab636SPeter Zijlstra select FUNCTION_ALIGNMENT_16B 2475931ab636SPeter Zijlstra 2476931ab636SPeter Zijlstraconfig FINEIBT 2477931ab636SPeter Zijlstra def_bool y 2478aefb2f2eSBreno Leitao depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE 2479931ab636SPeter Zijlstra select CALL_PADDING 2480931ab636SPeter Zijlstra 24818f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS 24828f7c0d8bSThomas Gleixner def_bool y 24830911b8c5SBreno Leitao depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL 24848f7c0d8bSThomas Gleixner 24858f7c0d8bSThomas Gleixnerconfig CALL_THUNKS 24868f7c0d8bSThomas Gleixner def_bool n 2487931ab636SPeter Zijlstra select CALL_PADDING 24888f7c0d8bSThomas Gleixner 2489b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS 2490b341b20dSPeter Zijlstra def_bool y 2491931ab636SPeter Zijlstra depends on CALL_PADDING && !CFI_CLANG 2492b341b20dSPeter Zijlstra 2493f43b9876SPeter Zijlstramenuconfig SPECULATION_MITIGATIONS 2494f43b9876SPeter Zijlstra bool "Mitigations for speculative execution vulnerabilities" 2495f43b9876SPeter Zijlstra default y 2496f43b9876SPeter Zijlstra help 2497f43b9876SPeter Zijlstra Say Y here to enable options which enable mitigations for 2498f43b9876SPeter Zijlstra speculative execution hardware vulnerabilities. 2499f43b9876SPeter Zijlstra 2500f43b9876SPeter Zijlstra If you say N, all mitigations will be disabled. You really 2501f43b9876SPeter Zijlstra should know what you are doing to say so. 2502f43b9876SPeter Zijlstra 2503f43b9876SPeter Zijlstraif SPECULATION_MITIGATIONS 2504f43b9876SPeter Zijlstra 2505ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION 2506f43b9876SPeter Zijlstra bool "Remove the kernel mapping in user mode" 2507f43b9876SPeter Zijlstra default y 2508f43b9876SPeter Zijlstra depends on (X86_64 || X86_PAE) 2509f43b9876SPeter Zijlstra help 2510f43b9876SPeter Zijlstra This feature reduces the number of hardware side channels by 2511f43b9876SPeter Zijlstra ensuring that the majority of kernel addresses are not mapped 2512f43b9876SPeter Zijlstra into userspace. 2513f43b9876SPeter Zijlstra 2514ff61f079SJonathan Corbet See Documentation/arch/x86/pti.rst for more details. 2515f43b9876SPeter Zijlstra 2516aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE 2517f43b9876SPeter Zijlstra bool "Avoid speculative indirect branches in kernel" 2518f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2519f43b9876SPeter Zijlstra default y 2520f43b9876SPeter Zijlstra help 2521f43b9876SPeter Zijlstra Compile kernel with the retpoline compiler options to guard against 2522f43b9876SPeter Zijlstra kernel-to-user data leaks by avoiding speculative indirect 2523f43b9876SPeter Zijlstra branches. Requires a compiler with -mindirect-branch=thunk-extern 2524f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2525f43b9876SPeter Zijlstra 25260911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK 2527f43b9876SPeter Zijlstra bool "Enable return-thunks" 2528aefb2f2eSBreno Leitao depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK 2529f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2530b648ab48SBen Hutchings default y if X86_64 2531f43b9876SPeter Zijlstra help 2532f43b9876SPeter Zijlstra Compile the kernel with the return-thunks compiler option to guard 2533f43b9876SPeter Zijlstra against kernel-to-user data leaks by avoiding return speculation. 2534f43b9876SPeter Zijlstra Requires a compiler with -mfunction-return=thunk-extern 2535f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2536f43b9876SPeter Zijlstra 2537ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY 2538f43b9876SPeter Zijlstra bool "Enable UNRET on kernel entry" 25390911b8c5SBreno Leitao depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64 2540f43b9876SPeter Zijlstra default y 2541f43b9876SPeter Zijlstra help 2542f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=unret mitigation. 2543f43b9876SPeter Zijlstra 25445fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING 254580e4c1cdSThomas Gleixner bool "Mitigate RSB underflow with call depth tracking" 254680e4c1cdSThomas Gleixner depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS 254780e4c1cdSThomas Gleixner select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 254880e4c1cdSThomas Gleixner select CALL_THUNKS 254980e4c1cdSThomas Gleixner default y 255080e4c1cdSThomas Gleixner help 255180e4c1cdSThomas Gleixner Compile the kernel with call depth tracking to mitigate the Intel 255280e4c1cdSThomas Gleixner SKL Return-Speculation-Buffer (RSB) underflow issue. The 255380e4c1cdSThomas Gleixner mitigation is off by default and needs to be enabled on the 255480e4c1cdSThomas Gleixner kernel command line via the retbleed=stuff option. For 255580e4c1cdSThomas Gleixner non-affected systems the overhead of this option is marginal as 255680e4c1cdSThomas Gleixner the call depth tracking is using run-time generated call thunks 255780e4c1cdSThomas Gleixner in a compiler generated padding area and call patching. This 255880e4c1cdSThomas Gleixner increases text size by ~5%. For non affected systems this space 255980e4c1cdSThomas Gleixner is unused. On affected SKL systems this results in a significant 256080e4c1cdSThomas Gleixner performance gain over the IBRS mitigation. 256180e4c1cdSThomas Gleixner 2562e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG 2563e81dc127SThomas Gleixner bool "Enable call thunks and call depth tracking debugging" 25645fa31af3SBreno Leitao depends on MITIGATION_CALL_DEPTH_TRACKING 2565e81dc127SThomas Gleixner select FUNCTION_ALIGNMENT_32B 2566e81dc127SThomas Gleixner default n 2567e81dc127SThomas Gleixner help 2568e81dc127SThomas Gleixner Enable call/ret counters for imbalance detection and build in 2569e81dc127SThomas Gleixner a noisy dmesg about callthunks generation and call patching for 2570e81dc127SThomas Gleixner trouble shooting. The debug prints need to be enabled on the 2571e81dc127SThomas Gleixner kernel command line with 'debug-callthunks'. 257254628de6SRandy Dunlap Only enable this when you are debugging call thunks as this 257354628de6SRandy Dunlap creates a noticeable runtime overhead. If unsure say N. 257480e4c1cdSThomas Gleixner 2575e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY 2576f43b9876SPeter Zijlstra bool "Enable IBPB on kernel entry" 2577b648ab48SBen Hutchings depends on CPU_SUP_AMD && X86_64 2578f43b9876SPeter Zijlstra default y 2579f43b9876SPeter Zijlstra help 2580f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=ibpb mitigation. 2581f43b9876SPeter Zijlstra 25821da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY 2583f43b9876SPeter Zijlstra bool "Enable IBRS on kernel entry" 2584b648ab48SBen Hutchings depends on CPU_SUP_INTEL && X86_64 2585f43b9876SPeter Zijlstra default y 2586f43b9876SPeter Zijlstra help 2587f43b9876SPeter Zijlstra Compile the kernel with support for the spectre_v2=ibrs mitigation. 2588f43b9876SPeter Zijlstra This mitigates both spectre_v2 and retbleed at great cost to 2589f43b9876SPeter Zijlstra performance. 2590f43b9876SPeter Zijlstra 2591a033eec9SBreno Leitaoconfig MITIGATION_SRSO 2592fb3bd914SBorislav Petkov (AMD) bool "Mitigate speculative RAS overflow on AMD" 25930911b8c5SBreno Leitao depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK 2594fb3bd914SBorislav Petkov (AMD) default y 2595fb3bd914SBorislav Petkov (AMD) help 2596fb3bd914SBorislav Petkov (AMD) Enable the SRSO mitigation needed on AMD Zen1-4 machines. 2597fb3bd914SBorislav Petkov (AMD) 25987b75782fSBreno Leitaoconfig MITIGATION_SLS 2599f43b9876SPeter Zijlstra bool "Mitigate Straight-Line-Speculation" 2600f43b9876SPeter Zijlstra depends on CC_HAS_SLS && X86_64 2601f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2602f43b9876SPeter Zijlstra default n 2603f43b9876SPeter Zijlstra help 2604f43b9876SPeter Zijlstra Compile the kernel with straight-line-speculation options to guard 2605f43b9876SPeter Zijlstra against straight line speculation. The kernel image might be slightly 2606f43b9876SPeter Zijlstra larger. 2607f43b9876SPeter Zijlstra 2608be83e809SBreno Leitaoconfig MITIGATION_GDS_FORCE 260953cf5797SDaniel Sneddon bool "Force GDS Mitigation" 261053cf5797SDaniel Sneddon depends on CPU_SUP_INTEL 261153cf5797SDaniel Sneddon default n 261253cf5797SDaniel Sneddon help 261353cf5797SDaniel Sneddon Gather Data Sampling (GDS) is a hardware vulnerability which allows 261453cf5797SDaniel Sneddon unprivileged speculative access to data which was previously stored in 261553cf5797SDaniel Sneddon vector registers. 261653cf5797SDaniel Sneddon 261753cf5797SDaniel Sneddon This option is equivalent to setting gather_data_sampling=force on the 261853cf5797SDaniel Sneddon command line. The microcode mitigation is used if present, otherwise 261953cf5797SDaniel Sneddon AVX is disabled as a mitigation. On affected systems that are missing 262053cf5797SDaniel Sneddon the microcode any userspace code that unconditionally uses AVX will 262153cf5797SDaniel Sneddon break with this option set. 262253cf5797SDaniel Sneddon 262353cf5797SDaniel Sneddon Setting this option on systems not vulnerable to GDS has no effect. 262453cf5797SDaniel Sneddon 262553cf5797SDaniel Sneddon If in doubt, say N. 262653cf5797SDaniel Sneddon 26278076fcdeSPawan Guptaconfig MITIGATION_RFDS 26288076fcdeSPawan Gupta bool "RFDS Mitigation" 26298076fcdeSPawan Gupta depends on CPU_SUP_INTEL 26308076fcdeSPawan Gupta default y 26318076fcdeSPawan Gupta help 26328076fcdeSPawan Gupta Enable mitigation for Register File Data Sampling (RFDS) by default. 26338076fcdeSPawan Gupta RFDS is a hardware vulnerability which affects Intel Atom CPUs. It 26348076fcdeSPawan Gupta allows unprivileged speculative access to stale data previously 26358076fcdeSPawan Gupta stored in floating point, vector and integer registers. 26368076fcdeSPawan Gupta See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst> 26378076fcdeSPawan Gupta 2638f43b9876SPeter Zijlstraendif 2639f43b9876SPeter Zijlstra 26403072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES 26413072e413SMichal Hocko def_bool y 26425c11f00bSDavid Hildenbrand depends on ARCH_ENABLE_MEMORY_HOTPLUG 26433072e413SMichal Hocko 2644da85f865SBjorn Helgaasmenu "Power management and ACPI options" 2645e279b6c1SSam Ravnborg 2646e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER 26473c2362e6SHarvey Harrison def_bool y 264844556530SZhimin Gu depends on HIBERNATION 2649e279b6c1SSam Ravnborg 2650e279b6c1SSam Ravnborgsource "kernel/power/Kconfig" 2651e279b6c1SSam Ravnborg 2652e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig" 2653e279b6c1SSam Ravnborg 2654a6b68076SAndi Kleenconfig X86_APM_BOOT 26556fc108a0SJan Beulich def_bool y 2656282e5aabSPaul Bolle depends on APM 2657a6b68076SAndi Kleen 2658e279b6c1SSam Ravnborgmenuconfig APM 2659e279b6c1SSam Ravnborg tristate "APM (Advanced Power Management) BIOS support" 2660efefa6f6SIngo Molnar depends on X86_32 && PM_SLEEP 2661a7f7f624SMasahiro Yamada help 2662e279b6c1SSam Ravnborg APM is a BIOS specification for saving power using several different 2663e279b6c1SSam Ravnborg techniques. This is mostly useful for battery powered laptops with 2664e279b6c1SSam Ravnborg APM compliant BIOSes. If you say Y here, the system time will be 2665e279b6c1SSam Ravnborg reset after a RESUME operation, the /proc/apm device will provide 2666e279b6c1SSam Ravnborg battery status information, and user-space programs will receive 2667e279b6c1SSam Ravnborg notification of APM "events" (e.g. battery status change). 2668e279b6c1SSam Ravnborg 2669e279b6c1SSam Ravnborg If you select "Y" here, you can disable actual use of the APM 2670e279b6c1SSam Ravnborg BIOS by passing the "apm=off" option to the kernel at boot time. 2671e279b6c1SSam Ravnborg 2672e279b6c1SSam Ravnborg Note that the APM support is almost completely disabled for 2673e279b6c1SSam Ravnborg machines with more than one CPU. 2674e279b6c1SSam Ravnborg 2675e279b6c1SSam Ravnborg In order to use APM, you will need supporting software. For location 2676151f4e2bSMauro Carvalho Chehab and more information, read <file:Documentation/power/apm-acpi.rst> 26772dc98fd3SMichael Witten and the Battery Powered Linux mini-HOWTO, available from 2678e279b6c1SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 2679e279b6c1SSam Ravnborg 2680e279b6c1SSam Ravnborg This driver does not spin down disk drives (see the hdparm(8) 2681e279b6c1SSam Ravnborg manpage ("man 8 hdparm") for that), and it doesn't turn off 2682e279b6c1SSam Ravnborg VESA-compliant "green" monitors. 2683e279b6c1SSam Ravnborg 2684e279b6c1SSam Ravnborg This driver does not support the TI 4000M TravelMate and the ACER 2685e279b6c1SSam Ravnborg 486/DX4/75 because they don't have compliant BIOSes. Many "green" 2686e279b6c1SSam Ravnborg desktop machines also don't have compliant BIOSes, and this driver 2687e279b6c1SSam Ravnborg may cause those machines to panic during the boot phase. 2688e279b6c1SSam Ravnborg 2689e279b6c1SSam Ravnborg Generally, if you don't have a battery in your machine, there isn't 2690e279b6c1SSam Ravnborg much point in using this driver and you should say N. If you get 2691e279b6c1SSam Ravnborg random kernel OOPSes or reboots that don't seem to be related to 2692e279b6c1SSam Ravnborg anything, try disabling/enabling this option (or disabling/enabling 2693e279b6c1SSam Ravnborg APM in your BIOS). 2694e279b6c1SSam Ravnborg 2695e279b6c1SSam Ravnborg Some other things you should try when experiencing seemingly random, 2696e279b6c1SSam Ravnborg "weird" problems: 2697e279b6c1SSam Ravnborg 2698e279b6c1SSam Ravnborg 1) make sure that you have enough swap space and that it is 2699e279b6c1SSam Ravnborg enabled. 27007987448fSStephen Kitt 2) pass the "idle=poll" option to the kernel 2701e279b6c1SSam Ravnborg 3) switch on floating point emulation in the kernel and pass 2702e279b6c1SSam Ravnborg the "no387" option to the kernel 2703e279b6c1SSam Ravnborg 4) pass the "floppy=nodma" option to the kernel 2704e279b6c1SSam Ravnborg 5) pass the "mem=4M" option to the kernel (thereby disabling 2705e279b6c1SSam Ravnborg all but the first 4 MB of RAM) 2706e279b6c1SSam Ravnborg 6) make sure that the CPU is not over clocked. 2707e279b6c1SSam Ravnborg 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/> 2708e279b6c1SSam Ravnborg 8) disable the cache from your BIOS settings 2709e279b6c1SSam Ravnborg 9) install a fan for the video card or exchange video RAM 2710e279b6c1SSam Ravnborg 10) install a better fan for the CPU 2711e279b6c1SSam Ravnborg 11) exchange RAM chips 2712e279b6c1SSam Ravnborg 12) exchange the motherboard. 2713e279b6c1SSam Ravnborg 2714e279b6c1SSam Ravnborg To compile this driver as a module, choose M here: the 2715e279b6c1SSam Ravnborg module will be called apm. 2716e279b6c1SSam Ravnborg 2717e279b6c1SSam Ravnborgif APM 2718e279b6c1SSam Ravnborg 2719e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND 2720e279b6c1SSam Ravnborg bool "Ignore USER SUSPEND" 2721a7f7f624SMasahiro Yamada help 2722e279b6c1SSam Ravnborg This option will ignore USER SUSPEND requests. On machines with a 2723e279b6c1SSam Ravnborg compliant APM BIOS, you want to say N. However, on the NEC Versa M 2724e279b6c1SSam Ravnborg series notebooks, it is necessary to say Y because of a BIOS bug. 2725e279b6c1SSam Ravnborg 2726e279b6c1SSam Ravnborgconfig APM_DO_ENABLE 2727e279b6c1SSam Ravnborg bool "Enable PM at boot time" 2728a7f7f624SMasahiro Yamada help 2729e279b6c1SSam Ravnborg Enable APM features at boot time. From page 36 of the APM BIOS 2730e279b6c1SSam Ravnborg specification: "When disabled, the APM BIOS does not automatically 2731e279b6c1SSam Ravnborg power manage devices, enter the Standby State, enter the Suspend 2732e279b6c1SSam Ravnborg State, or take power saving steps in response to CPU Idle calls." 2733e279b6c1SSam Ravnborg This driver will make CPU Idle calls when Linux is idle (unless this 2734e279b6c1SSam Ravnborg feature is turned off -- see "Do CPU IDLE calls", below). This 2735e279b6c1SSam Ravnborg should always save battery power, but more complicated APM features 2736e279b6c1SSam Ravnborg will be dependent on your BIOS implementation. You may need to turn 2737e279b6c1SSam Ravnborg this option off if your computer hangs at boot time when using APM 2738e279b6c1SSam Ravnborg support, or if it beeps continuously instead of suspending. Turn 2739e279b6c1SSam Ravnborg this off if you have a NEC UltraLite Versa 33/C or a Toshiba 2740e279b6c1SSam Ravnborg T400CDT. This is off by default since most machines do fine without 2741e279b6c1SSam Ravnborg this feature. 2742e279b6c1SSam Ravnborg 2743e279b6c1SSam Ravnborgconfig APM_CPU_IDLE 2744dd8af076SLen Brown depends on CPU_IDLE 2745e279b6c1SSam Ravnborg bool "Make CPU Idle calls when idle" 2746a7f7f624SMasahiro Yamada help 2747e279b6c1SSam Ravnborg Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. 2748e279b6c1SSam Ravnborg On some machines, this can activate improved power savings, such as 2749e279b6c1SSam Ravnborg a slowed CPU clock rate, when the machine is idle. These idle calls 2750e279b6c1SSam Ravnborg are made after the idle loop has run for some length of time (e.g., 2751e279b6c1SSam Ravnborg 333 mS). On some machines, this will cause a hang at boot time or 2752e279b6c1SSam Ravnborg whenever the CPU becomes idle. (On machines with more than one CPU, 2753e279b6c1SSam Ravnborg this option does nothing.) 2754e279b6c1SSam Ravnborg 2755e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK 2756e279b6c1SSam Ravnborg bool "Enable console blanking using APM" 2757a7f7f624SMasahiro Yamada help 2758e279b6c1SSam Ravnborg Enable console blanking using the APM. Some laptops can use this to 2759e279b6c1SSam Ravnborg turn off the LCD backlight when the screen blanker of the Linux 2760e279b6c1SSam Ravnborg virtual console blanks the screen. Note that this is only used by 2761e279b6c1SSam Ravnborg the virtual console screen blanker, and won't turn off the backlight 2762e279b6c1SSam Ravnborg when using the X Window system. This also doesn't have anything to 2763e279b6c1SSam Ravnborg do with your VESA-compliant power-saving monitor. Further, this 2764e279b6c1SSam Ravnborg option doesn't work for all laptops -- it might not turn off your 2765e279b6c1SSam Ravnborg backlight at all, or it might print a lot of errors to the console, 2766e279b6c1SSam Ravnborg especially if you are using gpm. 2767e279b6c1SSam Ravnborg 2768e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS 2769e279b6c1SSam Ravnborg bool "Allow interrupts during APM BIOS calls" 2770a7f7f624SMasahiro Yamada help 2771e279b6c1SSam Ravnborg Normally we disable external interrupts while we are making calls to 2772e279b6c1SSam Ravnborg the APM BIOS as a measure to lessen the effects of a badly behaving 2773e279b6c1SSam Ravnborg BIOS implementation. The BIOS should reenable interrupts if it 2774e279b6c1SSam Ravnborg needs to. Unfortunately, some BIOSes do not -- especially those in 2775e279b6c1SSam Ravnborg many of the newer IBM Thinkpads. If you experience hangs when you 2776e279b6c1SSam Ravnborg suspend, try setting this to Y. Otherwise, say N. 2777e279b6c1SSam Ravnborg 2778e279b6c1SSam Ravnborgendif # APM 2779e279b6c1SSam Ravnborg 2780bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig" 2781e279b6c1SSam Ravnborg 2782e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig" 2783e279b6c1SSam Ravnborg 278427471fdbSAndy Henroidsource "drivers/idle/Kconfig" 278527471fdbSAndy Henroid 2786e279b6c1SSam Ravnborgendmenu 2787e279b6c1SSam Ravnborg 2788e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)" 2789e279b6c1SSam Ravnborg 2790e279b6c1SSam Ravnborgchoice 2791e279b6c1SSam Ravnborg prompt "PCI access mode" 2792efefa6f6SIngo Molnar depends on X86_32 && PCI 2793e279b6c1SSam Ravnborg default PCI_GOANY 2794a7f7f624SMasahiro Yamada help 2795e279b6c1SSam Ravnborg On PCI systems, the BIOS can be used to detect the PCI devices and 2796e279b6c1SSam Ravnborg determine their configuration. However, some old PCI motherboards 2797e279b6c1SSam Ravnborg have BIOS bugs and may crash if this is done. Also, some embedded 2798e279b6c1SSam Ravnborg PCI-based systems don't have any BIOS at all. Linux can also try to 2799e279b6c1SSam Ravnborg detect the PCI hardware directly without using the BIOS. 2800e279b6c1SSam Ravnborg 2801e279b6c1SSam Ravnborg With this option, you can specify how Linux should detect the 2802e279b6c1SSam Ravnborg PCI devices. If you choose "BIOS", the BIOS will be used, 2803e279b6c1SSam Ravnborg if you choose "Direct", the BIOS won't be used, and if you 2804e279b6c1SSam Ravnborg choose "MMConfig", then PCI Express MMCONFIG will be used. 2805e279b6c1SSam Ravnborg If you choose "Any", the kernel will try MMCONFIG, then the 2806e279b6c1SSam Ravnborg direct access method and falls back to the BIOS if that doesn't 2807e279b6c1SSam Ravnborg work. If unsure, go with the default, which is "Any". 2808e279b6c1SSam Ravnborg 2809e279b6c1SSam Ravnborgconfig PCI_GOBIOS 2810e279b6c1SSam Ravnborg bool "BIOS" 2811e279b6c1SSam Ravnborg 2812e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG 2813e279b6c1SSam Ravnborg bool "MMConfig" 2814e279b6c1SSam Ravnborg 2815e279b6c1SSam Ravnborgconfig PCI_GODIRECT 2816e279b6c1SSam Ravnborg bool "Direct" 2817e279b6c1SSam Ravnborg 28183ef0e1f8SAndres Salomonconfig PCI_GOOLPC 281976fb6570SDaniel Drake bool "OLPC XO-1" 28203ef0e1f8SAndres Salomon depends on OLPC 28213ef0e1f8SAndres Salomon 28222bdd1b03SAndres Salomonconfig PCI_GOANY 28232bdd1b03SAndres Salomon bool "Any" 28242bdd1b03SAndres Salomon 2825e279b6c1SSam Ravnborgendchoice 2826e279b6c1SSam Ravnborg 2827e279b6c1SSam Ravnborgconfig PCI_BIOS 28283c2362e6SHarvey Harrison def_bool y 2829efefa6f6SIngo Molnar depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY) 2830e279b6c1SSam Ravnborg 2831e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct. 2832e279b6c1SSam Ravnborgconfig PCI_DIRECT 28333c2362e6SHarvey Harrison def_bool y 28340aba496fSShaohua Li depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG)) 2835e279b6c1SSam Ravnborg 2836e279b6c1SSam Ravnborgconfig PCI_MMCONFIG 2837b45c9f36SJan Kiszka bool "Support mmconfig PCI config space access" if X86_64 2838b45c9f36SJan Kiszka default y 28394590d98fSAndy Shevchenko depends on PCI && (ACPI || JAILHOUSE_GUEST) 2840b45c9f36SJan Kiszka depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG) 2841e279b6c1SSam Ravnborg 28423ef0e1f8SAndres Salomonconfig PCI_OLPC 28432bdd1b03SAndres Salomon def_bool y 28442bdd1b03SAndres Salomon depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY) 28453ef0e1f8SAndres Salomon 2846b5401a96SAlex Nixonconfig PCI_XEN 2847b5401a96SAlex Nixon def_bool y 2848b5401a96SAlex Nixon depends on PCI && XEN 2849b5401a96SAlex Nixon 28508364e1f8SJan Kiszkaconfig MMCONF_FAM10H 28518364e1f8SJan Kiszka def_bool y 28528364e1f8SJan Kiszka depends on X86_64 && PCI_MMCONFIG && ACPI 2853e279b6c1SSam Ravnborg 28543f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK 28556a108a14SDavid Rientjes bool "Read CNB20LE Host Bridge Windows" if EXPERT 28566ea30386SKees Cook depends on PCI 28573f6ea84aSIra W. Snyder help 28583f6ea84aSIra W. Snyder Read the PCI windows out of the CNB20LE host bridge. This allows 28593f6ea84aSIra W. Snyder PCI hotplug to work on systems with the CNB20LE chipset which do 28603f6ea84aSIra W. Snyder not have ACPI. 28613f6ea84aSIra W. Snyder 286264a5fed6SBjorn Helgaas There's no public spec for this chipset, and this functionality 286364a5fed6SBjorn Helgaas is known to be incomplete. 286464a5fed6SBjorn Helgaas 286564a5fed6SBjorn Helgaas You should say N unless you know you need this. 286664a5fed6SBjorn Helgaas 28673a495511SWilliam Breathitt Grayconfig ISA_BUS 286817a2a129SWilliam Breathitt Gray bool "ISA bus support on modern systems" if EXPERT 28693a495511SWilliam Breathitt Gray help 287017a2a129SWilliam Breathitt Gray Expose ISA bus device drivers and options available for selection and 287117a2a129SWilliam Breathitt Gray configuration. Enable this option if your target machine has an ISA 287217a2a129SWilliam Breathitt Gray bus. ISA is an older system, displaced by PCI and newer bus 287317a2a129SWilliam Breathitt Gray architectures -- if your target machine is modern, it probably does 287417a2a129SWilliam Breathitt Gray not have an ISA bus. 28753a495511SWilliam Breathitt Gray 28763a495511SWilliam Breathitt Gray If unsure, say N. 28773a495511SWilliam Breathitt Gray 28781c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA. 2879e279b6c1SSam Ravnborgconfig ISA_DMA_API 28801c00f016SDavid Rientjes bool "ISA-style DMA support" if (X86_64 && EXPERT) 28811c00f016SDavid Rientjes default y 28821c00f016SDavid Rientjes help 28831c00f016SDavid Rientjes Enables ISA-style DMA support for devices requiring such controllers. 28841c00f016SDavid Rientjes If unsure, say Y. 2885e279b6c1SSam Ravnborg 288651e68d05SLinus Torvaldsif X86_32 288751e68d05SLinus Torvalds 2888e279b6c1SSam Ravnborgconfig ISA 2889e279b6c1SSam Ravnborg bool "ISA support" 2890a7f7f624SMasahiro Yamada help 2891e279b6c1SSam Ravnborg Find out whether you have ISA slots on your motherboard. ISA is the 2892e279b6c1SSam Ravnborg name of a bus system, i.e. the way the CPU talks to the other stuff 2893e279b6c1SSam Ravnborg inside your box. Other bus systems are PCI, EISA, MicroChannel 2894e279b6c1SSam Ravnborg (MCA) or VESA. ISA is an older system, now being displaced by PCI; 2895e279b6c1SSam Ravnborg newer boards don't support it. If you have ISA, say Y, otherwise N. 2896e279b6c1SSam Ravnborg 2897e279b6c1SSam Ravnborgconfig SCx200 2898e279b6c1SSam Ravnborg tristate "NatSemi SCx200 support" 2899a7f7f624SMasahiro Yamada help 2900e279b6c1SSam Ravnborg This provides basic support for National Semiconductor's 2901e279b6c1SSam Ravnborg (now AMD's) Geode processors. The driver probes for the 2902e279b6c1SSam Ravnborg PCI-IDs of several on-chip devices, so its a good dependency 2903e279b6c1SSam Ravnborg for other scx200_* drivers. 2904e279b6c1SSam Ravnborg 2905e279b6c1SSam Ravnborg If compiled as a module, the driver is named scx200. 2906e279b6c1SSam Ravnborg 2907e279b6c1SSam Ravnborgconfig SCx200HR_TIMER 2908e279b6c1SSam Ravnborg tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" 2909592913ecSJohn Stultz depends on SCx200 2910e279b6c1SSam Ravnborg default y 2911a7f7f624SMasahiro Yamada help 2912e279b6c1SSam Ravnborg This driver provides a clocksource built upon the on-chip 2913e279b6c1SSam Ravnborg 27MHz high-resolution timer. Its also a workaround for 2914e279b6c1SSam Ravnborg NSC Geode SC-1100's buggy TSC, which loses time when the 2915e279b6c1SSam Ravnborg processor goes idle (as is done by the scheduler). The 2916e279b6c1SSam Ravnborg other workaround is idle=poll boot option. 2917e279b6c1SSam Ravnborg 29183ef0e1f8SAndres Salomonconfig OLPC 29193ef0e1f8SAndres Salomon bool "One Laptop Per Child support" 292054008979SThomas Gleixner depends on !X86_PAE 29213c554946SAndres Salomon select GPIOLIB 2922dc3119e7SThomas Gleixner select OF 292345bb1674SDaniel Drake select OF_PROMTREE 2924b4e51854SGrant Likely select IRQ_DOMAIN 29250c3d931bSLubomir Rintel select OLPC_EC 2926a7f7f624SMasahiro Yamada help 29273ef0e1f8SAndres Salomon Add support for detecting the unique features of the OLPC 29283ef0e1f8SAndres Salomon XO hardware. 29293ef0e1f8SAndres Salomon 2930a3128588SDaniel Drakeconfig OLPC_XO1_PM 2931a3128588SDaniel Drake bool "OLPC XO-1 Power Management" 2932fa112cf1SBorislav Petkov depends on OLPC && MFD_CS5535=y && PM_SLEEP 2933a7f7f624SMasahiro Yamada help 293497c4cb71SDaniel Drake Add support for poweroff and suspend of the OLPC XO-1 laptop. 2935bf1ebf00SDaniel Drake 2936cfee9597SDaniel Drakeconfig OLPC_XO1_RTC 2937cfee9597SDaniel Drake bool "OLPC XO-1 Real Time Clock" 2938cfee9597SDaniel Drake depends on OLPC_XO1_PM && RTC_DRV_CMOS 2939a7f7f624SMasahiro Yamada help 2940cfee9597SDaniel Drake Add support for the XO-1 real time clock, which can be used as a 2941cfee9597SDaniel Drake programmable wakeup source. 2942cfee9597SDaniel Drake 29437feda8e9SDaniel Drakeconfig OLPC_XO1_SCI 29447feda8e9SDaniel Drake bool "OLPC XO-1 SCI extras" 294592e830f2SArnd Bergmann depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y 2946ed8e47feSRandy Dunlap depends on INPUT=y 2947d8d01a63SDaniel Drake select POWER_SUPPLY 2948a7f7f624SMasahiro Yamada help 29497feda8e9SDaniel Drake Add support for SCI-based features of the OLPC XO-1 laptop: 29507bc74b3dSDaniel Drake - EC-driven system wakeups 29517feda8e9SDaniel Drake - Power button 29527bc74b3dSDaniel Drake - Ebook switch 29532cf2baeaSDaniel Drake - Lid switch 2954e1040ac6SDaniel Drake - AC adapter status updates 2955e1040ac6SDaniel Drake - Battery status updates 29567feda8e9SDaniel Drake 2957a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI 2958a0f30f59SDaniel Drake bool "OLPC XO-1.5 SCI extras" 2959d8d01a63SDaniel Drake depends on OLPC && ACPI 2960d8d01a63SDaniel Drake select POWER_SUPPLY 2961a7f7f624SMasahiro Yamada help 2962a0f30f59SDaniel Drake Add support for SCI-based features of the OLPC XO-1.5 laptop: 2963a0f30f59SDaniel Drake - EC-driven system wakeups 2964a0f30f59SDaniel Drake - AC adapter status updates 2965a0f30f59SDaniel Drake - Battery status updates 2966e279b6c1SSam Ravnborg 2967d4f3e350SEd Wildgooseconfig ALIX 2968d4f3e350SEd Wildgoose bool "PCEngines ALIX System Support (LED setup)" 2969d4f3e350SEd Wildgoose select GPIOLIB 2970a7f7f624SMasahiro Yamada help 2971d4f3e350SEd Wildgoose This option enables system support for the PCEngines ALIX. 2972d4f3e350SEd Wildgoose At present this just sets up LEDs for GPIO control on 2973d4f3e350SEd Wildgoose ALIX2/3/6 boards. However, other system specific setup should 2974d4f3e350SEd Wildgoose get added here. 2975d4f3e350SEd Wildgoose 2976d4f3e350SEd Wildgoose Note: You must still enable the drivers for GPIO and LED support 2977d4f3e350SEd Wildgoose (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs 2978d4f3e350SEd Wildgoose 2979d4f3e350SEd Wildgoose Note: You have to set alix.force=1 for boards with Award BIOS. 2980d4f3e350SEd Wildgoose 2981da4e3302SPhilip Prindevilleconfig NET5501 2982da4e3302SPhilip Prindeville bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)" 2983da4e3302SPhilip Prindeville select GPIOLIB 2984a7f7f624SMasahiro Yamada help 2985da4e3302SPhilip Prindeville This option enables system support for the Soekris Engineering net5501. 2986da4e3302SPhilip Prindeville 29873197059aSPhilip A. Prindevilleconfig GEOS 29883197059aSPhilip A. Prindeville bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)" 29893197059aSPhilip A. Prindeville select GPIOLIB 29903197059aSPhilip A. Prindeville depends on DMI 2991a7f7f624SMasahiro Yamada help 29923197059aSPhilip A. Prindeville This option enables system support for the Traverse Technologies GEOS. 29933197059aSPhilip A. Prindeville 29947d029125SVivien Didelotconfig TS5500 29957d029125SVivien Didelot bool "Technologic Systems TS-5500 platform support" 29967d029125SVivien Didelot depends on MELAN 29977d029125SVivien Didelot select CHECK_SIGNATURE 29987d029125SVivien Didelot select NEW_LEDS 29997d029125SVivien Didelot select LEDS_CLASS 3000a7f7f624SMasahiro Yamada help 30017d029125SVivien Didelot This option enables system support for the Technologic Systems TS-5500. 30027d029125SVivien Didelot 3003e279b6c1SSam Ravnborgendif # X86_32 3004e279b6c1SSam Ravnborg 300523ac4ae8SAndreas Herrmannconfig AMD_NB 3006e279b6c1SSam Ravnborg def_bool y 30070e152cd7SBorislav Petkov depends on CPU_SUP_AMD && PCI 3008e279b6c1SSam Ravnborg 3009e279b6c1SSam Ravnborgendmenu 3010e279b6c1SSam Ravnborg 30111572497cSChristoph Hellwigmenu "Binary Emulations" 3012e279b6c1SSam Ravnborg 3013e279b6c1SSam Ravnborgconfig IA32_EMULATION 3014e279b6c1SSam Ravnborg bool "IA32 Emulation" 3015e279b6c1SSam Ravnborg depends on X86_64 301639f88911SIngo Molnar select ARCH_WANT_OLD_COMPAT_IPC 3017d1603990SRandy Dunlap select BINFMT_ELF 301839f88911SIngo Molnar select COMPAT_OLD_SIGACTION 3019a7f7f624SMasahiro Yamada help 30205fd92e65SH. J. Lu Include code to run legacy 32-bit programs under a 30215fd92e65SH. J. Lu 64-bit kernel. You should likely turn this on, unless you're 30225fd92e65SH. J. Lu 100% sure that you don't have any 32-bit programs left. 3023e279b6c1SSam Ravnborg 3024a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED 3025a11e0975SNikolay Borisov bool "IA32 emulation disabled by default" 3026a11e0975SNikolay Borisov default n 3027a11e0975SNikolay Borisov depends on IA32_EMULATION 3028a11e0975SNikolay Borisov help 3029a11e0975SNikolay Borisov Make IA32 emulation disabled by default. This prevents loading 32-bit 3030a11e0975SNikolay Borisov processes and access to 32-bit syscalls. If unsure, leave it to its 3031a11e0975SNikolay Borisov default value. 3032a11e0975SNikolay Borisov 303383a44a4fSMasahiro Yamadaconfig X86_X32_ABI 30346ea30386SKees Cook bool "x32 ABI for 64-bit mode" 30359b54050bSBrian Gerst depends on X86_64 3036aaeed6ecSNathan Chancellor # llvm-objcopy does not convert x86_64 .note.gnu.property or 3037aaeed6ecSNathan Chancellor # compressed debug sections to x86_x32 properly: 3038aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/514 3039aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/1141 3040aaeed6ecSNathan Chancellor depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm) 3041a7f7f624SMasahiro Yamada help 30425fd92e65SH. J. Lu Include code to run binaries for the x32 native 32-bit ABI 30435fd92e65SH. J. Lu for 64-bit processors. An x32 process gets access to the 30445fd92e65SH. J. Lu full 64-bit register file and wide data path while leaving 30455fd92e65SH. J. Lu pointers at 32 bits for smaller memory footprint. 30465fd92e65SH. J. Lu 3047953fee1dSIngo Molnarconfig COMPAT_32 3048953fee1dSIngo Molnar def_bool y 3049953fee1dSIngo Molnar depends on IA32_EMULATION || X86_32 3050953fee1dSIngo Molnar select HAVE_UID16 3051953fee1dSIngo Molnar select OLD_SIGSUSPEND3 3052953fee1dSIngo Molnar 3053e279b6c1SSam Ravnborgconfig COMPAT 30543c2362e6SHarvey Harrison def_bool y 305583a44a4fSMasahiro Yamada depends on IA32_EMULATION || X86_X32_ABI 3056e279b6c1SSam Ravnborg 3057e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT 30583120e25eSJan Beulich def_bool y 3059a9251280SLinus Torvalds depends on COMPAT 3060ee009e4aSDavid Howells 3061e279b6c1SSam Ravnborgendmenu 3062e279b6c1SSam Ravnborg 3063e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP 3064e5beae16SKeith Packard def_bool y 3065e5beae16SKeith Packard depends on X86_32 3066e5beae16SKeith Packard 3067edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig" 30685e8ebd84SJason A. Donenfeld 30695e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler" 3070