1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 2daa93fabSSam Ravnborg# Select 32 or 64 bit 3daa93fabSSam Ravnborgconfig 64BIT 4104daea1SMasahiro Yamada bool "64-bit kernel" if "$(ARCH)" = "x86" 5104daea1SMasahiro Yamada default "$(ARCH)" != "i386" 6a7f7f624SMasahiro Yamada help 7daa93fabSSam Ravnborg Say yes to build a 64-bit kernel - formerly known as x86_64 8daa93fabSSam Ravnborg Say no to build a 32-bit kernel - formerly known as i386 9daa93fabSSam Ravnborg 10daa93fabSSam Ravnborgconfig X86_32 113120e25eSJan Beulich def_bool y 123120e25eSJan Beulich depends on !64BIT 13341c787eSIngo Molnar # Options that are inherently 32-bit kernel only: 14341c787eSIngo Molnar select ARCH_WANT_IPC_PARSE_VERSION 15341c787eSIngo Molnar select CLKSRC_I8253 16341c787eSIngo Molnar select CLONE_BACKWARDS 17117ed454SThomas Gleixner select HAVE_DEBUG_STACKOVERFLOW 18157e118bSThomas Gleixner select KMAP_LOCAL 19341c787eSIngo Molnar select MODULES_USE_ELF_REL 20341c787eSIngo Molnar select OLD_SIGACTION 212ca408d9SBrian Gerst select ARCH_SPLIT_ARG64 22daa93fabSSam Ravnborg 23daa93fabSSam Ravnborgconfig X86_64 243120e25eSJan Beulich def_bool y 253120e25eSJan Beulich depends on 64BIT 26d94e0685SIngo Molnar # Options that are inherently 64-bit kernel only: 274eb0716eSAlexandre Ghiti select ARCH_HAS_GIGANTIC_PAGE 283049def1SJeff Xu select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS 29c12d3362SArd Biesheuvel select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 300bff0aaeSSuren Baghdasaryan select ARCH_SUPPORTS_PER_VMA_LOCK 3175182022SPeter Xu select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 32d94e0685SIngo Molnar select HAVE_ARCH_SOFT_DIRTY 33d94e0685SIngo Molnar select MODULES_USE_ELF_RELA 34f616ab59SChristoph Hellwig select NEED_DMA_MAP_STATE 3509230cbcSChristoph Hellwig select SWIOTLB 367facdc42SAl Viro select ARCH_HAS_ELFCORE_COMPAT 3763703f37SKefeng Wang select ZONE_DMA32 3814e56fb2SMike Rapoport (IBM) select EXECMEM if DYNAMIC_FTRACE 39b9020bdbSTony Luck select ACPI_MRRM if ACPI 401032c0baSSam Ravnborg 41518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE 42518049d9SSteven Rostedt (VMware) def_bool y 43518049d9SSteven Rostedt (VMware) depends on X86_32 44518049d9SSteven Rostedt (VMware) depends on FUNCTION_TRACER 45518049d9SSteven Rostedt (VMware) select DYNAMIC_FTRACE 46518049d9SSteven Rostedt (VMware) help 47518049d9SSteven Rostedt (VMware) We keep the static function tracing (!DYNAMIC_FTRACE) around 48518049d9SSteven Rostedt (VMware) in order to test the non static function tracing in the 49518049d9SSteven Rostedt (VMware) generic code, as other architectures still use it. But we 50518049d9SSteven Rostedt (VMware) only need to keep it around for x86_64. No need to keep it 51518049d9SSteven Rostedt (VMware) for x86_32. For x86_32, force DYNAMIC_FTRACE. 52d94e0685SIngo Molnar# 53d94e0685SIngo Molnar# Arch settings 54d94e0685SIngo Molnar# 55d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be 56d94e0685SIngo Molnar# ported to 32-bit as well. ) 57d94e0685SIngo Molnar# 588d5fffb9SSam Ravnborgconfig X86 593c2362e6SHarvey Harrison def_bool y 60c763ea26SIngo Molnar # 61c763ea26SIngo Molnar # Note: keep this list sorted alphabetically 62c763ea26SIngo Molnar # 636471b825SIngo Molnar select ACPI_LEGACY_TABLES_LOOKUP if ACPI 646e0a0ea1SGraeme Gregory select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 65a02f66bbSJames Morse select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 66942fa985SYury Norov select ARCH_32BIT_OFF_T if X86_32 672a21ad57SThomas Gleixner select ARCH_CLOCKSOURCE_INIT 68fe42754bSSean Christopherson select ARCH_CONFIGURES_CPU_MITIGATIONS 691f6d3a8fSMasami Hiramatsu select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE 701e866974SAnshuman Khandual select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION 715c11f00bSDavid Hildenbrand select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64 7291024b3cSAnshuman Khandual select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 73cebc774fSAnshuman Khandual select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE) 741e866974SAnshuman Khandual select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE 7591dda51aSAleksey Makarov select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 76735e5920SDavid Kaplan select ARCH_HAS_CPU_ATTACK_VECTORS if CPU_MITIGATIONS 77c2280be8SAnshuman Khandual select ARCH_HAS_CACHE_LINE_SIZE 781156b441SDavidlohr Bueso select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION 797c7077a7SThomas Gleixner select ARCH_HAS_CPU_FINALIZE_INIT 808f23f5dbSJason Gunthorpe select ARCH_HAS_CPU_PASID if IOMMU_SVA 812792d84eSKees Cook select ARCH_HAS_CURRENT_STACK_POINTER 82fa5b6ec9SLaura Abbott select ARCH_HAS_DEBUG_VIRTUAL 83399145f9SAnshuman Khandual select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE 8421266be9SDan Williams select ARCH_HAS_DEVMEM_IS_ALLOWED 85de6c85bfSChristoph Hellwig select ARCH_HAS_DMA_OPS if GART_IOMMU || XEN 86b1a57bbfSDouglas Anderson select ARCH_HAS_EARLY_DEBUG if KGDB 876471b825SIngo Molnar select ARCH_HAS_ELF_RANDOMIZE 8847410d83SMike Rapoport (Microsoft) select ARCH_HAS_EXECMEM_ROX if X86_64 && STRICT_MODULE_RWX 8972d93104SLinus Torvalds select ARCH_HAS_FAST_MULTIPLIER 906974f0c4SDaniel Micay select ARCH_HAS_FORTIFY_SOURCE 91957e3facSRiku Voipio select ARCH_HAS_GCOV_PROFILE_ALL 92bece04b5SMarco Elver select ARCH_HAS_KCOV if X86_64 93b0b8a15bSSamuel Holland select ARCH_HAS_KERNEL_FPU_SUPPORT 940c9c1d56SThiago Jung Bauermann select ARCH_HAS_MEM_ENCRYPT 9510bcc80eSMathieu Desnoyers select ARCH_HAS_MEMBARRIER_SYNC_CORE 9649f88c70SPaul E. McKenney select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 970ebeea8cSDaniel Borkmann select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 98c763ea26SIngo Molnar select ARCH_HAS_PMEM_API if X86_64 99476e8583SPeter Zijlstra select ARCH_HAS_PREEMPT_LAZY 1004f115596SAlexander Popov select ARCH_HAS_PTDUMP 1013010a5eaSLaurent Dufour select ARCH_HAS_PTE_SPECIAL 10271ce1ab5SKinsey Ho select ARCH_HAS_HW_PTE_YOUNG 103eed9a328SYu Zhao select ARCH_HAS_NONLEAF_PMD_YOUNG if PGTABLE_LEVELS > 2 1040aed55afSDan Williams select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64 105ec6347bbSDan Williams select ARCH_HAS_COPY_MC if X86_64 106d2852a22SDaniel Borkmann select ARCH_HAS_SET_MEMORY 107d253ca0cSRick Edgecombe select ARCH_HAS_SET_DIRECT_MAP 108ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_KERNEL_RWX 109ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_MODULE_RWX 110ac1ab12aSMathieu Desnoyers select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 11125c619e5SBrian Gerst select ARCH_HAS_SYSCALL_WRAPPER 112918327e9SKees Cook select ARCH_HAS_UBSAN 1137e01ccb4SZong Li select ARCH_HAS_DEBUG_WX 11463703f37SKefeng Wang select ARCH_HAS_ZONE_DMA_SET if EXPERT 1156471b825SIngo Molnar select ARCH_HAVE_NMI_SAFE_CMPXCHG 116ba386777SVignesh Balasubramanian select ARCH_HAVE_EXTRA_ELF_NOTES 11704d5ea46SAneesh Kumar K.V select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE 1186471b825SIngo Molnar select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI 11977fbbc81SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 1205e2c18c0SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 1213599fe12SThomas Gleixner select ARCH_STACKWALK 1222c870e61SArnd Bergmann select ARCH_SUPPORTS_ACPI 1236471b825SIngo Molnar select ARCH_SUPPORTS_ATOMIC_RMW 1245d6ad668SMike Rapoport select ARCH_SUPPORTS_DEBUG_PAGEALLOC 1256470fb2bSAnshuman Khandual select ARCH_SUPPORTS_HUGETLBFS 126d283d422SPasha Tatashin select ARCH_SUPPORTS_PAGE_TABLE_CHECK if X86_64 1276471b825SIngo Molnar select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 12814df3267SThomas Gleixner select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP if NR_CPUS <= 4096 12923ef9d43SKees Cook select ARCH_SUPPORTS_CFI if X86_64 13023ef9d43SKees Cook select ARCH_USES_CFI_TRAPS if X86_64 && CFI 131583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG 132583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG_THIN 133d2d6422fSSebastian Andrzej Siewior select ARCH_SUPPORTS_RT 134315ad878SRong Xu select ARCH_SUPPORTS_AUTOFDO_CLANG 135d5dc9583SRong Xu select ARCH_SUPPORTS_PROPELLER_CLANG if X86_64 1366471b825SIngo Molnar select ARCH_USE_BUILTIN_BSWAP 137909639aaSH. Peter Anvin (Intel) select ARCH_USE_CMPXCHG_LOCKREF if X86_CX8 138dce44566SAnshuman Khandual select ARCH_USE_MEMTEST 1396471b825SIngo Molnar select ARCH_USE_QUEUED_RWLOCKS 1406471b825SIngo Molnar select ARCH_USE_QUEUED_SPINLOCKS 1412ce0d7f9SMark Brown select ARCH_USE_SYM_ANNOTATIONS 142ce4a4e56SAndy Lutomirski select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH 14381c22041SDaniel Borkmann select ARCH_WANT_DEFAULT_BPF_JIT if X86_64 144c763ea26SIngo Molnar select ARCH_WANTS_DYNAMIC_TASK_STRUCT 14551c2ee6dSNick Desaulniers select ARCH_WANTS_NO_INSTR 14607431506SAnshuman Khandual select ARCH_WANT_GENERAL_HUGETLB 14776303ee8SJann Horn select ARCH_WANT_HUGE_PMD_SHARE if X86_64 14859612b24SNathan Chancellor select ARCH_WANT_LD_ORPHAN_WARN 1490b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64 1500b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64 15108efe293SFrank van der Linden select ARCH_WANT_HUGETLB_VMEMMAP_PREINIT if X86_64 15238d8b4e6SHuang Ying select ARCH_WANTS_THP_SWAP if X86_64 153b5f06f64SBalbir Singh select ARCH_HAS_PARANOID_L1D_FLUSH 154af896715SAndy Lutomirski select ARCH_WANT_IRQS_OFF_ACTIVATE_MM 15510916706SShile Zhang select BUILDTIME_TABLE_SORT 1566471b825SIngo Molnar select CLKEVT_I8253 1576471b825SIngo Molnar select CLOCKSOURCE_WATCHDOG 1587cf8f44aSAlexander Potapenko # Word-size accesses may read uninitialized data past the trailing \0 1597cf8f44aSAlexander Potapenko # in strings and cause false KMSAN reports. 1607cf8f44aSAlexander Potapenko select DCACHE_WORD_ACCESS if !KMSAN 1613aac3ebeSThomas Gleixner select DYNAMIC_SIGFRAME 16245471cd9SLinus Torvalds select EDAC_ATOMIC_SCRUB 16345471cd9SLinus Torvalds select EDAC_SUPPORT 1646471b825SIngo Molnar select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC) 165cb81deefSThomas Gleixner select GENERIC_CLOCKEVENTS_BROADCAST_IDLE if GENERIC_CLOCKEVENTS_BROADCAST 1666471b825SIngo Molnar select GENERIC_CLOCKEVENTS_MIN_ADJUST 1676471b825SIngo Molnar select GENERIC_CMOS_UPDATE 1686471b825SIngo Molnar select GENERIC_CPU_AUTOPROBE 1695b95f94cSJames Morse select GENERIC_CPU_DEVICES 17061dc0f55SThomas Gleixner select GENERIC_CPU_VULNERABILITIES 1716471b825SIngo Molnar select GENERIC_EARLY_IOREMAP 17227d6b4d1SThomas Gleixner select GENERIC_ENTRY 1736471b825SIngo Molnar select GENERIC_IOMAP 174c7d6c9ddSThomas Gleixner select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1750fa115daSThomas Gleixner select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC 176ad7a929fSThomas Gleixner select GENERIC_IRQ_MIGRATION if SMP 1776471b825SIngo Molnar select GENERIC_IRQ_PROBE 178c201c917SThomas Gleixner select GENERIC_IRQ_RESERVATION_MODE 1796471b825SIngo Molnar select GENERIC_IRQ_SHOW 1806471b825SIngo Molnar select GENERIC_PENDING_IRQ if SMP 1816471b825SIngo Molnar select GENERIC_SMP_IDLE_THREAD 1826471b825SIngo Molnar select GENERIC_TIME_VSYSCALL 1837ac87074SVincenzo Frascino select GENERIC_GETTIMEOFDAY 1847e90ffb7SAdrian Hunter select GENERIC_VDSO_OVERFLOW_PROTECT 1856ca297d4SPeter Zijlstra select GUP_GET_PXX_LOW_HIGH if X86_PAE 18617e5888eSHans de Goede select HARDIRQS_SW_RESEND 1877edaeb68SThomas Gleixner select HARDLOCKUP_CHECK_TIMESTAMP if X86_64 188fcbfe812SNiklas Schnelle select HAS_IOPORT 1896471b825SIngo Molnar select HAVE_ACPI_APEI if ACPI 1906471b825SIngo Molnar select HAVE_ACPI_APEI_NMI if ACPI 1912a19be61SVlastimil Babka select HAVE_ALIGNED_STRUCT_PAGE 1926471b825SIngo Molnar select HAVE_ARCH_AUDITSYSCALL 1936471b825SIngo Molnar select HAVE_ARCH_HUGE_VMAP if X86_64 || X86_PAE 194eed1fceeSSong Liu select HAVE_ARCH_HUGE_VMALLOC if X86_64 1956471b825SIngo Molnar select HAVE_ARCH_JUMP_LABEL 196b34006c4SArd Biesheuvel select HAVE_ARCH_JUMP_LABEL_RELATIVE 197d17a1d97SAndrey Ryabinin select HAVE_ARCH_KASAN if X86_64 1980609ae01SDaniel Axtens select HAVE_ARCH_KASAN_VMALLOC if X86_64 1991dc0da6eSAlexander Potapenko select HAVE_ARCH_KFENCE 2004ca8cc8dSAlexander Potapenko select HAVE_ARCH_KMSAN if X86_64 2016471b825SIngo Molnar select HAVE_ARCH_KGDB 20257fbad15SKees Cook select HAVE_ARCH_KSTACK_ERASE 2039e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_BITS if MMU 2049e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 2051b028f78SDmitry Safonov select HAVE_ARCH_COMPAT_MMAP_BASES if MMU && COMPAT 206271ca788SArd Biesheuvel select HAVE_ARCH_PREL32_RELOCATIONS 2076471b825SIngo Molnar select HAVE_ARCH_SECCOMP_FILTER 208f7d83c1cSKees Cook select HAVE_ARCH_THREAD_STRUCT_WHITELIST 2096471b825SIngo Molnar select HAVE_ARCH_TRACEHOOK 2106471b825SIngo Molnar select HAVE_ARCH_TRANSPARENT_HUGEPAGE 211a00cc7d9SMatthew Wilcox select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 212b64d8d1eSPeter Xu select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD 2137677f7fdSAxel Rasmussen select HAVE_ARCH_USERFAULTFD_MINOR if X86_64 && USERFAULTFD 214e37e43a4SAndy Lutomirski select HAVE_ARCH_VMAP_STACK if X86_64 215fe950f60SKees Cook select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 216c763ea26SIngo Molnar select HAVE_ARCH_WITHIN_STACK_FRAMES 2172ff2b7ecSMasahiro Yamada select HAVE_ASM_MODVERSIONS 2186471b825SIngo Molnar select HAVE_CMPXCHG_DOUBLE 2196471b825SIngo Molnar select HAVE_CMPXCHG_LOCAL 22024a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER if X86_64 22124a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER_OFFSTACK if HAVE_CONTEXT_TRACKING_USER 2226471b825SIngo Molnar select HAVE_C_RECORDMCOUNT 22303f16cd0SJosh Poimboeuf select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL 224280981d6SSathvika Vasireddy select HAVE_OBJTOOL_NOP_MCOUNT if HAVE_OBJTOOL_MCOUNT 2254ed308c4SSteven Rostedt (Google) select HAVE_BUILDTIME_MCOUNT_SORT 2266471b825SIngo Molnar select HAVE_DEBUG_KMEMLEAK 2279c5a3621SAkinobu Mita select HAVE_DMA_CONTIGUOUS 228677aa9f7SSteven Rostedt select HAVE_DYNAMIC_FTRACE 22906aeaaeaSMasami Hiramatsu select HAVE_DYNAMIC_FTRACE_WITH_REGS 23002a474caSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_ARGS if X86_64 231762abbc0SMasami Hiramatsu (Google) select HAVE_FTRACE_REGS_HAVING_PT_REGS if X86_64 232562955feSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 233c316eb44SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT if X86_64 234503e4510SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT_MULTI if X86_64 23503f5781bSWang YanQing select HAVE_EBPF_JIT 23658340a07SJohannes Berg select HAVE_EFFICIENT_UNALIGNED_ACCESS 237976ba8daSArnd Bergmann select HAVE_EISA if X86_32 2385f56a5dfSJiri Slaby select HAVE_EXIT_THREAD 239*da3f033aSThomas Gleixner select HAVE_GENERIC_TIF_BITS 24025176ad0SDavid Hildenbrand select HAVE_GUP_FAST 241644e0e8dSSteven Rostedt (VMware) select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE 242a762e926SMasami Hiramatsu (Google) select HAVE_FTRACE_GRAPH_FUNC if HAVE_FUNCTION_GRAPH_TRACER 243a3ed4157SMasami Hiramatsu (Google) select HAVE_FUNCTION_GRAPH_FREGS if HAVE_FUNCTION_GRAPH_TRACER 2444a30e4c9SSteven Rostedt (VMware) select HAVE_FUNCTION_GRAPH_TRACER if X86_32 || (X86_64 && DYNAMIC_FTRACE) 2456471b825SIngo Molnar select HAVE_FUNCTION_TRACER 2466b90bd4bSEmese Revfy select HAVE_GCC_PLUGINS 2470067f129SK.Prasad select HAVE_HW_BREAKPOINT 2486471b825SIngo Molnar select HAVE_IOREMAP_PROT 249624db9eaSThomas Gleixner select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64 2506471b825SIngo Molnar select HAVE_IRQ_TIME_ACCOUNTING 2514ab7674fSJosh Poimboeuf select HAVE_JUMP_LABEL_HACK if HAVE_OBJTOOL 2526471b825SIngo Molnar select HAVE_KERNEL_BZIP2 2536471b825SIngo Molnar select HAVE_KERNEL_GZIP 2546471b825SIngo Molnar select HAVE_KERNEL_LZ4 2556471b825SIngo Molnar select HAVE_KERNEL_LZMA 2566471b825SIngo Molnar select HAVE_KERNEL_LZO 2576471b825SIngo Molnar select HAVE_KERNEL_XZ 258fb46d057SNick Terrell select HAVE_KERNEL_ZSTD 2596471b825SIngo Molnar select HAVE_KPROBES 2606471b825SIngo Molnar select HAVE_KPROBES_ON_FTRACE 261540adea3SMasami Hiramatsu select HAVE_FUNCTION_ERROR_INJECTION 2626471b825SIngo Molnar select HAVE_KRETPROBES 263f3a112c0SMasami Hiramatsu select HAVE_RETHOOK 2646471b825SIngo Molnar select HAVE_LIVEPATCH if X86_64 2650102752eSFrederic Weisbecker select HAVE_MIXED_BREAKPOINTS_REGS 266ee9f8fceSJosh Poimboeuf select HAVE_MOD_ARCH_SPECIFIC 2679f132f7eSJoel Fernandes (Google) select HAVE_MOVE_PMD 268be37c98dSKalesh Singh select HAVE_MOVE_PUD 26922102f45SJosh Poimboeuf select HAVE_NOINSTR_HACK if HAVE_OBJTOOL 27042a0bb3fSPetr Mladek select HAVE_NMI 271489e355bSJosh Poimboeuf select HAVE_NOINSTR_VALIDATION if HAVE_OBJTOOL 27203f16cd0SJosh Poimboeuf select HAVE_OBJTOOL if X86_64 2736471b825SIngo Molnar select HAVE_OPTPROBES 2745394f1e9SArnd Bergmann select HAVE_PAGE_SIZE_4KB 2756471b825SIngo Molnar select HAVE_PCSPKR_PLATFORM 2766471b825SIngo Molnar select HAVE_PERF_EVENTS 277c01d4323SFrederic Weisbecker select HAVE_PERF_EVENTS_NMI 27892e5aae4SNicholas Piggin select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI 279eb01d42aSChristoph Hellwig select HAVE_PCI 280c5e63197SJiri Olsa select HAVE_PERF_REGS 281c5ebcedbSJiri Olsa select HAVE_PERF_USER_STACK_DUMP 282a3725973SRik van Riel select MMU_GATHER_RCU_TABLE_FREE 2831e9fdf21SPeter Zijlstra select MMU_GATHER_MERGE_VMAS 28400998085SThomas Gleixner select HAVE_POSIX_CPU_TIMERS_TASK_WORK 2856471b825SIngo Molnar select HAVE_REGS_AND_STACK_ACCESS_API 28603f16cd0SJosh Poimboeuf select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC || STACK_VALIDATION 2873c88ee19SMasami Hiramatsu select HAVE_FUNCTION_ARG_ACCESS_API 2887ecd19cfSKefeng Wang select HAVE_SETUP_PER_CPU_AREA 289cd1a41ceSThomas Gleixner select HAVE_SOFTIRQ_ON_OWN_STACK 2900ee2689bSBrian Gerst select HAVE_STACKPROTECTOR 29103f16cd0SJosh Poimboeuf select HAVE_STACK_VALIDATION if HAVE_OBJTOOL 292e6d6c071SJosh Poimboeuf select HAVE_STATIC_CALL 29303f16cd0SJosh Poimboeuf select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL 29499cf983cSMark Rutland select HAVE_PREEMPT_DYNAMIC_CALL 295d6761b8fSMathieu Desnoyers select HAVE_RSEQ 29609498135SMiguel Ojeda select HAVE_RUST if X86_64 2976471b825SIngo Molnar select HAVE_SYSCALL_TRACEPOINTS 2985f3da8c0SJosh Poimboeuf select HAVE_UACCESS_VALIDATION if HAVE_OBJTOOL 2996471b825SIngo Molnar select HAVE_UNSTABLE_SCHED_CLOCK 3007c68af6eSAvi Kivity select HAVE_USER_RETURN_NOTIFIER 3017ac87074SVincenzo Frascino select HAVE_GENERIC_VDSO 30233385150SJason A. Donenfeld select VDSO_GETRANDOM if X86_64 3030c7ffa32SThomas Gleixner select HOTPLUG_PARALLEL if SMP && X86_64 30405736e4aSThomas Gleixner select HOTPLUG_SMT if SMP 3050c7ffa32SThomas Gleixner select HOTPLUG_SPLIT_STARTUP if SMP && X86_32 306c0185808SThomas Gleixner select IRQ_FORCED_THREADING 307c2508ec5SLinus Torvalds select LOCK_MM_AND_FIND_VMA 3087ecd19cfSKefeng Wang select NEED_PER_CPU_EMBED_FIRST_CHUNK 3097ecd19cfSKefeng Wang select NEED_PER_CPU_PAGE_FIRST_CHUNK 31086596f0aSChristoph Hellwig select NEED_SG_DMA_LENGTH 31187482708SMike Rapoport (Microsoft) select NUMA_MEMBLKS if NUMA 3122eac9c2dSChristoph Hellwig select PCI_DOMAINS if PCI 313625210cfSSinan Kaya select PCI_LOCKLESS_CONFIG if PCI 3146471b825SIngo Molnar select PERF_EVENTS 3153195ef59SPrarit Bhargava select RTC_LIB 316d6faca40SArnd Bergmann select RTC_MC146818_LIB 3176471b825SIngo Molnar select SPARSE_IRQ 3186471b825SIngo Molnar select SYSCTL_EXCEPTION_TRACE 31915f4eae7SAndy Lutomirski select THREAD_INFO_IN_TASK 3204aae683fSMasahiro Yamada select TRACE_IRQFLAGS_SUPPORT 3214510bffbSMark Rutland select TRACE_IRQFLAGS_NMI_SUPPORT 3226471b825SIngo Molnar select USER_STACKTRACE_SUPPORT 3233b02a051SIngo Molnar select HAVE_ARCH_KCSAN if X86_64 3240c608dadSAubrey Li select PROC_PID_ARCH_STATUS if PROC_FS 32550468e43SJarkko Sakkinen select HAVE_ARCH_NODE_DEV_GROUP if X86_SGX 326d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_16B if X86_64 || X86_ALIGNMENT_16 327d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_4B 3289e2b4be3SNayna Jain imply IMA_SECURE_AND_OR_TRUSTED_BOOT if EFI 329ceea991aSJiri Olsa select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 3304817f70cSQi Zheng select ARCH_SUPPORTS_PT_RECLAIM if X86_64 3317bd291abSPeter Zijlstra select ARCH_SUPPORTS_SCHED_SMT if SMP 3327bd291abSPeter Zijlstra select SCHED_SMT if SMP 3337bd291abSPeter Zijlstra select ARCH_SUPPORTS_SCHED_CLUSTER if SMP 3347bd291abSPeter Zijlstra select ARCH_SUPPORTS_SCHED_MC if SMP 3357d8330a5SBalbir Singh 336ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER 3373120e25eSJan Beulich def_bool y 3383120e25eSJan Beulich depends on KPROBES || PERF_EVENTS || UPROBES 339ba7e4d13SIngo Molnar 34051b26adaSLinus Torvaldsconfig OUTPUT_FORMAT 34151b26adaSLinus Torvalds string 34251b26adaSLinus Torvalds default "elf32-i386" if X86_32 34351b26adaSLinus Torvalds default "elf64-x86-64" if X86_64 34451b26adaSLinus Torvalds 3458d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT 3463c2362e6SHarvey Harrison def_bool y 3478d5fffb9SSam Ravnborg 3488d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT 3493c2362e6SHarvey Harrison def_bool y 3508d5fffb9SSam Ravnborg 3518d5fffb9SSam Ravnborgconfig MMU 3523c2362e6SHarvey Harrison def_bool y 3538d5fffb9SSam Ravnborg 3549e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN 3559e08f57dSDaniel Cashman default 28 if 64BIT 3569e08f57dSDaniel Cashman default 8 3579e08f57dSDaniel Cashman 3589e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX 3599e08f57dSDaniel Cashman default 32 if 64BIT 3609e08f57dSDaniel Cashman default 16 3619e08f57dSDaniel Cashman 3629e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3639e08f57dSDaniel Cashman default 8 3649e08f57dSDaniel Cashman 3659e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3669e08f57dSDaniel Cashman default 16 3679e08f57dSDaniel Cashman 3688d5fffb9SSam Ravnborgconfig SBUS 3698d5fffb9SSam Ravnborg bool 3708d5fffb9SSam Ravnborg 3718d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA 3723120e25eSJan Beulich def_bool y 3733120e25eSJan Beulich depends on ISA_DMA_API 3748d5fffb9SSam Ravnborg 375d911c67eSAlexander Potapenkoconfig GENERIC_CSUM 376d911c67eSAlexander Potapenko bool 377d911c67eSAlexander Potapenko default y if KMSAN || KASAN 378d911c67eSAlexander Potapenko 3798d5fffb9SSam Ravnborgconfig GENERIC_BUG 3803c2362e6SHarvey Harrison def_bool y 3818d5fffb9SSam Ravnborg depends on BUG 382b93a531eSJan Beulich select GENERIC_BUG_RELATIVE_POINTERS if X86_64 383b93a531eSJan Beulich 384b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS 385b93a531eSJan Beulich bool 3868d5fffb9SSam Ravnborg 3878d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC 3883120e25eSJan Beulich def_bool y 3893120e25eSJan Beulich depends on ISA_DMA_API 3908d5fffb9SSam Ravnborg 3911032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY 3921032c0baSSam Ravnborg def_bool y 3931032c0baSSam Ravnborg 3949a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX 3959a0b8415Svenkatesh.pallipadi@intel.com def_bool y 3968d5fffb9SSam Ravnborg 397801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE 398801e4062SJohannes Berg def_bool y 399801e4062SJohannes Berg 400f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 401f4cb5700SJohannes Berg def_bool y 402f4cb5700SJohannes Berg 4038d5fffb9SSam Ravnborgconfig AUDIT_ARCH 404e0fd24a3SJan Beulich def_bool y if X86_64 4058d5fffb9SSam Ravnborg 406d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET 407d6f2d75aSAndrey Ryabinin hex 408d6f2d75aSAndrey Ryabinin depends on KASAN 409d6f2d75aSAndrey Ryabinin default 0xdffffc0000000000 410d6f2d75aSAndrey Ryabinin 41169575d38SShane Wangconfig HAVE_INTEL_TXT 41269575d38SShane Wang def_bool y 4136ea30386SKees Cook depends on INTEL_IOMMU && ACPI 41469575d38SShane Wang 4152b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES 4162b144498SSrikar Dronamraju def_bool y 4172b144498SSrikar Dronamraju 418d20642f0SRob Herringconfig FIX_EARLYCON_MEM 419d20642f0SRob Herring def_bool y 420d20642f0SRob Herring 42194d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK 42294d49eb3SKirill A. Shutemov bool 42394d49eb3SKirill A. Shutemov 42498233368SKirill A. Shutemovconfig PGTABLE_LEVELS 42598233368SKirill A. Shutemov int 4267212b58dSKirill A. Shutemov default 5 if X86_64 42798233368SKirill A. Shutemov default 3 if X86_PAE 42898233368SKirill A. Shutemov default 2 42998233368SKirill A. Shutemov 430506f1d07SSam Ravnborgmenu "Processor type and features" 431506f1d07SSam Ravnborg 432506f1d07SSam Ravnborgconfig SMP 433506f1d07SSam Ravnborg bool "Symmetric multi-processing support" 434a7f7f624SMasahiro Yamada help 435506f1d07SSam Ravnborg This enables support for systems with more than one CPU. If you have 4364a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 4374a474157SRobert Graffham than one CPU, say Y. 438506f1d07SSam Ravnborg 4394a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 440506f1d07SSam Ravnborg machines, but will use only one CPU of a multiprocessor machine. If 441506f1d07SSam Ravnborg you say Y here, the kernel will run on many, but not all, 4424a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 443506f1d07SSam Ravnborg will run faster if you say N here. 444506f1d07SSam Ravnborg 445506f1d07SSam Ravnborg Note that if you say Y here and choose architecture "586" or 446506f1d07SSam Ravnborg "Pentium" under "Processor family", the kernel will not work on 486 447506f1d07SSam Ravnborg architectures. Similarly, multiprocessor kernels for the "PPro" 448506f1d07SSam Ravnborg architecture may not work on all Pentium based boards. 449506f1d07SSam Ravnborg 450506f1d07SSam Ravnborg People using multiprocessor machines who say Y here should also say 451506f1d07SSam Ravnborg Y to "Enhanced Real Time Clock Support", below. The "Advanced Power 452506f1d07SSam Ravnborg Management" code will be disabled if you say Y here. 453506f1d07SSam Ravnborg 454ff61f079SJonathan Corbet See also <file:Documentation/arch/x86/i386/IO-APIC.rst>, 4554f4cfa6cSMauro Carvalho Chehab <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at 456506f1d07SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 457506f1d07SSam Ravnborg 458506f1d07SSam Ravnborg If you don't know what to do here, say N. 459506f1d07SSam Ravnborg 46006cd9a7dSYinghai Luconfig X86_X2APIC 4619232c49fSMateusz Jończyk bool "x2APIC interrupt controller architecture support" 46219e3d60dSJan Kiszka depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) 4639232c49fSMateusz Jończyk default y 464a7f7f624SMasahiro Yamada help 4659232c49fSMateusz Jończyk x2APIC is an interrupt controller architecture, a component of which 4669232c49fSMateusz Jończyk (the local APIC) is present in the CPU. It allows faster access to 4679232c49fSMateusz Jończyk the local APIC and supports a larger number of CPUs in the system 4689232c49fSMateusz Jończyk than the predecessors. 46906cd9a7dSYinghai Lu 4709232c49fSMateusz Jończyk x2APIC was introduced in Intel CPUs around 2008 and in AMD EPYC CPUs 4719232c49fSMateusz Jończyk in 2019, but it can be disabled by the BIOS. It is also frequently 4729232c49fSMateusz Jończyk emulated in virtual machines, even when the host CPU does not support 4739232c49fSMateusz Jończyk it. Support in the CPU can be checked by executing 47499bb1bd8SMateusz Jończyk grep x2apic /proc/cpuinfo 47506cd9a7dSYinghai Lu 47699bb1bd8SMateusz Jończyk If this configuration option is disabled, the kernel will boot with 47799bb1bd8SMateusz Jończyk very reduced functionality and performance on some platforms that 47899bb1bd8SMateusz Jończyk have x2APIC enabled. On the other hand, on hardware that does not 47999bb1bd8SMateusz Jończyk support x2APIC, a kernel with this option enabled will just fallback 48099bb1bd8SMateusz Jończyk to older APIC implementations. 481b8d1d163SDaniel Sneddon 48299bb1bd8SMateusz Jończyk If in doubt, say Y. 48306cd9a7dSYinghai Lu 48430c2b98aSNeeraj Upadhyayconfig AMD_SECURE_AVIC 48530c2b98aSNeeraj Upadhyay bool "AMD Secure AVIC" 48630c2b98aSNeeraj Upadhyay depends on AMD_MEM_ENCRYPT && X86_X2APIC 48730c2b98aSNeeraj Upadhyay help 48830c2b98aSNeeraj Upadhyay Enable this to get AMD Secure AVIC support on guests that have this feature. 48930c2b98aSNeeraj Upadhyay 49030c2b98aSNeeraj Upadhyay AMD Secure AVIC provides hardware acceleration for performance sensitive 49130c2b98aSNeeraj Upadhyay APIC accesses and support for managing guest owned APIC state for SEV-SNP 49230c2b98aSNeeraj Upadhyay guests. Secure AVIC does not support xAPIC mode. It has functional 49330c2b98aSNeeraj Upadhyay dependency on x2apic being enabled in the guest. 49430c2b98aSNeeraj Upadhyay 49530c2b98aSNeeraj Upadhyay If you don't know what to do here, say N. 49630c2b98aSNeeraj Upadhyay 4977fec07fdSJacob Panconfig X86_POSTED_MSI 4987fec07fdSJacob Pan bool "Enable MSI and MSI-x delivery by posted interrupts" 4997fec07fdSJacob Pan depends on X86_64 && IRQ_REMAP 5007fec07fdSJacob Pan help 5017fec07fdSJacob Pan This enables MSIs that are under interrupt remapping to be delivered as 5027fec07fdSJacob Pan posted interrupts to the host kernel. Interrupt throughput can 5037fec07fdSJacob Pan potentially be improved by coalescing CPU notifications during high 5047fec07fdSJacob Pan frequency bursts. 5057fec07fdSJacob Pan 5067fec07fdSJacob Pan If you don't know what to do here, say N. 5077fec07fdSJacob Pan 5086695c85bSYinghai Luconfig X86_MPPARSE 5094590d98fSAndy Shevchenko bool "Enable MPS table" if ACPI 5107a527688SJan Beulich default y 5115ab74722SIngo Molnar depends on X86_LOCAL_APIC 512a7f7f624SMasahiro Yamada help 5136695c85bSYinghai Lu For old smp systems that do not have proper acpi support. Newer systems 5146695c85bSYinghai Lu (esp with 64bit cpus) with acpi support, MADT and DSDT will override it 5156695c85bSYinghai Lu 516e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL 517e6d42931SJohannes Weiner bool "x86 CPU resource control support" 5186fe07ce3SBabu Moger depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD) 519bff70402SJames Morse depends on MISC_FILESYSTEMS 520bff70402SJames Morse select ARCH_HAS_CPU_RESCTRL 521bff70402SJames Morse select RESCTRL_FS 52270288405SJames Morse select RESCTRL_FS_PSEUDO_LOCK 52378e99b4aSFenghua Yu help 524e6d42931SJohannes Weiner Enable x86 CPU resource control support. 5256fe07ce3SBabu Moger 5266fe07ce3SBabu Moger Provide support for the allocation and monitoring of system resources 5276fe07ce3SBabu Moger usage by the CPU. 5286fe07ce3SBabu Moger 5296fe07ce3SBabu Moger Intel calls this Intel Resource Director Technology 5306fe07ce3SBabu Moger (Intel(R) RDT). More information about RDT can be found in the 5316fe07ce3SBabu Moger Intel x86 Architecture Software Developer Manual. 5326fe07ce3SBabu Moger 5336fe07ce3SBabu Moger AMD calls this AMD Platform Quality of Service (AMD QoS). 5346fe07ce3SBabu Moger More information about AMD QoS can be found in the AMD64 Technology 5356fe07ce3SBabu Moger Platform Quality of Service Extensions manual. 53678e99b4aSFenghua Yu 53778e99b4aSFenghua Yu Say N if unsure. 53878e99b4aSFenghua Yu 5392cce9591SH. Peter Anvin (Intel)config X86_FRED 5402cce9591SH. Peter Anvin (Intel) bool "Flexible Return and Event Delivery" 5412cce9591SH. Peter Anvin (Intel) depends on X86_64 5422cce9591SH. Peter Anvin (Intel) help 5432cce9591SH. Peter Anvin (Intel) When enabled, try to use Flexible Return and Event Delivery 5442cce9591SH. Peter Anvin (Intel) instead of the legacy SYSCALL/SYSENTER/IDT architecture for 5452cce9591SH. Peter Anvin (Intel) ring transitions and exception/interrupt handling if the 5463c41786cSPaul Menzel system supports it. 5472cce9591SH. Peter Anvin (Intel) 548c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM 549c5c606d9SRavikiran G Thirumalai bool "Support for extended (non-PC) x86 platforms" 550c5c606d9SRavikiran G Thirumalai default y 551a7f7f624SMasahiro Yamada help 55206ac8346SIngo Molnar If you disable this option then the kernel will only support 55306ac8346SIngo Molnar standard PC platforms. (which covers the vast majority of 55406ac8346SIngo Molnar systems out there.) 55506ac8346SIngo Molnar 5568425091fSRavikiran G Thirumalai If you enable this option then you'll be able to select support 55771d99ea4SMasahiro Yamada for the following non-PC x86 platforms, depending on the value of 55871d99ea4SMasahiro Yamada CONFIG_64BIT. 55971d99ea4SMasahiro Yamada 56071d99ea4SMasahiro Yamada 32-bit platforms (CONFIG_64BIT=n): 5614047e877SMateusz Jończyk Goldfish (mostly Android emulator) 5624047e877SMateusz Jończyk Intel CE media processor (CE4100) SoC 5634047e877SMateusz Jończyk Intel Quark 5648425091fSRavikiran G Thirumalai RDC R-321x SoC 56506ac8346SIngo Molnar 56671d99ea4SMasahiro Yamada 64-bit platforms (CONFIG_64BIT=y): 56744b111b5SSteffen Persvold Numascale NumaChip 5688425091fSRavikiran G Thirumalai ScaleMP vSMP 5698425091fSRavikiran G Thirumalai SGI Ultraviolet 570ca5955ddSArnd Bergmann Merrifield/Moorefield MID devices 5714047e877SMateusz Jończyk Goldfish (mostly Android emulator) 5728425091fSRavikiran G Thirumalai 5738425091fSRavikiran G Thirumalai If you have one of these systems, or if you want to build a 5748425091fSRavikiran G Thirumalai generic distribution kernel, say Y here - otherwise say N. 57571d99ea4SMasahiro Yamada 576c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms 577c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 57844b111b5SSteffen Persvoldconfig X86_NUMACHIP 57944b111b5SSteffen Persvold bool "Numascale NumaChip" 58044b111b5SSteffen Persvold depends on X86_64 58144b111b5SSteffen Persvold depends on X86_EXTENDED_PLATFORM 58244b111b5SSteffen Persvold depends on NUMA 58344b111b5SSteffen Persvold depends on SMP 58444b111b5SSteffen Persvold depends on X86_X2APIC 585f9726bfdSDaniel J Blueman depends on PCI_MMCONFIG 586a7f7f624SMasahiro Yamada help 58744b111b5SSteffen Persvold Adds support for Numascale NumaChip large-SMP systems. Needed to 58844b111b5SSteffen Persvold enable more than ~168 cores. 58944b111b5SSteffen Persvold If you don't have one of these, you should say N here. 59003b48632SNick Piggin 5916a48565eSIngo Molnarconfig X86_VSMP 592c5c606d9SRavikiran G Thirumalai bool "ScaleMP vSMP" 5936276a074SBorislav Petkov select HYPERVISOR_GUEST 5946a48565eSIngo Molnar select PARAVIRT 5956a48565eSIngo Molnar depends on X86_64 && PCI 596c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 597ead91d4bSShai Fultheim depends on SMP 598a7f7f624SMasahiro Yamada help 5996a48565eSIngo Molnar Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is 6006a48565eSIngo Molnar supposed to run on these EM64T-based machines. Only choose this option 6016a48565eSIngo Molnar if you have one of these machines. 6026a48565eSIngo Molnar 603c5c606d9SRavikiran G Thirumalaiconfig X86_UV 604c5c606d9SRavikiran G Thirumalai bool "SGI Ultraviolet" 605c5c606d9SRavikiran G Thirumalai depends on X86_64 606c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 60754c28d29SJack Steiner depends on NUMA 6081ecb4ae5SAndrew Morton depends on EFI 609c2209ea5SIngo Molnar depends on KEXEC_CORE 6109d6c26e7SSuresh Siddha depends on X86_X2APIC 6111222e564SIngo Molnar depends on PCI 612a7f7f624SMasahiro Yamada help 613c5c606d9SRavikiran G Thirumalai This option is needed in order to support SGI Ultraviolet systems. 614c5c606d9SRavikiran G Thirumalai If you don't have one of these, you should say N here. 615c5c606d9SRavikiran G Thirumalai 616ca5955ddSArnd Bergmannconfig X86_INTEL_MID 617ca5955ddSArnd Bergmann bool "Intel Z34xx/Z35xx MID platform support" 618ca5955ddSArnd Bergmann depends on X86_EXTENDED_PLATFORM 619ca5955ddSArnd Bergmann depends on X86_PLATFORM_DEVICES 620ca5955ddSArnd Bergmann depends on PCI 621ca5955ddSArnd Bergmann depends on X86_64 || (EXPERT && PCI_GOANY) 622ca5955ddSArnd Bergmann depends on X86_IO_APIC 623ca5955ddSArnd Bergmann select I2C 624ca5955ddSArnd Bergmann select DW_APB_TIMER 625ca5955ddSArnd Bergmann select INTEL_SCU_PCI 626ca5955ddSArnd Bergmann help 627ca5955ddSArnd Bergmann Select to build a kernel capable of supporting 64-bit Intel MID 628ca5955ddSArnd Bergmann (Mobile Internet Device) platform systems which do not have 629ca5955ddSArnd Bergmann the PCI legacy interfaces. 630ca5955ddSArnd Bergmann 631ca5955ddSArnd Bergmann The only supported devices are the 22nm Merrified (Z34xx) 632ca5955ddSArnd Bergmann and Moorefield (Z35xx) SoC used in the Intel Edison board and 633ca5955ddSArnd Bergmann a small number of Android devices such as the Asus Zenfone 2, 634ca5955ddSArnd Bergmann Asus FonePad 8 and Dell Venue 7. 635ca5955ddSArnd Bergmann 636ca5955ddSArnd Bergmann If you are building for a PC class system or non-MID tablet 637ca5955ddSArnd Bergmann SoCs like Bay Trail (Z36xx/Z37xx), say N here. 638ca5955ddSArnd Bergmann 639ca5955ddSArnd Bergmann Intel MID platforms are based on an Intel processor and chipset which 640ca5955ddSArnd Bergmann consume less power than most of the x86 derivatives. 641506f1d07SSam Ravnborg 642ddd70cf9SJun Nakajimaconfig X86_GOLDFISH 643ddd70cf9SJun Nakajima bool "Goldfish (Virtual Platform)" 644cb7b8023SBen Hutchings depends on X86_EXTENDED_PLATFORM 645a7f7f624SMasahiro Yamada help 646ddd70cf9SJun Nakajima Enable support for the Goldfish virtual platform used primarily 647ddd70cf9SJun Nakajima for Android development. Unless you are building for the Android 648ddd70cf9SJun Nakajima Goldfish emulator say N here. 649ddd70cf9SJun Nakajima 650ca5955ddSArnd Bergmann# Following is an alphabetically sorted list of 32 bit extended platforms 651ca5955ddSArnd Bergmann# Please maintain the alphabetic order if and when there are additions 652ca5955ddSArnd Bergmann 653c751e17bSThomas Gleixnerconfig X86_INTEL_CE 654c751e17bSThomas Gleixner bool "CE4100 TV platform" 655c751e17bSThomas Gleixner depends on PCI 656c751e17bSThomas Gleixner depends on PCI_GODIRECT 6576084a6e2SJiang Liu depends on X86_IO_APIC 658c751e17bSThomas Gleixner depends on X86_32 659c751e17bSThomas Gleixner depends on X86_EXTENDED_PLATFORM 66037bc9f50SDirk Brandewie select X86_REBOOTFIXUPS 661da6b737bSSebastian Andrzej Siewior select OF 662da6b737bSSebastian Andrzej Siewior select OF_EARLY_FLATTREE 663a7f7f624SMasahiro Yamada help 664c751e17bSThomas Gleixner Select for the Intel CE media processor (CE4100) SOC. 665c751e17bSThomas Gleixner This option compiles in support for the CE4100 SOC for settop 666c751e17bSThomas Gleixner boxes and media devices. 667c751e17bSThomas Gleixner 6688bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK 6698bbc2a13SBryan O'Donoghue bool "Intel Quark platform support" 6708bbc2a13SBryan O'Donoghue depends on X86_32 6718bbc2a13SBryan O'Donoghue depends on X86_EXTENDED_PLATFORM 6728bbc2a13SBryan O'Donoghue depends on X86_PLATFORM_DEVICES 6738bbc2a13SBryan O'Donoghue depends on X86_TSC 6748bbc2a13SBryan O'Donoghue depends on PCI 6758bbc2a13SBryan O'Donoghue depends on PCI_GOANY 6768bbc2a13SBryan O'Donoghue depends on X86_IO_APIC 6778bbc2a13SBryan O'Donoghue select IOSF_MBI 6788bbc2a13SBryan O'Donoghue select INTEL_IMR 6799ab6eb51SAndy Shevchenko select COMMON_CLK 680a7f7f624SMasahiro Yamada help 6818bbc2a13SBryan O'Donoghue Select to include support for Quark X1000 SoC. 6828bbc2a13SBryan O'Donoghue Say Y here if you have a Quark based system such as the Arduino 6838bbc2a13SBryan O'Donoghue compatible Intel Galileo. 6848bbc2a13SBryan O'Donoghue 685e35e328dSMateusz Jończykconfig X86_RDC321X 686e35e328dSMateusz Jończyk bool "RDC R-321x SoC" 687e35e328dSMateusz Jończyk depends on X86_32 688e35e328dSMateusz Jończyk depends on X86_EXTENDED_PLATFORM 689e35e328dSMateusz Jończyk select M486 690e35e328dSMateusz Jończyk select X86_REBOOTFIXUPS 691e35e328dSMateusz Jończyk help 692e35e328dSMateusz Jończyk This option is needed for RDC R-321x system-on-chip, also known 693e35e328dSMateusz Jończyk as R-8610-(G). 694e35e328dSMateusz Jończyk If you don't have one of these chips, you should say N here. 695e35e328dSMateusz Jończyk 6963d48aab1SMika Westerbergconfig X86_INTEL_LPSS 6973d48aab1SMika Westerberg bool "Intel Low Power Subsystem Support" 6985962dd22SSinan Kaya depends on X86 && ACPI && PCI 6993d48aab1SMika Westerberg select COMMON_CLK 7000f531431SMathias Nyman select PINCTRL 701eebb3e8dSAndy Shevchenko select IOSF_MBI 702a7f7f624SMasahiro Yamada help 7033d48aab1SMika Westerberg Select to build support for Intel Low Power Subsystem such as 7043d48aab1SMika Westerberg found on Intel Lynxpoint PCH. Selecting this option enables 7050f531431SMathias Nyman things like clock tree (common clock framework) and pincontrol 7060f531431SMathias Nyman which are needed by the LPSS peripheral drivers. 7073d48aab1SMika Westerberg 70892082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE 70992082a88SKen Xue bool "AMD ACPI2Platform devices support" 71092082a88SKen Xue depends on ACPI 71192082a88SKen Xue select COMMON_CLK 71292082a88SKen Xue select PINCTRL 713a7f7f624SMasahiro Yamada help 71492082a88SKen Xue Select to interpret AMD specific ACPI device to platform device 71592082a88SKen Xue such as I2C, UART, GPIO found on AMD Carrizo and later chipsets. 71692082a88SKen Xue I2C and UART depend on COMMON_CLK to set clock. GPIO driver is 71792082a88SKen Xue implemented under PINCTRL subsystem. 71892082a88SKen Xue 719ced3ce76SDavid E. Boxconfig IOSF_MBI 720ced3ce76SDavid E. Box tristate "Intel SoC IOSF Sideband support for SoC platforms" 721ced3ce76SDavid E. Box depends on PCI 722a7f7f624SMasahiro Yamada help 723ced3ce76SDavid E. Box This option enables sideband register access support for Intel SoC 724ced3ce76SDavid E. Box platforms. On these platforms the IOSF sideband is used in lieu of 725ced3ce76SDavid E. Box MSR's for some register accesses, mostly but not limited to thermal 726ced3ce76SDavid E. Box and power. Drivers may query the availability of this device to 727ced3ce76SDavid E. Box determine if they need the sideband in order to work on these 728ced3ce76SDavid E. Box platforms. The sideband is available on the following SoC products. 729ced3ce76SDavid E. Box This list is not meant to be exclusive. 730ced3ce76SDavid E. Box - BayTrail 731ced3ce76SDavid E. Box - Braswell 732ced3ce76SDavid E. Box - Quark 733ced3ce76SDavid E. Box 734ced3ce76SDavid E. Box You should say Y if you are running a kernel on one of these SoC's. 735ced3ce76SDavid E. Box 736ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG 737ed2226bdSDavid E. Box bool "Enable IOSF sideband access through debugfs" 738ed2226bdSDavid E. Box depends on IOSF_MBI && DEBUG_FS 739a7f7f624SMasahiro Yamada help 740ed2226bdSDavid E. Box Select this option to expose the IOSF sideband access registers (MCR, 741ed2226bdSDavid E. Box MDR, MCRX) through debugfs to write and read register information from 742ed2226bdSDavid E. Box different units on the SoC. This is most useful for obtaining device 743ed2226bdSDavid E. Box state information for debug and analysis. As this is a general access 744ed2226bdSDavid E. Box mechanism, users of this option would have specific knowledge of the 745ed2226bdSDavid E. Box device they want to access. 746ed2226bdSDavid E. Box 747ed2226bdSDavid E. Box If you don't require the option or are in doubt, say N. 748ed2226bdSDavid E. Box 749d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE 7506fc108a0SJan Beulich def_bool y 751d949f36fSLinus Torvalds # MCE code calls memory_failure(): 752d949f36fSLinus Torvalds depends on X86_MCE 753d949f36fSLinus Torvalds # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags: 754d949f36fSLinus Torvalds # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH: 755d949f36fSLinus Torvalds depends on X86_64 || !SPARSEMEM 756d949f36fSLinus Torvalds select ARCH_SUPPORTS_MEMORY_FAILURE 757d949f36fSLinus Torvalds 75882148d1dSShérabconfig X86_32_IRIS 75982148d1dSShérab tristate "Eurobraille/Iris poweroff module" 76082148d1dSShérab depends on X86_32 761a7f7f624SMasahiro Yamada help 76282148d1dSShérab The Iris machines from EuroBraille do not have APM or ACPI support 76382148d1dSShérab to shut themselves down properly. A special I/O sequence is 76482148d1dSShérab needed to do so, which is what this module does at 76582148d1dSShérab kernel shutdown. 76682148d1dSShérab 76782148d1dSShérab This is only for Iris machines from EuroBraille. 76882148d1dSShérab 76982148d1dSShérab If unused, say N. 77082148d1dSShérab 771ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 7723c2362e6SHarvey Harrison def_bool y 7733c2362e6SHarvey Harrison prompt "Single-depth WCHAN output" 774a87d0914SKen Chen depends on X86 775a7f7f624SMasahiro Yamada help 776506f1d07SSam Ravnborg Calculate simpler /proc/<PID>/wchan values. If this option 777506f1d07SSam Ravnborg is disabled then wchan values will recurse back to the 778506f1d07SSam Ravnborg caller function. This provides more accurate wchan values, 779506f1d07SSam Ravnborg at the expense of slightly more scheduling overhead. 780506f1d07SSam Ravnborg 781506f1d07SSam Ravnborg If in doubt, say "Y". 782506f1d07SSam Ravnborg 7836276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST 7846276a074SBorislav Petkov bool "Linux guest support" 785a7f7f624SMasahiro Yamada help 7866276a074SBorislav Petkov Say Y here to enable options for running Linux under various hyper- 7876276a074SBorislav Petkov visors. This option enables basic hypervisor detection and platform 7886276a074SBorislav Petkov setup. 789506f1d07SSam Ravnborg 7906276a074SBorislav Petkov If you say N, all options in this submenu will be skipped and 7916276a074SBorislav Petkov disabled, and Linux guest support won't be built in. 792506f1d07SSam Ravnborg 7936276a074SBorislav Petkovif HYPERVISOR_GUEST 794506f1d07SSam Ravnborg 795e61bd94aSEduardo Pereira Habkostconfig PARAVIRT 796e61bd94aSEduardo Pereira Habkost bool "Enable paravirtualization code" 797a0e2bf7cSJuergen Gross depends on HAVE_STATIC_CALL 798a7f7f624SMasahiro Yamada help 799e61bd94aSEduardo Pereira Habkost This changes the kernel so it can modify itself when it is run 800e61bd94aSEduardo Pereira Habkost under a hypervisor, potentially improving performance significantly 801e61bd94aSEduardo Pereira Habkost over full virtualization. However, when run without a hypervisor 802e61bd94aSEduardo Pereira Habkost the kernel is theoretically slower and slightly larger. 803e61bd94aSEduardo Pereira Habkost 804c00a280aSJuergen Grossconfig PARAVIRT_XXL 805c00a280aSJuergen Gross bool 80609230b75SKirill A. Shutemov depends on X86_64 807c00a280aSJuergen Gross 8086276a074SBorislav Petkovconfig PARAVIRT_DEBUG 8096276a074SBorislav Petkov bool "paravirt-ops debugging" 8106276a074SBorislav Petkov depends on PARAVIRT && DEBUG_KERNEL 811a7f7f624SMasahiro Yamada help 8126276a074SBorislav Petkov Enable to debug paravirt_ops internals. Specifically, BUG if 8136276a074SBorislav Petkov a paravirt_op is missing when it is called. 8146276a074SBorislav Petkov 815b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS 816b4ecc126SJeremy Fitzhardinge bool "Paravirtualization layer for spinlocks" 8176ea30386SKees Cook depends on PARAVIRT && SMP 818a7f7f624SMasahiro Yamada help 819b4ecc126SJeremy Fitzhardinge Paravirtualized spinlocks allow a pvops backend to replace the 820b4ecc126SJeremy Fitzhardinge spinlock implementation with something virtualization-friendly 821b4ecc126SJeremy Fitzhardinge (for example, block the virtual CPU rather than spinning). 822b4ecc126SJeremy Fitzhardinge 8234c4e4f61SRaghavendra K T It has a minimal impact on native kernels and gives a nice performance 8244c4e4f61SRaghavendra K T benefit on paravirtualized KVM / Xen kernels. 825b4ecc126SJeremy Fitzhardinge 8264c4e4f61SRaghavendra K T If you are unsure how to answer this question, answer Y. 827b4ecc126SJeremy Fitzhardinge 828ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR 829ecca2502SZhao Yakui def_bool n 830ecca2502SZhao Yakui 8316276a074SBorislav Petkovsource "arch/x86/xen/Kconfig" 8326276a074SBorislav Petkov 8336276a074SBorislav Petkovconfig KVM_GUEST 8346276a074SBorislav Petkov bool "KVM Guest support (including kvmclock)" 8356276a074SBorislav Petkov depends on PARAVIRT 8366276a074SBorislav Petkov select PARAVIRT_CLOCK 837a1c4423bSMarcelo Tosatti select ARCH_CPUIDLE_HALTPOLL 838b1d40575SVitaly Kuznetsov select X86_HV_CALLBACK_VECTOR 8396276a074SBorislav Petkov default y 840a7f7f624SMasahiro Yamada help 8416276a074SBorislav Petkov This option enables various optimizations for running under the KVM 8426276a074SBorislav Petkov hypervisor. It includes a paravirtualized clock, so that instead 8436276a074SBorislav Petkov of relying on a PIT (or probably other) emulation by the 8446276a074SBorislav Petkov underlying device model, the host provides the guest with 8456276a074SBorislav Petkov timing infrastructure such as time of day, and system time 8466276a074SBorislav Petkov 847a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL 848a1c4423bSMarcelo Tosatti def_bool n 849a1c4423bSMarcelo Tosatti prompt "Disable host haltpoll when loading haltpoll driver" 850a1c4423bSMarcelo Tosatti help 851a1c4423bSMarcelo Tosatti If virtualized under KVM, disable host haltpoll. 852a1c4423bSMarcelo Tosatti 8537733607fSMaran Wilsonconfig PVH 8547733607fSMaran Wilson bool "Support for running PVH guests" 855a7f7f624SMasahiro Yamada help 8567733607fSMaran Wilson This option enables the PVH entry point for guest virtual machines 8577733607fSMaran Wilson as specified in the x86/HVM direct boot ABI. 8587733607fSMaran Wilson 8596276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING 8606276a074SBorislav Petkov bool "Paravirtual steal time accounting" 8616276a074SBorislav Petkov depends on PARAVIRT 862a7f7f624SMasahiro Yamada help 8636276a074SBorislav Petkov Select this option to enable fine granularity task steal time 8646276a074SBorislav Petkov accounting. Time spent executing other tasks in parallel with 8656276a074SBorislav Petkov the current vCPU is discounted from the vCPU power. To account for 8666276a074SBorislav Petkov that, there can be a small performance impact. 8676276a074SBorislav Petkov 8686276a074SBorislav Petkov If in doubt, say N here. 8696276a074SBorislav Petkov 8707af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK 8717af192c9SGerd Hoffmann bool 8727af192c9SGerd Hoffmann 8734a362601SJan Kiszkaconfig JAILHOUSE_GUEST 8744a362601SJan Kiszka bool "Jailhouse non-root cell support" 875abde587bSArnd Bergmann depends on X86_64 && PCI 87687e65d05SJan Kiszka select X86_PM_TIMER 877a7f7f624SMasahiro Yamada help 8784a362601SJan Kiszka This option allows to run Linux as guest in a Jailhouse non-root 8794a362601SJan Kiszka cell. You can leave this option disabled if you only want to start 8804a362601SJan Kiszka Jailhouse and run Linux afterwards in the root cell. 8814a362601SJan Kiszka 882ec7972c9SZhao Yakuiconfig ACRN_GUEST 883ec7972c9SZhao Yakui bool "ACRN Guest support" 884ec7972c9SZhao Yakui depends on X86_64 885498ad393SZhao Yakui select X86_HV_CALLBACK_VECTOR 886ec7972c9SZhao Yakui help 887ec7972c9SZhao Yakui This option allows to run Linux as guest in the ACRN hypervisor. ACRN is 888ec7972c9SZhao Yakui a flexible, lightweight reference open-source hypervisor, built with 889ec7972c9SZhao Yakui real-time and safety-criticality in mind. It is built for embedded 890ec7972c9SZhao Yakui IOT with small footprint and real-time features. More details can be 891ec7972c9SZhao Yakui found in https://projectacrn.org/. 892ec7972c9SZhao Yakui 893fa1d1171SDavid Woodhouseconfig BHYVE_GUEST 894fa1d1171SDavid Woodhouse bool "Bhyve (BSD Hypervisor) Guest support" 895fa1d1171SDavid Woodhouse depends on X86_64 896fa1d1171SDavid Woodhouse help 897fa1d1171SDavid Woodhouse This option allows to run Linux to recognise when it is running as a 898fa1d1171SDavid Woodhouse guest in the Bhyve hypervisor, and to support more than 255 vCPUs when 899fa1d1171SDavid Woodhouse when doing so. More details about Bhyve can be found at https://bhyve.org 900fa1d1171SDavid Woodhouse and https://wiki.freebsd.org/bhyve/. 901fa1d1171SDavid Woodhouse 90259bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST 90359bd54a8SKuppuswamy Sathyanarayanan bool "Intel TDX (Trust Domain Extensions) - Guest Support" 90459bd54a8SKuppuswamy Sathyanarayanan depends on X86_64 && CPU_SUP_INTEL 90559bd54a8SKuppuswamy Sathyanarayanan depends on X86_X2APIC 90675d090fdSKirill A. Shutemov depends on EFI_STUB 9079f98a4f4SVishal Annapurve depends on PARAVIRT 90841394e33SKirill A. Shutemov select ARCH_HAS_CC_PLATFORM 909968b4931SKirill A. Shutemov select X86_MEM_ENCRYPT 91077a512e3SSean Christopherson select X86_MCE 91175d090fdSKirill A. Shutemov select UNACCEPTED_MEMORY 91259bd54a8SKuppuswamy Sathyanarayanan help 91359bd54a8SKuppuswamy Sathyanarayanan Support running as a guest under Intel TDX. Without this support, 91459bd54a8SKuppuswamy Sathyanarayanan the guest kernel can not boot or run under TDX. 91559bd54a8SKuppuswamy Sathyanarayanan TDX includes memory encryption and integrity capabilities 91659bd54a8SKuppuswamy Sathyanarayanan which protect the confidentiality and integrity of guest 91759bd54a8SKuppuswamy Sathyanarayanan memory contents and CPU state. TDX guests are protected from 91859bd54a8SKuppuswamy Sathyanarayanan some attacks from the VMM. 91959bd54a8SKuppuswamy Sathyanarayanan 9206276a074SBorislav Petkovendif # HYPERVISOR_GUEST 92197349135SJeremy Fitzhardinge 922506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu" 923506f1d07SSam Ravnborg 924506f1d07SSam Ravnborgconfig HPET_TIMER 9253c2362e6SHarvey Harrison def_bool X86_64 926506f1d07SSam Ravnborg prompt "HPET Timer Support" if X86_32 927a7f7f624SMasahiro Yamada help 928506f1d07SSam Ravnborg Use the IA-PC HPET (High Precision Event Timer) to manage 929506f1d07SSam Ravnborg time in preference to the PIT and RTC, if a HPET is 930506f1d07SSam Ravnborg present. 931506f1d07SSam Ravnborg HPET is the next generation timer replacing legacy 8254s. 932506f1d07SSam Ravnborg The HPET provides a stable time base on SMP 933506f1d07SSam Ravnborg systems, unlike the TSC, but it is more expensive to access, 9344e7f9df2SMichael S. Tsirkin as it is off-chip. The interface used is documented 9354e7f9df2SMichael S. Tsirkin in the HPET spec, revision 1. 936506f1d07SSam Ravnborg 937506f1d07SSam Ravnborg You can safely choose Y here. However, HPET will only be 938506f1d07SSam Ravnborg activated if the platform and the BIOS support this feature. 939506f1d07SSam Ravnborg Otherwise the 8254 will be used for timing services. 940506f1d07SSam Ravnborg 941506f1d07SSam Ravnborg Choose N to continue using the legacy 8254 timer. 942506f1d07SSam Ravnborg 943506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC 9443c2362e6SHarvey Harrison def_bool y 9453228e1dcSAnand K Mistry depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 946506f1d07SSam Ravnborg 9476a108a14SDavid Rientjes# Mark as expert because too many people got it wrong. 948506f1d07SSam Ravnborg# The code disables itself when not needed. 9497ae9392cSThomas Petazzoniconfig DMI 9507ae9392cSThomas Petazzoni default y 951cf074402SArd Biesheuvel select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 9526a108a14SDavid Rientjes bool "Enable DMI scanning" if EXPERT 953a7f7f624SMasahiro Yamada help 9547ae9392cSThomas Petazzoni Enabled scanning of DMI to identify machine quirks. Say Y 9557ae9392cSThomas Petazzoni here unless you have verified that your setup is not 9567ae9392cSThomas Petazzoni affected by entries in the DMI blacklist. Required by PNP 9577ae9392cSThomas Petazzoni BIOS code. 9587ae9392cSThomas Petazzoni 959506f1d07SSam Ravnborgconfig GART_IOMMU 96038901f1cSAndi Kleen bool "Old AMD GART IOMMU support" 961a4ce5a48SChristoph Hellwig select IOMMU_HELPER 962506f1d07SSam Ravnborg select SWIOTLB 96323ac4ae8SAndreas Herrmann depends on X86_64 && PCI && AMD_NB 964a7f7f624SMasahiro Yamada help 965ced3c42cSIngo Molnar Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron 966ced3c42cSIngo Molnar GART based hardware IOMMUs. 967ced3c42cSIngo Molnar 968ced3c42cSIngo Molnar The GART supports full DMA access for devices with 32-bit access 969ced3c42cSIngo Molnar limitations, on systems with more than 3 GB. This is usually needed 970ced3c42cSIngo Molnar for USB, sound, many IDE/SATA chipsets and some other devices. 971ced3c42cSIngo Molnar 972ced3c42cSIngo Molnar Newer systems typically have a modern AMD IOMMU, supported via 973ced3c42cSIngo Molnar the CONFIG_AMD_IOMMU=y config option. 974ced3c42cSIngo Molnar 975ced3c42cSIngo Molnar In normal configurations this driver is only active when needed: 976ced3c42cSIngo Molnar there's more than 3 GB of memory and the system contains a 977ced3c42cSIngo Molnar 32-bit limited device. 978ced3c42cSIngo Molnar 979ced3c42cSIngo Molnar If unsure, say Y. 980506f1d07SSam Ravnborg 9818b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT 9828b766b0fSMichal Suchanek bool 9838b766b0fSMichal Suchanek help 9848b766b0fSMichal Suchanek If true, at least one selected framebuffer driver can take advantage 9858b766b0fSMichal Suchanek of VESA video modes set at an early boot stage via the vga= parameter. 9868b766b0fSMichal Suchanek 9871184dc2fSMike Travisconfig MAXSMP 988ddb0c5a6SSamuel Thibault bool "Enable Maximum number of SMP Processors and NUMA Nodes" 9896ea30386SKees Cook depends on X86_64 && SMP && DEBUG_KERNEL 99036f5101aSMike Travis select CPUMASK_OFFSTACK 991a7f7f624SMasahiro Yamada help 992ddb0c5a6SSamuel Thibault Enable maximum number of CPUS and NUMA Nodes for this architecture. 9931184dc2fSMike Travis If unsure, say N. 994506f1d07SSam Ravnborg 995aec6487eSIngo Molnar# 996aec6487eSIngo Molnar# The maximum number of CPUs supported: 997aec6487eSIngo Molnar# 998aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT, 999aec6487eSIngo Molnar# and which can be configured interactively in the 1000aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range. 1001aec6487eSIngo Molnar# 1002aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on 1003aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel. 1004aec6487eSIngo Molnar# 1005aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable 1006aec6487eSIngo Molnar# interactive configuration. ) 1007aec6487eSIngo Molnar# 1008a0d0bb4dSRandy Dunlap 1009aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN 1010a0d0bb4dSRandy Dunlap int 1011aec6487eSIngo Molnar default NR_CPUS_RANGE_END if MAXSMP 1012a0d0bb4dSRandy Dunlap default 1 if !SMP 1013a0d0bb4dSRandy Dunlap default 2 1014a0d0bb4dSRandy Dunlap 1015aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1016a0d0bb4dSRandy Dunlap int 1017a0d0bb4dSRandy Dunlap depends on X86_32 10180abf5086SArnd Bergmann default 8 if SMP 1019a0d0bb4dSRandy Dunlap default 1 if !SMP 1020a0d0bb4dSRandy Dunlap 1021aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1022a0d0bb4dSRandy Dunlap int 1023a0d0bb4dSRandy Dunlap depends on X86_64 10241edae1aeSScott Wood default 8192 if SMP && CPUMASK_OFFSTACK 10251edae1aeSScott Wood default 512 if SMP && !CPUMASK_OFFSTACK 1026a0d0bb4dSRandy Dunlap default 1 if !SMP 1027aec6487eSIngo Molnar 1028aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1029aec6487eSIngo Molnar int 1030aec6487eSIngo Molnar depends on X86_32 1031aec6487eSIngo Molnar default 8 if SMP 1032aec6487eSIngo Molnar default 1 if !SMP 1033aec6487eSIngo Molnar 1034aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1035aec6487eSIngo Molnar int 1036aec6487eSIngo Molnar depends on X86_64 1037a0d0bb4dSRandy Dunlap default 8192 if MAXSMP 1038a0d0bb4dSRandy Dunlap default 64 if SMP 1039aec6487eSIngo Molnar default 1 if !SMP 1040a0d0bb4dSRandy Dunlap 1041506f1d07SSam Ravnborgconfig NR_CPUS 104236f5101aSMike Travis int "Maximum number of CPUs" if SMP && !MAXSMP 1043aec6487eSIngo Molnar range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END 1044aec6487eSIngo Molnar default NR_CPUS_DEFAULT 1045a7f7f624SMasahiro Yamada help 1046506f1d07SSam Ravnborg This allows you to specify the maximum number of CPUs which this 1047bb61ccc7SJosh Boyer kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum 1048cad14bb9SKirill A. Shutemov supported value is 8192, otherwise the maximum value is 512. The 1049506f1d07SSam Ravnborg minimum value which makes sense is 2. 1050506f1d07SSam Ravnborg 1051aec6487eSIngo Molnar This is purely to save memory: each supported CPU adds about 8KB 1052aec6487eSIngo Molnar to the kernel image. 1053506f1d07SSam Ravnborg 1054de966cf4STim Chenconfig SCHED_MC_PRIO 1055de966cf4STim Chen bool "CPU core priorities scheduler support" 10563598e577SMeng Li depends on SCHED_MC 10573598e577SMeng Li select X86_INTEL_PSTATE if CPU_SUP_INTEL 10583598e577SMeng Li select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI 10590a21fc12SIngo Molnar select CPU_FREQ 1060de966cf4STim Chen default y 1061a7f7f624SMasahiro Yamada help 1062de966cf4STim Chen Intel Turbo Boost Max Technology 3.0 enabled CPUs have a 1063de966cf4STim Chen core ordering determined at manufacturing time, which allows 1064de966cf4STim Chen certain cores to reach higher turbo frequencies (when running 1065de966cf4STim Chen single threaded workloads) than others. 1066de966cf4STim Chen 1067de966cf4STim Chen Enabling this kernel feature teaches the scheduler about 1068de966cf4STim Chen the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the 1069de966cf4STim Chen scheduler's CPU selection logic accordingly, so that higher 1070de966cf4STim Chen overall system performance can be achieved. 1071de966cf4STim Chen 1072de966cf4STim Chen This feature will have no effect on CPUs without this feature. 1073de966cf4STim Chen 1074de966cf4STim Chen If unsure say Y here. 10755e76b2abSTim Chen 107630b8b006SThomas Gleixnerconfig UP_LATE_INIT 107730b8b006SThomas Gleixner def_bool y 1078ba360f88SThomas Gleixner depends on !SMP && X86_LOCAL_APIC 107930b8b006SThomas Gleixner 1080506f1d07SSam Ravnborgconfig X86_UP_APIC 108150849eefSJan Beulich bool "Local APIC support on uniprocessors" if !PCI_MSI 108250849eefSJan Beulich default PCI_MSI 1083dcbb01fbSArnd Bergmann depends on X86_32 && !SMP 1084a7f7f624SMasahiro Yamada help 1085506f1d07SSam Ravnborg A local APIC (Advanced Programmable Interrupt Controller) is an 1086506f1d07SSam Ravnborg integrated interrupt controller in the CPU. If you have a single-CPU 1087506f1d07SSam Ravnborg system which has a processor with a local APIC, you can say Y here to 1088506f1d07SSam Ravnborg enable and use it. If you say Y here even though your machine doesn't 1089506f1d07SSam Ravnborg have a local APIC, then the kernel will still run with no slowdown at 1090506f1d07SSam Ravnborg all. The local APIC supports CPU-generated self-interrupts (timer, 1091506f1d07SSam Ravnborg performance counters), and the NMI watchdog which detects hard 1092506f1d07SSam Ravnborg lockups. 1093506f1d07SSam Ravnborg 1094506f1d07SSam Ravnborgconfig X86_UP_IOAPIC 1095506f1d07SSam Ravnborg bool "IO-APIC support on uniprocessors" 1096506f1d07SSam Ravnborg depends on X86_UP_APIC 1097a7f7f624SMasahiro Yamada help 1098506f1d07SSam Ravnborg An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an 1099506f1d07SSam Ravnborg SMP-capable replacement for PC-style interrupt controllers. Most 1100506f1d07SSam Ravnborg SMP systems and many recent uniprocessor systems have one. 1101506f1d07SSam Ravnborg 1102506f1d07SSam Ravnborg If you have a single-CPU system with an IO-APIC, you can say Y here 1103506f1d07SSam Ravnborg to use it. If you say Y here even though your machine doesn't have 1104506f1d07SSam Ravnborg an IO-APIC, then the kernel will still run with no slowdown at all. 1105506f1d07SSam Ravnborg 1106506f1d07SSam Ravnborgconfig X86_LOCAL_APIC 11073c2362e6SHarvey Harrison def_bool y 1108dcbb01fbSArnd Bergmann depends on X86_64 || SMP || X86_UP_APIC || PCI_MSI 1109b5dc8e6cSJiang Liu select IRQ_DOMAIN_HIERARCHY 1110506f1d07SSam Ravnborg 11112b5e22afSKirill A. Shutemovconfig ACPI_MADT_WAKEUP 11122b5e22afSKirill A. Shutemov def_bool y 11132b5e22afSKirill A. Shutemov depends on X86_64 11142b5e22afSKirill A. Shutemov depends on ACPI 11152b5e22afSKirill A. Shutemov depends on SMP 11162b5e22afSKirill A. Shutemov depends on X86_LOCAL_APIC 11172b5e22afSKirill A. Shutemov 1118506f1d07SSam Ravnborgconfig X86_IO_APIC 1119b1da1e71SJan Beulich def_bool y 1120b1da1e71SJan Beulich depends on X86_LOCAL_APIC || X86_UP_IOAPIC 1121506f1d07SSam Ravnborg 112241b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS 112341b9eb26SStefan Assmann bool "Reroute for broken boot IRQs" 112441b9eb26SStefan Assmann depends on X86_IO_APIC 1125a7f7f624SMasahiro Yamada help 112641b9eb26SStefan Assmann This option enables a workaround that fixes a source of 112741b9eb26SStefan Assmann spurious interrupts. This is recommended when threaded 112841b9eb26SStefan Assmann interrupt handling is used on systems where the generation of 112941b9eb26SStefan Assmann superfluous "boot interrupts" cannot be disabled. 113041b9eb26SStefan Assmann 113141b9eb26SStefan Assmann Some chipsets generate a legacy INTx "boot IRQ" when the IRQ 113241b9eb26SStefan Assmann entry in the chipset's IO-APIC is masked (as, e.g. the RT 113341b9eb26SStefan Assmann kernel does during interrupt handling). On chipsets where this 113441b9eb26SStefan Assmann boot IRQ generation cannot be disabled, this workaround keeps 113541b9eb26SStefan Assmann the original IRQ line masked so that only the equivalent "boot 113641b9eb26SStefan Assmann IRQ" is delivered to the CPUs. The workaround also tells the 113741b9eb26SStefan Assmann kernel to set up the IRQ handler on the boot IRQ line. In this 113841b9eb26SStefan Assmann way only one interrupt is delivered to the kernel. Otherwise 113941b9eb26SStefan Assmann the spurious second interrupt may cause the kernel to bring 114041b9eb26SStefan Assmann down (vital) interrupt lines. 114141b9eb26SStefan Assmann 114241b9eb26SStefan Assmann Only affects "broken" chipsets. Interrupt sharing may be 114341b9eb26SStefan Assmann increased on these systems. 114441b9eb26SStefan Assmann 1145506f1d07SSam Ravnborgconfig X86_MCE 1146bab9bc65SAndi Kleen bool "Machine Check / overheating reporting" 1147648ed940SChen, Gong select GENERIC_ALLOCATOR 1148e57dbaf7SBorislav Petkov default y 1149a7f7f624SMasahiro Yamada help 1150bab9bc65SAndi Kleen Machine Check support allows the processor to notify the 1151bab9bc65SAndi Kleen kernel if it detects a problem (e.g. overheating, data corruption). 1152506f1d07SSam Ravnborg The action the kernel takes depends on the severity of the problem, 1153bab9bc65SAndi Kleen ranging from warning messages to halting the machine. 11544efc0670SAndi Kleen 11555de97c9fSTony Luckconfig X86_MCELOG_LEGACY 11565de97c9fSTony Luck bool "Support for deprecated /dev/mcelog character device" 11575de97c9fSTony Luck depends on X86_MCE 1158a7f7f624SMasahiro Yamada help 11595de97c9fSTony Luck Enable support for /dev/mcelog which is needed by the old mcelog 11605de97c9fSTony Luck userspace logging daemon. Consider switching to the new generation 11615de97c9fSTony Luck rasdaemon solution. 11625de97c9fSTony Luck 1163506f1d07SSam Ravnborgconfig X86_MCE_INTEL 11643c2362e6SHarvey Harrison def_bool y 11653c2362e6SHarvey Harrison prompt "Intel MCE features" 1166c1ebf835SAndi Kleen depends on X86_MCE && X86_LOCAL_APIC 1167a7f7f624SMasahiro Yamada help 1168506f1d07SSam Ravnborg Additional support for intel specific MCE features such as 1169506f1d07SSam Ravnborg the thermal monitor. 1170506f1d07SSam Ravnborg 1171506f1d07SSam Ravnborgconfig X86_MCE_AMD 11723c2362e6SHarvey Harrison def_bool y 11733c2362e6SHarvey Harrison prompt "AMD MCE features" 1174d35fb312SYazen Ghannam depends on X86_MCE && X86_LOCAL_APIC 1175a7f7f624SMasahiro Yamada help 1176506f1d07SSam Ravnborg Additional support for AMD specific MCE features such as 1177506f1d07SSam Ravnborg the DRAM Error Threshold. 1178506f1d07SSam Ravnborg 11794efc0670SAndi Kleenconfig X86_ANCIENT_MCE 11806fc108a0SJan Beulich bool "Support for old Pentium 5 / WinChip machine checks" 1181c31d9633SAndi Kleen depends on X86_32 && X86_MCE 1182a7f7f624SMasahiro Yamada help 11834efc0670SAndi Kleen Include support for machine check handling on old Pentium 5 or WinChip 11845065a706SMasanari Iida systems. These typically need to be enabled explicitly on the command 11854efc0670SAndi Kleen line. 11864efc0670SAndi Kleen 1187b2762686SAndi Kleenconfig X86_MCE_THRESHOLD 1188b2762686SAndi Kleen depends on X86_MCE_AMD || X86_MCE_INTEL 11896fc108a0SJan Beulich def_bool y 1190b2762686SAndi Kleen 1191ea149b36SAndi Kleenconfig X86_MCE_INJECT 1192bc8e80d5SBorislav Petkov depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS 1193ea149b36SAndi Kleen tristate "Machine check injector support" 1194a7f7f624SMasahiro Yamada help 1195ea149b36SAndi Kleen Provide support for injecting machine checks for testing purposes. 1196ea149b36SAndi Kleen If you don't know what a machine check is and you don't do kernel 1197ea149b36SAndi Kleen QA it is safe to say n. 1198ea149b36SAndi Kleen 119907dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig" 1200e633c65aSKan Liang 12015aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86 12021e642812SIngo Molnar bool "Legacy VM86 support" 1203506f1d07SSam Ravnborg depends on X86_32 1204a7f7f624SMasahiro Yamada help 12055aef51c3SAndy Lutomirski This option allows user programs to put the CPU into V8086 12065aef51c3SAndy Lutomirski mode, which is an 80286-era approximation of 16-bit real mode. 12075aef51c3SAndy Lutomirski 12085aef51c3SAndy Lutomirski Some very old versions of X and/or vbetool require this option 12095aef51c3SAndy Lutomirski for user mode setting. Similarly, DOSEMU will use it if 12105aef51c3SAndy Lutomirski available to accelerate real mode DOS programs. However, any 12115aef51c3SAndy Lutomirski recent version of DOSEMU, X, or vbetool should be fully 12125aef51c3SAndy Lutomirski functional even without kernel VM86 support, as they will all 12131e642812SIngo Molnar fall back to software emulation. Nevertheless, if you are using 12141e642812SIngo Molnar a 16-bit DOS program where 16-bit performance matters, vm86 12151e642812SIngo Molnar mode might be faster than emulation and you might want to 12161e642812SIngo Molnar enable this option. 12175aef51c3SAndy Lutomirski 12181e642812SIngo Molnar Note that any app that works on a 64-bit kernel is unlikely to 12191e642812SIngo Molnar need this option, as 64-bit kernels don't, and can't, support 12201e642812SIngo Molnar V8086 mode. This option is also unrelated to 16-bit protected 12211e642812SIngo Molnar mode and is not needed to run most 16-bit programs under Wine. 12225aef51c3SAndy Lutomirski 12231e642812SIngo Molnar Enabling this option increases the complexity of the kernel 12241e642812SIngo Molnar and slows down exception handling a tiny bit. 12255aef51c3SAndy Lutomirski 12261e642812SIngo Molnar If unsure, say N here. 12275aef51c3SAndy Lutomirski 12285aef51c3SAndy Lutomirskiconfig VM86 12295aef51c3SAndy Lutomirski bool 12305aef51c3SAndy Lutomirski default X86_LEGACY_VM86 123134273f41SH. Peter Anvin 123234273f41SH. Peter Anvinconfig X86_16BIT 123334273f41SH. Peter Anvin bool "Enable support for 16-bit segments" if EXPERT 123434273f41SH. Peter Anvin default y 1235a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 1236a7f7f624SMasahiro Yamada help 123734273f41SH. Peter Anvin This option is required by programs like Wine to run 16-bit 123834273f41SH. Peter Anvin protected mode legacy code on x86 processors. Disabling 123934273f41SH. Peter Anvin this option saves about 300 bytes on i386, or around 6K text 124034273f41SH. Peter Anvin plus 16K runtime memory on x86-64, 124134273f41SH. Peter Anvin 124234273f41SH. Peter Anvinconfig X86_ESPFIX32 124334273f41SH. Peter Anvin def_bool y 124434273f41SH. Peter Anvin depends on X86_16BIT && X86_32 1245506f1d07SSam Ravnborg 1246197725deSH. Peter Anvinconfig X86_ESPFIX64 1247197725deSH. Peter Anvin def_bool y 124834273f41SH. Peter Anvin depends on X86_16BIT && X86_64 1249506f1d07SSam Ravnborg 12501ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION 12511ad83c85SAndy Lutomirski bool "Enable vsyscall emulation" if EXPERT 12521ad83c85SAndy Lutomirski default y 12531ad83c85SAndy Lutomirski depends on X86_64 1254a7f7f624SMasahiro Yamada help 12551ad83c85SAndy Lutomirski This enables emulation of the legacy vsyscall page. Disabling 12561ad83c85SAndy Lutomirski it is roughly equivalent to booting with vsyscall=none, except 12571ad83c85SAndy Lutomirski that it will also disable the helpful warning if a program 12581ad83c85SAndy Lutomirski tries to use a vsyscall. With this option set to N, offending 12591ad83c85SAndy Lutomirski programs will just segfault, citing addresses of the form 12601ad83c85SAndy Lutomirski 0xffffffffff600?00. 12611ad83c85SAndy Lutomirski 12621ad83c85SAndy Lutomirski This option is required by many programs built before 2013, and 12631ad83c85SAndy Lutomirski care should be used even with newer programs if set to N. 12641ad83c85SAndy Lutomirski 12651ad83c85SAndy Lutomirski Disabling this option saves about 7K of kernel size and 12661ad83c85SAndy Lutomirski possibly 4K of additional runtime pagetable memory. 12671ad83c85SAndy Lutomirski 1268111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM 1269111e7b15SThomas Gleixner bool "IOPERM and IOPL Emulation" 1270a24ca997SThomas Gleixner default y 1271a7f7f624SMasahiro Yamada help 1272111e7b15SThomas Gleixner This enables the ioperm() and iopl() syscalls which are necessary 1273111e7b15SThomas Gleixner for legacy applications. 1274111e7b15SThomas Gleixner 1275c8137aceSThomas Gleixner Legacy IOPL support is an overbroad mechanism which allows user 1276c8137aceSThomas Gleixner space aside of accessing all 65536 I/O ports also to disable 1277c8137aceSThomas Gleixner interrupts. To gain this access the caller needs CAP_SYS_RAWIO 1278c8137aceSThomas Gleixner capabilities and permission from potentially active security 1279c8137aceSThomas Gleixner modules. 1280c8137aceSThomas Gleixner 1281c8137aceSThomas Gleixner The emulation restricts the functionality of the syscall to 1282c8137aceSThomas Gleixner only allowing the full range I/O port access, but prevents the 1283a24ca997SThomas Gleixner ability to disable interrupts from user space which would be 1284a24ca997SThomas Gleixner granted if the hardware IOPL mechanism would be used. 1285c8137aceSThomas Gleixner 1286506f1d07SSam Ravnborgconfig TOSHIBA 1287506f1d07SSam Ravnborg tristate "Toshiba Laptop support" 1288506f1d07SSam Ravnborg depends on X86_32 1289a7f7f624SMasahiro Yamada help 1290506f1d07SSam Ravnborg This adds a driver to safely access the System Management Mode of 1291506f1d07SSam Ravnborg the CPU on Toshiba portables with a genuine Toshiba BIOS. It does 1292506f1d07SSam Ravnborg not work on models with a Phoenix BIOS. The System Management Mode 1293506f1d07SSam Ravnborg is used to set the BIOS and power saving options on Toshiba portables. 1294506f1d07SSam Ravnborg 1295506f1d07SSam Ravnborg For information on utilities to make use of this driver see the 1296506f1d07SSam Ravnborg Toshiba Linux utilities web site at: 1297506f1d07SSam Ravnborg <http://www.buzzard.org.uk/toshiba/>. 1298506f1d07SSam Ravnborg 1299506f1d07SSam Ravnborg Say Y if you intend to run this kernel on a Toshiba portable. 1300506f1d07SSam Ravnborg Say N otherwise. 1301506f1d07SSam Ravnborg 1302506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS 13039ba16087SJan Beulich bool "Enable X86 board specific fixups for reboot" 13049ba16087SJan Beulich depends on X86_32 1305a7f7f624SMasahiro Yamada help 1306506f1d07SSam Ravnborg This enables chipset and/or board specific fixups to be done 1307506f1d07SSam Ravnborg in order to get reboot to work correctly. This is only needed on 1308506f1d07SSam Ravnborg some combinations of hardware and BIOS. The symptom, for which 1309506f1d07SSam Ravnborg this config is intended, is when reboot ends with a stalled/hung 1310506f1d07SSam Ravnborg system. 1311506f1d07SSam Ravnborg 1312506f1d07SSam Ravnborg Currently, the only fixup is for the Geode machines using 13135e3a77e9SFlorian Fainelli CS5530A and CS5536 chipsets and the RDC R-321x SoC. 1314506f1d07SSam Ravnborg 1315506f1d07SSam Ravnborg Say Y if you want to enable the fixup. Currently, it's safe to 1316506f1d07SSam Ravnborg enable this option even if you don't need it. 1317506f1d07SSam Ravnborg Say N otherwise. 1318506f1d07SSam Ravnborg 1319506f1d07SSam Ravnborgconfig MICROCODE 1320e6bcfdd7SThomas Gleixner def_bool y 132180030e3dSBorislav Petkov depends on CPU_SUP_AMD || CPU_SUP_INTEL 132250cef76dSBorislav Petkov (AMD) select CRYPTO_LIB_SHA256 if CPU_SUP_AMD 132380cc9f10SPeter Oruba 1324fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32 1325fdbd4381SThomas Gleixner def_bool y 1326fdbd4381SThomas Gleixner depends on MICROCODE && X86_32 && BLK_DEV_INITRD 1327fdbd4381SThomas Gleixner 1328a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING 1329a77a94f8SBorislav Petkov bool "Late microcode loading (DANGEROUS)" 1330c02f48e0SBorislav Petkov default n 1331634ac23aSThomas Gleixner depends on MICROCODE && SMP 1332a7f7f624SMasahiro Yamada help 1333a77a94f8SBorislav Petkov Loading microcode late, when the system is up and executing instructions 1334a77a94f8SBorislav Petkov is a tricky business and should be avoided if possible. Just the sequence 1335a77a94f8SBorislav Petkov of synchronizing all cores and SMT threads is one fragile dance which does 1336a77a94f8SBorislav Petkov not guarantee that cores might not softlock after the loading. Therefore, 13379407bda8SThomas Gleixner use this at your own risk. Late loading taints the kernel unless the 13389407bda8SThomas Gleixner microcode header indicates that it is safe for late loading via the 13399407bda8SThomas Gleixner minimal revision check. This minimal revision check can be enforced on 1340632ff617SBorislav Petkov (AMD) the kernel command line with "microcode=force_minrev". 13419407bda8SThomas Gleixner 13429407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV 13439407bda8SThomas Gleixner bool "Enforce late microcode loading minimal revision check" 13449407bda8SThomas Gleixner default n 13459407bda8SThomas Gleixner depends on MICROCODE_LATE_LOADING 13469407bda8SThomas Gleixner help 13479407bda8SThomas Gleixner To prevent that users load microcode late which modifies already 13489407bda8SThomas Gleixner in use features, newer microcode patches have a minimum revision field 13499407bda8SThomas Gleixner in the microcode header, which tells the kernel which minimum 13509407bda8SThomas Gleixner revision must be active in the CPU to safely load that new microcode 13519407bda8SThomas Gleixner late into the running system. If disabled the check will not 13529407bda8SThomas Gleixner be enforced but the kernel will be tainted when the minimal 13539407bda8SThomas Gleixner revision check fails. 13549407bda8SThomas Gleixner 13559407bda8SThomas Gleixner This minimal revision check can also be controlled via the 1356632ff617SBorislav Petkov (AMD) "microcode=force_minrev" parameter on the kernel command line. 13579407bda8SThomas Gleixner 13589407bda8SThomas Gleixner If unsure say Y. 1359506f1d07SSam Ravnborg 136043181a47SBorislav Petkov (AMD)config MICROCODE_DBG 136143181a47SBorislav Petkov (AMD) bool "Enable microcode loader debugging" 136243181a47SBorislav Petkov (AMD) default n 136343181a47SBorislav Petkov (AMD) depends on MICROCODE 136443181a47SBorislav Petkov (AMD) help 136543181a47SBorislav Petkov (AMD) Enable code which allows for debugging the microcode loader in 136643181a47SBorislav Petkov (AMD) a guest. Meaning the patch loading is simulated but everything else 136743181a47SBorislav Petkov (AMD) related to patch parsing and handling is done as on baremetal with 136843181a47SBorislav Petkov (AMD) the purpose of debugging solely the software side of things. 136943181a47SBorislav Petkov (AMD) 137043181a47SBorislav Petkov (AMD) You almost certainly want to say n here. 137143181a47SBorislav Petkov (AMD) 1372506f1d07SSam Ravnborgconfig X86_MSR 1373506f1d07SSam Ravnborg tristate "/dev/cpu/*/msr - Model-specific register support" 1374a7f7f624SMasahiro Yamada help 1375506f1d07SSam Ravnborg This device gives privileged processes access to the x86 1376506f1d07SSam Ravnborg Model-Specific Registers (MSRs). It is a character device with 1377506f1d07SSam Ravnborg major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. 1378506f1d07SSam Ravnborg MSR accesses are directed to a specific CPU on multi-processor 1379506f1d07SSam Ravnborg systems. 1380506f1d07SSam Ravnborg 1381506f1d07SSam Ravnborgconfig X86_CPUID 1382506f1d07SSam Ravnborg tristate "/dev/cpu/*/cpuid - CPU information support" 1383a7f7f624SMasahiro Yamada help 1384506f1d07SSam Ravnborg This device gives processes access to the x86 CPUID instruction to 1385506f1d07SSam Ravnborg be executed on a specific processor. It is a character device 1386506f1d07SSam Ravnborg with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to 1387506f1d07SSam Ravnborg /dev/cpu/31/cpuid. 1388506f1d07SSam Ravnborg 1389bbeb69ceSArnd Bergmannconfig HIGHMEM4G 1390bbeb69ceSArnd Bergmann bool "High Memory Support" 1391506f1d07SSam Ravnborg depends on X86_32 1392a7f7f624SMasahiro Yamada help 1393bbeb69ceSArnd Bergmann Linux can use up to 4 Gigabytes of physical memory on x86 systems. 1394506f1d07SSam Ravnborg However, the address space of 32-bit x86 processors is only 4 1395506f1d07SSam Ravnborg Gigabytes large. That means that, if you have a large amount of 1396506f1d07SSam Ravnborg physical memory, not all of it can be "permanently mapped" by the 1397506f1d07SSam Ravnborg kernel. The physical memory that's not permanently mapped is called 1398506f1d07SSam Ravnborg "high memory". 1399506f1d07SSam Ravnborg 1400506f1d07SSam Ravnborg If you are compiling a kernel which will never run on a machine with 1401506f1d07SSam Ravnborg more than 1 Gigabyte total physical RAM, answer "off" here (default 1402506f1d07SSam Ravnborg choice and suitable for most users). This will result in a "3GB/1GB" 1403506f1d07SSam Ravnborg split: 3GB are mapped so that each process sees a 3GB virtual memory 1404506f1d07SSam Ravnborg space and the remaining part of the 4GB virtual memory space is used 1405506f1d07SSam Ravnborg by the kernel to permanently map as much physical memory as 1406506f1d07SSam Ravnborg possible. 1407506f1d07SSam Ravnborg 1408506f1d07SSam Ravnborg If the machine has between 1 and 4 Gigabytes physical RAM, then 1409bbeb69ceSArnd Bergmann answer "Y" here. 1410506f1d07SSam Ravnborg 1411bbeb69ceSArnd Bergmann If unsure, say N. 1412506f1d07SSam Ravnborg 1413506f1d07SSam Ravnborgchoice 14146a108a14SDavid Rientjes prompt "Memory split" if EXPERT 1415506f1d07SSam Ravnborg default VMSPLIT_3G 1416506f1d07SSam Ravnborg depends on X86_32 1417a7f7f624SMasahiro Yamada help 1418506f1d07SSam Ravnborg Select the desired split between kernel and user memory. 1419506f1d07SSam Ravnborg 1420506f1d07SSam Ravnborg If the address range available to the kernel is less than the 1421506f1d07SSam Ravnborg physical memory installed, the remaining memory will be available 1422506f1d07SSam Ravnborg as "high memory". Accessing high memory is a little more costly 1423506f1d07SSam Ravnborg than low memory, as it needs to be mapped into the kernel first. 1424506f1d07SSam Ravnborg Note that increasing the kernel address space limits the range 1425506f1d07SSam Ravnborg available to user programs, making the address space there 1426506f1d07SSam Ravnborg tighter. Selecting anything other than the default 3G/1G split 1427506f1d07SSam Ravnborg will also likely make your kernel incompatible with binary-only 1428506f1d07SSam Ravnborg kernel modules. 1429506f1d07SSam Ravnborg 1430506f1d07SSam Ravnborg If you are not absolutely sure what you are doing, leave this 1431506f1d07SSam Ravnborg option alone! 1432506f1d07SSam Ravnborg 1433506f1d07SSam Ravnborg config VMSPLIT_3G 1434506f1d07SSam Ravnborg bool "3G/1G user/kernel split" 1435506f1d07SSam Ravnborg config VMSPLIT_3G_OPT 1436506f1d07SSam Ravnborg depends on !X86_PAE 1437506f1d07SSam Ravnborg bool "3G/1G user/kernel split (for full 1G low memory)" 1438506f1d07SSam Ravnborg config VMSPLIT_2G 1439506f1d07SSam Ravnborg bool "2G/2G user/kernel split" 1440506f1d07SSam Ravnborg config VMSPLIT_2G_OPT 1441506f1d07SSam Ravnborg depends on !X86_PAE 1442506f1d07SSam Ravnborg bool "2G/2G user/kernel split (for full 2G low memory)" 1443506f1d07SSam Ravnborg config VMSPLIT_1G 1444506f1d07SSam Ravnborg bool "1G/3G user/kernel split" 1445506f1d07SSam Ravnborgendchoice 1446506f1d07SSam Ravnborg 1447506f1d07SSam Ravnborgconfig PAGE_OFFSET 1448506f1d07SSam Ravnborg hex 1449506f1d07SSam Ravnborg default 0xB0000000 if VMSPLIT_3G_OPT 1450506f1d07SSam Ravnborg default 0x80000000 if VMSPLIT_2G 1451506f1d07SSam Ravnborg default 0x78000000 if VMSPLIT_2G_OPT 1452506f1d07SSam Ravnborg default 0x40000000 if VMSPLIT_1G 1453506f1d07SSam Ravnborg default 0xC0000000 1454506f1d07SSam Ravnborg depends on X86_32 1455506f1d07SSam Ravnborg 1456506f1d07SSam Ravnborgconfig HIGHMEM 1457bbeb69ceSArnd Bergmann def_bool HIGHMEM4G 1458506f1d07SSam Ravnborg 1459506f1d07SSam Ravnborgconfig X86_PAE 14609ba16087SJan Beulich bool "PAE (Physical Address Extension) Support" 146188a2b4edSArnd Bergmann depends on X86_32 && X86_HAVE_PAE 1462d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1463a7f7f624SMasahiro Yamada help 1464506f1d07SSam Ravnborg PAE is required for NX support, and furthermore enables 1465506f1d07SSam Ravnborg larger swapspace support for non-overcommit purposes. It 1466506f1d07SSam Ravnborg has the cost of more pagetable lookup overhead, and also 1467506f1d07SSam Ravnborg consumes more pagetable space per process. 1468506f1d07SSam Ravnborg 146910971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES 1470e5008abeSLuis R. Rodriguez def_bool y 14712e1da13fSVlastimil Babka depends on X86_64 1472a7f7f624SMasahiro Yamada help 147310971ab2SIngo Molnar Certain kernel features effectively disable kernel 147410971ab2SIngo Molnar linear 1 GB mappings (even if the CPU otherwise 147510971ab2SIngo Molnar supports them), so don't confuse the user by printing 147610971ab2SIngo Molnar that we have them enabled. 14779e899816SNick Piggin 14785c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS 14795c280cf6SThomas Gleixner bool "Enable statistic for Change Page Attribute" 14805c280cf6SThomas Gleixner depends on DEBUG_FS 1481a7f7f624SMasahiro Yamada help 1482b75baaf3SIngo Molnar Expose statistics about the Change Page Attribute mechanism, which 1483a943245aSColin Ian King helps to determine the effectiveness of preserving large and huge 14845c280cf6SThomas Gleixner page mappings when mapping protections are changed. 14855c280cf6SThomas Gleixner 148620f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT 148720f07a04SKirill A. Shutemov select ARCH_HAS_FORCE_DMA_UNENCRYPTED 148820f07a04SKirill A. Shutemov select DYNAMIC_PHYSICAL_MASK 148920f07a04SKirill A. Shutemov def_bool n 149020f07a04SKirill A. Shutemov 14917744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT 14927744ccdbSTom Lendacky bool "AMD Secure Memory Encryption (SME) support" 14937744ccdbSTom Lendacky depends on X86_64 && CPU_SUP_AMD 14946c321179STom Lendacky depends on EFI_STUB 149582fef0adSDavid Rientjes select DMA_COHERENT_POOL 1496ce9084baSArd Biesheuvel select ARCH_USE_MEMREMAP_PROT 1497597cfe48SJoerg Roedel select INSTRUCTION_DECODER 1498aa5a4611STom Lendacky select ARCH_HAS_CC_PLATFORM 149920f07a04SKirill A. Shutemov select X86_MEM_ENCRYPT 15006c321179STom Lendacky select UNACCEPTED_MEMORY 1501c5529418SNikunj A Dadhania select CRYPTO_LIB_AESGCM 1502a7f7f624SMasahiro Yamada help 15037744ccdbSTom Lendacky Say yes to enable support for the encryption of system memory. 15047744ccdbSTom Lendacky This requires an AMD processor that supports Secure Memory 15057744ccdbSTom Lendacky Encryption (SME). 15067744ccdbSTom Lendacky 1507506f1d07SSam Ravnborg# Common NUMA Features 1508506f1d07SSam Ravnborgconfig NUMA 1509e133f6eaSRandy Dunlap bool "NUMA Memory Allocation and Scheduler Support" 1510506f1d07SSam Ravnborg depends on SMP 15110abf5086SArnd Bergmann depends on X86_64 15127ecd19cfSKefeng Wang select USE_PERCPU_NUMA_NODE_ID 15130c436a58SSaurabh Sengar select OF_NUMA if OF 1514a7f7f624SMasahiro Yamada help 1515e133f6eaSRandy Dunlap Enable NUMA (Non-Uniform Memory Access) support. 1516fd51b2d7SKOSAKI Motohiro 1517506f1d07SSam Ravnborg The kernel will try to allocate memory used by a CPU on the 1518506f1d07SSam Ravnborg local memory controller of the CPU and add some more 1519506f1d07SSam Ravnborg NUMA awareness to the kernel. 1520506f1d07SSam Ravnborg 1521c280ea5eSIngo Molnar For 64-bit this is recommended if the system is Intel Core i7 1522fd51b2d7SKOSAKI Motohiro (or later), AMD Opteron, or EM64T NUMA. 1523fd51b2d7SKOSAKI Motohiro 1524fd51b2d7SKOSAKI Motohiro Otherwise, you should say N. 1525506f1d07SSam Ravnborg 1526eec1d4faSHans Rosenfeldconfig AMD_NUMA 15273c2362e6SHarvey Harrison def_bool y 15283c2362e6SHarvey Harrison prompt "Old style AMD Opteron NUMA detection" 15295da0ef9aSTejun Heo depends on X86_64 && NUMA && PCI 1530a7f7f624SMasahiro Yamada help 1531eec1d4faSHans Rosenfeld Enable AMD NUMA node topology detection. You should say Y here if 1532eec1d4faSHans Rosenfeld you have a multi processor AMD system. This uses an old method to 1533eec1d4faSHans Rosenfeld read the NUMA configuration directly from the builtin Northbridge 1534eec1d4faSHans Rosenfeld of Opteron. It is recommended to use X86_64_ACPI_NUMA instead, 1535eec1d4faSHans Rosenfeld which also takes priority if both are compiled in. 1536506f1d07SSam Ravnborg 1537506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA 15383c2362e6SHarvey Harrison def_bool y 15393c2362e6SHarvey Harrison prompt "ACPI NUMA detection" 1540506f1d07SSam Ravnborg depends on X86_64 && NUMA && ACPI && PCI 1541506f1d07SSam Ravnborg select ACPI_NUMA 1542a7f7f624SMasahiro Yamada help 1543506f1d07SSam Ravnborg Enable ACPI SRAT based node topology detection. 1544506f1d07SSam Ravnborg 1545506f1d07SSam Ravnborgconfig NODES_SHIFT 1546d25e26b6SLinus Torvalds int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP 154751591e31SDavid Rientjes range 1 10 154851591e31SDavid Rientjes default "10" if MAXSMP 1549506f1d07SSam Ravnborg default "6" if X86_64 1550506f1d07SSam Ravnborg default "3" 1551a9ee6cf5SMike Rapoport depends on NUMA 1552a7f7f624SMasahiro Yamada help 15531184dc2fSMike Travis Specify the maximum number of NUMA Nodes available on the target 1554692105b8SMatt LaPlante system. Increases memory reserved to accommodate various tables. 1555506f1d07SSam Ravnborg 1556506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE 1557506f1d07SSam Ravnborg def_bool y 15583b16651fSTejun Heo depends on X86_32 && !NUMA 1559506f1d07SSam Ravnborg 1560506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE 1561506f1d07SSam Ravnborg def_bool y 1562506f1d07SSam Ravnborg select SPARSEMEM_STATIC if X86_32 1563506f1d07SSam Ravnborg select SPARSEMEM_VMEMMAP_ENABLE if X86_64 1564506f1d07SSam Ravnborg 15653b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT 15666ad57f7fSMike Rapoport def_bool X86_64 || (NUMA && X86_32) 15673b16651fSTejun Heo 1568506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL 1569506f1d07SSam Ravnborg def_bool y 15704eda2bc3SDavid Hildenbrand depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE 1571506f1d07SSam Ravnborg 1572506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE 1573a0842b70SToshi Kani bool "Enable sysfs memory/probe interface" 15745c11f00bSDavid Hildenbrand depends on MEMORY_HOTPLUG 1575a0842b70SToshi Kani help 1576a0842b70SToshi Kani This option enables a sysfs memory/probe interface for testing. 1577cb1aaebeSMauro Carvalho Chehab See Documentation/admin-guide/mm/memory-hotplug.rst for more information. 1578a0842b70SToshi Kani If you are unsure how to answer this question, answer N. 1579506f1d07SSam Ravnborg 15803b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT 15813b16651fSTejun Heo def_bool y 15823b16651fSTejun Heo depends on X86_64 && PROC_KCORE 15833b16651fSTejun Heo 1584a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE 1585a29815a3SAvi Kivity hex 1586a29815a3SAvi Kivity default 0 if X86_32 1587a29815a3SAvi Kivity default 0xdead000000000000 if X86_64 1588a29815a3SAvi Kivity 15897a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE 15907a67832cSDan Williams bool 15917a67832cSDan Williams 1592ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY 15937a67832cSDan Williams tristate "Support non-standard NVDIMMs and ADR protected memory" 15949f53f9faSDan Williams depends on PHYS_ADDR_T_64BIT 15959f53f9faSDan Williams depends on BLK_DEV 15967a67832cSDan Williams select X86_PMEM_LEGACY_DEVICE 15977b27a862SDan Williams select NUMA_KEEP_MEMINFO if NUMA 15989f53f9faSDan Williams select LIBNVDIMM 1599ec776ef6SChristoph Hellwig help 1600ec776ef6SChristoph Hellwig Treat memory marked using the non-standard e820 type of 12 as used 1601ec776ef6SChristoph Hellwig by the Intel Sandy Bridge-EP reference BIOS as protected memory. 1602ec776ef6SChristoph Hellwig The kernel will offer these regions to the 'pmem' driver so 1603ec776ef6SChristoph Hellwig they can be used for persistent storage. 1604ec776ef6SChristoph Hellwig 1605ec776ef6SChristoph Hellwig Say Y if unsure. 1606ec776ef6SChristoph Hellwig 16079f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION 16089f077871SJeremy Fitzhardinge bool "Check for low memory corruption" 1609a7f7f624SMasahiro Yamada help 16109f077871SJeremy Fitzhardinge Periodically check for memory corruption in low memory, which 16119f077871SJeremy Fitzhardinge is suspected to be caused by BIOS. Even when enabled in the 16129f077871SJeremy Fitzhardinge configuration, it is disabled at runtime. Enable it by 16139f077871SJeremy Fitzhardinge setting "memory_corruption_check=1" on the kernel command 16149f077871SJeremy Fitzhardinge line. By default it scans the low 64k of memory every 60 16159f077871SJeremy Fitzhardinge seconds; see the memory_corruption_check_size and 16169f077871SJeremy Fitzhardinge memory_corruption_check_period parameters in 16178c27ceffSMauro Carvalho Chehab Documentation/admin-guide/kernel-parameters.rst to adjust this. 16189f077871SJeremy Fitzhardinge 16199f077871SJeremy Fitzhardinge When enabled with the default parameters, this option has 16209f077871SJeremy Fitzhardinge almost no overhead, as it reserves a relatively small amount 16219f077871SJeremy Fitzhardinge of memory and scans it infrequently. It both detects corruption 16229f077871SJeremy Fitzhardinge and prevents it from affecting the running system. 16239f077871SJeremy Fitzhardinge 16249f077871SJeremy Fitzhardinge It is, however, intended as a diagnostic tool; if repeatable 16259f077871SJeremy Fitzhardinge BIOS-originated corruption always affects the same memory, 16269f077871SJeremy Fitzhardinge you can use memmap= to prevent the kernel from using that 16279f077871SJeremy Fitzhardinge memory. 16289f077871SJeremy Fitzhardinge 1629c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK 1630c885df50SJeremy Fitzhardinge bool "Set the default setting of memory_corruption_check" 1631c885df50SJeremy Fitzhardinge depends on X86_CHECK_BIOS_CORRUPTION 1632c885df50SJeremy Fitzhardinge default y 1633a7f7f624SMasahiro Yamada help 1634c885df50SJeremy Fitzhardinge Set whether the default state of memory_corruption_check is 1635c885df50SJeremy Fitzhardinge on or off. 1636c885df50SJeremy Fitzhardinge 1637506f1d07SSam Ravnborgconfig MATH_EMULATION 1638506f1d07SSam Ravnborg bool 1639a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 164087d6021bSArnd Bergmann prompt "Math emulation" if X86_32 && (M486SX || MELAN) 1641a7f7f624SMasahiro Yamada help 1642506f1d07SSam Ravnborg Linux can emulate a math coprocessor (used for floating point 1643506f1d07SSam Ravnborg operations) if you don't have one. 486DX and Pentium processors have 1644506f1d07SSam Ravnborg a math coprocessor built in, 486SX and 386 do not, unless you added 1645506f1d07SSam Ravnborg a 487DX or 387, respectively. (The messages during boot time can 1646506f1d07SSam Ravnborg give you some hints here ["man dmesg"].) Everyone needs either a 1647506f1d07SSam Ravnborg coprocessor or this emulation. 1648506f1d07SSam Ravnborg 1649506f1d07SSam Ravnborg If you don't have a math coprocessor, you need to say Y here; if you 1650506f1d07SSam Ravnborg say Y here even though you have a coprocessor, the coprocessor will 1651506f1d07SSam Ravnborg be used nevertheless. (This behavior can be changed with the kernel 1652506f1d07SSam Ravnborg command line option "no387", which comes handy if your coprocessor 1653506f1d07SSam Ravnborg is broken. Try "man bootparam" or see the documentation of your boot 1654506f1d07SSam Ravnborg loader (lilo or loadlin) about how to pass options to the kernel at 1655506f1d07SSam Ravnborg boot time.) This means that it is a good idea to say Y here if you 1656506f1d07SSam Ravnborg intend to use this kernel on different machines. 1657506f1d07SSam Ravnborg 1658506f1d07SSam Ravnborg More information about the internals of the Linux math coprocessor 1659506f1d07SSam Ravnborg emulation can be found in <file:arch/x86/math-emu/README>. 1660506f1d07SSam Ravnborg 1661506f1d07SSam Ravnborg If you are not sure, say Y; apart from resulting in a 66 KB bigger 1662506f1d07SSam Ravnborg kernel, it won't hurt. 1663506f1d07SSam Ravnborg 1664506f1d07SSam Ravnborgconfig MTRR 16656fc108a0SJan Beulich def_bool y 16666a108a14SDavid Rientjes prompt "MTRR (Memory Type Range Register) support" if EXPERT 1667a7f7f624SMasahiro Yamada help 1668506f1d07SSam Ravnborg On Intel P6 family processors (Pentium Pro, Pentium II and later) 1669506f1d07SSam Ravnborg the Memory Type Range Registers (MTRRs) may be used to control 1670506f1d07SSam Ravnborg processor access to memory ranges. This is most useful if you have 1671506f1d07SSam Ravnborg a video (VGA) card on a PCI or AGP bus. Enabling write-combining 1672506f1d07SSam Ravnborg allows bus write transfers to be combined into a larger transfer 1673506f1d07SSam Ravnborg before bursting over the PCI/AGP bus. This can increase performance 1674506f1d07SSam Ravnborg of image write operations 2.5 times or more. Saying Y here creates a 1675506f1d07SSam Ravnborg /proc/mtrr file which may be used to manipulate your processor's 1676506f1d07SSam Ravnborg MTRRs. Typically the X server should use this. 1677506f1d07SSam Ravnborg 1678506f1d07SSam Ravnborg This code has a reasonably generic interface so that similar 1679506f1d07SSam Ravnborg control registers on other processors can be easily supported 1680506f1d07SSam Ravnborg as well: 1681506f1d07SSam Ravnborg 1682506f1d07SSam Ravnborg The Cyrix 6x86, 6x86MX and M II processors have Address Range 1683506f1d07SSam Ravnborg Registers (ARRs) which provide a similar functionality to MTRRs. For 1684506f1d07SSam Ravnborg these, the ARRs are used to emulate the MTRRs. 1685506f1d07SSam Ravnborg The AMD K6-2 (stepping 8 and above) and K6-3 processors have two 1686506f1d07SSam Ravnborg MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing 1687506f1d07SSam Ravnborg write-combining. All of these processors are supported by this code 1688506f1d07SSam Ravnborg and it makes sense to say Y here if you have one of them. 1689506f1d07SSam Ravnborg 1690506f1d07SSam Ravnborg Saying Y here also fixes a problem with buggy SMP BIOSes which only 1691506f1d07SSam Ravnborg set the MTRRs for the boot CPU and not for the secondary CPUs. This 1692506f1d07SSam Ravnborg can lead to all sorts of problems, so it's good to say Y here. 1693506f1d07SSam Ravnborg 1694506f1d07SSam Ravnborg You can safely say Y even if your machine doesn't have MTRRs, you'll 1695506f1d07SSam Ravnborg just add about 9 KB to your kernel. 1696506f1d07SSam Ravnborg 1697ff61f079SJonathan Corbet See <file:Documentation/arch/x86/mtrr.rst> for more information. 1698506f1d07SSam Ravnborg 169995ffa243SYinghai Luconfig MTRR_SANITIZER 17002ffb3501SYinghai Lu def_bool y 170195ffa243SYinghai Lu prompt "MTRR cleanup support" 170295ffa243SYinghai Lu depends on MTRR 1703a7f7f624SMasahiro Yamada help 1704aba3728cSThomas Gleixner Convert MTRR layout from continuous to discrete, so X drivers can 1705aba3728cSThomas Gleixner add writeback entries. 170695ffa243SYinghai Lu 1707aba3728cSThomas Gleixner Can be disabled with disable_mtrr_cleanup on the kernel command line. 1708692105b8SMatt LaPlante The largest mtrr entry size for a continuous block can be set with 1709aba3728cSThomas Gleixner mtrr_chunk_size. 171095ffa243SYinghai Lu 17112ffb3501SYinghai Lu If unsure, say Y. 171295ffa243SYinghai Lu 171395ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT 1714f5098d62SYinghai Lu int "MTRR cleanup enable value (0-1)" 1715f5098d62SYinghai Lu range 0 1 1716f5098d62SYinghai Lu default "0" 171795ffa243SYinghai Lu depends on MTRR_SANITIZER 1718a7f7f624SMasahiro Yamada help 1719f5098d62SYinghai Lu Enable mtrr cleanup default value 172095ffa243SYinghai Lu 172112031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT 172212031a62SYinghai Lu int "MTRR cleanup spare reg num (0-7)" 172312031a62SYinghai Lu range 0 7 172412031a62SYinghai Lu default "1" 172512031a62SYinghai Lu depends on MTRR_SANITIZER 1726a7f7f624SMasahiro Yamada help 172712031a62SYinghai Lu mtrr cleanup spare entries default, it can be changed via 1728aba3728cSThomas Gleixner mtrr_spare_reg_nr=N on the kernel command line. 172912031a62SYinghai Lu 17302e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT 17316fc108a0SJan Beulich def_bool y 17326a108a14SDavid Rientjes prompt "x86 PAT support" if EXPERT 17332a8a2719SIngo Molnar depends on MTRR 17347a87225aSMatthew Wilcox (Oracle) select ARCH_USES_PG_ARCH_2 1735a7f7f624SMasahiro Yamada help 17362e5d9c85Svenkatesh.pallipadi@intel.com Use PAT attributes to setup page level cache control. 1737042b78e4SVenki Pallipadi 17382e5d9c85Svenkatesh.pallipadi@intel.com PATs are the modern equivalents of MTRRs and are much more 17392e5d9c85Svenkatesh.pallipadi@intel.com flexible than MTRRs. 17402e5d9c85Svenkatesh.pallipadi@intel.com 17412e5d9c85Svenkatesh.pallipadi@intel.com Say N here if you see bootup problems (boot crash, boot hang, 1742042b78e4SVenki Pallipadi spontaneous reboots) or a non-working video driver. 17432e5d9c85Svenkatesh.pallipadi@intel.com 17442e5d9c85Svenkatesh.pallipadi@intel.com If unsure, say Y. 17452e5d9c85Svenkatesh.pallipadi@intel.com 1746b971880fSBabu Mogerconfig X86_UMIP 1747796ebc81SRicardo Neri def_bool y 1748b971880fSBabu Moger prompt "User Mode Instruction Prevention" if EXPERT 1749a7f7f624SMasahiro Yamada help 1750b971880fSBabu Moger User Mode Instruction Prevention (UMIP) is a security feature in 1751b971880fSBabu Moger some x86 processors. If enabled, a general protection fault is 1752b971880fSBabu Moger issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are 1753b971880fSBabu Moger executed in user mode. These instructions unnecessarily expose 1754b971880fSBabu Moger information about the hardware state. 1755796ebc81SRicardo Neri 1756796ebc81SRicardo Neri The vast majority of applications do not use these instructions. 1757796ebc81SRicardo Neri For the very few that do, software emulation is provided in 1758796ebc81SRicardo Neri specific cases in protected and virtual-8086 modes. Emulated 1759796ebc81SRicardo Neri results are dummy. 1760aa35f896SRicardo Neri 1761156ff4a5SPeter Zijlstraconfig CC_HAS_IBT 1762156ff4a5SPeter Zijlstra # GCC >= 9 and binutils >= 2.29 1763156ff4a5SPeter Zijlstra # Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654 17642c6a28f3SNathan Chancellor def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || CC_IS_CLANG) && \ 1765156ff4a5SPeter Zijlstra $(as-instr,endbr64) 1766156ff4a5SPeter Zijlstra 176718e66b69SRick Edgecombeconfig X86_CET 176818e66b69SRick Edgecombe def_bool n 176918e66b69SRick Edgecombe help 177018e66b69SRick Edgecombe CET features configured (Shadow stack or IBT) 177118e66b69SRick Edgecombe 1772156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT 1773156ff4a5SPeter Zijlstra prompt "Indirect Branch Tracking" 17744fd5f70cSKees Cook def_bool y 177503f16cd0SJosh Poimboeuf depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL 177603f16cd0SJosh Poimboeuf select OBJTOOL 177718e66b69SRick Edgecombe select X86_CET 1778156ff4a5SPeter Zijlstra help 1779156ff4a5SPeter Zijlstra Build the kernel with support for Indirect Branch Tracking, a 1780156ff4a5SPeter Zijlstra hardware support course-grain forward-edge Control Flow Integrity 1781156ff4a5SPeter Zijlstra protection. It enforces that all indirect calls must land on 1782156ff4a5SPeter Zijlstra an ENDBR instruction, as such, the compiler will instrument the 1783156ff4a5SPeter Zijlstra code with them to make this happen. 1784156ff4a5SPeter Zijlstra 1785ed53a0d9SPeter Zijlstra In addition to building the kernel with IBT, seal all functions that 17864cdfc11bSNur Hussein are not indirect call targets, avoiding them ever becoming one. 1787ed53a0d9SPeter Zijlstra 1788ed53a0d9SPeter Zijlstra This requires LTO like objtool runs and will slow down the build. It 1789ed53a0d9SPeter Zijlstra does significantly reduce the number of ENDBR instructions in the 1790ed53a0d9SPeter Zijlstra kernel image. 1791ed53a0d9SPeter Zijlstra 179235e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS 179338f3e775SBabu Moger prompt "Memory Protection Keys" 179435e97790SDave Hansen def_bool y 1795284244a9SDave Hansen # Note: only available in 64-bit mode 179638f3e775SBabu Moger depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD) 179752c8e601SIngo Molnar select ARCH_USES_HIGH_VMA_FLAGS 179852c8e601SIngo Molnar select ARCH_HAS_PKEYS 1799a7f7f624SMasahiro Yamada help 1800284244a9SDave Hansen Memory Protection Keys provides a mechanism for enforcing 1801284244a9SDave Hansen page-based protections, but without requiring modification of the 1802284244a9SDave Hansen page tables when an application changes protection domains. 1803284244a9SDave Hansen 18041eecbcdcSMauro Carvalho Chehab For details, see Documentation/core-api/protection-keys.rst 1805284244a9SDave Hansen 1806284244a9SDave Hansen If unsure, say y. 180735e97790SDave Hansen 18085626f8d4SJoey Goulyconfig ARCH_PKEY_BITS 18095626f8d4SJoey Gouly int 18105626f8d4SJoey Gouly default 4 18115626f8d4SJoey Gouly 1812db616173SMichal Hockochoice 1813db616173SMichal Hocko prompt "TSX enable mode" 1814db616173SMichal Hocko depends on CPU_SUP_INTEL 1815db616173SMichal Hocko default X86_INTEL_TSX_MODE_OFF 1816db616173SMichal Hocko help 1817db616173SMichal Hocko Intel's TSX (Transactional Synchronization Extensions) feature 1818db616173SMichal Hocko allows to optimize locking protocols through lock elision which 1819db616173SMichal Hocko can lead to a noticeable performance boost. 1820db616173SMichal Hocko 1821db616173SMichal Hocko On the other hand it has been shown that TSX can be exploited 1822db616173SMichal Hocko to form side channel attacks (e.g. TAA) and chances are there 1823db616173SMichal Hocko will be more of those attacks discovered in the future. 1824db616173SMichal Hocko 1825db616173SMichal Hocko Therefore TSX is not enabled by default (aka tsx=off). An admin 1826db616173SMichal Hocko might override this decision by tsx=on the command line parameter. 1827db616173SMichal Hocko Even with TSX enabled, the kernel will attempt to enable the best 1828db616173SMichal Hocko possible TAA mitigation setting depending on the microcode available 1829db616173SMichal Hocko for the particular machine. 1830db616173SMichal Hocko 1831db616173SMichal Hocko This option allows to set the default tsx mode between tsx=on, =off 1832db616173SMichal Hocko and =auto. See Documentation/admin-guide/kernel-parameters.txt for more 1833db616173SMichal Hocko details. 1834db616173SMichal Hocko 1835db616173SMichal Hocko Say off if not sure, auto if TSX is in use but it should be used on safe 1836db616173SMichal Hocko platforms or on if TSX is in use and the security aspect of tsx is not 1837db616173SMichal Hocko relevant. 1838db616173SMichal Hocko 1839db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF 1840db616173SMichal Hocko bool "off" 1841db616173SMichal Hocko help 1842db616173SMichal Hocko TSX is disabled if possible - equals to tsx=off command line parameter. 1843db616173SMichal Hocko 1844db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON 1845db616173SMichal Hocko bool "on" 1846db616173SMichal Hocko help 1847db616173SMichal Hocko TSX is always enabled on TSX capable HW - equals the tsx=on command 1848db616173SMichal Hocko line parameter. 1849db616173SMichal Hocko 1850db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO 1851db616173SMichal Hocko bool "auto" 1852db616173SMichal Hocko help 1853db616173SMichal Hocko TSX is enabled on TSX capable HW that is believed to be safe against 1854db616173SMichal Hocko side channel attacks- equals the tsx=auto command line parameter. 1855db616173SMichal Hockoendchoice 1856db616173SMichal Hocko 1857e7e05452SSean Christophersonconfig X86_SGX 1858e7e05452SSean Christopherson bool "Software Guard eXtensions (SGX)" 1859b8d1d163SDaniel Sneddon depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC 1860e59236b5SEric Biggers select CRYPTO_LIB_SHA256 1861e7e05452SSean Christopherson select MMU_NOTIFIER 1862901ddbb9SJarkko Sakkinen select NUMA_KEEP_MEMINFO if NUMA 186340e0e784STony Luck select XARRAY_MULTI 1864e7e05452SSean Christopherson help 1865e7e05452SSean Christopherson Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions 1866e7e05452SSean Christopherson that can be used by applications to set aside private regions of code 1867e7e05452SSean Christopherson and data, referred to as enclaves. An enclave's private memory can 1868e7e05452SSean Christopherson only be accessed by code running within the enclave. Accesses from 1869e7e05452SSean Christopherson outside the enclave, including other enclaves, are disallowed by 1870e7e05452SSean Christopherson hardware. 1871e7e05452SSean Christopherson 1872e7e05452SSean Christopherson If unsure, say N. 1873e7e05452SSean Christopherson 187418e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK 187518e66b69SRick Edgecombe bool "X86 userspace shadow stack" 187618e66b69SRick Edgecombe depends on AS_WRUSS 187718e66b69SRick Edgecombe depends on X86_64 187818e66b69SRick Edgecombe select ARCH_USES_HIGH_VMA_FLAGS 1879bcc9d04eSMark Brown select ARCH_HAS_USER_SHADOW_STACK 188018e66b69SRick Edgecombe select X86_CET 188118e66b69SRick Edgecombe help 188218e66b69SRick Edgecombe Shadow stack protection is a hardware feature that detects function 188318e66b69SRick Edgecombe return address corruption. This helps mitigate ROP attacks. 188418e66b69SRick Edgecombe Applications must be enabled to use it, and old userspace does not 188518e66b69SRick Edgecombe get protection "for free". 188618e66b69SRick Edgecombe 188718e66b69SRick Edgecombe CPUs supporting shadow stacks were first released in 2020. 188818e66b69SRick Edgecombe 188954acee60SDave Hansen See Documentation/arch/x86/shstk.rst for more information. 189018e66b69SRick Edgecombe 189118e66b69SRick Edgecombe If unsure, say N. 189218e66b69SRick Edgecombe 1893c33621b4SKai Huangconfig INTEL_TDX_HOST 1894c33621b4SKai Huang bool "Intel Trust Domain Extensions (TDX) host support" 1895c33621b4SKai Huang depends on CPU_SUP_INTEL 1896c33621b4SKai Huang depends on X86_64 1897c33621b4SKai Huang depends on KVM_INTEL 18983115cabdSKai Huang depends on X86_X2APIC 1899abe8dbabSKai Huang select ARCH_KEEP_MEMBLOCK 1900ac3a2208SKai Huang depends on CONTIG_ALLOC 190183e1bdc9SKai Huang depends on X86_MCE 1902c33621b4SKai Huang help 1903c33621b4SKai Huang Intel Trust Domain Extensions (TDX) protects guest VMs from malicious 1904c33621b4SKai Huang host and certain physical attacks. This option enables necessary TDX 1905c33621b4SKai Huang support in the host kernel to run confidential VMs. 1906c33621b4SKai Huang 1907c33621b4SKai Huang If unsure, say N. 1908c33621b4SKai Huang 1909506f1d07SSam Ravnborgconfig EFI 19109ba16087SJan Beulich bool "EFI runtime service support" 19115b83683fSHuang, Ying depends on ACPI 1912f6ce5002SSergey Vlasov select UCS2_STRING 1913022ee6c5SArd Biesheuvel select EFI_RUNTIME_WRAPPERS 19141ff2fc02STom Lendacky select ARCH_USE_MEMREMAP_PROT 1915aba7e066SArd Biesheuvel select EFI_RUNTIME_MAP if KEXEC_CORE 1916a7f7f624SMasahiro Yamada help 19178b2cb7a8SHuang, Ying This enables the kernel to use EFI runtime services that are 1918506f1d07SSam Ravnborg available (such as the EFI variable services). 1919506f1d07SSam Ravnborg 19208b2cb7a8SHuang, Ying This option is only useful on systems that have EFI firmware. 19218b2cb7a8SHuang, Ying In addition, you should use the latest ELILO loader available 19228b2cb7a8SHuang, Ying at <http://elilo.sourceforge.net> in order to take advantage 19238b2cb7a8SHuang, Ying of EFI runtime services. However, even with this option, the 19248b2cb7a8SHuang, Ying resultant kernel should continue to boot on existing non-EFI 19258b2cb7a8SHuang, Ying platforms. 1926506f1d07SSam Ravnborg 1927291f3632SMatt Flemingconfig EFI_STUB 1928291f3632SMatt Fleming bool "EFI stub support" 1929c6dbd3e5SPeter Zijlstra depends on EFI 19307b2a583aSMatt Fleming select RELOCATABLE 1931a7f7f624SMasahiro Yamada help 1932291f3632SMatt Fleming This kernel feature allows a bzImage to be loaded directly 1933291f3632SMatt Fleming by EFI firmware without the use of a bootloader. 1934291f3632SMatt Fleming 19354f4cfa6cSMauro Carvalho Chehab See Documentation/admin-guide/efi-stub.rst for more information. 19360c759662SMatt Fleming 1937cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL 1938cc3fdda2SArd Biesheuvel bool "EFI handover protocol (DEPRECATED)" 1939cc3fdda2SArd Biesheuvel depends on EFI_STUB 1940cc3fdda2SArd Biesheuvel default y 1941cc3fdda2SArd Biesheuvel help 1942cc3fdda2SArd Biesheuvel Select this in order to include support for the deprecated EFI 1943cc3fdda2SArd Biesheuvel handover protocol, which defines alternative entry points into the 1944cc3fdda2SArd Biesheuvel EFI stub. This is a practice that has no basis in the UEFI 1945cc3fdda2SArd Biesheuvel specification, and requires a priori knowledge on the part of the 1946cc3fdda2SArd Biesheuvel bootloader about Linux/x86 specific ways of passing the command line 1947cc3fdda2SArd Biesheuvel and initrd, and where in memory those assets may be loaded. 1948cc3fdda2SArd Biesheuvel 1949cc3fdda2SArd Biesheuvel If in doubt, say Y. Even though the corresponding support is not 1950cc3fdda2SArd Biesheuvel present in upstream GRUB or other bootloaders, most distros build 1951cc3fdda2SArd Biesheuvel GRUB with numerous downstream patches applied, and may rely on the 1952cc3fdda2SArd Biesheuvel handover protocol as as result. 1953cc3fdda2SArd Biesheuvel 19547d453eeeSMatt Flemingconfig EFI_MIXED 19557d453eeeSMatt Fleming bool "EFI mixed-mode support" 19567d453eeeSMatt Fleming depends on EFI_STUB && X86_64 1957a7f7f624SMasahiro Yamada help 19587d453eeeSMatt Fleming Enabling this feature allows a 64-bit kernel to be booted 19597d453eeeSMatt Fleming on a 32-bit firmware, provided that your CPU supports 64-bit 19607d453eeeSMatt Fleming mode. 19617d453eeeSMatt Fleming 19627d453eeeSMatt Fleming Note that it is not possible to boot a mixed-mode enabled 19637d453eeeSMatt Fleming kernel via the EFI boot stub - a bootloader that supports 19647d453eeeSMatt Fleming the EFI handover protocol must be used. 19657d453eeeSMatt Fleming 19667d453eeeSMatt Fleming If unsure, say N. 19677d453eeeSMatt Fleming 19681fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP 19691fff234dSArd Biesheuvel bool "Export EFI runtime maps to sysfs" if EXPERT 19701fff234dSArd Biesheuvel depends on EFI 19711fff234dSArd Biesheuvel help 19721fff234dSArd Biesheuvel Export EFI runtime memory regions to /sys/firmware/efi/runtime-map. 19731fff234dSArd Biesheuvel That memory map is required by the 2nd kernel to set up EFI virtual 19741fff234dSArd Biesheuvel mappings after kexec, but can also be used for debugging purposes. 19751fff234dSArd Biesheuvel 19761fff234dSArd Biesheuvel See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map. 19771fff234dSArd Biesheuvel 19788636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz" 1979506f1d07SSam Ravnborg 19806af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC 19816af51380SEric DeVolder def_bool y 1982506f1d07SSam Ravnborg 19836af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE 1984c1ad12eeSArnd Bergmann def_bool X86_64 1985506f1d07SSam Ravnborg 19866af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE 19876af51380SEric DeVolder def_bool y 19886af51380SEric DeVolder depends on KEXEC_FILE 1989b69a2afdSJonathan McDowell select HAVE_IMA_KEXEC if IMA 199074ca317cSVivek Goyal 1991e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY 1992c1ad12eeSArnd Bergmann def_bool y 1993b799a09fSAKASHI Takahiro 19946af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG 19956af51380SEric DeVolder def_bool y 199699d5cadfSJiri Bohac 19976af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE 19986af51380SEric DeVolder def_bool y 199999d5cadfSJiri Bohac 20006af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG 20016af51380SEric DeVolder def_bool y 200299d5cadfSJiri Bohac 20036af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP 20046af51380SEric DeVolder def_bool y 20058e7d8381SVivek Goyal 20062b082d6fSAlexander Grafconfig ARCH_SUPPORTS_KEXEC_HANDOVER 20072b082d6fSAlexander Graf def_bool X86_64 20082b082d6fSAlexander Graf 20096af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP 20106af51380SEric DeVolder def_bool X86_64 || (X86_32 && HIGHMEM) 20118e7d8381SVivek Goyal 201231daa343SDave Vasilevskyconfig ARCH_DEFAULT_CRASH_DUMP 201331daa343SDave Vasilevsky def_bool y 201431daa343SDave Vasilevsky 2015ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG 2016ea53ad9cSEric DeVolder def_bool y 20173ab83521SHuang Ying 20189c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 201985fcde40SBaoquan He def_bool CRASH_RESERVE 20209c08a2a1SBaoquan He 2021506f1d07SSam Ravnborgconfig PHYSICAL_START 20226a108a14SDavid Rientjes hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 2023ceefccc9SH. Peter Anvin default "0x1000000" 2024a7f7f624SMasahiro Yamada help 2025506f1d07SSam Ravnborg This gives the physical address where the kernel is loaded. 2026506f1d07SSam Ravnborg 202743b1d3e6SChris Koch If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage 202843b1d3e6SChris Koch will decompress itself to above physical address and run from there. 202943b1d3e6SChris Koch Otherwise, bzImage will run from the address where it has been loaded 203043b1d3e6SChris Koch by the boot loader. The only exception is if it is loaded below the 203143b1d3e6SChris Koch above physical address, in which case it will relocate itself there. 2032506f1d07SSam Ravnborg 2033506f1d07SSam Ravnborg In normal kdump cases one does not have to set/change this option 2034506f1d07SSam Ravnborg as now bzImage can be compiled as a completely relocatable image 2035506f1d07SSam Ravnborg (CONFIG_RELOCATABLE=y) and be used to load and run from a different 2036506f1d07SSam Ravnborg address. This option is mainly useful for the folks who don't want 2037506f1d07SSam Ravnborg to use a bzImage for capturing the crash dump and want to use a 2038506f1d07SSam Ravnborg vmlinux instead. vmlinux is not relocatable hence a kernel needs 2039506f1d07SSam Ravnborg to be specifically compiled to run from a specific memory area 2040506f1d07SSam Ravnborg (normally a reserved region) and this option comes handy. 2041506f1d07SSam Ravnborg 2042ceefccc9SH. Peter Anvin So if you are using bzImage for capturing the crash dump, 2043ceefccc9SH. Peter Anvin leave the value here unchanged to 0x1000000 and set 2044ceefccc9SH. Peter Anvin CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux 2045ceefccc9SH. Peter Anvin for capturing the crash dump change this value to start of 2046ceefccc9SH. Peter Anvin the reserved region. In other words, it can be set based on 2047ceefccc9SH. Peter Anvin the "X" value as specified in the "crashkernel=YM@XM" 2048ceefccc9SH. Peter Anvin command line boot parameter passed to the panic-ed 2049330d4810SMauro Carvalho Chehab kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst 2050ceefccc9SH. Peter Anvin for more details about crash dumps. 2051506f1d07SSam Ravnborg 2052506f1d07SSam Ravnborg Usage of bzImage for capturing the crash dump is recommended as 2053506f1d07SSam Ravnborg one does not have to build two kernels. Same kernel can be used 2054506f1d07SSam Ravnborg as production kernel and capture kernel. Above option should have 2055506f1d07SSam Ravnborg gone away after relocatable bzImage support is introduced. But it 2056506f1d07SSam Ravnborg is present because there are users out there who continue to use 2057506f1d07SSam Ravnborg vmlinux for dump capture. This option should go away down the 2058506f1d07SSam Ravnborg line. 2059506f1d07SSam Ravnborg 2060506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2061506f1d07SSam Ravnborg 2062506f1d07SSam Ravnborgconfig RELOCATABLE 206326717808SH. Peter Anvin bool "Build a relocatable kernel" 206426717808SH. Peter Anvin default y 2065a7f7f624SMasahiro Yamada help 2066506f1d07SSam Ravnborg This builds a kernel image that retains relocation information 2067506f1d07SSam Ravnborg so it can be loaded someplace besides the default 1MB. 2068506f1d07SSam Ravnborg The relocations tend to make the kernel binary about 10% larger, 2069506f1d07SSam Ravnborg but are discarded at runtime. 2070506f1d07SSam Ravnborg 2071506f1d07SSam Ravnborg One use is for the kexec on panic case where the recovery kernel 2072506f1d07SSam Ravnborg must live at a different physical address than the primary 2073506f1d07SSam Ravnborg kernel. 2074506f1d07SSam Ravnborg 2075506f1d07SSam Ravnborg Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address 2076506f1d07SSam Ravnborg it has been loaded at and the compile time physical address 20778ab3820fSKees Cook (CONFIG_PHYSICAL_START) is used as the minimum location. 2078506f1d07SSam Ravnborg 20798ab3820fSKees Cookconfig RANDOMIZE_BASE 2080e8581e3dSBaoquan He bool "Randomize the address of the kernel image (KASLR)" 20818ab3820fSKees Cook depends on RELOCATABLE 20826807c846SIngo Molnar default y 2083a7f7f624SMasahiro Yamada help 2084e8581e3dSBaoquan He In support of Kernel Address Space Layout Randomization (KASLR), 2085e8581e3dSBaoquan He this randomizes the physical address at which the kernel image 2086e8581e3dSBaoquan He is decompressed and the virtual address where the kernel 2087e8581e3dSBaoquan He image is mapped, as a security feature that deters exploit 2088e8581e3dSBaoquan He attempts relying on knowledge of the location of kernel 2089e8581e3dSBaoquan He code internals. 2090e8581e3dSBaoquan He 2091ed9f007eSKees Cook On 64-bit, the kernel physical and virtual addresses are 2092ed9f007eSKees Cook randomized separately. The physical address will be anywhere 2093ed9f007eSKees Cook between 16MB and the top of physical memory (up to 64TB). The 2094ed9f007eSKees Cook virtual address will be randomized from 16MB up to 1GB (9 bits 2095ed9f007eSKees Cook of entropy). Note that this also reduces the memory space 2096ed9f007eSKees Cook available to kernel modules from 1.5GB to 1GB. 2097ed9f007eSKees Cook 2098ed9f007eSKees Cook On 32-bit, the kernel physical and virtual addresses are 2099ed9f007eSKees Cook randomized together. They will be randomized from 16MB up to 2100ed9f007eSKees Cook 512MB (8 bits of entropy). 21018ab3820fSKees Cook 2102a653f356SKees Cook Entropy is generated using the RDRAND instruction if it is 2103e8581e3dSBaoquan He supported. If RDTSC is supported, its value is mixed into 2104e8581e3dSBaoquan He the entropy pool as well. If neither RDRAND nor RDTSC are 2105ed9f007eSKees Cook supported, then entropy is read from the i8254 timer. The 2106ed9f007eSKees Cook usable entropy is limited by the kernel being built using 2107ed9f007eSKees Cook 2GB addressing, and that PHYSICAL_ALIGN must be at a 2108ed9f007eSKees Cook minimum of 2MB. As a result, only 10 bits of entropy are 2109ed9f007eSKees Cook theoretically possible, but the implementations are further 2110ed9f007eSKees Cook limited due to memory layouts. 2111e8581e3dSBaoquan He 21126807c846SIngo Molnar If unsure, say Y. 2113da2b6fb9SKees Cook 21148ab3820fSKees Cook# Relocation on x86 needs some additional build support 2115845adf72SH. Peter Anvinconfig X86_NEED_RELOCS 2116845adf72SH. Peter Anvin def_bool y 21178ab3820fSKees Cook depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE) 21189b400d17SArd Biesheuvel select ARCH_VMLINUX_NEEDS_RELOCS 2119845adf72SH. Peter Anvin 2120506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN 2121a0215061SKees Cook hex "Alignment value to which kernel should be aligned" 21228ab3820fSKees Cook default "0x200000" 2123a0215061SKees Cook range 0x2000 0x1000000 if X86_32 2124a0215061SKees Cook range 0x200000 0x1000000 if X86_64 2125a7f7f624SMasahiro Yamada help 2126506f1d07SSam Ravnborg This value puts the alignment restrictions on physical address 2127506f1d07SSam Ravnborg where kernel is loaded and run from. Kernel is compiled for an 2128506f1d07SSam Ravnborg address which meets above alignment restriction. 2129506f1d07SSam Ravnborg 2130506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2131506f1d07SSam Ravnborg CONFIG_RELOCATABLE is set, kernel will move itself to nearest 2132506f1d07SSam Ravnborg address aligned to above value and run from there. 2133506f1d07SSam Ravnborg 2134506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2135506f1d07SSam Ravnborg CONFIG_RELOCATABLE is not set, kernel will ignore the run time 2136506f1d07SSam Ravnborg load address and decompress itself to the address it has been 2137506f1d07SSam Ravnborg compiled for and run from there. The address for which kernel is 2138506f1d07SSam Ravnborg compiled already meets above alignment restrictions. Hence the 2139506f1d07SSam Ravnborg end result is that kernel runs from a physical address meeting 2140506f1d07SSam Ravnborg above alignment restrictions. 2141506f1d07SSam Ravnborg 2142a0215061SKees Cook On 32-bit this value must be a multiple of 0x2000. On 64-bit 2143a0215061SKees Cook this value must be a multiple of 0x200000. 2144a0215061SKees Cook 2145506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2146506f1d07SSam Ravnborg 21470483e1faSThomas Garnierconfig RANDOMIZE_MEMORY 21480483e1faSThomas Garnier bool "Randomize the kernel memory sections" 21490483e1faSThomas Garnier depends on X86_64 21500483e1faSThomas Garnier depends on RANDOMIZE_BASE 21510483e1faSThomas Garnier default RANDOMIZE_BASE 2152a7f7f624SMasahiro Yamada help 21530483e1faSThomas Garnier Randomizes the base virtual address of kernel memory sections 21540483e1faSThomas Garnier (physical memory mapping, vmalloc & vmemmap). This security feature 21550483e1faSThomas Garnier makes exploits relying on predictable memory locations less reliable. 21560483e1faSThomas Garnier 21570483e1faSThomas Garnier The order of allocations remains unchanged. Entropy is generated in 21580483e1faSThomas Garnier the same way as RANDOMIZE_BASE. Current implementation in the optimal 21590483e1faSThomas Garnier configuration have in average 30,000 different possible virtual 21600483e1faSThomas Garnier addresses for each memory section. 21610483e1faSThomas Garnier 21626807c846SIngo Molnar If unsure, say Y. 21630483e1faSThomas Garnier 216490397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING 216590397a41SThomas Garnier hex "Physical memory mapping padding" if EXPERT 216690397a41SThomas Garnier depends on RANDOMIZE_MEMORY 216790397a41SThomas Garnier default "0xa" if MEMORY_HOTPLUG 216890397a41SThomas Garnier default "0x0" 216990397a41SThomas Garnier range 0x1 0x40 if MEMORY_HOTPLUG 217090397a41SThomas Garnier range 0x0 0x40 2171a7f7f624SMasahiro Yamada help 217290397a41SThomas Garnier Define the padding in terabytes added to the existing physical 217390397a41SThomas Garnier memory size during kernel memory randomization. It is useful 217490397a41SThomas Garnier for memory hotplug support but reduces the entropy available for 217590397a41SThomas Garnier address randomization. 217690397a41SThomas Garnier 217790397a41SThomas Garnier If unsure, leave at the default value. 217890397a41SThomas Garnier 21796449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING 21806449dcb0SKirill A. Shutemov bool "Linear Address Masking support" 21816449dcb0SKirill A. Shutemov depends on X86_64 21823267cb6dSPawan Gupta depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS 21836449dcb0SKirill A. Shutemov help 21846449dcb0SKirill A. Shutemov Linear Address Masking (LAM) modifies the checking that is applied 21856449dcb0SKirill A. Shutemov to 64-bit linear addresses, allowing software to use of the 21866449dcb0SKirill A. Shutemov untranslated address bits for metadata. 21876449dcb0SKirill A. Shutemov 21886449dcb0SKirill A. Shutemov The capability can be used for efficient address sanitizers (ASAN) 21896449dcb0SKirill A. Shutemov implementation and for optimizations in JITs. 21906449dcb0SKirill A. Shutemov 2191506f1d07SSam Ravnborgconfig HOTPLUG_CPU 2192bebd024eSThomas Gleixner def_bool y 219340b31360SStephen Rothwell depends on SMP 2194506f1d07SSam Ravnborg 2195506f1d07SSam Ravnborgconfig COMPAT_VDSO 2196b0b49f26SAndy Lutomirski def_bool n 2197de711563SMateusz Jończyk prompt "Workaround for glibc 2.3.2 / 2.3.3 (released in year 2003/2004)" 2198953fee1dSIngo Molnar depends on COMPAT_32 2199a7f7f624SMasahiro Yamada help 2200b0b49f26SAndy Lutomirski Certain buggy versions of glibc will crash if they are 2201b0b49f26SAndy Lutomirski presented with a 32-bit vDSO that is not mapped at the address 2202b0b49f26SAndy Lutomirski indicated in its segment table. 2203e84446deSRandy Dunlap 2204b0b49f26SAndy Lutomirski The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a 2205b0b49f26SAndy Lutomirski and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and 2206b0b49f26SAndy Lutomirski 49ad572a70b8aeb91e57483a11dd1b77e31c4468. Glibc 2.3.3 is 2207b0b49f26SAndy Lutomirski the only released version with the bug, but OpenSUSE 9 2208b0b49f26SAndy Lutomirski contains a buggy "glibc 2.3.2". 2209506f1d07SSam Ravnborg 2210b0b49f26SAndy Lutomirski The symptom of the bug is that everything crashes on startup, saying: 2211b0b49f26SAndy Lutomirski dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed! 2212b0b49f26SAndy Lutomirski 2213b0b49f26SAndy Lutomirski Saying Y here changes the default value of the vdso32 boot 2214b0b49f26SAndy Lutomirski option from 1 to 0, which turns off the 32-bit vDSO entirely. 2215b0b49f26SAndy Lutomirski This works around the glibc bug but hurts performance. 2216b0b49f26SAndy Lutomirski 2217b0b49f26SAndy Lutomirski If unsure, say N: if you are compiling your own kernel, you 2218b0b49f26SAndy Lutomirski are unlikely to be using a buggy version of glibc. 2219506f1d07SSam Ravnborg 22203dc33bd3SKees Cookchoice 22213dc33bd3SKees Cook prompt "vsyscall table for legacy applications" 22223dc33bd3SKees Cook depends on X86_64 2223625b7b7fSAndy Lutomirski default LEGACY_VSYSCALL_XONLY 22243dc33bd3SKees Cook help 22253dc33bd3SKees Cook Legacy user code that does not know how to find the vDSO expects 22263dc33bd3SKees Cook to be able to issue three syscalls by calling fixed addresses in 22273dc33bd3SKees Cook kernel space. Since this location is not randomized with ASLR, 22283dc33bd3SKees Cook it can be used to assist security vulnerability exploitation. 22293dc33bd3SKees Cook 22303dc33bd3SKees Cook This setting can be changed at boot time via the kernel command 2231bf00745eSAndy Lutomirski line parameter vsyscall=[emulate|xonly|none]. Emulate mode 2232bf00745eSAndy Lutomirski is deprecated and can only be enabled using the kernel command 2233bf00745eSAndy Lutomirski line. 22343dc33bd3SKees Cook 22353dc33bd3SKees Cook On a system with recent enough glibc (2.14 or newer) and no 22363dc33bd3SKees Cook static binaries, you can say None without a performance penalty 22373dc33bd3SKees Cook to improve security. 22383dc33bd3SKees Cook 2239bd49e16eSAndy Lutomirski If unsure, select "Emulate execution only". 22403dc33bd3SKees Cook 2241bd49e16eSAndy Lutomirski config LEGACY_VSYSCALL_XONLY 2242bd49e16eSAndy Lutomirski bool "Emulate execution only" 2243bd49e16eSAndy Lutomirski help 2244bd49e16eSAndy Lutomirski The kernel traps and emulates calls into the fixed vsyscall 2245bd49e16eSAndy Lutomirski address mapping and does not allow reads. This 2246bd49e16eSAndy Lutomirski configuration is recommended when userspace might use the 2247bd49e16eSAndy Lutomirski legacy vsyscall area but support for legacy binary 2248bd49e16eSAndy Lutomirski instrumentation of legacy code is not needed. It mitigates 2249bd49e16eSAndy Lutomirski certain uses of the vsyscall area as an ASLR-bypassing 2250bd49e16eSAndy Lutomirski buffer. 22513dc33bd3SKees Cook 22523dc33bd3SKees Cook config LEGACY_VSYSCALL_NONE 22533dc33bd3SKees Cook bool "None" 22543dc33bd3SKees Cook help 22553dc33bd3SKees Cook There will be no vsyscall mapping at all. This will 22563dc33bd3SKees Cook eliminate any risk of ASLR bypass due to the vsyscall 22573dc33bd3SKees Cook fixed address mapping. Attempts to use the vsyscalls 22583dc33bd3SKees Cook will be reported to dmesg, so that either old or 22593dc33bd3SKees Cook malicious userspace programs can be identified. 22603dc33bd3SKees Cook 22613dc33bd3SKees Cookendchoice 22623dc33bd3SKees Cook 2263516cbf37STim Birdconfig CMDLINE_BOOL 2264516cbf37STim Bird bool "Built-in kernel command line" 2265a7f7f624SMasahiro Yamada help 2266516cbf37STim Bird Allow for specifying boot arguments to the kernel at 2267516cbf37STim Bird build time. On some systems (e.g. embedded ones), it is 2268516cbf37STim Bird necessary or convenient to provide some or all of the 2269516cbf37STim Bird kernel boot arguments with the kernel itself (that is, 2270516cbf37STim Bird to not rely on the boot loader to provide them.) 2271516cbf37STim Bird 2272516cbf37STim Bird To compile command line arguments into the kernel, 2273516cbf37STim Bird set this option to 'Y', then fill in the 227469711ca1SSébastien Hinderer boot arguments in CONFIG_CMDLINE. 2275516cbf37STim Bird 2276516cbf37STim Bird Systems with fully functional boot loaders (i.e. non-embedded) 2277516cbf37STim Bird should leave this option set to 'N'. 2278516cbf37STim Bird 2279516cbf37STim Birdconfig CMDLINE 2280516cbf37STim Bird string "Built-in kernel command string" 2281516cbf37STim Bird depends on CMDLINE_BOOL 2282516cbf37STim Bird default "" 2283a7f7f624SMasahiro Yamada help 2284516cbf37STim Bird Enter arguments here that should be compiled into the kernel 2285516cbf37STim Bird image and used at boot time. If the boot loader provides a 2286516cbf37STim Bird command line at boot time, it is appended to this string to 2287516cbf37STim Bird form the full kernel command line, when the system boots. 2288516cbf37STim Bird 2289516cbf37STim Bird However, you can use the CONFIG_CMDLINE_OVERRIDE option to 2290516cbf37STim Bird change this behavior. 2291516cbf37STim Bird 2292516cbf37STim Bird In most cases, the command line (whether built-in or provided 2293516cbf37STim Bird by the boot loader) should specify the device for the root 2294516cbf37STim Bird file system. 2295516cbf37STim Bird 2296516cbf37STim Birdconfig CMDLINE_OVERRIDE 2297516cbf37STim Bird bool "Built-in command line overrides boot loader arguments" 2298645e6466SAnders Roxell depends on CMDLINE_BOOL && CMDLINE != "" 2299a7f7f624SMasahiro Yamada help 2300516cbf37STim Bird Set this option to 'Y' to have the kernel ignore the boot loader 2301516cbf37STim Bird command line, and use ONLY the built-in command line. 2302516cbf37STim Bird 2303516cbf37STim Bird This is used to work around broken boot loaders. This should 2304516cbf37STim Bird be set to 'N' under normal conditions. 2305516cbf37STim Bird 2306a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL 2307a5b9e5a2SAndy Lutomirski bool "Enable the LDT (local descriptor table)" if EXPERT 2308a5b9e5a2SAndy Lutomirski default y 2309a7f7f624SMasahiro Yamada help 2310a5b9e5a2SAndy Lutomirski Linux can allow user programs to install a per-process x86 2311a5b9e5a2SAndy Lutomirski Local Descriptor Table (LDT) using the modify_ldt(2) system 2312a5b9e5a2SAndy Lutomirski call. This is required to run 16-bit or segmented code such as 2313a5b9e5a2SAndy Lutomirski DOSEMU or some Wine programs. It is also used by some very old 2314a5b9e5a2SAndy Lutomirski threading libraries. 2315a5b9e5a2SAndy Lutomirski 2316a5b9e5a2SAndy Lutomirski Enabling this feature adds a small amount of overhead to 2317a5b9e5a2SAndy Lutomirski context switches and increases the low-level kernel attack 2318a5b9e5a2SAndy Lutomirski surface. Disabling it removes the modify_ldt(2) system call. 2319a5b9e5a2SAndy Lutomirski 2320a5b9e5a2SAndy Lutomirski Saying 'N' here may make sense for embedded or server kernels. 2321a5b9e5a2SAndy Lutomirski 23223aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE 23233aac3ebeSThomas Gleixner bool "Enforce strict size checking for sigaltstack" 23243aac3ebeSThomas Gleixner depends on DYNAMIC_SIGFRAME 23253aac3ebeSThomas Gleixner help 23263aac3ebeSThomas Gleixner For historical reasons MINSIGSTKSZ is a constant which became 23273aac3ebeSThomas Gleixner already too small with AVX512 support. Add a mechanism to 23283aac3ebeSThomas Gleixner enforce strict checking of the sigaltstack size against the 23293aac3ebeSThomas Gleixner real size of the FPU frame. This option enables the check 23303aac3ebeSThomas Gleixner by default. It can also be controlled via the kernel command 23313aac3ebeSThomas Gleixner line option 'strict_sas_size' independent of this config 23323aac3ebeSThomas Gleixner switch. Enabling it might break existing applications which 23333aac3ebeSThomas Gleixner allocate a too small sigaltstack but 'work' because they 23343aac3ebeSThomas Gleixner never get a signal delivered. 23353aac3ebeSThomas Gleixner 23363aac3ebeSThomas Gleixner Say 'N' unless you want to really enforce this check. 23373aac3ebeSThomas Gleixner 2338d6f635bcSKees Cookconfig CFI_AUTO_DEFAULT 2339d6f635bcSKees Cook bool "Attempt to use FineIBT by default at boot time" 2340d6f635bcSKees Cook depends on FINEIBT 23415595c31cSPaweł Anikiel depends on !RUST || RUSTC_VERSION >= 108800 2342d6f635bcSKees Cook default y 2343d6f635bcSKees Cook help 2344d6f635bcSKees Cook Attempt to use FineIBT by default at boot time. If enabled, 2345d6f635bcSKees Cook this is the same as booting with "cfi=auto". If disabled, 2346d6f635bcSKees Cook this is the same as booting with "cfi=kcfi". 2347d6f635bcSKees Cook 2348b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig" 2349b700e7f0SSeth Jennings 2350350afa8aSRavi Bangoriaconfig X86_BUS_LOCK_DETECT 2351350afa8aSRavi Bangoria bool "Split Lock Detect and Bus Lock Detect support" 2352408eb741SRavi Bangoria depends on CPU_SUP_INTEL || CPU_SUP_AMD 2353350afa8aSRavi Bangoria default y 2354350afa8aSRavi Bangoria help 2355350afa8aSRavi Bangoria Enable Split Lock Detect and Bus Lock Detect functionalities. 2356350afa8aSRavi Bangoria See <file:Documentation/arch/x86/buslock.rst> for more information. 2357350afa8aSRavi Bangoria 2358506f1d07SSam Ravnborgendmenu 2359506f1d07SSam Ravnborg 23601ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS 236147ff30ccSUros Bizjak def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null) 236247ff30ccSUros Bizjak depends on CC_IS_GCC 23631ca3683cSUros Bizjak 2364b6762467SUros Bizjak# 2365b6762467SUros Bizjak# -fsanitize=kernel-address (KASAN) and -fsanitize=thread (KCSAN) 2366b6762467SUros Bizjak# are incompatible with named address spaces with GCC < 13.3 2367b6762467SUros Bizjak# (see GCC PR sanitizer/111736 and also PR sanitizer/115172). 2368b6762467SUros Bizjak# 2369b6762467SUros Bizjak 23709ebe5500SUros Bizjakconfig CC_HAS_NAMED_AS_FIXED_SANITIZERS 2371b6762467SUros Bizjak def_bool y 2372b6762467SUros Bizjak depends on !(KASAN || KCSAN) || GCC_VERSION >= 130300 2373b6762467SUros Bizjak depends on !(UBSAN_BOOL && KASAN) || GCC_VERSION >= 140200 23741ca3683cSUros Bizjak 23751ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT 2376b6762467SUros Bizjak def_bool CC_HAS_NAMED_AS 2377b6762467SUros Bizjak depends on CC_HAS_NAMED_AS_FIXED_SANITIZERS 23781ca3683cSUros Bizjak 2379f43b9876SPeter Zijlstraconfig CC_HAS_SLS 2380f43b9876SPeter Zijlstra def_bool $(cc-option,-mharden-sls=all) 2381f43b9876SPeter Zijlstra 2382f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK 2383f43b9876SPeter Zijlstra def_bool $(cc-option,-mfunction-return=thunk-extern) 2384f43b9876SPeter Zijlstra 2385bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING 2386bea75b33SThomas Gleixner def_bool $(cc-option,-fpatchable-function-entry=16,16) 2387bea75b33SThomas Gleixner 23880c92385dSPeter Zijlstraconfig CC_HAS_KCFI_ARITY 23890c92385dSPeter Zijlstra def_bool $(cc-option,-fsanitize=kcfi -fsanitize-kcfi-arity) 23900c92385dSPeter Zijlstra depends on CC_IS_CLANG && !RUST 23910c92385dSPeter Zijlstra 2392bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI 2393bea75b33SThomas Gleixner int 2394bea75b33SThomas Gleixner default 59 if FUNCTION_ALIGNMENT_64B 2395bea75b33SThomas Gleixner default 27 if FUNCTION_ALIGNMENT_32B 2396bea75b33SThomas Gleixner default 11 if FUNCTION_ALIGNMENT_16B 2397bea75b33SThomas Gleixner default 3 if FUNCTION_ALIGNMENT_8B 2398bea75b33SThomas Gleixner default 0 2399bea75b33SThomas Gleixner 240023ef9d43SKees Cook# Basically: FUNCTION_ALIGNMENT - 5*CFI 2401bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/ 2402bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES 2403bea75b33SThomas Gleixner int 240423ef9d43SKees Cook default FUNCTION_PADDING_CFI if CFI 2405bea75b33SThomas Gleixner default FUNCTION_ALIGNMENT 2406bea75b33SThomas Gleixner 2407931ab636SPeter Zijlstraconfig CALL_PADDING 2408931ab636SPeter Zijlstra def_bool n 2409931ab636SPeter Zijlstra depends on CC_HAS_ENTRY_PADDING && OBJTOOL 2410931ab636SPeter Zijlstra select FUNCTION_ALIGNMENT_16B 2411931ab636SPeter Zijlstra 2412931ab636SPeter Zijlstraconfig FINEIBT 2413931ab636SPeter Zijlstra def_bool y 241423ef9d43SKees Cook depends on X86_KERNEL_IBT && CFI && MITIGATION_RETPOLINE 2415931ab636SPeter Zijlstra select CALL_PADDING 2416931ab636SPeter Zijlstra 24170c92385dSPeter Zijlstraconfig FINEIBT_BHI 24180c92385dSPeter Zijlstra def_bool y 24190c92385dSPeter Zijlstra depends on FINEIBT && CC_HAS_KCFI_ARITY 24200c92385dSPeter Zijlstra 24218f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS 24228f7c0d8bSThomas Gleixner def_bool y 24230911b8c5SBreno Leitao depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL 24248f7c0d8bSThomas Gleixner 24258f7c0d8bSThomas Gleixnerconfig CALL_THUNKS 24268f7c0d8bSThomas Gleixner def_bool n 2427931ab636SPeter Zijlstra select CALL_PADDING 24288f7c0d8bSThomas Gleixner 2429b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS 2430b341b20dSPeter Zijlstra def_bool y 243123ef9d43SKees Cook depends on CALL_PADDING && !CFI 2432b341b20dSPeter Zijlstra 2433fe42754bSSean Christophersonmenuconfig CPU_MITIGATIONS 2434fe42754bSSean Christopherson bool "Mitigations for CPU vulnerabilities" 2435f43b9876SPeter Zijlstra default y 2436f43b9876SPeter Zijlstra help 2437fe42754bSSean Christopherson Say Y here to enable options which enable mitigations for hardware 2438fe42754bSSean Christopherson vulnerabilities (usually related to speculative execution). 2439ce0abef6SSean Christopherson Mitigations can be disabled or restricted to SMT systems at runtime 2440ce0abef6SSean Christopherson via the "mitigations" kernel parameter. 2441f43b9876SPeter Zijlstra 2442ce0abef6SSean Christopherson If you say N, all mitigations will be disabled. This CANNOT be 2443ce0abef6SSean Christopherson overridden at runtime. 2444ce0abef6SSean Christopherson 2445ce0abef6SSean Christopherson Say 'Y', unless you really know what you are doing. 2446f43b9876SPeter Zijlstra 2447fe42754bSSean Christophersonif CPU_MITIGATIONS 2448f43b9876SPeter Zijlstra 2449ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION 2450f43b9876SPeter Zijlstra bool "Remove the kernel mapping in user mode" 2451f43b9876SPeter Zijlstra default y 2452f43b9876SPeter Zijlstra depends on (X86_64 || X86_PAE) 2453f43b9876SPeter Zijlstra help 2454f43b9876SPeter Zijlstra This feature reduces the number of hardware side channels by 2455f43b9876SPeter Zijlstra ensuring that the majority of kernel addresses are not mapped 2456f43b9876SPeter Zijlstra into userspace. 2457f43b9876SPeter Zijlstra 2458ff61f079SJonathan Corbet See Documentation/arch/x86/pti.rst for more details. 2459f43b9876SPeter Zijlstra 2460aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE 2461f43b9876SPeter Zijlstra bool "Avoid speculative indirect branches in kernel" 2462f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2463f43b9876SPeter Zijlstra default y 2464f43b9876SPeter Zijlstra help 2465f43b9876SPeter Zijlstra Compile kernel with the retpoline compiler options to guard against 2466f43b9876SPeter Zijlstra kernel-to-user data leaks by avoiding speculative indirect 2467f43b9876SPeter Zijlstra branches. Requires a compiler with -mindirect-branch=thunk-extern 2468f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2469f43b9876SPeter Zijlstra 24700911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK 2471f43b9876SPeter Zijlstra bool "Enable return-thunks" 2472aefb2f2eSBreno Leitao depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK 2473f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2474b648ab48SBen Hutchings default y if X86_64 2475f43b9876SPeter Zijlstra help 2476f43b9876SPeter Zijlstra Compile the kernel with the return-thunks compiler option to guard 2477f43b9876SPeter Zijlstra against kernel-to-user data leaks by avoiding return speculation. 2478f43b9876SPeter Zijlstra Requires a compiler with -mfunction-return=thunk-extern 2479f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2480f43b9876SPeter Zijlstra 2481ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY 2482f43b9876SPeter Zijlstra bool "Enable UNRET on kernel entry" 24830911b8c5SBreno Leitao depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64 2484f43b9876SPeter Zijlstra default y 2485f43b9876SPeter Zijlstra help 2486f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=unret mitigation. 2487f43b9876SPeter Zijlstra 24885fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING 248980e4c1cdSThomas Gleixner bool "Mitigate RSB underflow with call depth tracking" 249080e4c1cdSThomas Gleixner depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS 249180e4c1cdSThomas Gleixner select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 249280e4c1cdSThomas Gleixner select CALL_THUNKS 249380e4c1cdSThomas Gleixner default y 249480e4c1cdSThomas Gleixner help 249580e4c1cdSThomas Gleixner Compile the kernel with call depth tracking to mitigate the Intel 249686e39b94SBreno Leitao SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off 249786e39b94SBreno Leitao by default and needs to be enabled on the kernel command line via the 249886e39b94SBreno Leitao retbleed=stuff option. For non-affected systems the overhead of this 249986e39b94SBreno Leitao option is marginal as the call depth tracking is using run-time 250086e39b94SBreno Leitao generated call thunks in a compiler generated padding area and call 250186e39b94SBreno Leitao patching. This increases text size by ~5%. For non affected systems 250286e39b94SBreno Leitao this space is unused. On affected SKL systems this results in a 250386e39b94SBreno Leitao significant performance gain over the IBRS mitigation. 250480e4c1cdSThomas Gleixner 2505e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG 2506e81dc127SThomas Gleixner bool "Enable call thunks and call depth tracking debugging" 25075fa31af3SBreno Leitao depends on MITIGATION_CALL_DEPTH_TRACKING 2508e81dc127SThomas Gleixner select FUNCTION_ALIGNMENT_32B 2509e81dc127SThomas Gleixner default n 2510e81dc127SThomas Gleixner help 2511e81dc127SThomas Gleixner Enable call/ret counters for imbalance detection and build in 2512e81dc127SThomas Gleixner a noisy dmesg about callthunks generation and call patching for 2513e81dc127SThomas Gleixner trouble shooting. The debug prints need to be enabled on the 2514e81dc127SThomas Gleixner kernel command line with 'debug-callthunks'. 251554628de6SRandy Dunlap Only enable this when you are debugging call thunks as this 251654628de6SRandy Dunlap creates a noticeable runtime overhead. If unsure say N. 251780e4c1cdSThomas Gleixner 2518e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY 2519f43b9876SPeter Zijlstra bool "Enable IBPB on kernel entry" 2520b648ab48SBen Hutchings depends on CPU_SUP_AMD && X86_64 2521f43b9876SPeter Zijlstra default y 2522f43b9876SPeter Zijlstra help 2523318e8c33SPatrick Bellasi Compile the kernel with support for the retbleed=ibpb and 2524318e8c33SPatrick Bellasi spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations. 2525f43b9876SPeter Zijlstra 25261da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY 2527f43b9876SPeter Zijlstra bool "Enable IBRS on kernel entry" 2528b648ab48SBen Hutchings depends on CPU_SUP_INTEL && X86_64 2529f43b9876SPeter Zijlstra default y 2530f43b9876SPeter Zijlstra help 2531f43b9876SPeter Zijlstra Compile the kernel with support for the spectre_v2=ibrs mitigation. 2532f43b9876SPeter Zijlstra This mitigates both spectre_v2 and retbleed at great cost to 2533f43b9876SPeter Zijlstra performance. 2534f43b9876SPeter Zijlstra 2535a033eec9SBreno Leitaoconfig MITIGATION_SRSO 2536fb3bd914SBorislav Petkov (AMD) bool "Mitigate speculative RAS overflow on AMD" 25370911b8c5SBreno Leitao depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK 2538fb3bd914SBorislav Petkov (AMD) default y 2539fb3bd914SBorislav Petkov (AMD) help 2540fb3bd914SBorislav Petkov (AMD) Enable the SRSO mitigation needed on AMD Zen1-4 machines. 2541fb3bd914SBorislav Petkov (AMD) 25427b75782fSBreno Leitaoconfig MITIGATION_SLS 2543f43b9876SPeter Zijlstra bool "Mitigate Straight-Line-Speculation" 2544f43b9876SPeter Zijlstra depends on CC_HAS_SLS && X86_64 2545f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2546f43b9876SPeter Zijlstra default n 2547f43b9876SPeter Zijlstra help 2548f43b9876SPeter Zijlstra Compile the kernel with straight-line-speculation options to guard 2549f43b9876SPeter Zijlstra against straight line speculation. The kernel image might be slightly 2550f43b9876SPeter Zijlstra larger. 2551f43b9876SPeter Zijlstra 2552225f2bd0SBreno Leitaoconfig MITIGATION_GDS 2553225f2bd0SBreno Leitao bool "Mitigate Gather Data Sampling" 2554225f2bd0SBreno Leitao depends on CPU_SUP_INTEL 2555225f2bd0SBreno Leitao default y 2556225f2bd0SBreno Leitao help 2557225f2bd0SBreno Leitao Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware 2558225f2bd0SBreno Leitao vulnerability which allows unprivileged speculative access to data 2559225f2bd0SBreno Leitao which was previously stored in vector registers. The attacker uses gather 2560225f2bd0SBreno Leitao instructions to infer the stale vector register data. 2561225f2bd0SBreno Leitao 25628076fcdeSPawan Guptaconfig MITIGATION_RFDS 25638076fcdeSPawan Gupta bool "RFDS Mitigation" 25648076fcdeSPawan Gupta depends on CPU_SUP_INTEL 25658076fcdeSPawan Gupta default y 25668076fcdeSPawan Gupta help 25678076fcdeSPawan Gupta Enable mitigation for Register File Data Sampling (RFDS) by default. 25688076fcdeSPawan Gupta RFDS is a hardware vulnerability which affects Intel Atom CPUs. It 25698076fcdeSPawan Gupta allows unprivileged speculative access to stale data previously 25708076fcdeSPawan Gupta stored in floating point, vector and integer registers. 25718076fcdeSPawan Gupta See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst> 25728076fcdeSPawan Gupta 25734f511739SJosh Poimboeufconfig MITIGATION_SPECTRE_BHI 25744f511739SJosh Poimboeuf bool "Mitigate Spectre-BHB (Branch History Injection)" 2575ec9404e4SPawan Gupta depends on CPU_SUP_INTEL 25764f511739SJosh Poimboeuf default y 2577ec9404e4SPawan Gupta help 2578ec9404e4SPawan Gupta Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks 2579ec9404e4SPawan Gupta where the branch history buffer is poisoned to speculatively steer 2580ec9404e4SPawan Gupta indirect branches. 2581ec9404e4SPawan Gupta See <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2582ec9404e4SPawan Gupta 258394045568SBreno Leitaoconfig MITIGATION_MDS 258494045568SBreno Leitao bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug" 258594045568SBreno Leitao depends on CPU_SUP_INTEL 258694045568SBreno Leitao default y 258794045568SBreno Leitao help 258894045568SBreno Leitao Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is 258994045568SBreno Leitao a hardware vulnerability which allows unprivileged speculative access 259094045568SBreno Leitao to data which is available in various CPU internal buffers. 259194045568SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/mds.rst> 2592b8da0b33SBreno Leitao 2593b8da0b33SBreno Leitaoconfig MITIGATION_TAA 2594b8da0b33SBreno Leitao bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug" 2595b8da0b33SBreno Leitao depends on CPU_SUP_INTEL 2596b8da0b33SBreno Leitao default y 2597b8da0b33SBreno Leitao help 2598b8da0b33SBreno Leitao Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware 2599b8da0b33SBreno Leitao vulnerability that allows unprivileged speculative access to data 2600b8da0b33SBreno Leitao which is available in various CPU internal buffers by using 2601b8da0b33SBreno Leitao asynchronous aborts within an Intel TSX transactional region. 2602b8da0b33SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst> 2603163f9fe6SBreno Leitao 2604163f9fe6SBreno Leitaoconfig MITIGATION_MMIO_STALE_DATA 2605163f9fe6SBreno Leitao bool "Mitigate MMIO Stale Data hardware bug" 2606163f9fe6SBreno Leitao depends on CPU_SUP_INTEL 2607163f9fe6SBreno Leitao default y 2608163f9fe6SBreno Leitao help 2609163f9fe6SBreno Leitao Enable mitigation for MMIO Stale Data hardware bugs. Processor MMIO 2610163f9fe6SBreno Leitao Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO) 2611163f9fe6SBreno Leitao vulnerabilities that can expose data. The vulnerabilities require the 2612163f9fe6SBreno Leitao attacker to have access to MMIO. 2613163f9fe6SBreno Leitao See also 2614163f9fe6SBreno Leitao <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst> 26153a4ee4ffSBreno Leitao 26163a4ee4ffSBreno Leitaoconfig MITIGATION_L1TF 26173a4ee4ffSBreno Leitao bool "Mitigate L1 Terminal Fault (L1TF) hardware bug" 26183a4ee4ffSBreno Leitao depends on CPU_SUP_INTEL 26193a4ee4ffSBreno Leitao default y 26203a4ee4ffSBreno Leitao help 26213a4ee4ffSBreno Leitao Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a 26223a4ee4ffSBreno Leitao hardware vulnerability which allows unprivileged speculative access to data 26233a4ee4ffSBreno Leitao available in the Level 1 Data Cache. 26243a4ee4ffSBreno Leitao See <file:Documentation/admin-guide/hw-vuln/l1tf.rst 2625894e2885SBreno Leitao 2626894e2885SBreno Leitaoconfig MITIGATION_RETBLEED 2627894e2885SBreno Leitao bool "Mitigate RETBleed hardware bug" 2628894e2885SBreno Leitao depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY 2629894e2885SBreno Leitao default y 2630894e2885SBreno Leitao help 2631894e2885SBreno Leitao Enable mitigation for RETBleed (Arbitrary Speculative Code Execution 2632894e2885SBreno Leitao with Return Instructions) vulnerability. RETBleed is a speculative 2633894e2885SBreno Leitao execution attack which takes advantage of microarchitectural behavior 2634894e2885SBreno Leitao in many modern microprocessors, similar to Spectre v2. An 2635894e2885SBreno Leitao unprivileged attacker can use these flaws to bypass conventional 2636894e2885SBreno Leitao memory security restrictions to gain read access to privileged memory 2637894e2885SBreno Leitao that would otherwise be inaccessible. 2638ca01c0d8SBreno Leitao 2639ca01c0d8SBreno Leitaoconfig MITIGATION_SPECTRE_V1 2640ca01c0d8SBreno Leitao bool "Mitigate SPECTRE V1 hardware bug" 2641ca01c0d8SBreno Leitao default y 2642ca01c0d8SBreno Leitao help 2643ca01c0d8SBreno Leitao Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a 2644ca01c0d8SBreno Leitao class of side channel attacks that takes advantage of speculative 2645ca01c0d8SBreno Leitao execution that bypasses conditional branch instructions used for 2646ca01c0d8SBreno Leitao memory access bounds check. 2647ca01c0d8SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2648a0b02e3fSBreno Leitao 264972c70f48SBreno Leitaoconfig MITIGATION_SPECTRE_V2 265072c70f48SBreno Leitao bool "Mitigate SPECTRE V2 hardware bug" 265172c70f48SBreno Leitao default y 265272c70f48SBreno Leitao help 265372c70f48SBreno Leitao Enable mitigation for Spectre V2 (Branch Target Injection). Spectre 265472c70f48SBreno Leitao V2 is a class of side channel attacks that takes advantage of 265572c70f48SBreno Leitao indirect branch predictors inside the processor. In Spectre variant 2 265672c70f48SBreno Leitao attacks, the attacker can steer speculative indirect branches in the 265772c70f48SBreno Leitao victim to gadget code by poisoning the branch target buffer of a CPU 265872c70f48SBreno Leitao used for predicting indirect branch addresses. 265972c70f48SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 266072c70f48SBreno Leitao 2661a0b02e3fSBreno Leitaoconfig MITIGATION_SRBDS 2662a0b02e3fSBreno Leitao bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug" 2663a0b02e3fSBreno Leitao depends on CPU_SUP_INTEL 2664a0b02e3fSBreno Leitao default y 2665a0b02e3fSBreno Leitao help 2666a0b02e3fSBreno Leitao Enable mitigation for Special Register Buffer Data Sampling (SRBDS). 2667a0b02e3fSBreno Leitao SRBDS is a hardware vulnerability that allows Microarchitectural Data 2668a0b02e3fSBreno Leitao Sampling (MDS) techniques to infer values returned from special 2669a0b02e3fSBreno Leitao register accesses. An unprivileged user can extract values returned 2670a0b02e3fSBreno Leitao from RDRAND and RDSEED executed on another core or sibling thread 2671a0b02e3fSBreno Leitao using MDS techniques. 2672a0b02e3fSBreno Leitao See also 2673a0b02e3fSBreno Leitao <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst> 2674b908cdabSBreno Leitao 2675b908cdabSBreno Leitaoconfig MITIGATION_SSB 2676b908cdabSBreno Leitao bool "Mitigate Speculative Store Bypass (SSB) hardware bug" 2677b908cdabSBreno Leitao default y 2678b908cdabSBreno Leitao help 2679b908cdabSBreno Leitao Enable mitigation for Speculative Store Bypass (SSB). SSB is a 2680b908cdabSBreno Leitao hardware security vulnerability and its exploitation takes advantage 2681b908cdabSBreno Leitao of speculative execution in a similar way to the Meltdown and Spectre 2682b908cdabSBreno Leitao security vulnerabilities. 2683b908cdabSBreno Leitao 26848754e67aSPawan Guptaconfig MITIGATION_ITS 26858754e67aSPawan Gupta bool "Enable Indirect Target Selection mitigation" 26868754e67aSPawan Gupta depends on CPU_SUP_INTEL && X86_64 26878754e67aSPawan Gupta depends on MITIGATION_RETPOLINE && MITIGATION_RETHUNK 2688872df34dSPeter Zijlstra select EXECMEM 26898754e67aSPawan Gupta default y 26908754e67aSPawan Gupta help 26918754e67aSPawan Gupta Enable Indirect Target Selection (ITS) mitigation. ITS is a bug in 26928754e67aSPawan Gupta BPU on some Intel CPUs that may allow Spectre V2 style attacks. If 26938754e67aSPawan Gupta disabled, mitigation cannot be enabled via cmdline. 26948754e67aSPawan Gupta See <file:Documentation/admin-guide/hw-vuln/indirect-target-selection.rst> 26958754e67aSPawan Gupta 2696d8010d4bSBorislav Petkov (AMD)config MITIGATION_TSA 2697d8010d4bSBorislav Petkov (AMD) bool "Mitigate Transient Scheduler Attacks" 2698d8010d4bSBorislav Petkov (AMD) depends on CPU_SUP_AMD 2699d8010d4bSBorislav Petkov (AMD) default y 2700d8010d4bSBorislav Petkov (AMD) help 2701d8010d4bSBorislav Petkov (AMD) Enable mitigation for Transient Scheduler Attacks. TSA is a hardware 2702d8010d4bSBorislav Petkov (AMD) security vulnerability on AMD CPUs which can lead to forwarding of 2703d8010d4bSBorislav Petkov (AMD) invalid info to subsequent instructions and thus can affect their 2704d8010d4bSBorislav Petkov (AMD) timing and thereby cause a leakage. 2705556c1ad6SPawan Gupta 2706556c1ad6SPawan Guptaconfig MITIGATION_VMSCAPE 2707556c1ad6SPawan Gupta bool "Mitigate VMSCAPE" 2708556c1ad6SPawan Gupta depends on KVM 2709556c1ad6SPawan Gupta default y 2710556c1ad6SPawan Gupta help 2711556c1ad6SPawan Gupta Enable mitigation for VMSCAPE attacks. VMSCAPE is a hardware security 2712556c1ad6SPawan Gupta vulnerability on Intel and AMD CPUs that may allow a guest to do 2713556c1ad6SPawan Gupta Spectre v2 style attacks on userspace hypervisor. 2714f43b9876SPeter Zijlstraendif 2715f43b9876SPeter Zijlstra 27163072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES 27173072e413SMichal Hocko def_bool y 27185c11f00bSDavid Hildenbrand depends on ARCH_ENABLE_MEMORY_HOTPLUG 27193072e413SMichal Hocko 2720da85f865SBjorn Helgaasmenu "Power management and ACPI options" 2721e279b6c1SSam Ravnborg 2722e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER 27233c2362e6SHarvey Harrison def_bool y 272444556530SZhimin Gu depends on HIBERNATION 2725e279b6c1SSam Ravnborg 2726e279b6c1SSam Ravnborgsource "kernel/power/Kconfig" 2727e279b6c1SSam Ravnborg 2728e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig" 2729e279b6c1SSam Ravnborg 2730a6b68076SAndi Kleenconfig X86_APM_BOOT 27316fc108a0SJan Beulich def_bool y 2732282e5aabSPaul Bolle depends on APM 2733a6b68076SAndi Kleen 2734e279b6c1SSam Ravnborgmenuconfig APM 2735e279b6c1SSam Ravnborg tristate "APM (Advanced Power Management) BIOS support" 2736efefa6f6SIngo Molnar depends on X86_32 && PM_SLEEP 2737a7f7f624SMasahiro Yamada help 2738e279b6c1SSam Ravnborg APM is a BIOS specification for saving power using several different 2739e279b6c1SSam Ravnborg techniques. This is mostly useful for battery powered laptops with 2740e279b6c1SSam Ravnborg APM compliant BIOSes. If you say Y here, the system time will be 2741e279b6c1SSam Ravnborg reset after a RESUME operation, the /proc/apm device will provide 2742e279b6c1SSam Ravnborg battery status information, and user-space programs will receive 2743e279b6c1SSam Ravnborg notification of APM "events" (e.g. battery status change). 2744e279b6c1SSam Ravnborg 2745e279b6c1SSam Ravnborg If you select "Y" here, you can disable actual use of the APM 2746e279b6c1SSam Ravnborg BIOS by passing the "apm=off" option to the kernel at boot time. 2747e279b6c1SSam Ravnborg 2748e279b6c1SSam Ravnborg Note that the APM support is almost completely disabled for 2749e279b6c1SSam Ravnborg machines with more than one CPU. 2750e279b6c1SSam Ravnborg 2751e279b6c1SSam Ravnborg In order to use APM, you will need supporting software. For location 2752151f4e2bSMauro Carvalho Chehab and more information, read <file:Documentation/power/apm-acpi.rst> 27532dc98fd3SMichael Witten and the Battery Powered Linux mini-HOWTO, available from 2754e279b6c1SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 2755e279b6c1SSam Ravnborg 2756e279b6c1SSam Ravnborg This driver does not spin down disk drives (see the hdparm(8) 2757e279b6c1SSam Ravnborg manpage ("man 8 hdparm") for that), and it doesn't turn off 2758e279b6c1SSam Ravnborg VESA-compliant "green" monitors. 2759e279b6c1SSam Ravnborg 2760e279b6c1SSam Ravnborg This driver does not support the TI 4000M TravelMate and the ACER 2761e279b6c1SSam Ravnborg 486/DX4/75 because they don't have compliant BIOSes. Many "green" 2762e279b6c1SSam Ravnborg desktop machines also don't have compliant BIOSes, and this driver 2763e279b6c1SSam Ravnborg may cause those machines to panic during the boot phase. 2764e279b6c1SSam Ravnborg 2765e279b6c1SSam Ravnborg Generally, if you don't have a battery in your machine, there isn't 2766e279b6c1SSam Ravnborg much point in using this driver and you should say N. If you get 2767e279b6c1SSam Ravnborg random kernel OOPSes or reboots that don't seem to be related to 2768e279b6c1SSam Ravnborg anything, try disabling/enabling this option (or disabling/enabling 2769e279b6c1SSam Ravnborg APM in your BIOS). 2770e279b6c1SSam Ravnborg 2771e279b6c1SSam Ravnborg Some other things you should try when experiencing seemingly random, 2772e279b6c1SSam Ravnborg "weird" problems: 2773e279b6c1SSam Ravnborg 2774e279b6c1SSam Ravnborg 1) make sure that you have enough swap space and that it is 2775e279b6c1SSam Ravnborg enabled. 27767987448fSStephen Kitt 2) pass the "idle=poll" option to the kernel 2777e279b6c1SSam Ravnborg 3) switch on floating point emulation in the kernel and pass 2778e279b6c1SSam Ravnborg the "no387" option to the kernel 2779e279b6c1SSam Ravnborg 4) pass the "floppy=nodma" option to the kernel 2780e279b6c1SSam Ravnborg 5) pass the "mem=4M" option to the kernel (thereby disabling 2781e279b6c1SSam Ravnborg all but the first 4 MB of RAM) 2782e279b6c1SSam Ravnborg 6) make sure that the CPU is not over clocked. 2783e279b6c1SSam Ravnborg 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/> 2784e279b6c1SSam Ravnborg 8) disable the cache from your BIOS settings 2785e279b6c1SSam Ravnborg 9) install a fan for the video card or exchange video RAM 2786e279b6c1SSam Ravnborg 10) install a better fan for the CPU 2787e279b6c1SSam Ravnborg 11) exchange RAM chips 2788e279b6c1SSam Ravnborg 12) exchange the motherboard. 2789e279b6c1SSam Ravnborg 2790e279b6c1SSam Ravnborg To compile this driver as a module, choose M here: the 2791e279b6c1SSam Ravnborg module will be called apm. 2792e279b6c1SSam Ravnborg 2793e279b6c1SSam Ravnborgif APM 2794e279b6c1SSam Ravnborg 2795e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND 2796e279b6c1SSam Ravnborg bool "Ignore USER SUSPEND" 2797a7f7f624SMasahiro Yamada help 2798e279b6c1SSam Ravnborg This option will ignore USER SUSPEND requests. On machines with a 2799e279b6c1SSam Ravnborg compliant APM BIOS, you want to say N. However, on the NEC Versa M 2800e279b6c1SSam Ravnborg series notebooks, it is necessary to say Y because of a BIOS bug. 2801e279b6c1SSam Ravnborg 2802e279b6c1SSam Ravnborgconfig APM_DO_ENABLE 2803e279b6c1SSam Ravnborg bool "Enable PM at boot time" 2804a7f7f624SMasahiro Yamada help 2805e279b6c1SSam Ravnborg Enable APM features at boot time. From page 36 of the APM BIOS 2806e279b6c1SSam Ravnborg specification: "When disabled, the APM BIOS does not automatically 2807e279b6c1SSam Ravnborg power manage devices, enter the Standby State, enter the Suspend 2808e279b6c1SSam Ravnborg State, or take power saving steps in response to CPU Idle calls." 2809e279b6c1SSam Ravnborg This driver will make CPU Idle calls when Linux is idle (unless this 2810e279b6c1SSam Ravnborg feature is turned off -- see "Do CPU IDLE calls", below). This 2811e279b6c1SSam Ravnborg should always save battery power, but more complicated APM features 2812e279b6c1SSam Ravnborg will be dependent on your BIOS implementation. You may need to turn 2813e279b6c1SSam Ravnborg this option off if your computer hangs at boot time when using APM 2814e279b6c1SSam Ravnborg support, or if it beeps continuously instead of suspending. Turn 2815e279b6c1SSam Ravnborg this off if you have a NEC UltraLite Versa 33/C or a Toshiba 2816e279b6c1SSam Ravnborg T400CDT. This is off by default since most machines do fine without 2817e279b6c1SSam Ravnborg this feature. 2818e279b6c1SSam Ravnborg 2819e279b6c1SSam Ravnborgconfig APM_CPU_IDLE 2820dd8af076SLen Brown depends on CPU_IDLE 2821e279b6c1SSam Ravnborg bool "Make CPU Idle calls when idle" 2822a7f7f624SMasahiro Yamada help 2823e279b6c1SSam Ravnborg Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. 2824e279b6c1SSam Ravnborg On some machines, this can activate improved power savings, such as 2825e279b6c1SSam Ravnborg a slowed CPU clock rate, when the machine is idle. These idle calls 2826e279b6c1SSam Ravnborg are made after the idle loop has run for some length of time (e.g., 2827e279b6c1SSam Ravnborg 333 mS). On some machines, this will cause a hang at boot time or 2828e279b6c1SSam Ravnborg whenever the CPU becomes idle. (On machines with more than one CPU, 2829e279b6c1SSam Ravnborg this option does nothing.) 2830e279b6c1SSam Ravnborg 2831e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK 2832e279b6c1SSam Ravnborg bool "Enable console blanking using APM" 2833a7f7f624SMasahiro Yamada help 2834e279b6c1SSam Ravnborg Enable console blanking using the APM. Some laptops can use this to 2835e279b6c1SSam Ravnborg turn off the LCD backlight when the screen blanker of the Linux 2836e279b6c1SSam Ravnborg virtual console blanks the screen. Note that this is only used by 2837e279b6c1SSam Ravnborg the virtual console screen blanker, and won't turn off the backlight 2838e279b6c1SSam Ravnborg when using the X Window system. This also doesn't have anything to 2839e279b6c1SSam Ravnborg do with your VESA-compliant power-saving monitor. Further, this 2840e279b6c1SSam Ravnborg option doesn't work for all laptops -- it might not turn off your 2841e279b6c1SSam Ravnborg backlight at all, or it might print a lot of errors to the console, 2842e279b6c1SSam Ravnborg especially if you are using gpm. 2843e279b6c1SSam Ravnborg 2844e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS 2845e279b6c1SSam Ravnborg bool "Allow interrupts during APM BIOS calls" 2846a7f7f624SMasahiro Yamada help 2847e279b6c1SSam Ravnborg Normally we disable external interrupts while we are making calls to 2848e279b6c1SSam Ravnborg the APM BIOS as a measure to lessen the effects of a badly behaving 2849e279b6c1SSam Ravnborg BIOS implementation. The BIOS should reenable interrupts if it 2850e279b6c1SSam Ravnborg needs to. Unfortunately, some BIOSes do not -- especially those in 2851e279b6c1SSam Ravnborg many of the newer IBM Thinkpads. If you experience hangs when you 2852e279b6c1SSam Ravnborg suspend, try setting this to Y. Otherwise, say N. 2853e279b6c1SSam Ravnborg 2854e279b6c1SSam Ravnborgendif # APM 2855e279b6c1SSam Ravnborg 2856bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig" 2857e279b6c1SSam Ravnborg 2858e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig" 2859e279b6c1SSam Ravnborg 286027471fdbSAndy Henroidsource "drivers/idle/Kconfig" 286127471fdbSAndy Henroid 2862e279b6c1SSam Ravnborgendmenu 2863e279b6c1SSam Ravnborg 2864e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)" 2865e279b6c1SSam Ravnborg 2866e279b6c1SSam Ravnborgchoice 2867e279b6c1SSam Ravnborg prompt "PCI access mode" 2868efefa6f6SIngo Molnar depends on X86_32 && PCI 2869e279b6c1SSam Ravnborg default PCI_GOANY 2870a7f7f624SMasahiro Yamada help 2871e279b6c1SSam Ravnborg On PCI systems, the BIOS can be used to detect the PCI devices and 2872e279b6c1SSam Ravnborg determine their configuration. However, some old PCI motherboards 2873e279b6c1SSam Ravnborg have BIOS bugs and may crash if this is done. Also, some embedded 2874e279b6c1SSam Ravnborg PCI-based systems don't have any BIOS at all. Linux can also try to 2875e279b6c1SSam Ravnborg detect the PCI hardware directly without using the BIOS. 2876e279b6c1SSam Ravnborg 2877e279b6c1SSam Ravnborg With this option, you can specify how Linux should detect the 2878e279b6c1SSam Ravnborg PCI devices. If you choose "BIOS", the BIOS will be used, 2879e279b6c1SSam Ravnborg if you choose "Direct", the BIOS won't be used, and if you 2880e279b6c1SSam Ravnborg choose "MMConfig", then PCI Express MMCONFIG will be used. 2881e279b6c1SSam Ravnborg If you choose "Any", the kernel will try MMCONFIG, then the 2882e279b6c1SSam Ravnborg direct access method and falls back to the BIOS if that doesn't 2883e279b6c1SSam Ravnborg work. If unsure, go with the default, which is "Any". 2884e279b6c1SSam Ravnborg 2885e279b6c1SSam Ravnborgconfig PCI_GOBIOS 2886e279b6c1SSam Ravnborg bool "BIOS" 2887e279b6c1SSam Ravnborg 2888e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG 2889e279b6c1SSam Ravnborg bool "MMConfig" 2890e279b6c1SSam Ravnborg 2891e279b6c1SSam Ravnborgconfig PCI_GODIRECT 2892e279b6c1SSam Ravnborg bool "Direct" 2893e279b6c1SSam Ravnborg 28943ef0e1f8SAndres Salomonconfig PCI_GOOLPC 289576fb6570SDaniel Drake bool "OLPC XO-1" 28963ef0e1f8SAndres Salomon depends on OLPC 28973ef0e1f8SAndres Salomon 28982bdd1b03SAndres Salomonconfig PCI_GOANY 28992bdd1b03SAndres Salomon bool "Any" 29002bdd1b03SAndres Salomon 2901e279b6c1SSam Ravnborgendchoice 2902e279b6c1SSam Ravnborg 2903e279b6c1SSam Ravnborgconfig PCI_BIOS 29043c2362e6SHarvey Harrison def_bool y 2905efefa6f6SIngo Molnar depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY) 2906e279b6c1SSam Ravnborg 2907e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct. 2908e279b6c1SSam Ravnborgconfig PCI_DIRECT 29093c2362e6SHarvey Harrison def_bool y 29100aba496fSShaohua Li depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG)) 2911e279b6c1SSam Ravnborg 2912e279b6c1SSam Ravnborgconfig PCI_MMCONFIG 2913b45c9f36SJan Kiszka bool "Support mmconfig PCI config space access" if X86_64 2914b45c9f36SJan Kiszka default y 29154590d98fSAndy Shevchenko depends on PCI && (ACPI || JAILHOUSE_GUEST) 2916b45c9f36SJan Kiszka depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG) 291721d8fb8dSMateusz Jończyk help 291821d8fb8dSMateusz Jończyk Add support for accessing the PCI configuration space as a memory 291921d8fb8dSMateusz Jończyk mapped area. It is the recommended method if the system supports 292021d8fb8dSMateusz Jończyk this (it must have PCI Express and ACPI for it to be available). 292121d8fb8dSMateusz Jończyk 292221d8fb8dSMateusz Jończyk In the unlikely case that enabling this configuration option causes 292321d8fb8dSMateusz Jończyk problems, the mechanism can be switched off with the 'pci=nommconf' 292421d8fb8dSMateusz Jończyk command line parameter. 292521d8fb8dSMateusz Jończyk 292621d8fb8dSMateusz Jończyk Say N only if you are sure that your platform does not support this 292721d8fb8dSMateusz Jończyk access method or you have problems caused by it. 292821d8fb8dSMateusz Jończyk 292921d8fb8dSMateusz Jończyk Say Y otherwise. 2930e279b6c1SSam Ravnborg 29313ef0e1f8SAndres Salomonconfig PCI_OLPC 29322bdd1b03SAndres Salomon def_bool y 29332bdd1b03SAndres Salomon depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY) 29343ef0e1f8SAndres Salomon 2935b5401a96SAlex Nixonconfig PCI_XEN 2936b5401a96SAlex Nixon def_bool y 2937b5401a96SAlex Nixon depends on PCI && XEN 2938b5401a96SAlex Nixon 29398364e1f8SJan Kiszkaconfig MMCONF_FAM10H 29408364e1f8SJan Kiszka def_bool y 29418364e1f8SJan Kiszka depends on X86_64 && PCI_MMCONFIG && ACPI 2942e279b6c1SSam Ravnborg 29433f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK 2944d9f87802SMateusz Jończyk bool "Read PCI host bridge windows from the CNB20LE chipset" if EXPERT 2945d9f87802SMateusz Jończyk depends on X86_32 && PCI 29463f6ea84aSIra W. Snyder help 29473f6ea84aSIra W. Snyder Read the PCI windows out of the CNB20LE host bridge. This allows 29483f6ea84aSIra W. Snyder PCI hotplug to work on systems with the CNB20LE chipset which do 29493f6ea84aSIra W. Snyder not have ACPI. 29503f6ea84aSIra W. Snyder 2951d9f87802SMateusz Jończyk The ServerWorks (later Broadcom) CNB20LE was a chipset designed 2952d9f87802SMateusz Jończyk most probably only for Pentium III. 2953d9f87802SMateusz Jończyk 2954d9f87802SMateusz Jończyk To find out if you have such a chipset, search for a PCI device with 2955d9f87802SMateusz Jończyk 1166:0009 PCI IDs, for example by executing 2956d9f87802SMateusz Jończyk lspci -nn | grep '1166:0009' 2957d9f87802SMateusz Jończyk The code is inactive if there is none. 2958d9f87802SMateusz Jończyk 295964a5fed6SBjorn Helgaas There's no public spec for this chipset, and this functionality 296064a5fed6SBjorn Helgaas is known to be incomplete. 296164a5fed6SBjorn Helgaas 296264a5fed6SBjorn Helgaas You should say N unless you know you need this. 296364a5fed6SBjorn Helgaas 29643a495511SWilliam Breathitt Grayconfig ISA_BUS 296517a2a129SWilliam Breathitt Gray bool "ISA bus support on modern systems" if EXPERT 29663a495511SWilliam Breathitt Gray help 296717a2a129SWilliam Breathitt Gray Expose ISA bus device drivers and options available for selection and 296817a2a129SWilliam Breathitt Gray configuration. Enable this option if your target machine has an ISA 296917a2a129SWilliam Breathitt Gray bus. ISA is an older system, displaced by PCI and newer bus 297017a2a129SWilliam Breathitt Gray architectures -- if your target machine is modern, it probably does 297117a2a129SWilliam Breathitt Gray not have an ISA bus. 29723a495511SWilliam Breathitt Gray 29733a495511SWilliam Breathitt Gray If unsure, say N. 29743a495511SWilliam Breathitt Gray 29751c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA. 2976e279b6c1SSam Ravnborgconfig ISA_DMA_API 29771c00f016SDavid Rientjes bool "ISA-style DMA support" if (X86_64 && EXPERT) 29781c00f016SDavid Rientjes default y 29791c00f016SDavid Rientjes help 29801c00f016SDavid Rientjes Enables ISA-style DMA support for devices requiring such controllers. 29811c00f016SDavid Rientjes If unsure, say Y. 2982e279b6c1SSam Ravnborg 298351e68d05SLinus Torvaldsif X86_32 298451e68d05SLinus Torvalds 2985e279b6c1SSam Ravnborgconfig ISA 2986e279b6c1SSam Ravnborg bool "ISA support" 2987a7f7f624SMasahiro Yamada help 2988e279b6c1SSam Ravnborg Find out whether you have ISA slots on your motherboard. ISA is the 2989e279b6c1SSam Ravnborg name of a bus system, i.e. the way the CPU talks to the other stuff 2990e279b6c1SSam Ravnborg inside your box. Other bus systems are PCI, EISA, MicroChannel 2991e279b6c1SSam Ravnborg (MCA) or VESA. ISA is an older system, now being displaced by PCI; 2992e279b6c1SSam Ravnborg newer boards don't support it. If you have ISA, say Y, otherwise N. 2993e279b6c1SSam Ravnborg 2994e279b6c1SSam Ravnborgconfig SCx200 2995e279b6c1SSam Ravnborg tristate "NatSemi SCx200 support" 2996a7f7f624SMasahiro Yamada help 2997e279b6c1SSam Ravnborg This provides basic support for National Semiconductor's 2998e279b6c1SSam Ravnborg (now AMD's) Geode processors. The driver probes for the 2999e279b6c1SSam Ravnborg PCI-IDs of several on-chip devices, so its a good dependency 3000e279b6c1SSam Ravnborg for other scx200_* drivers. 3001e279b6c1SSam Ravnborg 3002e279b6c1SSam Ravnborg If compiled as a module, the driver is named scx200. 3003e279b6c1SSam Ravnborg 3004e279b6c1SSam Ravnborgconfig SCx200HR_TIMER 3005e279b6c1SSam Ravnborg tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" 3006592913ecSJohn Stultz depends on SCx200 3007e279b6c1SSam Ravnborg default y 3008a7f7f624SMasahiro Yamada help 3009e279b6c1SSam Ravnborg This driver provides a clocksource built upon the on-chip 3010e279b6c1SSam Ravnborg 27MHz high-resolution timer. Its also a workaround for 3011e279b6c1SSam Ravnborg NSC Geode SC-1100's buggy TSC, which loses time when the 3012e279b6c1SSam Ravnborg processor goes idle (as is done by the scheduler). The 3013e279b6c1SSam Ravnborg other workaround is idle=poll boot option. 3014e279b6c1SSam Ravnborg 30153ef0e1f8SAndres Salomonconfig OLPC 30163ef0e1f8SAndres Salomon bool "One Laptop Per Child support" 301754008979SThomas Gleixner depends on !X86_PAE 30183c554946SAndres Salomon select GPIOLIB 3019dc3119e7SThomas Gleixner select OF 302045bb1674SDaniel Drake select OF_PROMTREE 3021b4e51854SGrant Likely select IRQ_DOMAIN 30220c3d931bSLubomir Rintel select OLPC_EC 3023a7f7f624SMasahiro Yamada help 30243ef0e1f8SAndres Salomon Add support for detecting the unique features of the OLPC 30253ef0e1f8SAndres Salomon XO hardware. 30263ef0e1f8SAndres Salomon 3027a3128588SDaniel Drakeconfig OLPC_XO1_PM 3028a3128588SDaniel Drake bool "OLPC XO-1 Power Management" 3029fa112cf1SBorislav Petkov depends on OLPC && MFD_CS5535=y && PM_SLEEP 3030a7f7f624SMasahiro Yamada help 303197c4cb71SDaniel Drake Add support for poweroff and suspend of the OLPC XO-1 laptop. 3032bf1ebf00SDaniel Drake 3033cfee9597SDaniel Drakeconfig OLPC_XO1_RTC 3034cfee9597SDaniel Drake bool "OLPC XO-1 Real Time Clock" 3035cfee9597SDaniel Drake depends on OLPC_XO1_PM && RTC_DRV_CMOS 3036a7f7f624SMasahiro Yamada help 3037cfee9597SDaniel Drake Add support for the XO-1 real time clock, which can be used as a 3038cfee9597SDaniel Drake programmable wakeup source. 3039cfee9597SDaniel Drake 30407feda8e9SDaniel Drakeconfig OLPC_XO1_SCI 30417feda8e9SDaniel Drake bool "OLPC XO-1 SCI extras" 304292e830f2SArnd Bergmann depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y 3043ed8e47feSRandy Dunlap depends on INPUT=y 3044d8d01a63SDaniel Drake select POWER_SUPPLY 3045a7f7f624SMasahiro Yamada help 30467feda8e9SDaniel Drake Add support for SCI-based features of the OLPC XO-1 laptop: 30477bc74b3dSDaniel Drake - EC-driven system wakeups 30487feda8e9SDaniel Drake - Power button 30497bc74b3dSDaniel Drake - Ebook switch 30502cf2baeaSDaniel Drake - Lid switch 3051e1040ac6SDaniel Drake - AC adapter status updates 3052e1040ac6SDaniel Drake - Battery status updates 30537feda8e9SDaniel Drake 3054a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI 3055a0f30f59SDaniel Drake bool "OLPC XO-1.5 SCI extras" 3056d8d01a63SDaniel Drake depends on OLPC && ACPI 3057d8d01a63SDaniel Drake select POWER_SUPPLY 3058a7f7f624SMasahiro Yamada help 3059a0f30f59SDaniel Drake Add support for SCI-based features of the OLPC XO-1.5 laptop: 3060a0f30f59SDaniel Drake - EC-driven system wakeups 3061a0f30f59SDaniel Drake - AC adapter status updates 3062a0f30f59SDaniel Drake - Battery status updates 3063e279b6c1SSam Ravnborg 3064298c9babSDmitry Torokhovconfig GEODE_COMMON 3065298c9babSDmitry Torokhov bool 3066298c9babSDmitry Torokhov 3067d4f3e350SEd Wildgooseconfig ALIX 3068d4f3e350SEd Wildgoose bool "PCEngines ALIX System Support (LED setup)" 3069d4f3e350SEd Wildgoose select GPIOLIB 3070298c9babSDmitry Torokhov select GEODE_COMMON 3071a7f7f624SMasahiro Yamada help 3072d4f3e350SEd Wildgoose This option enables system support for the PCEngines ALIX. 3073d4f3e350SEd Wildgoose At present this just sets up LEDs for GPIO control on 3074d4f3e350SEd Wildgoose ALIX2/3/6 boards. However, other system specific setup should 3075d4f3e350SEd Wildgoose get added here. 3076d4f3e350SEd Wildgoose 3077d4f3e350SEd Wildgoose Note: You must still enable the drivers for GPIO and LED support 3078d4f3e350SEd Wildgoose (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs 3079d4f3e350SEd Wildgoose 3080d4f3e350SEd Wildgoose Note: You have to set alix.force=1 for boards with Award BIOS. 3081d4f3e350SEd Wildgoose 3082da4e3302SPhilip Prindevilleconfig NET5501 3083da4e3302SPhilip Prindeville bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)" 3084da4e3302SPhilip Prindeville select GPIOLIB 3085298c9babSDmitry Torokhov select GEODE_COMMON 3086a7f7f624SMasahiro Yamada help 3087da4e3302SPhilip Prindeville This option enables system support for the Soekris Engineering net5501. 3088da4e3302SPhilip Prindeville 30893197059aSPhilip A. Prindevilleconfig GEOS 30903197059aSPhilip A. Prindeville bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)" 30913197059aSPhilip A. Prindeville select GPIOLIB 3092298c9babSDmitry Torokhov select GEODE_COMMON 30933197059aSPhilip A. Prindeville depends on DMI 3094a7f7f624SMasahiro Yamada help 30953197059aSPhilip A. Prindeville This option enables system support for the Traverse Technologies GEOS. 30963197059aSPhilip A. Prindeville 30977d029125SVivien Didelotconfig TS5500 30987d029125SVivien Didelot bool "Technologic Systems TS-5500 platform support" 30997d029125SVivien Didelot depends on MELAN 31007d029125SVivien Didelot select CHECK_SIGNATURE 31017d029125SVivien Didelot select NEW_LEDS 31027d029125SVivien Didelot select LEDS_CLASS 3103a7f7f624SMasahiro Yamada help 31047d029125SVivien Didelot This option enables system support for the Technologic Systems TS-5500. 31057d029125SVivien Didelot 3106e279b6c1SSam Ravnborgendif # X86_32 3107e279b6c1SSam Ravnborg 310823ac4ae8SAndreas Herrmannconfig AMD_NB 3109e279b6c1SSam Ravnborg def_bool y 3110e6e6e5e8SYazen Ghannam depends on AMD_NODE 3111e6e6e5e8SYazen Ghannam 3112e6e6e5e8SYazen Ghannamconfig AMD_NODE 3113e6e6e5e8SYazen Ghannam def_bool y 31140e152cd7SBorislav Petkov depends on CPU_SUP_AMD && PCI 3115e279b6c1SSam Ravnborg 3116e279b6c1SSam Ravnborgendmenu 3117e279b6c1SSam Ravnborg 31181572497cSChristoph Hellwigmenu "Binary Emulations" 3119e279b6c1SSam Ravnborg 3120e279b6c1SSam Ravnborgconfig IA32_EMULATION 3121e279b6c1SSam Ravnborg bool "IA32 Emulation" 3122e279b6c1SSam Ravnborg depends on X86_64 312339f88911SIngo Molnar select ARCH_WANT_OLD_COMPAT_IPC 3124d1603990SRandy Dunlap select BINFMT_ELF 312539f88911SIngo Molnar select COMPAT_OLD_SIGACTION 3126a7f7f624SMasahiro Yamada help 31275fd92e65SH. J. Lu Include code to run legacy 32-bit programs under a 31285fd92e65SH. J. Lu 64-bit kernel. You should likely turn this on, unless you're 31295fd92e65SH. J. Lu 100% sure that you don't have any 32-bit programs left. 3130e279b6c1SSam Ravnborg 3131a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED 3132a11e0975SNikolay Borisov bool "IA32 emulation disabled by default" 3133a11e0975SNikolay Borisov default n 3134a11e0975SNikolay Borisov depends on IA32_EMULATION 3135a11e0975SNikolay Borisov help 3136a11e0975SNikolay Borisov Make IA32 emulation disabled by default. This prevents loading 32-bit 3137a11e0975SNikolay Borisov processes and access to 32-bit syscalls. If unsure, leave it to its 3138a11e0975SNikolay Borisov default value. 3139a11e0975SNikolay Borisov 314083a44a4fSMasahiro Yamadaconfig X86_X32_ABI 31416ea30386SKees Cook bool "x32 ABI for 64-bit mode" 31429b54050bSBrian Gerst depends on X86_64 3143aaeed6ecSNathan Chancellor # llvm-objcopy does not convert x86_64 .note.gnu.property or 3144aaeed6ecSNathan Chancellor # compressed debug sections to x86_x32 properly: 3145aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/514 3146aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/1141 3147aaeed6ecSNathan Chancellor depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm) 3148a7f7f624SMasahiro Yamada help 31495fd92e65SH. J. Lu Include code to run binaries for the x32 native 32-bit ABI 31505fd92e65SH. J. Lu for 64-bit processors. An x32 process gets access to the 31515fd92e65SH. J. Lu full 64-bit register file and wide data path while leaving 31525fd92e65SH. J. Lu pointers at 32 bits for smaller memory footprint. 31535fd92e65SH. J. Lu 3154953fee1dSIngo Molnarconfig COMPAT_32 3155953fee1dSIngo Molnar def_bool y 3156953fee1dSIngo Molnar depends on IA32_EMULATION || X86_32 3157953fee1dSIngo Molnar select HAVE_UID16 3158953fee1dSIngo Molnar select OLD_SIGSUSPEND3 3159953fee1dSIngo Molnar 3160e279b6c1SSam Ravnborgconfig COMPAT 31613c2362e6SHarvey Harrison def_bool y 316283a44a4fSMasahiro Yamada depends on IA32_EMULATION || X86_X32_ABI 3163e279b6c1SSam Ravnborg 3164e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT 31653120e25eSJan Beulich def_bool y 3166a9251280SLinus Torvalds depends on COMPAT 3167ee009e4aSDavid Howells 3168e279b6c1SSam Ravnborgendmenu 3169e279b6c1SSam Ravnborg 3170e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP 3171e5beae16SKeith Packard def_bool y 3172e5beae16SKeith Packard depends on X86_32 3173e5beae16SKeith Packard 3174edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig" 31755e8ebd84SJason A. Donenfeld 31763d37d939SH. Peter Anvin (Intel)source "arch/x86/Kconfig.cpufeatures" 31773d37d939SH. Peter Anvin (Intel) 31785e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler" 3179