1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 2daa93fabSSam Ravnborg# Select 32 or 64 bit 3daa93fabSSam Ravnborgconfig 64BIT 4104daea1SMasahiro Yamada bool "64-bit kernel" if "$(ARCH)" = "x86" 5104daea1SMasahiro Yamada default "$(ARCH)" != "i386" 6a7f7f624SMasahiro Yamada help 7daa93fabSSam Ravnborg Say yes to build a 64-bit kernel - formerly known as x86_64 8daa93fabSSam Ravnborg Say no to build a 32-bit kernel - formerly known as i386 9daa93fabSSam Ravnborg 10daa93fabSSam Ravnborgconfig X86_32 113120e25eSJan Beulich def_bool y 123120e25eSJan Beulich depends on !64BIT 13341c787eSIngo Molnar # Options that are inherently 32-bit kernel only: 14341c787eSIngo Molnar select ARCH_WANT_IPC_PARSE_VERSION 15341c787eSIngo Molnar select CLKSRC_I8253 16341c787eSIngo Molnar select CLONE_BACKWARDS 17157e118bSThomas Gleixner select GENERIC_VDSO_32 18117ed454SThomas Gleixner select HAVE_DEBUG_STACKOVERFLOW 19157e118bSThomas Gleixner select KMAP_LOCAL 20341c787eSIngo Molnar select MODULES_USE_ELF_REL 21341c787eSIngo Molnar select OLD_SIGACTION 222ca408d9SBrian Gerst select ARCH_SPLIT_ARG64 23daa93fabSSam Ravnborg 24daa93fabSSam Ravnborgconfig X86_64 253120e25eSJan Beulich def_bool y 263120e25eSJan Beulich depends on 64BIT 27d94e0685SIngo Molnar # Options that are inherently 64-bit kernel only: 284eb0716eSAlexandre Ghiti select ARCH_HAS_GIGANTIC_PAGE 29c12d3362SArd Biesheuvel select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 300bff0aaeSSuren Baghdasaryan select ARCH_SUPPORTS_PER_VMA_LOCK 3175182022SPeter Xu select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 32d94e0685SIngo Molnar select HAVE_ARCH_SOFT_DIRTY 33d94e0685SIngo Molnar select MODULES_USE_ELF_RELA 34f616ab59SChristoph Hellwig select NEED_DMA_MAP_STATE 3509230cbcSChristoph Hellwig select SWIOTLB 367facdc42SAl Viro select ARCH_HAS_ELFCORE_COMPAT 3763703f37SKefeng Wang select ZONE_DMA32 3814e56fb2SMike Rapoport (IBM) select EXECMEM if DYNAMIC_FTRACE 391032c0baSSam Ravnborg 40518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE 41518049d9SSteven Rostedt (VMware) def_bool y 42518049d9SSteven Rostedt (VMware) depends on X86_32 43518049d9SSteven Rostedt (VMware) depends on FUNCTION_TRACER 44518049d9SSteven Rostedt (VMware) select DYNAMIC_FTRACE 45518049d9SSteven Rostedt (VMware) help 46518049d9SSteven Rostedt (VMware) We keep the static function tracing (!DYNAMIC_FTRACE) around 47518049d9SSteven Rostedt (VMware) in order to test the non static function tracing in the 48518049d9SSteven Rostedt (VMware) generic code, as other architectures still use it. But we 49518049d9SSteven Rostedt (VMware) only need to keep it around for x86_64. No need to keep it 50518049d9SSteven Rostedt (VMware) for x86_32. For x86_32, force DYNAMIC_FTRACE. 51d94e0685SIngo Molnar# 52d94e0685SIngo Molnar# Arch settings 53d94e0685SIngo Molnar# 54d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be 55d94e0685SIngo Molnar# ported to 32-bit as well. ) 56d94e0685SIngo Molnar# 578d5fffb9SSam Ravnborgconfig X86 583c2362e6SHarvey Harrison def_bool y 59c763ea26SIngo Molnar # 60c763ea26SIngo Molnar # Note: keep this list sorted alphabetically 61c763ea26SIngo Molnar # 626471b825SIngo Molnar select ACPI_LEGACY_TABLES_LOOKUP if ACPI 636e0a0ea1SGraeme Gregory select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI 64a02f66bbSJames Morse select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU 65942fa985SYury Norov select ARCH_32BIT_OFF_T if X86_32 662a21ad57SThomas Gleixner select ARCH_CLOCKSOURCE_INIT 67fe42754bSSean Christopherson select ARCH_CONFIGURES_CPU_MITIGATIONS 681f6d3a8fSMasami Hiramatsu select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE 691e866974SAnshuman Khandual select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION 705c11f00bSDavid Hildenbrand select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64 7191024b3cSAnshuman Khandual select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 72cebc774fSAnshuman Khandual select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE) 731e866974SAnshuman Khandual select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE 7491dda51aSAleksey Makarov select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 75c2280be8SAnshuman Khandual select ARCH_HAS_CACHE_LINE_SIZE 761156b441SDavidlohr Bueso select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION 777c7077a7SThomas Gleixner select ARCH_HAS_CPU_FINALIZE_INIT 788f23f5dbSJason Gunthorpe select ARCH_HAS_CPU_PASID if IOMMU_SVA 7955d1ecceSEric Biggers select ARCH_HAS_CRC32 80ed4bc981SEric Biggers select ARCH_HAS_CRC_T10DIF if X86_64 812792d84eSKees Cook select ARCH_HAS_CURRENT_STACK_POINTER 82fa5b6ec9SLaura Abbott select ARCH_HAS_DEBUG_VIRTUAL 83399145f9SAnshuman Khandual select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE 8421266be9SDan Williams select ARCH_HAS_DEVMEM_IS_ALLOWED 85de6c85bfSChristoph Hellwig select ARCH_HAS_DMA_OPS if GART_IOMMU || XEN 86b1a57bbfSDouglas Anderson select ARCH_HAS_EARLY_DEBUG if KGDB 876471b825SIngo Molnar select ARCH_HAS_ELF_RANDOMIZE 8864f6a4e1SMike Rapoport (Microsoft) select ARCH_HAS_EXECMEM_ROX if X86_64 8972d93104SLinus Torvalds select ARCH_HAS_FAST_MULTIPLIER 906974f0c4SDaniel Micay select ARCH_HAS_FORTIFY_SOURCE 91957e3facSRiku Voipio select ARCH_HAS_GCOV_PROFILE_ALL 92bece04b5SMarco Elver select ARCH_HAS_KCOV if X86_64 93b0b8a15bSSamuel Holland select ARCH_HAS_KERNEL_FPU_SUPPORT 940c9c1d56SThiago Jung Bauermann select ARCH_HAS_MEM_ENCRYPT 9510bcc80eSMathieu Desnoyers select ARCH_HAS_MEMBARRIER_SYNC_CORE 9649f88c70SPaul E. McKenney select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS 970ebeea8cSDaniel Borkmann select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 98c763ea26SIngo Molnar select ARCH_HAS_PMEM_API if X86_64 99476e8583SPeter Zijlstra select ARCH_HAS_PREEMPT_LAZY 10017596731SRobin Murphy select ARCH_HAS_PTE_DEVMAP if X86_64 1013010a5eaSLaurent Dufour select ARCH_HAS_PTE_SPECIAL 10271ce1ab5SKinsey Ho select ARCH_HAS_HW_PTE_YOUNG 103eed9a328SYu Zhao select ARCH_HAS_NONLEAF_PMD_YOUNG if PGTABLE_LEVELS > 2 1040aed55afSDan Williams select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64 105ec6347bbSDan Williams select ARCH_HAS_COPY_MC if X86_64 106d2852a22SDaniel Borkmann select ARCH_HAS_SET_MEMORY 107d253ca0cSRick Edgecombe select ARCH_HAS_SET_DIRECT_MAP 108ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_KERNEL_RWX 109ad21fc4fSLaura Abbott select ARCH_HAS_STRICT_MODULE_RWX 110ac1ab12aSMathieu Desnoyers select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 11125c619e5SBrian Gerst select ARCH_HAS_SYSCALL_WRAPPER 112918327e9SKees Cook select ARCH_HAS_UBSAN 1137e01ccb4SZong Li select ARCH_HAS_DEBUG_WX 11463703f37SKefeng Wang select ARCH_HAS_ZONE_DMA_SET if EXPERT 1156471b825SIngo Molnar select ARCH_HAVE_NMI_SAFE_CMPXCHG 116ba386777SVignesh Balasubramanian select ARCH_HAVE_EXTRA_ELF_NOTES 11704d5ea46SAneesh Kumar K.V select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE 1186471b825SIngo Molnar select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI 11977fbbc81SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 1205e2c18c0SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 1213599fe12SThomas Gleixner select ARCH_STACKWALK 1222c870e61SArnd Bergmann select ARCH_SUPPORTS_ACPI 1236471b825SIngo Molnar select ARCH_SUPPORTS_ATOMIC_RMW 1245d6ad668SMike Rapoport select ARCH_SUPPORTS_DEBUG_PAGEALLOC 125d283d422SPasha Tatashin select ARCH_SUPPORTS_PAGE_TABLE_CHECK if X86_64 1266471b825SIngo Molnar select ARCH_SUPPORTS_NUMA_BALANCING if X86_64 12714df3267SThomas Gleixner select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP if NR_CPUS <= 4096 1283c516f89SSami Tolvanen select ARCH_SUPPORTS_CFI_CLANG if X86_64 1293c516f89SSami Tolvanen select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG 130583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG 131583bfd48SNathan Chancellor select ARCH_SUPPORTS_LTO_CLANG_THIN 132d2d6422fSSebastian Andrzej Siewior select ARCH_SUPPORTS_RT 133315ad878SRong Xu select ARCH_SUPPORTS_AUTOFDO_CLANG 134d5dc9583SRong Xu select ARCH_SUPPORTS_PROPELLER_CLANG if X86_64 1356471b825SIngo Molnar select ARCH_USE_BUILTIN_BSWAP 136a432b7c0SUros Bizjak select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64 137dce44566SAnshuman Khandual select ARCH_USE_MEMTEST 1386471b825SIngo Molnar select ARCH_USE_QUEUED_RWLOCKS 1396471b825SIngo Molnar select ARCH_USE_QUEUED_SPINLOCKS 1402ce0d7f9SMark Brown select ARCH_USE_SYM_ANNOTATIONS 141ce4a4e56SAndy Lutomirski select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH 14281c22041SDaniel Borkmann select ARCH_WANT_DEFAULT_BPF_JIT if X86_64 143c763ea26SIngo Molnar select ARCH_WANTS_DYNAMIC_TASK_STRUCT 14451c2ee6dSNick Desaulniers select ARCH_WANTS_NO_INSTR 14507431506SAnshuman Khandual select ARCH_WANT_GENERAL_HUGETLB 1463876d4a3SAlexandre Ghiti select ARCH_WANT_HUGE_PMD_SHARE 14759612b24SNathan Chancellor select ARCH_WANT_LD_ORPHAN_WARN 1480b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP if X86_64 1490b6f1582SAneesh Kumar K.V select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP if X86_64 15038d8b4e6SHuang Ying select ARCH_WANTS_THP_SWAP if X86_64 151b5f06f64SBalbir Singh select ARCH_HAS_PARANOID_L1D_FLUSH 15210916706SShile Zhang select BUILDTIME_TABLE_SORT 1536471b825SIngo Molnar select CLKEVT_I8253 1546471b825SIngo Molnar select CLOCKSOURCE_WATCHDOG 1557cf8f44aSAlexander Potapenko # Word-size accesses may read uninitialized data past the trailing \0 1567cf8f44aSAlexander Potapenko # in strings and cause false KMSAN reports. 1577cf8f44aSAlexander Potapenko select DCACHE_WORD_ACCESS if !KMSAN 1583aac3ebeSThomas Gleixner select DYNAMIC_SIGFRAME 15945471cd9SLinus Torvalds select EDAC_ATOMIC_SCRUB 16045471cd9SLinus Torvalds select EDAC_SUPPORT 1616471b825SIngo Molnar select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC) 162cb81deefSThomas Gleixner select GENERIC_CLOCKEVENTS_BROADCAST_IDLE if GENERIC_CLOCKEVENTS_BROADCAST 1636471b825SIngo Molnar select GENERIC_CLOCKEVENTS_MIN_ADJUST 1646471b825SIngo Molnar select GENERIC_CMOS_UPDATE 1656471b825SIngo Molnar select GENERIC_CPU_AUTOPROBE 1665b95f94cSJames Morse select GENERIC_CPU_DEVICES 16761dc0f55SThomas Gleixner select GENERIC_CPU_VULNERABILITIES 1686471b825SIngo Molnar select GENERIC_EARLY_IOREMAP 16927d6b4d1SThomas Gleixner select GENERIC_ENTRY 1706471b825SIngo Molnar select GENERIC_IOMAP 171c7d6c9ddSThomas Gleixner select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1720fa115daSThomas Gleixner select GENERIC_IRQ_MATRIX_ALLOCATOR if X86_LOCAL_APIC 173ad7a929fSThomas Gleixner select GENERIC_IRQ_MIGRATION if SMP 1746471b825SIngo Molnar select GENERIC_IRQ_PROBE 175c201c917SThomas Gleixner select GENERIC_IRQ_RESERVATION_MODE 1766471b825SIngo Molnar select GENERIC_IRQ_SHOW 1776471b825SIngo Molnar select GENERIC_PENDING_IRQ if SMP 1782ae27137SSteven Price select GENERIC_PTDUMP 1796471b825SIngo Molnar select GENERIC_SMP_IDLE_THREAD 1806471b825SIngo Molnar select GENERIC_TIME_VSYSCALL 1817ac87074SVincenzo Frascino select GENERIC_GETTIMEOFDAY 182550a77a7SDmitry Safonov select GENERIC_VDSO_TIME_NS 1837e90ffb7SAdrian Hunter select GENERIC_VDSO_OVERFLOW_PROTECT 1846ca297d4SPeter Zijlstra select GUP_GET_PXX_LOW_HIGH if X86_PAE 18517e5888eSHans de Goede select HARDIRQS_SW_RESEND 1867edaeb68SThomas Gleixner select HARDLOCKUP_CHECK_TIMESTAMP if X86_64 187fcbfe812SNiklas Schnelle select HAS_IOPORT 1886471b825SIngo Molnar select HAVE_ACPI_APEI if ACPI 1896471b825SIngo Molnar select HAVE_ACPI_APEI_NMI if ACPI 1902a19be61SVlastimil Babka select HAVE_ALIGNED_STRUCT_PAGE 1916471b825SIngo Molnar select HAVE_ARCH_AUDITSYSCALL 1926471b825SIngo Molnar select HAVE_ARCH_HUGE_VMAP if X86_64 || X86_PAE 193eed1fceeSSong Liu select HAVE_ARCH_HUGE_VMALLOC if X86_64 1946471b825SIngo Molnar select HAVE_ARCH_JUMP_LABEL 195b34006c4SArd Biesheuvel select HAVE_ARCH_JUMP_LABEL_RELATIVE 196d17a1d97SAndrey Ryabinin select HAVE_ARCH_KASAN if X86_64 1970609ae01SDaniel Axtens select HAVE_ARCH_KASAN_VMALLOC if X86_64 1981dc0da6eSAlexander Potapenko select HAVE_ARCH_KFENCE 1994ca8cc8dSAlexander Potapenko select HAVE_ARCH_KMSAN if X86_64 2006471b825SIngo Molnar select HAVE_ARCH_KGDB 2019e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_BITS if MMU 2029e08f57dSDaniel Cashman select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 2031b028f78SDmitry Safonov select HAVE_ARCH_COMPAT_MMAP_BASES if MMU && COMPAT 204271ca788SArd Biesheuvel select HAVE_ARCH_PREL32_RELOCATIONS 2056471b825SIngo Molnar select HAVE_ARCH_SECCOMP_FILTER 206f7d83c1cSKees Cook select HAVE_ARCH_THREAD_STRUCT_WHITELIST 207afaef01cSAlexander Popov select HAVE_ARCH_STACKLEAK 2086471b825SIngo Molnar select HAVE_ARCH_TRACEHOOK 2096471b825SIngo Molnar select HAVE_ARCH_TRANSPARENT_HUGEPAGE 210a00cc7d9SMatthew Wilcox select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64 211b64d8d1eSPeter Xu select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD 2127677f7fdSAxel Rasmussen select HAVE_ARCH_USERFAULTFD_MINOR if X86_64 && USERFAULTFD 213e37e43a4SAndy Lutomirski select HAVE_ARCH_VMAP_STACK if X86_64 214fe950f60SKees Cook select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 215c763ea26SIngo Molnar select HAVE_ARCH_WITHIN_STACK_FRAMES 2162ff2b7ecSMasahiro Yamada select HAVE_ASM_MODVERSIONS 2176471b825SIngo Molnar select HAVE_CMPXCHG_DOUBLE 2186471b825SIngo Molnar select HAVE_CMPXCHG_LOCAL 21924a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER if X86_64 22024a9c541SFrederic Weisbecker select HAVE_CONTEXT_TRACKING_USER_OFFSTACK if HAVE_CONTEXT_TRACKING_USER 2216471b825SIngo Molnar select HAVE_C_RECORDMCOUNT 22203f16cd0SJosh Poimboeuf select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL 223280981d6SSathvika Vasireddy select HAVE_OBJTOOL_NOP_MCOUNT if HAVE_OBJTOOL_MCOUNT 2244ed308c4SSteven Rostedt (Google) select HAVE_BUILDTIME_MCOUNT_SORT 2256471b825SIngo Molnar select HAVE_DEBUG_KMEMLEAK 2269c5a3621SAkinobu Mita select HAVE_DMA_CONTIGUOUS 227677aa9f7SSteven Rostedt select HAVE_DYNAMIC_FTRACE 22806aeaaeaSMasami Hiramatsu select HAVE_DYNAMIC_FTRACE_WITH_REGS 22902a474caSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_ARGS if X86_64 230762abbc0SMasami Hiramatsu (Google) select HAVE_FTRACE_REGS_HAVING_PT_REGS if X86_64 231562955feSSteven Rostedt (VMware) select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS 232c316eb44SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT if X86_64 233503e4510SHeiko Carstens select HAVE_SAMPLE_FTRACE_DIRECT_MULTI if X86_64 23403f5781bSWang YanQing select HAVE_EBPF_JIT 23558340a07SJohannes Berg select HAVE_EFFICIENT_UNALIGNED_ACCESS 2366630a8e5SChristoph Hellwig select HAVE_EISA 2375f56a5dfSJiri Slaby select HAVE_EXIT_THREAD 23825176ad0SDavid Hildenbrand select HAVE_GUP_FAST 239644e0e8dSSteven Rostedt (VMware) select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE 240a762e926SMasami Hiramatsu (Google) select HAVE_FTRACE_GRAPH_FUNC if HAVE_FUNCTION_GRAPH_TRACER 2416471b825SIngo Molnar select HAVE_FTRACE_MCOUNT_RECORD 242a3ed4157SMasami Hiramatsu (Google) select HAVE_FUNCTION_GRAPH_FREGS if HAVE_FUNCTION_GRAPH_TRACER 2434a30e4c9SSteven Rostedt (VMware) select HAVE_FUNCTION_GRAPH_TRACER if X86_32 || (X86_64 && DYNAMIC_FTRACE) 2446471b825SIngo Molnar select HAVE_FUNCTION_TRACER 2456b90bd4bSEmese Revfy select HAVE_GCC_PLUGINS 2460067f129SK.Prasad select HAVE_HW_BREAKPOINT 2476471b825SIngo Molnar select HAVE_IOREMAP_PROT 248624db9eaSThomas Gleixner select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64 2496471b825SIngo Molnar select HAVE_IRQ_TIME_ACCOUNTING 2504ab7674fSJosh Poimboeuf select HAVE_JUMP_LABEL_HACK if HAVE_OBJTOOL 2516471b825SIngo Molnar select HAVE_KERNEL_BZIP2 2526471b825SIngo Molnar select HAVE_KERNEL_GZIP 2536471b825SIngo Molnar select HAVE_KERNEL_LZ4 2546471b825SIngo Molnar select HAVE_KERNEL_LZMA 2556471b825SIngo Molnar select HAVE_KERNEL_LZO 2566471b825SIngo Molnar select HAVE_KERNEL_XZ 257fb46d057SNick Terrell select HAVE_KERNEL_ZSTD 2586471b825SIngo Molnar select HAVE_KPROBES 2596471b825SIngo Molnar select HAVE_KPROBES_ON_FTRACE 260540adea3SMasami Hiramatsu select HAVE_FUNCTION_ERROR_INJECTION 2616471b825SIngo Molnar select HAVE_KRETPROBES 262f3a112c0SMasami Hiramatsu select HAVE_RETHOOK 2636471b825SIngo Molnar select HAVE_LIVEPATCH if X86_64 2640102752eSFrederic Weisbecker select HAVE_MIXED_BREAKPOINTS_REGS 265ee9f8fceSJosh Poimboeuf select HAVE_MOD_ARCH_SPECIFIC 2669f132f7eSJoel Fernandes (Google) select HAVE_MOVE_PMD 267be37c98dSKalesh Singh select HAVE_MOVE_PUD 26822102f45SJosh Poimboeuf select HAVE_NOINSTR_HACK if HAVE_OBJTOOL 26942a0bb3fSPetr Mladek select HAVE_NMI 270489e355bSJosh Poimboeuf select HAVE_NOINSTR_VALIDATION if HAVE_OBJTOOL 27103f16cd0SJosh Poimboeuf select HAVE_OBJTOOL if X86_64 2726471b825SIngo Molnar select HAVE_OPTPROBES 2735394f1e9SArnd Bergmann select HAVE_PAGE_SIZE_4KB 2746471b825SIngo Molnar select HAVE_PCSPKR_PLATFORM 2756471b825SIngo Molnar select HAVE_PERF_EVENTS 276c01d4323SFrederic Weisbecker select HAVE_PERF_EVENTS_NMI 27792e5aae4SNicholas Piggin select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI 278eb01d42aSChristoph Hellwig select HAVE_PCI 279c5e63197SJiri Olsa select HAVE_PERF_REGS 280c5ebcedbSJiri Olsa select HAVE_PERF_USER_STACK_DUMP 281a3725973SRik van Riel select MMU_GATHER_RCU_TABLE_FREE 2821e9fdf21SPeter Zijlstra select MMU_GATHER_MERGE_VMAS 28300998085SThomas Gleixner select HAVE_POSIX_CPU_TIMERS_TASK_WORK 2846471b825SIngo Molnar select HAVE_REGS_AND_STACK_ACCESS_API 28503f16cd0SJosh Poimboeuf select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC || STACK_VALIDATION 2863c88ee19SMasami Hiramatsu select HAVE_FUNCTION_ARG_ACCESS_API 2877ecd19cfSKefeng Wang select HAVE_SETUP_PER_CPU_AREA 288cd1a41ceSThomas Gleixner select HAVE_SOFTIRQ_ON_OWN_STACK 289d148eac0SMasahiro Yamada select HAVE_STACKPROTECTOR if CC_HAS_SANE_STACKPROTECTOR 29003f16cd0SJosh Poimboeuf select HAVE_STACK_VALIDATION if HAVE_OBJTOOL 291e6d6c071SJosh Poimboeuf select HAVE_STATIC_CALL 29203f16cd0SJosh Poimboeuf select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL 29399cf983cSMark Rutland select HAVE_PREEMPT_DYNAMIC_CALL 294d6761b8fSMathieu Desnoyers select HAVE_RSEQ 29509498135SMiguel Ojeda select HAVE_RUST if X86_64 2966471b825SIngo Molnar select HAVE_SYSCALL_TRACEPOINTS 2975f3da8c0SJosh Poimboeuf select HAVE_UACCESS_VALIDATION if HAVE_OBJTOOL 2986471b825SIngo Molnar select HAVE_UNSTABLE_SCHED_CLOCK 2997c68af6eSAvi Kivity select HAVE_USER_RETURN_NOTIFIER 3007ac87074SVincenzo Frascino select HAVE_GENERIC_VDSO 30133385150SJason A. Donenfeld select VDSO_GETRANDOM if X86_64 3020c7ffa32SThomas Gleixner select HOTPLUG_PARALLEL if SMP && X86_64 30305736e4aSThomas Gleixner select HOTPLUG_SMT if SMP 3040c7ffa32SThomas Gleixner select HOTPLUG_SPLIT_STARTUP if SMP && X86_32 305c0185808SThomas Gleixner select IRQ_FORCED_THREADING 306c2508ec5SLinus Torvalds select LOCK_MM_AND_FIND_VMA 3077ecd19cfSKefeng Wang select NEED_PER_CPU_EMBED_FIRST_CHUNK 3087ecd19cfSKefeng Wang select NEED_PER_CPU_PAGE_FIRST_CHUNK 30986596f0aSChristoph Hellwig select NEED_SG_DMA_LENGTH 31087482708SMike Rapoport (Microsoft) select NUMA_MEMBLKS if NUMA 3112eac9c2dSChristoph Hellwig select PCI_DOMAINS if PCI 312625210cfSSinan Kaya select PCI_LOCKLESS_CONFIG if PCI 3136471b825SIngo Molnar select PERF_EVENTS 3143195ef59SPrarit Bhargava select RTC_LIB 315d6faca40SArnd Bergmann select RTC_MC146818_LIB 3166471b825SIngo Molnar select SPARSE_IRQ 3176471b825SIngo Molnar select SYSCTL_EXCEPTION_TRACE 31815f4eae7SAndy Lutomirski select THREAD_INFO_IN_TASK 3194aae683fSMasahiro Yamada select TRACE_IRQFLAGS_SUPPORT 3204510bffbSMark Rutland select TRACE_IRQFLAGS_NMI_SUPPORT 3216471b825SIngo Molnar select USER_STACKTRACE_SUPPORT 3223b02a051SIngo Molnar select HAVE_ARCH_KCSAN if X86_64 3230c608dadSAubrey Li select PROC_PID_ARCH_STATUS if PROC_FS 32450468e43SJarkko Sakkinen select HAVE_ARCH_NODE_DEV_GROUP if X86_SGX 325d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_16B if X86_64 || X86_ALIGNMENT_16 326d49a0626SPeter Zijlstra select FUNCTION_ALIGNMENT_4B 3279e2b4be3SNayna Jain imply IMA_SECURE_AND_OR_TRUSTED_BOOT if EFI 328ceea991aSJiri Olsa select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 3294817f70cSQi Zheng select ARCH_SUPPORTS_PT_RECLAIM if X86_64 3307d8330a5SBalbir Singh 331ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER 3323120e25eSJan Beulich def_bool y 3333120e25eSJan Beulich depends on KPROBES || PERF_EVENTS || UPROBES 334ba7e4d13SIngo Molnar 33551b26adaSLinus Torvaldsconfig OUTPUT_FORMAT 33651b26adaSLinus Torvalds string 33751b26adaSLinus Torvalds default "elf32-i386" if X86_32 33851b26adaSLinus Torvalds default "elf64-x86-64" if X86_64 33951b26adaSLinus Torvalds 3408d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT 3413c2362e6SHarvey Harrison def_bool y 3428d5fffb9SSam Ravnborg 3438d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT 3443c2362e6SHarvey Harrison def_bool y 3458d5fffb9SSam Ravnborg 3468d5fffb9SSam Ravnborgconfig MMU 3473c2362e6SHarvey Harrison def_bool y 3488d5fffb9SSam Ravnborg 3499e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN 3509e08f57dSDaniel Cashman default 28 if 64BIT 3519e08f57dSDaniel Cashman default 8 3529e08f57dSDaniel Cashman 3539e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX 3549e08f57dSDaniel Cashman default 32 if 64BIT 3559e08f57dSDaniel Cashman default 16 3569e08f57dSDaniel Cashman 3579e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3589e08f57dSDaniel Cashman default 8 3599e08f57dSDaniel Cashman 3609e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3619e08f57dSDaniel Cashman default 16 3629e08f57dSDaniel Cashman 3638d5fffb9SSam Ravnborgconfig SBUS 3648d5fffb9SSam Ravnborg bool 3658d5fffb9SSam Ravnborg 3668d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA 3673120e25eSJan Beulich def_bool y 3683120e25eSJan Beulich depends on ISA_DMA_API 3698d5fffb9SSam Ravnborg 370d911c67eSAlexander Potapenkoconfig GENERIC_CSUM 371d911c67eSAlexander Potapenko bool 372d911c67eSAlexander Potapenko default y if KMSAN || KASAN 373d911c67eSAlexander Potapenko 3748d5fffb9SSam Ravnborgconfig GENERIC_BUG 3753c2362e6SHarvey Harrison def_bool y 3768d5fffb9SSam Ravnborg depends on BUG 377b93a531eSJan Beulich select GENERIC_BUG_RELATIVE_POINTERS if X86_64 378b93a531eSJan Beulich 379b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS 380b93a531eSJan Beulich bool 3818d5fffb9SSam Ravnborg 3828d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC 3833120e25eSJan Beulich def_bool y 3843120e25eSJan Beulich depends on ISA_DMA_API 3858d5fffb9SSam Ravnborg 3861032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY 3871032c0baSSam Ravnborg def_bool y 3881032c0baSSam Ravnborg 3899a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX 3909a0b8415Svenkatesh.pallipadi@intel.com def_bool y 3918d5fffb9SSam Ravnborg 392801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE 393801e4062SJohannes Berg def_bool y 394801e4062SJohannes Berg 395f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 396f4cb5700SJohannes Berg def_bool y 397f4cb5700SJohannes Berg 3988d5fffb9SSam Ravnborgconfig AUDIT_ARCH 399e0fd24a3SJan Beulich def_bool y if X86_64 4008d5fffb9SSam Ravnborg 401d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET 402d6f2d75aSAndrey Ryabinin hex 403d6f2d75aSAndrey Ryabinin depends on KASAN 404d6f2d75aSAndrey Ryabinin default 0xdffffc0000000000 405d6f2d75aSAndrey Ryabinin 40669575d38SShane Wangconfig HAVE_INTEL_TXT 40769575d38SShane Wang def_bool y 4086ea30386SKees Cook depends on INTEL_IOMMU && ACPI 40969575d38SShane Wang 4106b0c3d44SSam Ravnborgconfig X86_64_SMP 4116b0c3d44SSam Ravnborg def_bool y 4126b0c3d44SSam Ravnborg depends on X86_64 && SMP 4136b0c3d44SSam Ravnborg 4142b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES 4152b144498SSrikar Dronamraju def_bool y 4162b144498SSrikar Dronamraju 417d20642f0SRob Herringconfig FIX_EARLYCON_MEM 418d20642f0SRob Herring def_bool y 419d20642f0SRob Herring 42094d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK 42194d49eb3SKirill A. Shutemov bool 42294d49eb3SKirill A. Shutemov 42398233368SKirill A. Shutemovconfig PGTABLE_LEVELS 42498233368SKirill A. Shutemov int 42577ef56e4SKirill A. Shutemov default 5 if X86_5LEVEL 42698233368SKirill A. Shutemov default 4 if X86_64 42798233368SKirill A. Shutemov default 3 if X86_PAE 42898233368SKirill A. Shutemov default 2 42998233368SKirill A. Shutemov 4302a61f474SMasahiro Yamadaconfig CC_HAS_SANE_STACKPROTECTOR 4312a61f474SMasahiro Yamada bool 4321b866781SNathan Chancellor default $(success,$(srctree)/scripts/gcc-x86_64-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) if 64BIT 4331b866781SNathan Chancellor default $(success,$(srctree)/scripts/gcc-x86_32-has-stack-protector.sh $(CC) $(CLANG_FLAGS)) 4342a61f474SMasahiro Yamada help 4352a61f474SMasahiro Yamada We have to make sure stack protector is unconditionally disabled if 4363fb0fdb3SAndy Lutomirski the compiler produces broken code or if it does not let us control 4373fb0fdb3SAndy Lutomirski the segment on 32-bit kernels. 4382a61f474SMasahiro Yamada 439506f1d07SSam Ravnborgmenu "Processor type and features" 440506f1d07SSam Ravnborg 441506f1d07SSam Ravnborgconfig SMP 442506f1d07SSam Ravnborg bool "Symmetric multi-processing support" 443a7f7f624SMasahiro Yamada help 444506f1d07SSam Ravnborg This enables support for systems with more than one CPU. If you have 4454a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 4464a474157SRobert Graffham than one CPU, say Y. 447506f1d07SSam Ravnborg 4484a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 449506f1d07SSam Ravnborg machines, but will use only one CPU of a multiprocessor machine. If 450506f1d07SSam Ravnborg you say Y here, the kernel will run on many, but not all, 4514a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 452506f1d07SSam Ravnborg will run faster if you say N here. 453506f1d07SSam Ravnborg 454506f1d07SSam Ravnborg Note that if you say Y here and choose architecture "586" or 455506f1d07SSam Ravnborg "Pentium" under "Processor family", the kernel will not work on 486 456506f1d07SSam Ravnborg architectures. Similarly, multiprocessor kernels for the "PPro" 457506f1d07SSam Ravnborg architecture may not work on all Pentium based boards. 458506f1d07SSam Ravnborg 459506f1d07SSam Ravnborg People using multiprocessor machines who say Y here should also say 460506f1d07SSam Ravnborg Y to "Enhanced Real Time Clock Support", below. The "Advanced Power 461506f1d07SSam Ravnborg Management" code will be disabled if you say Y here. 462506f1d07SSam Ravnborg 463ff61f079SJonathan Corbet See also <file:Documentation/arch/x86/i386/IO-APIC.rst>, 4644f4cfa6cSMauro Carvalho Chehab <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at 465506f1d07SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 466506f1d07SSam Ravnborg 467506f1d07SSam Ravnborg If you don't know what to do here, say N. 468506f1d07SSam Ravnborg 46906cd9a7dSYinghai Luconfig X86_X2APIC 47006cd9a7dSYinghai Lu bool "Support x2apic" 47119e3d60dSJan Kiszka depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST) 472a7f7f624SMasahiro Yamada help 47306cd9a7dSYinghai Lu This enables x2apic support on CPUs that have this feature. 47406cd9a7dSYinghai Lu 47506cd9a7dSYinghai Lu This allows 32-bit apic IDs (so it can support very large systems), 47606cd9a7dSYinghai Lu and accesses the local apic via MSRs not via mmio. 47706cd9a7dSYinghai Lu 478b8d1d163SDaniel Sneddon Some Intel systems circa 2022 and later are locked into x2APIC mode 479b8d1d163SDaniel Sneddon and can not fall back to the legacy APIC modes if SGX or TDX are 480e3998434SMateusz Jończyk enabled in the BIOS. They will boot with very reduced functionality 481e3998434SMateusz Jończyk without enabling this option. 482b8d1d163SDaniel Sneddon 48306cd9a7dSYinghai Lu If you don't know what to do here, say N. 48406cd9a7dSYinghai Lu 4857fec07fdSJacob Panconfig X86_POSTED_MSI 4867fec07fdSJacob Pan bool "Enable MSI and MSI-x delivery by posted interrupts" 4877fec07fdSJacob Pan depends on X86_64 && IRQ_REMAP 4887fec07fdSJacob Pan help 4897fec07fdSJacob Pan This enables MSIs that are under interrupt remapping to be delivered as 4907fec07fdSJacob Pan posted interrupts to the host kernel. Interrupt throughput can 4917fec07fdSJacob Pan potentially be improved by coalescing CPU notifications during high 4927fec07fdSJacob Pan frequency bursts. 4937fec07fdSJacob Pan 4947fec07fdSJacob Pan If you don't know what to do here, say N. 4957fec07fdSJacob Pan 4966695c85bSYinghai Luconfig X86_MPPARSE 4974590d98fSAndy Shevchenko bool "Enable MPS table" if ACPI 4987a527688SJan Beulich default y 4995ab74722SIngo Molnar depends on X86_LOCAL_APIC 500a7f7f624SMasahiro Yamada help 5016695c85bSYinghai Lu For old smp systems that do not have proper acpi support. Newer systems 5026695c85bSYinghai Lu (esp with 64bit cpus) with acpi support, MADT and DSDT will override it 5036695c85bSYinghai Lu 504e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL 505e6d42931SJohannes Weiner bool "x86 CPU resource control support" 5066fe07ce3SBabu Moger depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD) 50759fe5a77SThomas Gleixner select KERNFS 508e79f15a4SChen Yu select PROC_CPU_RESCTRL if PROC_FS 50978e99b4aSFenghua Yu help 510e6d42931SJohannes Weiner Enable x86 CPU resource control support. 5116fe07ce3SBabu Moger 5126fe07ce3SBabu Moger Provide support for the allocation and monitoring of system resources 5136fe07ce3SBabu Moger usage by the CPU. 5146fe07ce3SBabu Moger 5156fe07ce3SBabu Moger Intel calls this Intel Resource Director Technology 5166fe07ce3SBabu Moger (Intel(R) RDT). More information about RDT can be found in the 5176fe07ce3SBabu Moger Intel x86 Architecture Software Developer Manual. 5186fe07ce3SBabu Moger 5196fe07ce3SBabu Moger AMD calls this AMD Platform Quality of Service (AMD QoS). 5206fe07ce3SBabu Moger More information about AMD QoS can be found in the AMD64 Technology 5216fe07ce3SBabu Moger Platform Quality of Service Extensions manual. 52278e99b4aSFenghua Yu 52378e99b4aSFenghua Yu Say N if unsure. 52478e99b4aSFenghua Yu 5252cce9591SH. Peter Anvin (Intel)config X86_FRED 5262cce9591SH. Peter Anvin (Intel) bool "Flexible Return and Event Delivery" 5272cce9591SH. Peter Anvin (Intel) depends on X86_64 5282cce9591SH. Peter Anvin (Intel) help 5292cce9591SH. Peter Anvin (Intel) When enabled, try to use Flexible Return and Event Delivery 5302cce9591SH. Peter Anvin (Intel) instead of the legacy SYSCALL/SYSENTER/IDT architecture for 5312cce9591SH. Peter Anvin (Intel) ring transitions and exception/interrupt handling if the 5323c41786cSPaul Menzel system supports it. 5332cce9591SH. Peter Anvin (Intel) 534c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM 535c5c606d9SRavikiran G Thirumalai bool "Support for extended (non-PC) x86 platforms" 536c5c606d9SRavikiran G Thirumalai default y 537a7f7f624SMasahiro Yamada help 53806ac8346SIngo Molnar If you disable this option then the kernel will only support 53906ac8346SIngo Molnar standard PC platforms. (which covers the vast majority of 54006ac8346SIngo Molnar systems out there.) 54106ac8346SIngo Molnar 5428425091fSRavikiran G Thirumalai If you enable this option then you'll be able to select support 54371d99ea4SMasahiro Yamada for the following non-PC x86 platforms, depending on the value of 54471d99ea4SMasahiro Yamada CONFIG_64BIT. 54571d99ea4SMasahiro Yamada 54671d99ea4SMasahiro Yamada 32-bit platforms (CONFIG_64BIT=n): 547cb7b8023SBen Hutchings Goldfish (Android emulator) 5488425091fSRavikiran G Thirumalai AMD Elan 5498425091fSRavikiran G Thirumalai RDC R-321x SoC 5508425091fSRavikiran G Thirumalai SGI 320/540 (Visual Workstation) 55183125a3aSAlessandro Rubini STA2X11-based (e.g. Northville) 5523f4110a4SThomas Gleixner Moorestown MID devices 55306ac8346SIngo Molnar 55471d99ea4SMasahiro Yamada 64-bit platforms (CONFIG_64BIT=y): 55544b111b5SSteffen Persvold Numascale NumaChip 5568425091fSRavikiran G Thirumalai ScaleMP vSMP 5578425091fSRavikiran G Thirumalai SGI Ultraviolet 5588425091fSRavikiran G Thirumalai 5598425091fSRavikiran G Thirumalai If you have one of these systems, or if you want to build a 5608425091fSRavikiran G Thirumalai generic distribution kernel, say Y here - otherwise say N. 56171d99ea4SMasahiro Yamada 562c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms 563c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 56444b111b5SSteffen Persvoldconfig X86_NUMACHIP 56544b111b5SSteffen Persvold bool "Numascale NumaChip" 56644b111b5SSteffen Persvold depends on X86_64 56744b111b5SSteffen Persvold depends on X86_EXTENDED_PLATFORM 56844b111b5SSteffen Persvold depends on NUMA 56944b111b5SSteffen Persvold depends on SMP 57044b111b5SSteffen Persvold depends on X86_X2APIC 571f9726bfdSDaniel J Blueman depends on PCI_MMCONFIG 572a7f7f624SMasahiro Yamada help 57344b111b5SSteffen Persvold Adds support for Numascale NumaChip large-SMP systems. Needed to 57444b111b5SSteffen Persvold enable more than ~168 cores. 57544b111b5SSteffen Persvold If you don't have one of these, you should say N here. 57603b48632SNick Piggin 5776a48565eSIngo Molnarconfig X86_VSMP 578c5c606d9SRavikiran G Thirumalai bool "ScaleMP vSMP" 5796276a074SBorislav Petkov select HYPERVISOR_GUEST 5806a48565eSIngo Molnar select PARAVIRT 5816a48565eSIngo Molnar depends on X86_64 && PCI 582c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 583ead91d4bSShai Fultheim depends on SMP 584a7f7f624SMasahiro Yamada help 5856a48565eSIngo Molnar Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is 5866a48565eSIngo Molnar supposed to run on these EM64T-based machines. Only choose this option 5876a48565eSIngo Molnar if you have one of these machines. 5886a48565eSIngo Molnar 589c5c606d9SRavikiran G Thirumalaiconfig X86_UV 590c5c606d9SRavikiran G Thirumalai bool "SGI Ultraviolet" 591c5c606d9SRavikiran G Thirumalai depends on X86_64 592c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 59354c28d29SJack Steiner depends on NUMA 5941ecb4ae5SAndrew Morton depends on EFI 595c2209ea5SIngo Molnar depends on KEXEC_CORE 5969d6c26e7SSuresh Siddha depends on X86_X2APIC 5971222e564SIngo Molnar depends on PCI 598a7f7f624SMasahiro Yamada help 599c5c606d9SRavikiran G Thirumalai This option is needed in order to support SGI Ultraviolet systems. 600c5c606d9SRavikiran G Thirumalai If you don't have one of these, you should say N here. 601c5c606d9SRavikiran G Thirumalai 602c5c606d9SRavikiran G Thirumalai# Following is an alphabetically sorted list of 32 bit extended platforms 603c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions 604506f1d07SSam Ravnborg 605ddd70cf9SJun Nakajimaconfig X86_GOLDFISH 606ddd70cf9SJun Nakajima bool "Goldfish (Virtual Platform)" 607cb7b8023SBen Hutchings depends on X86_EXTENDED_PLATFORM 608a7f7f624SMasahiro Yamada help 609ddd70cf9SJun Nakajima Enable support for the Goldfish virtual platform used primarily 610ddd70cf9SJun Nakajima for Android development. Unless you are building for the Android 611ddd70cf9SJun Nakajima Goldfish emulator say N here. 612ddd70cf9SJun Nakajima 613c751e17bSThomas Gleixnerconfig X86_INTEL_CE 614c751e17bSThomas Gleixner bool "CE4100 TV platform" 615c751e17bSThomas Gleixner depends on PCI 616c751e17bSThomas Gleixner depends on PCI_GODIRECT 6176084a6e2SJiang Liu depends on X86_IO_APIC 618c751e17bSThomas Gleixner depends on X86_32 619c751e17bSThomas Gleixner depends on X86_EXTENDED_PLATFORM 62037bc9f50SDirk Brandewie select X86_REBOOTFIXUPS 621da6b737bSSebastian Andrzej Siewior select OF 622da6b737bSSebastian Andrzej Siewior select OF_EARLY_FLATTREE 623a7f7f624SMasahiro Yamada help 624c751e17bSThomas Gleixner Select for the Intel CE media processor (CE4100) SOC. 625c751e17bSThomas Gleixner This option compiles in support for the CE4100 SOC for settop 626c751e17bSThomas Gleixner boxes and media devices. 627c751e17bSThomas Gleixner 6284cb9b00fSDavid Cohenconfig X86_INTEL_MID 62943605ef1SAlan Cox bool "Intel MID platform support" 63043605ef1SAlan Cox depends on X86_EXTENDED_PLATFORM 631edc6bc78SDavid Cohen depends on X86_PLATFORM_DEVICES 6321ea7c673SAlan Cox depends on PCI 6333fda5bb4SAndy Shevchenko depends on X86_64 || (PCI_GOANY && X86_32) 6341ea7c673SAlan Cox depends on X86_IO_APIC 6354cb9b00fSDavid Cohen select I2C 6367c9c3a1eSAlan Cox select DW_APB_TIMER 63754b34aa0SMika Westerberg select INTEL_SCU_PCI 638a7f7f624SMasahiro Yamada help 6394cb9b00fSDavid Cohen Select to build a kernel capable of supporting Intel MID (Mobile 6404cb9b00fSDavid Cohen Internet Device) platform systems which do not have the PCI legacy 6414cb9b00fSDavid Cohen interfaces. If you are building for a PC class system say N here. 6421ea7c673SAlan Cox 6434cb9b00fSDavid Cohen Intel MID platforms are based on an Intel processor and chipset which 6444cb9b00fSDavid Cohen consume less power than most of the x86 derivatives. 64543605ef1SAlan Cox 6468bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK 6478bbc2a13SBryan O'Donoghue bool "Intel Quark platform support" 6488bbc2a13SBryan O'Donoghue depends on X86_32 6498bbc2a13SBryan O'Donoghue depends on X86_EXTENDED_PLATFORM 6508bbc2a13SBryan O'Donoghue depends on X86_PLATFORM_DEVICES 6518bbc2a13SBryan O'Donoghue depends on X86_TSC 6528bbc2a13SBryan O'Donoghue depends on PCI 6538bbc2a13SBryan O'Donoghue depends on PCI_GOANY 6548bbc2a13SBryan O'Donoghue depends on X86_IO_APIC 6558bbc2a13SBryan O'Donoghue select IOSF_MBI 6568bbc2a13SBryan O'Donoghue select INTEL_IMR 6579ab6eb51SAndy Shevchenko select COMMON_CLK 658a7f7f624SMasahiro Yamada help 6598bbc2a13SBryan O'Donoghue Select to include support for Quark X1000 SoC. 6608bbc2a13SBryan O'Donoghue Say Y here if you have a Quark based system such as the Arduino 6618bbc2a13SBryan O'Donoghue compatible Intel Galileo. 6628bbc2a13SBryan O'Donoghue 6633d48aab1SMika Westerbergconfig X86_INTEL_LPSS 6643d48aab1SMika Westerberg bool "Intel Low Power Subsystem Support" 6655962dd22SSinan Kaya depends on X86 && ACPI && PCI 6663d48aab1SMika Westerberg select COMMON_CLK 6670f531431SMathias Nyman select PINCTRL 668eebb3e8dSAndy Shevchenko select IOSF_MBI 669a7f7f624SMasahiro Yamada help 6703d48aab1SMika Westerberg Select to build support for Intel Low Power Subsystem such as 6713d48aab1SMika Westerberg found on Intel Lynxpoint PCH. Selecting this option enables 6720f531431SMathias Nyman things like clock tree (common clock framework) and pincontrol 6730f531431SMathias Nyman which are needed by the LPSS peripheral drivers. 6743d48aab1SMika Westerberg 67592082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE 67692082a88SKen Xue bool "AMD ACPI2Platform devices support" 67792082a88SKen Xue depends on ACPI 67892082a88SKen Xue select COMMON_CLK 67992082a88SKen Xue select PINCTRL 680a7f7f624SMasahiro Yamada help 68192082a88SKen Xue Select to interpret AMD specific ACPI device to platform device 68292082a88SKen Xue such as I2C, UART, GPIO found on AMD Carrizo and later chipsets. 68392082a88SKen Xue I2C and UART depend on COMMON_CLK to set clock. GPIO driver is 68492082a88SKen Xue implemented under PINCTRL subsystem. 68592082a88SKen Xue 686ced3ce76SDavid E. Boxconfig IOSF_MBI 687ced3ce76SDavid E. Box tristate "Intel SoC IOSF Sideband support for SoC platforms" 688ced3ce76SDavid E. Box depends on PCI 689a7f7f624SMasahiro Yamada help 690ced3ce76SDavid E. Box This option enables sideband register access support for Intel SoC 691ced3ce76SDavid E. Box platforms. On these platforms the IOSF sideband is used in lieu of 692ced3ce76SDavid E. Box MSR's for some register accesses, mostly but not limited to thermal 693ced3ce76SDavid E. Box and power. Drivers may query the availability of this device to 694ced3ce76SDavid E. Box determine if they need the sideband in order to work on these 695ced3ce76SDavid E. Box platforms. The sideband is available on the following SoC products. 696ced3ce76SDavid E. Box This list is not meant to be exclusive. 697ced3ce76SDavid E. Box - BayTrail 698ced3ce76SDavid E. Box - Braswell 699ced3ce76SDavid E. Box - Quark 700ced3ce76SDavid E. Box 701ced3ce76SDavid E. Box You should say Y if you are running a kernel on one of these SoC's. 702ced3ce76SDavid E. Box 703ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG 704ed2226bdSDavid E. Box bool "Enable IOSF sideband access through debugfs" 705ed2226bdSDavid E. Box depends on IOSF_MBI && DEBUG_FS 706a7f7f624SMasahiro Yamada help 707ed2226bdSDavid E. Box Select this option to expose the IOSF sideband access registers (MCR, 708ed2226bdSDavid E. Box MDR, MCRX) through debugfs to write and read register information from 709ed2226bdSDavid E. Box different units on the SoC. This is most useful for obtaining device 710ed2226bdSDavid E. Box state information for debug and analysis. As this is a general access 711ed2226bdSDavid E. Box mechanism, users of this option would have specific knowledge of the 712ed2226bdSDavid E. Box device they want to access. 713ed2226bdSDavid E. Box 714ed2226bdSDavid E. Box If you don't require the option or are in doubt, say N. 715ed2226bdSDavid E. Box 716c5c606d9SRavikiran G Thirumalaiconfig X86_RDC321X 717c5c606d9SRavikiran G Thirumalai bool "RDC R-321x SoC" 718506f1d07SSam Ravnborg depends on X86_32 719c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 720c5c606d9SRavikiran G Thirumalai select M486 721c5c606d9SRavikiran G Thirumalai select X86_REBOOTFIXUPS 722a7f7f624SMasahiro Yamada help 723c5c606d9SRavikiran G Thirumalai This option is needed for RDC R-321x system-on-chip, also known 724c5c606d9SRavikiran G Thirumalai as R-8610-(G). 725c5c606d9SRavikiran G Thirumalai If you don't have one of these chips, you should say N here. 726c5c606d9SRavikiran G Thirumalai 727e0c7ae37SIngo Molnarconfig X86_32_NON_STANDARD 7289c398017SIngo Molnar bool "Support non-standard 32-bit SMP architectures" 7299c398017SIngo Molnar depends on X86_32 && SMP 730c5c606d9SRavikiran G Thirumalai depends on X86_EXTENDED_PLATFORM 731a7f7f624SMasahiro Yamada help 732*0abf5086SArnd Bergmann This option compiles in the STA2X11 default 733*0abf5086SArnd Bergmann subarchitecture. It is intended for a generic binary 734b5660ba7SH. Peter Anvin kernel. If you select them all, kernel will probe it one by 735b5660ba7SH. Peter Anvin one and will fallback to default. 736d49c4288SYinghai Lu 737c5c606d9SRavikiran G Thirumalai# Alphabetically sorted list of Non standard 32 bit platforms 738d49c4288SYinghai Lu 739d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE 7406fc108a0SJan Beulich def_bool y 741d949f36fSLinus Torvalds # MCE code calls memory_failure(): 742d949f36fSLinus Torvalds depends on X86_MCE 743d949f36fSLinus Torvalds # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags: 744d949f36fSLinus Torvalds # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH: 745d949f36fSLinus Torvalds depends on X86_64 || !SPARSEMEM 746d949f36fSLinus Torvalds select ARCH_SUPPORTS_MEMORY_FAILURE 747d949f36fSLinus Torvalds 74883125a3aSAlessandro Rubiniconfig STA2X11 74983125a3aSAlessandro Rubini bool "STA2X11 Companion Chip Support" 75083125a3aSAlessandro Rubini depends on X86_32_NON_STANDARD && PCI 75183125a3aSAlessandro Rubini select SWIOTLB 75283125a3aSAlessandro Rubini select MFD_STA2X11 7530145071bSLinus Walleij select GPIOLIB 754a7f7f624SMasahiro Yamada help 75583125a3aSAlessandro Rubini This adds support for boards based on the STA2X11 IO-Hub, 75683125a3aSAlessandro Rubini a.k.a. "ConneXt". The chip is used in place of the standard 75783125a3aSAlessandro Rubini PC chipset, so all "standard" peripherals are missing. If this 75883125a3aSAlessandro Rubini option is selected the kernel will still be able to boot on 75983125a3aSAlessandro Rubini standard PC machines. 76083125a3aSAlessandro Rubini 76182148d1dSShérabconfig X86_32_IRIS 76282148d1dSShérab tristate "Eurobraille/Iris poweroff module" 76382148d1dSShérab depends on X86_32 764a7f7f624SMasahiro Yamada help 76582148d1dSShérab The Iris machines from EuroBraille do not have APM or ACPI support 76682148d1dSShérab to shut themselves down properly. A special I/O sequence is 76782148d1dSShérab needed to do so, which is what this module does at 76882148d1dSShérab kernel shutdown. 76982148d1dSShérab 77082148d1dSShérab This is only for Iris machines from EuroBraille. 77182148d1dSShérab 77282148d1dSShérab If unused, say N. 77382148d1dSShérab 774ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 7753c2362e6SHarvey Harrison def_bool y 7763c2362e6SHarvey Harrison prompt "Single-depth WCHAN output" 777a87d0914SKen Chen depends on X86 778a7f7f624SMasahiro Yamada help 779506f1d07SSam Ravnborg Calculate simpler /proc/<PID>/wchan values. If this option 780506f1d07SSam Ravnborg is disabled then wchan values will recurse back to the 781506f1d07SSam Ravnborg caller function. This provides more accurate wchan values, 782506f1d07SSam Ravnborg at the expense of slightly more scheduling overhead. 783506f1d07SSam Ravnborg 784506f1d07SSam Ravnborg If in doubt, say "Y". 785506f1d07SSam Ravnborg 7866276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST 7876276a074SBorislav Petkov bool "Linux guest support" 788a7f7f624SMasahiro Yamada help 7896276a074SBorislav Petkov Say Y here to enable options for running Linux under various hyper- 7906276a074SBorislav Petkov visors. This option enables basic hypervisor detection and platform 7916276a074SBorislav Petkov setup. 792506f1d07SSam Ravnborg 7936276a074SBorislav Petkov If you say N, all options in this submenu will be skipped and 7946276a074SBorislav Petkov disabled, and Linux guest support won't be built in. 795506f1d07SSam Ravnborg 7966276a074SBorislav Petkovif HYPERVISOR_GUEST 797506f1d07SSam Ravnborg 798e61bd94aSEduardo Pereira Habkostconfig PARAVIRT 799e61bd94aSEduardo Pereira Habkost bool "Enable paravirtualization code" 800a0e2bf7cSJuergen Gross depends on HAVE_STATIC_CALL 801a7f7f624SMasahiro Yamada help 802e61bd94aSEduardo Pereira Habkost This changes the kernel so it can modify itself when it is run 803e61bd94aSEduardo Pereira Habkost under a hypervisor, potentially improving performance significantly 804e61bd94aSEduardo Pereira Habkost over full virtualization. However, when run without a hypervisor 805e61bd94aSEduardo Pereira Habkost the kernel is theoretically slower and slightly larger. 806e61bd94aSEduardo Pereira Habkost 807c00a280aSJuergen Grossconfig PARAVIRT_XXL 808c00a280aSJuergen Gross bool 809c00a280aSJuergen Gross 8106276a074SBorislav Petkovconfig PARAVIRT_DEBUG 8116276a074SBorislav Petkov bool "paravirt-ops debugging" 8126276a074SBorislav Petkov depends on PARAVIRT && DEBUG_KERNEL 813a7f7f624SMasahiro Yamada help 8146276a074SBorislav Petkov Enable to debug paravirt_ops internals. Specifically, BUG if 8156276a074SBorislav Petkov a paravirt_op is missing when it is called. 8166276a074SBorislav Petkov 817b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS 818b4ecc126SJeremy Fitzhardinge bool "Paravirtualization layer for spinlocks" 8196ea30386SKees Cook depends on PARAVIRT && SMP 820a7f7f624SMasahiro Yamada help 821b4ecc126SJeremy Fitzhardinge Paravirtualized spinlocks allow a pvops backend to replace the 822b4ecc126SJeremy Fitzhardinge spinlock implementation with something virtualization-friendly 823b4ecc126SJeremy Fitzhardinge (for example, block the virtual CPU rather than spinning). 824b4ecc126SJeremy Fitzhardinge 8254c4e4f61SRaghavendra K T It has a minimal impact on native kernels and gives a nice performance 8264c4e4f61SRaghavendra K T benefit on paravirtualized KVM / Xen kernels. 827b4ecc126SJeremy Fitzhardinge 8284c4e4f61SRaghavendra K T If you are unsure how to answer this question, answer Y. 829b4ecc126SJeremy Fitzhardinge 830ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR 831ecca2502SZhao Yakui def_bool n 832ecca2502SZhao Yakui 8336276a074SBorislav Petkovsource "arch/x86/xen/Kconfig" 8346276a074SBorislav Petkov 8356276a074SBorislav Petkovconfig KVM_GUEST 8366276a074SBorislav Petkov bool "KVM Guest support (including kvmclock)" 8376276a074SBorislav Petkov depends on PARAVIRT 8386276a074SBorislav Petkov select PARAVIRT_CLOCK 839a1c4423bSMarcelo Tosatti select ARCH_CPUIDLE_HALTPOLL 840b1d40575SVitaly Kuznetsov select X86_HV_CALLBACK_VECTOR 8416276a074SBorislav Petkov default y 842a7f7f624SMasahiro Yamada help 8436276a074SBorislav Petkov This option enables various optimizations for running under the KVM 8446276a074SBorislav Petkov hypervisor. It includes a paravirtualized clock, so that instead 8456276a074SBorislav Petkov of relying on a PIT (or probably other) emulation by the 8466276a074SBorislav Petkov underlying device model, the host provides the guest with 8476276a074SBorislav Petkov timing infrastructure such as time of day, and system time 8486276a074SBorislav Petkov 849a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL 850a1c4423bSMarcelo Tosatti def_bool n 851a1c4423bSMarcelo Tosatti prompt "Disable host haltpoll when loading haltpoll driver" 852a1c4423bSMarcelo Tosatti help 853a1c4423bSMarcelo Tosatti If virtualized under KVM, disable host haltpoll. 854a1c4423bSMarcelo Tosatti 8557733607fSMaran Wilsonconfig PVH 8567733607fSMaran Wilson bool "Support for running PVH guests" 857a7f7f624SMasahiro Yamada help 8587733607fSMaran Wilson This option enables the PVH entry point for guest virtual machines 8597733607fSMaran Wilson as specified in the x86/HVM direct boot ABI. 8607733607fSMaran Wilson 8616276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING 8626276a074SBorislav Petkov bool "Paravirtual steal time accounting" 8636276a074SBorislav Petkov depends on PARAVIRT 864a7f7f624SMasahiro Yamada help 8656276a074SBorislav Petkov Select this option to enable fine granularity task steal time 8666276a074SBorislav Petkov accounting. Time spent executing other tasks in parallel with 8676276a074SBorislav Petkov the current vCPU is discounted from the vCPU power. To account for 8686276a074SBorislav Petkov that, there can be a small performance impact. 8696276a074SBorislav Petkov 8706276a074SBorislav Petkov If in doubt, say N here. 8716276a074SBorislav Petkov 8727af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK 8737af192c9SGerd Hoffmann bool 8747af192c9SGerd Hoffmann 8754a362601SJan Kiszkaconfig JAILHOUSE_GUEST 8764a362601SJan Kiszka bool "Jailhouse non-root cell support" 877abde587bSArnd Bergmann depends on X86_64 && PCI 87887e65d05SJan Kiszka select X86_PM_TIMER 879a7f7f624SMasahiro Yamada help 8804a362601SJan Kiszka This option allows to run Linux as guest in a Jailhouse non-root 8814a362601SJan Kiszka cell. You can leave this option disabled if you only want to start 8824a362601SJan Kiszka Jailhouse and run Linux afterwards in the root cell. 8834a362601SJan Kiszka 884ec7972c9SZhao Yakuiconfig ACRN_GUEST 885ec7972c9SZhao Yakui bool "ACRN Guest support" 886ec7972c9SZhao Yakui depends on X86_64 887498ad393SZhao Yakui select X86_HV_CALLBACK_VECTOR 888ec7972c9SZhao Yakui help 889ec7972c9SZhao Yakui This option allows to run Linux as guest in the ACRN hypervisor. ACRN is 890ec7972c9SZhao Yakui a flexible, lightweight reference open-source hypervisor, built with 891ec7972c9SZhao Yakui real-time and safety-criticality in mind. It is built for embedded 892ec7972c9SZhao Yakui IOT with small footprint and real-time features. More details can be 893ec7972c9SZhao Yakui found in https://projectacrn.org/. 894ec7972c9SZhao Yakui 89559bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST 89659bd54a8SKuppuswamy Sathyanarayanan bool "Intel TDX (Trust Domain Extensions) - Guest Support" 89759bd54a8SKuppuswamy Sathyanarayanan depends on X86_64 && CPU_SUP_INTEL 89859bd54a8SKuppuswamy Sathyanarayanan depends on X86_X2APIC 89975d090fdSKirill A. Shutemov depends on EFI_STUB 90041394e33SKirill A. Shutemov select ARCH_HAS_CC_PLATFORM 901968b4931SKirill A. Shutemov select X86_MEM_ENCRYPT 90277a512e3SSean Christopherson select X86_MCE 90375d090fdSKirill A. Shutemov select UNACCEPTED_MEMORY 90459bd54a8SKuppuswamy Sathyanarayanan help 90559bd54a8SKuppuswamy Sathyanarayanan Support running as a guest under Intel TDX. Without this support, 90659bd54a8SKuppuswamy Sathyanarayanan the guest kernel can not boot or run under TDX. 90759bd54a8SKuppuswamy Sathyanarayanan TDX includes memory encryption and integrity capabilities 90859bd54a8SKuppuswamy Sathyanarayanan which protect the confidentiality and integrity of guest 90959bd54a8SKuppuswamy Sathyanarayanan memory contents and CPU state. TDX guests are protected from 91059bd54a8SKuppuswamy Sathyanarayanan some attacks from the VMM. 91159bd54a8SKuppuswamy Sathyanarayanan 9126276a074SBorislav Petkovendif # HYPERVISOR_GUEST 91397349135SJeremy Fitzhardinge 914506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu" 915506f1d07SSam Ravnborg 916506f1d07SSam Ravnborgconfig HPET_TIMER 9173c2362e6SHarvey Harrison def_bool X86_64 918506f1d07SSam Ravnborg prompt "HPET Timer Support" if X86_32 919a7f7f624SMasahiro Yamada help 920506f1d07SSam Ravnborg Use the IA-PC HPET (High Precision Event Timer) to manage 921506f1d07SSam Ravnborg time in preference to the PIT and RTC, if a HPET is 922506f1d07SSam Ravnborg present. 923506f1d07SSam Ravnborg HPET is the next generation timer replacing legacy 8254s. 924506f1d07SSam Ravnborg The HPET provides a stable time base on SMP 925506f1d07SSam Ravnborg systems, unlike the TSC, but it is more expensive to access, 9264e7f9df2SMichael S. Tsirkin as it is off-chip. The interface used is documented 9274e7f9df2SMichael S. Tsirkin in the HPET spec, revision 1. 928506f1d07SSam Ravnborg 929506f1d07SSam Ravnborg You can safely choose Y here. However, HPET will only be 930506f1d07SSam Ravnborg activated if the platform and the BIOS support this feature. 931506f1d07SSam Ravnborg Otherwise the 8254 will be used for timing services. 932506f1d07SSam Ravnborg 933506f1d07SSam Ravnborg Choose N to continue using the legacy 8254 timer. 934506f1d07SSam Ravnborg 935506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC 9363c2362e6SHarvey Harrison def_bool y 9373228e1dcSAnand K Mistry depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 938506f1d07SSam Ravnborg 9396a108a14SDavid Rientjes# Mark as expert because too many people got it wrong. 940506f1d07SSam Ravnborg# The code disables itself when not needed. 9417ae9392cSThomas Petazzoniconfig DMI 9427ae9392cSThomas Petazzoni default y 943cf074402SArd Biesheuvel select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 9446a108a14SDavid Rientjes bool "Enable DMI scanning" if EXPERT 945a7f7f624SMasahiro Yamada help 9467ae9392cSThomas Petazzoni Enabled scanning of DMI to identify machine quirks. Say Y 9477ae9392cSThomas Petazzoni here unless you have verified that your setup is not 9487ae9392cSThomas Petazzoni affected by entries in the DMI blacklist. Required by PNP 9497ae9392cSThomas Petazzoni BIOS code. 9507ae9392cSThomas Petazzoni 951506f1d07SSam Ravnborgconfig GART_IOMMU 95238901f1cSAndi Kleen bool "Old AMD GART IOMMU support" 953a4ce5a48SChristoph Hellwig select IOMMU_HELPER 954506f1d07SSam Ravnborg select SWIOTLB 95523ac4ae8SAndreas Herrmann depends on X86_64 && PCI && AMD_NB 956a7f7f624SMasahiro Yamada help 957ced3c42cSIngo Molnar Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron 958ced3c42cSIngo Molnar GART based hardware IOMMUs. 959ced3c42cSIngo Molnar 960ced3c42cSIngo Molnar The GART supports full DMA access for devices with 32-bit access 961ced3c42cSIngo Molnar limitations, on systems with more than 3 GB. This is usually needed 962ced3c42cSIngo Molnar for USB, sound, many IDE/SATA chipsets and some other devices. 963ced3c42cSIngo Molnar 964ced3c42cSIngo Molnar Newer systems typically have a modern AMD IOMMU, supported via 965ced3c42cSIngo Molnar the CONFIG_AMD_IOMMU=y config option. 966ced3c42cSIngo Molnar 967ced3c42cSIngo Molnar In normal configurations this driver is only active when needed: 968ced3c42cSIngo Molnar there's more than 3 GB of memory and the system contains a 969ced3c42cSIngo Molnar 32-bit limited device. 970ced3c42cSIngo Molnar 971ced3c42cSIngo Molnar If unsure, say Y. 972506f1d07SSam Ravnborg 9738b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT 9748b766b0fSMichal Suchanek bool 9758b766b0fSMichal Suchanek help 9768b766b0fSMichal Suchanek If true, at least one selected framebuffer driver can take advantage 9778b766b0fSMichal Suchanek of VESA video modes set at an early boot stage via the vga= parameter. 9788b766b0fSMichal Suchanek 9791184dc2fSMike Travisconfig MAXSMP 980ddb0c5a6SSamuel Thibault bool "Enable Maximum number of SMP Processors and NUMA Nodes" 9816ea30386SKees Cook depends on X86_64 && SMP && DEBUG_KERNEL 98236f5101aSMike Travis select CPUMASK_OFFSTACK 983a7f7f624SMasahiro Yamada help 984ddb0c5a6SSamuel Thibault Enable maximum number of CPUS and NUMA Nodes for this architecture. 9851184dc2fSMike Travis If unsure, say N. 986506f1d07SSam Ravnborg 987aec6487eSIngo Molnar# 988aec6487eSIngo Molnar# The maximum number of CPUs supported: 989aec6487eSIngo Molnar# 990aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT, 991aec6487eSIngo Molnar# and which can be configured interactively in the 992aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range. 993aec6487eSIngo Molnar# 994aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on 995aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel. 996aec6487eSIngo Molnar# 997aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable 998aec6487eSIngo Molnar# interactive configuration. ) 999aec6487eSIngo Molnar# 1000a0d0bb4dSRandy Dunlap 1001aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN 1002a0d0bb4dSRandy Dunlap int 1003aec6487eSIngo Molnar default NR_CPUS_RANGE_END if MAXSMP 1004a0d0bb4dSRandy Dunlap default 1 if !SMP 1005a0d0bb4dSRandy Dunlap default 2 1006a0d0bb4dSRandy Dunlap 1007aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1008a0d0bb4dSRandy Dunlap int 1009a0d0bb4dSRandy Dunlap depends on X86_32 1010*0abf5086SArnd Bergmann default 8 if SMP 1011a0d0bb4dSRandy Dunlap default 1 if !SMP 1012a0d0bb4dSRandy Dunlap 1013aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END 1014a0d0bb4dSRandy Dunlap int 1015a0d0bb4dSRandy Dunlap depends on X86_64 10161edae1aeSScott Wood default 8192 if SMP && CPUMASK_OFFSTACK 10171edae1aeSScott Wood default 512 if SMP && !CPUMASK_OFFSTACK 1018a0d0bb4dSRandy Dunlap default 1 if !SMP 1019aec6487eSIngo Molnar 1020aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1021aec6487eSIngo Molnar int 1022aec6487eSIngo Molnar depends on X86_32 1023aec6487eSIngo Molnar default 8 if SMP 1024aec6487eSIngo Molnar default 1 if !SMP 1025aec6487eSIngo Molnar 1026aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT 1027aec6487eSIngo Molnar int 1028aec6487eSIngo Molnar depends on X86_64 1029a0d0bb4dSRandy Dunlap default 8192 if MAXSMP 1030a0d0bb4dSRandy Dunlap default 64 if SMP 1031aec6487eSIngo Molnar default 1 if !SMP 1032a0d0bb4dSRandy Dunlap 1033506f1d07SSam Ravnborgconfig NR_CPUS 103436f5101aSMike Travis int "Maximum number of CPUs" if SMP && !MAXSMP 1035aec6487eSIngo Molnar range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END 1036aec6487eSIngo Molnar default NR_CPUS_DEFAULT 1037a7f7f624SMasahiro Yamada help 1038506f1d07SSam Ravnborg This allows you to specify the maximum number of CPUs which this 1039bb61ccc7SJosh Boyer kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum 1040cad14bb9SKirill A. Shutemov supported value is 8192, otherwise the maximum value is 512. The 1041506f1d07SSam Ravnborg minimum value which makes sense is 2. 1042506f1d07SSam Ravnborg 1043aec6487eSIngo Molnar This is purely to save memory: each supported CPU adds about 8KB 1044aec6487eSIngo Molnar to the kernel image. 1045506f1d07SSam Ravnborg 104666558b73STim Chenconfig SCHED_CLUSTER 104766558b73STim Chen bool "Cluster scheduler support" 104866558b73STim Chen depends on SMP 104966558b73STim Chen default y 105066558b73STim Chen help 105166558b73STim Chen Cluster scheduler support improves the CPU scheduler's decision 105266558b73STim Chen making when dealing with machines that have clusters of CPUs. 105366558b73STim Chen Cluster usually means a couple of CPUs which are placed closely 105466558b73STim Chen by sharing mid-level caches, last-level cache tags or internal 105566558b73STim Chen busses. 105666558b73STim Chen 1057506f1d07SSam Ravnborgconfig SCHED_SMT 1058dbe73364SThomas Gleixner def_bool y if SMP 1059506f1d07SSam Ravnborg 1060506f1d07SSam Ravnborgconfig SCHED_MC 10613c2362e6SHarvey Harrison def_bool y 10623c2362e6SHarvey Harrison prompt "Multi-core scheduler support" 1063c8e56d20SBorislav Petkov depends on SMP 1064a7f7f624SMasahiro Yamada help 1065506f1d07SSam Ravnborg Multi-core scheduler support improves the CPU scheduler's decision 1066506f1d07SSam Ravnborg making when dealing with multi-core CPU chips at a cost of slightly 1067506f1d07SSam Ravnborg increased overhead in some places. If unsure say N here. 1068506f1d07SSam Ravnborg 1069de966cf4STim Chenconfig SCHED_MC_PRIO 1070de966cf4STim Chen bool "CPU core priorities scheduler support" 10713598e577SMeng Li depends on SCHED_MC 10723598e577SMeng Li select X86_INTEL_PSTATE if CPU_SUP_INTEL 10733598e577SMeng Li select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI 10740a21fc12SIngo Molnar select CPU_FREQ 1075de966cf4STim Chen default y 1076a7f7f624SMasahiro Yamada help 1077de966cf4STim Chen Intel Turbo Boost Max Technology 3.0 enabled CPUs have a 1078de966cf4STim Chen core ordering determined at manufacturing time, which allows 1079de966cf4STim Chen certain cores to reach higher turbo frequencies (when running 1080de966cf4STim Chen single threaded workloads) than others. 1081de966cf4STim Chen 1082de966cf4STim Chen Enabling this kernel feature teaches the scheduler about 1083de966cf4STim Chen the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the 1084de966cf4STim Chen scheduler's CPU selection logic accordingly, so that higher 1085de966cf4STim Chen overall system performance can be achieved. 1086de966cf4STim Chen 1087de966cf4STim Chen This feature will have no effect on CPUs without this feature. 1088de966cf4STim Chen 1089de966cf4STim Chen If unsure say Y here. 10905e76b2abSTim Chen 109130b8b006SThomas Gleixnerconfig UP_LATE_INIT 109230b8b006SThomas Gleixner def_bool y 1093ba360f88SThomas Gleixner depends on !SMP && X86_LOCAL_APIC 109430b8b006SThomas Gleixner 1095506f1d07SSam Ravnborgconfig X86_UP_APIC 109650849eefSJan Beulich bool "Local APIC support on uniprocessors" if !PCI_MSI 109750849eefSJan Beulich default PCI_MSI 109838a1dfdaSBryan O'Donoghue depends on X86_32 && !SMP && !X86_32_NON_STANDARD 1099a7f7f624SMasahiro Yamada help 1100506f1d07SSam Ravnborg A local APIC (Advanced Programmable Interrupt Controller) is an 1101506f1d07SSam Ravnborg integrated interrupt controller in the CPU. If you have a single-CPU 1102506f1d07SSam Ravnborg system which has a processor with a local APIC, you can say Y here to 1103506f1d07SSam Ravnborg enable and use it. If you say Y here even though your machine doesn't 1104506f1d07SSam Ravnborg have a local APIC, then the kernel will still run with no slowdown at 1105506f1d07SSam Ravnborg all. The local APIC supports CPU-generated self-interrupts (timer, 1106506f1d07SSam Ravnborg performance counters), and the NMI watchdog which detects hard 1107506f1d07SSam Ravnborg lockups. 1108506f1d07SSam Ravnborg 1109506f1d07SSam Ravnborgconfig X86_UP_IOAPIC 1110506f1d07SSam Ravnborg bool "IO-APIC support on uniprocessors" 1111506f1d07SSam Ravnborg depends on X86_UP_APIC 1112a7f7f624SMasahiro Yamada help 1113506f1d07SSam Ravnborg An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an 1114506f1d07SSam Ravnborg SMP-capable replacement for PC-style interrupt controllers. Most 1115506f1d07SSam Ravnborg SMP systems and many recent uniprocessor systems have one. 1116506f1d07SSam Ravnborg 1117506f1d07SSam Ravnborg If you have a single-CPU system with an IO-APIC, you can say Y here 1118506f1d07SSam Ravnborg to use it. If you say Y here even though your machine doesn't have 1119506f1d07SSam Ravnborg an IO-APIC, then the kernel will still run with no slowdown at all. 1120506f1d07SSam Ravnborg 1121506f1d07SSam Ravnborgconfig X86_LOCAL_APIC 11223c2362e6SHarvey Harrison def_bool y 11230dbc6078SThomas Petazzoni depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI 1124b5dc8e6cSJiang Liu select IRQ_DOMAIN_HIERARCHY 1125506f1d07SSam Ravnborg 11262b5e22afSKirill A. Shutemovconfig ACPI_MADT_WAKEUP 11272b5e22afSKirill A. Shutemov def_bool y 11282b5e22afSKirill A. Shutemov depends on X86_64 11292b5e22afSKirill A. Shutemov depends on ACPI 11302b5e22afSKirill A. Shutemov depends on SMP 11312b5e22afSKirill A. Shutemov depends on X86_LOCAL_APIC 11322b5e22afSKirill A. Shutemov 1133506f1d07SSam Ravnborgconfig X86_IO_APIC 1134b1da1e71SJan Beulich def_bool y 1135b1da1e71SJan Beulich depends on X86_LOCAL_APIC || X86_UP_IOAPIC 1136506f1d07SSam Ravnborg 113741b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS 113841b9eb26SStefan Assmann bool "Reroute for broken boot IRQs" 113941b9eb26SStefan Assmann depends on X86_IO_APIC 1140a7f7f624SMasahiro Yamada help 114141b9eb26SStefan Assmann This option enables a workaround that fixes a source of 114241b9eb26SStefan Assmann spurious interrupts. This is recommended when threaded 114341b9eb26SStefan Assmann interrupt handling is used on systems where the generation of 114441b9eb26SStefan Assmann superfluous "boot interrupts" cannot be disabled. 114541b9eb26SStefan Assmann 114641b9eb26SStefan Assmann Some chipsets generate a legacy INTx "boot IRQ" when the IRQ 114741b9eb26SStefan Assmann entry in the chipset's IO-APIC is masked (as, e.g. the RT 114841b9eb26SStefan Assmann kernel does during interrupt handling). On chipsets where this 114941b9eb26SStefan Assmann boot IRQ generation cannot be disabled, this workaround keeps 115041b9eb26SStefan Assmann the original IRQ line masked so that only the equivalent "boot 115141b9eb26SStefan Assmann IRQ" is delivered to the CPUs. The workaround also tells the 115241b9eb26SStefan Assmann kernel to set up the IRQ handler on the boot IRQ line. In this 115341b9eb26SStefan Assmann way only one interrupt is delivered to the kernel. Otherwise 115441b9eb26SStefan Assmann the spurious second interrupt may cause the kernel to bring 115541b9eb26SStefan Assmann down (vital) interrupt lines. 115641b9eb26SStefan Assmann 115741b9eb26SStefan Assmann Only affects "broken" chipsets. Interrupt sharing may be 115841b9eb26SStefan Assmann increased on these systems. 115941b9eb26SStefan Assmann 1160506f1d07SSam Ravnborgconfig X86_MCE 1161bab9bc65SAndi Kleen bool "Machine Check / overheating reporting" 1162648ed940SChen, Gong select GENERIC_ALLOCATOR 1163e57dbaf7SBorislav Petkov default y 1164a7f7f624SMasahiro Yamada help 1165bab9bc65SAndi Kleen Machine Check support allows the processor to notify the 1166bab9bc65SAndi Kleen kernel if it detects a problem (e.g. overheating, data corruption). 1167506f1d07SSam Ravnborg The action the kernel takes depends on the severity of the problem, 1168bab9bc65SAndi Kleen ranging from warning messages to halting the machine. 11694efc0670SAndi Kleen 11705de97c9fSTony Luckconfig X86_MCELOG_LEGACY 11715de97c9fSTony Luck bool "Support for deprecated /dev/mcelog character device" 11725de97c9fSTony Luck depends on X86_MCE 1173a7f7f624SMasahiro Yamada help 11745de97c9fSTony Luck Enable support for /dev/mcelog which is needed by the old mcelog 11755de97c9fSTony Luck userspace logging daemon. Consider switching to the new generation 11765de97c9fSTony Luck rasdaemon solution. 11775de97c9fSTony Luck 1178506f1d07SSam Ravnborgconfig X86_MCE_INTEL 11793c2362e6SHarvey Harrison def_bool y 11803c2362e6SHarvey Harrison prompt "Intel MCE features" 1181c1ebf835SAndi Kleen depends on X86_MCE && X86_LOCAL_APIC 1182a7f7f624SMasahiro Yamada help 1183506f1d07SSam Ravnborg Additional support for intel specific MCE features such as 1184506f1d07SSam Ravnborg the thermal monitor. 1185506f1d07SSam Ravnborg 1186506f1d07SSam Ravnborgconfig X86_MCE_AMD 11873c2362e6SHarvey Harrison def_bool y 11883c2362e6SHarvey Harrison prompt "AMD MCE features" 1189d35fb312SYazen Ghannam depends on X86_MCE && X86_LOCAL_APIC 1190a7f7f624SMasahiro Yamada help 1191506f1d07SSam Ravnborg Additional support for AMD specific MCE features such as 1192506f1d07SSam Ravnborg the DRAM Error Threshold. 1193506f1d07SSam Ravnborg 11944efc0670SAndi Kleenconfig X86_ANCIENT_MCE 11956fc108a0SJan Beulich bool "Support for old Pentium 5 / WinChip machine checks" 1196c31d9633SAndi Kleen depends on X86_32 && X86_MCE 1197a7f7f624SMasahiro Yamada help 11984efc0670SAndi Kleen Include support for machine check handling on old Pentium 5 or WinChip 11995065a706SMasanari Iida systems. These typically need to be enabled explicitly on the command 12004efc0670SAndi Kleen line. 12014efc0670SAndi Kleen 1202b2762686SAndi Kleenconfig X86_MCE_THRESHOLD 1203b2762686SAndi Kleen depends on X86_MCE_AMD || X86_MCE_INTEL 12046fc108a0SJan Beulich def_bool y 1205b2762686SAndi Kleen 1206ea149b36SAndi Kleenconfig X86_MCE_INJECT 1207bc8e80d5SBorislav Petkov depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS 1208ea149b36SAndi Kleen tristate "Machine check injector support" 1209a7f7f624SMasahiro Yamada help 1210ea149b36SAndi Kleen Provide support for injecting machine checks for testing purposes. 1211ea149b36SAndi Kleen If you don't know what a machine check is and you don't do kernel 1212ea149b36SAndi Kleen QA it is safe to say n. 1213ea149b36SAndi Kleen 121407dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig" 1215e633c65aSKan Liang 12165aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86 12171e642812SIngo Molnar bool "Legacy VM86 support" 1218506f1d07SSam Ravnborg depends on X86_32 1219a7f7f624SMasahiro Yamada help 12205aef51c3SAndy Lutomirski This option allows user programs to put the CPU into V8086 12215aef51c3SAndy Lutomirski mode, which is an 80286-era approximation of 16-bit real mode. 12225aef51c3SAndy Lutomirski 12235aef51c3SAndy Lutomirski Some very old versions of X and/or vbetool require this option 12245aef51c3SAndy Lutomirski for user mode setting. Similarly, DOSEMU will use it if 12255aef51c3SAndy Lutomirski available to accelerate real mode DOS programs. However, any 12265aef51c3SAndy Lutomirski recent version of DOSEMU, X, or vbetool should be fully 12275aef51c3SAndy Lutomirski functional even without kernel VM86 support, as they will all 12281e642812SIngo Molnar fall back to software emulation. Nevertheless, if you are using 12291e642812SIngo Molnar a 16-bit DOS program where 16-bit performance matters, vm86 12301e642812SIngo Molnar mode might be faster than emulation and you might want to 12311e642812SIngo Molnar enable this option. 12325aef51c3SAndy Lutomirski 12331e642812SIngo Molnar Note that any app that works on a 64-bit kernel is unlikely to 12341e642812SIngo Molnar need this option, as 64-bit kernels don't, and can't, support 12351e642812SIngo Molnar V8086 mode. This option is also unrelated to 16-bit protected 12361e642812SIngo Molnar mode and is not needed to run most 16-bit programs under Wine. 12375aef51c3SAndy Lutomirski 12381e642812SIngo Molnar Enabling this option increases the complexity of the kernel 12391e642812SIngo Molnar and slows down exception handling a tiny bit. 12405aef51c3SAndy Lutomirski 12411e642812SIngo Molnar If unsure, say N here. 12425aef51c3SAndy Lutomirski 12435aef51c3SAndy Lutomirskiconfig VM86 12445aef51c3SAndy Lutomirski bool 12455aef51c3SAndy Lutomirski default X86_LEGACY_VM86 124634273f41SH. Peter Anvin 124734273f41SH. Peter Anvinconfig X86_16BIT 124834273f41SH. Peter Anvin bool "Enable support for 16-bit segments" if EXPERT 124934273f41SH. Peter Anvin default y 1250a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 1251a7f7f624SMasahiro Yamada help 125234273f41SH. Peter Anvin This option is required by programs like Wine to run 16-bit 125334273f41SH. Peter Anvin protected mode legacy code on x86 processors. Disabling 125434273f41SH. Peter Anvin this option saves about 300 bytes on i386, or around 6K text 125534273f41SH. Peter Anvin plus 16K runtime memory on x86-64, 125634273f41SH. Peter Anvin 125734273f41SH. Peter Anvinconfig X86_ESPFIX32 125834273f41SH. Peter Anvin def_bool y 125934273f41SH. Peter Anvin depends on X86_16BIT && X86_32 1260506f1d07SSam Ravnborg 1261197725deSH. Peter Anvinconfig X86_ESPFIX64 1262197725deSH. Peter Anvin def_bool y 126334273f41SH. Peter Anvin depends on X86_16BIT && X86_64 1264506f1d07SSam Ravnborg 12651ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION 12661ad83c85SAndy Lutomirski bool "Enable vsyscall emulation" if EXPERT 12671ad83c85SAndy Lutomirski default y 12681ad83c85SAndy Lutomirski depends on X86_64 1269a7f7f624SMasahiro Yamada help 12701ad83c85SAndy Lutomirski This enables emulation of the legacy vsyscall page. Disabling 12711ad83c85SAndy Lutomirski it is roughly equivalent to booting with vsyscall=none, except 12721ad83c85SAndy Lutomirski that it will also disable the helpful warning if a program 12731ad83c85SAndy Lutomirski tries to use a vsyscall. With this option set to N, offending 12741ad83c85SAndy Lutomirski programs will just segfault, citing addresses of the form 12751ad83c85SAndy Lutomirski 0xffffffffff600?00. 12761ad83c85SAndy Lutomirski 12771ad83c85SAndy Lutomirski This option is required by many programs built before 2013, and 12781ad83c85SAndy Lutomirski care should be used even with newer programs if set to N. 12791ad83c85SAndy Lutomirski 12801ad83c85SAndy Lutomirski Disabling this option saves about 7K of kernel size and 12811ad83c85SAndy Lutomirski possibly 4K of additional runtime pagetable memory. 12821ad83c85SAndy Lutomirski 1283111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM 1284111e7b15SThomas Gleixner bool "IOPERM and IOPL Emulation" 1285a24ca997SThomas Gleixner default y 1286a7f7f624SMasahiro Yamada help 1287111e7b15SThomas Gleixner This enables the ioperm() and iopl() syscalls which are necessary 1288111e7b15SThomas Gleixner for legacy applications. 1289111e7b15SThomas Gleixner 1290c8137aceSThomas Gleixner Legacy IOPL support is an overbroad mechanism which allows user 1291c8137aceSThomas Gleixner space aside of accessing all 65536 I/O ports also to disable 1292c8137aceSThomas Gleixner interrupts. To gain this access the caller needs CAP_SYS_RAWIO 1293c8137aceSThomas Gleixner capabilities and permission from potentially active security 1294c8137aceSThomas Gleixner modules. 1295c8137aceSThomas Gleixner 1296c8137aceSThomas Gleixner The emulation restricts the functionality of the syscall to 1297c8137aceSThomas Gleixner only allowing the full range I/O port access, but prevents the 1298a24ca997SThomas Gleixner ability to disable interrupts from user space which would be 1299a24ca997SThomas Gleixner granted if the hardware IOPL mechanism would be used. 1300c8137aceSThomas Gleixner 1301506f1d07SSam Ravnborgconfig TOSHIBA 1302506f1d07SSam Ravnborg tristate "Toshiba Laptop support" 1303506f1d07SSam Ravnborg depends on X86_32 1304a7f7f624SMasahiro Yamada help 1305506f1d07SSam Ravnborg This adds a driver to safely access the System Management Mode of 1306506f1d07SSam Ravnborg the CPU on Toshiba portables with a genuine Toshiba BIOS. It does 1307506f1d07SSam Ravnborg not work on models with a Phoenix BIOS. The System Management Mode 1308506f1d07SSam Ravnborg is used to set the BIOS and power saving options on Toshiba portables. 1309506f1d07SSam Ravnborg 1310506f1d07SSam Ravnborg For information on utilities to make use of this driver see the 1311506f1d07SSam Ravnborg Toshiba Linux utilities web site at: 1312506f1d07SSam Ravnborg <http://www.buzzard.org.uk/toshiba/>. 1313506f1d07SSam Ravnborg 1314506f1d07SSam Ravnborg Say Y if you intend to run this kernel on a Toshiba portable. 1315506f1d07SSam Ravnborg Say N otherwise. 1316506f1d07SSam Ravnborg 1317506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS 13189ba16087SJan Beulich bool "Enable X86 board specific fixups for reboot" 13199ba16087SJan Beulich depends on X86_32 1320a7f7f624SMasahiro Yamada help 1321506f1d07SSam Ravnborg This enables chipset and/or board specific fixups to be done 1322506f1d07SSam Ravnborg in order to get reboot to work correctly. This is only needed on 1323506f1d07SSam Ravnborg some combinations of hardware and BIOS. The symptom, for which 1324506f1d07SSam Ravnborg this config is intended, is when reboot ends with a stalled/hung 1325506f1d07SSam Ravnborg system. 1326506f1d07SSam Ravnborg 1327506f1d07SSam Ravnborg Currently, the only fixup is for the Geode machines using 13285e3a77e9SFlorian Fainelli CS5530A and CS5536 chipsets and the RDC R-321x SoC. 1329506f1d07SSam Ravnborg 1330506f1d07SSam Ravnborg Say Y if you want to enable the fixup. Currently, it's safe to 1331506f1d07SSam Ravnborg enable this option even if you don't need it. 1332506f1d07SSam Ravnborg Say N otherwise. 1333506f1d07SSam Ravnborg 1334506f1d07SSam Ravnborgconfig MICROCODE 1335e6bcfdd7SThomas Gleixner def_bool y 133680030e3dSBorislav Petkov depends on CPU_SUP_AMD || CPU_SUP_INTEL 133780cc9f10SPeter Oruba 1338fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32 1339fdbd4381SThomas Gleixner def_bool y 1340fdbd4381SThomas Gleixner depends on MICROCODE && X86_32 && BLK_DEV_INITRD 1341fdbd4381SThomas Gleixner 1342a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING 1343a77a94f8SBorislav Petkov bool "Late microcode loading (DANGEROUS)" 1344c02f48e0SBorislav Petkov default n 1345634ac23aSThomas Gleixner depends on MICROCODE && SMP 1346a7f7f624SMasahiro Yamada help 1347a77a94f8SBorislav Petkov Loading microcode late, when the system is up and executing instructions 1348a77a94f8SBorislav Petkov is a tricky business and should be avoided if possible. Just the sequence 1349a77a94f8SBorislav Petkov of synchronizing all cores and SMT threads is one fragile dance which does 1350a77a94f8SBorislav Petkov not guarantee that cores might not softlock after the loading. Therefore, 13519407bda8SThomas Gleixner use this at your own risk. Late loading taints the kernel unless the 13529407bda8SThomas Gleixner microcode header indicates that it is safe for late loading via the 13539407bda8SThomas Gleixner minimal revision check. This minimal revision check can be enforced on 13549407bda8SThomas Gleixner the kernel command line with "microcode.minrev=Y". 13559407bda8SThomas Gleixner 13569407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV 13579407bda8SThomas Gleixner bool "Enforce late microcode loading minimal revision check" 13589407bda8SThomas Gleixner default n 13599407bda8SThomas Gleixner depends on MICROCODE_LATE_LOADING 13609407bda8SThomas Gleixner help 13619407bda8SThomas Gleixner To prevent that users load microcode late which modifies already 13629407bda8SThomas Gleixner in use features, newer microcode patches have a minimum revision field 13639407bda8SThomas Gleixner in the microcode header, which tells the kernel which minimum 13649407bda8SThomas Gleixner revision must be active in the CPU to safely load that new microcode 13659407bda8SThomas Gleixner late into the running system. If disabled the check will not 13669407bda8SThomas Gleixner be enforced but the kernel will be tainted when the minimal 13679407bda8SThomas Gleixner revision check fails. 13689407bda8SThomas Gleixner 13699407bda8SThomas Gleixner This minimal revision check can also be controlled via the 13709407bda8SThomas Gleixner "microcode.minrev" parameter on the kernel command line. 13719407bda8SThomas Gleixner 13729407bda8SThomas Gleixner If unsure say Y. 1373506f1d07SSam Ravnborg 1374506f1d07SSam Ravnborgconfig X86_MSR 1375506f1d07SSam Ravnborg tristate "/dev/cpu/*/msr - Model-specific register support" 1376a7f7f624SMasahiro Yamada help 1377506f1d07SSam Ravnborg This device gives privileged processes access to the x86 1378506f1d07SSam Ravnborg Model-Specific Registers (MSRs). It is a character device with 1379506f1d07SSam Ravnborg major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. 1380506f1d07SSam Ravnborg MSR accesses are directed to a specific CPU on multi-processor 1381506f1d07SSam Ravnborg systems. 1382506f1d07SSam Ravnborg 1383506f1d07SSam Ravnborgconfig X86_CPUID 1384506f1d07SSam Ravnborg tristate "/dev/cpu/*/cpuid - CPU information support" 1385a7f7f624SMasahiro Yamada help 1386506f1d07SSam Ravnborg This device gives processes access to the x86 CPUID instruction to 1387506f1d07SSam Ravnborg be executed on a specific processor. It is a character device 1388506f1d07SSam Ravnborg with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to 1389506f1d07SSam Ravnborg /dev/cpu/31/cpuid. 1390506f1d07SSam Ravnborg 1391506f1d07SSam Ravnborgchoice 1392506f1d07SSam Ravnborg prompt "High Memory Support" 13936fc108a0SJan Beulich default HIGHMEM4G 1394506f1d07SSam Ravnborg depends on X86_32 1395506f1d07SSam Ravnborg 1396506f1d07SSam Ravnborgconfig NOHIGHMEM 1397506f1d07SSam Ravnborg bool "off" 1398a7f7f624SMasahiro Yamada help 1399506f1d07SSam Ravnborg Linux can use up to 64 Gigabytes of physical memory on x86 systems. 1400506f1d07SSam Ravnborg However, the address space of 32-bit x86 processors is only 4 1401506f1d07SSam Ravnborg Gigabytes large. That means that, if you have a large amount of 1402506f1d07SSam Ravnborg physical memory, not all of it can be "permanently mapped" by the 1403506f1d07SSam Ravnborg kernel. The physical memory that's not permanently mapped is called 1404506f1d07SSam Ravnborg "high memory". 1405506f1d07SSam Ravnborg 1406506f1d07SSam Ravnborg If you are compiling a kernel which will never run on a machine with 1407506f1d07SSam Ravnborg more than 1 Gigabyte total physical RAM, answer "off" here (default 1408506f1d07SSam Ravnborg choice and suitable for most users). This will result in a "3GB/1GB" 1409506f1d07SSam Ravnborg split: 3GB are mapped so that each process sees a 3GB virtual memory 1410506f1d07SSam Ravnborg space and the remaining part of the 4GB virtual memory space is used 1411506f1d07SSam Ravnborg by the kernel to permanently map as much physical memory as 1412506f1d07SSam Ravnborg possible. 1413506f1d07SSam Ravnborg 1414506f1d07SSam Ravnborg If the machine has between 1 and 4 Gigabytes physical RAM, then 1415506f1d07SSam Ravnborg answer "4GB" here. 1416506f1d07SSam Ravnborg 1417506f1d07SSam Ravnborg If more than 4 Gigabytes is used then answer "64GB" here. This 1418506f1d07SSam Ravnborg selection turns Intel PAE (Physical Address Extension) mode on. 1419506f1d07SSam Ravnborg PAE implements 3-level paging on IA32 processors. PAE is fully 1420506f1d07SSam Ravnborg supported by Linux, PAE mode is implemented on all recent Intel 1421506f1d07SSam Ravnborg processors (Pentium Pro and better). NOTE: If you say "64GB" here, 1422506f1d07SSam Ravnborg then the kernel will not boot on CPUs that don't support PAE! 1423506f1d07SSam Ravnborg 1424506f1d07SSam Ravnborg The actual amount of total physical memory will either be 1425506f1d07SSam Ravnborg auto detected or can be forced by using a kernel command line option 1426506f1d07SSam Ravnborg such as "mem=256M". (Try "man bootparam" or see the documentation of 1427506f1d07SSam Ravnborg your boot loader (lilo or loadlin) about how to pass options to the 1428506f1d07SSam Ravnborg kernel at boot time.) 1429506f1d07SSam Ravnborg 1430506f1d07SSam Ravnborg If unsure, say "off". 1431506f1d07SSam Ravnborg 1432506f1d07SSam Ravnborgconfig HIGHMEM4G 1433506f1d07SSam Ravnborg bool "4GB" 1434a7f7f624SMasahiro Yamada help 1435506f1d07SSam Ravnborg Select this if you have a 32-bit processor and between 1 and 4 1436506f1d07SSam Ravnborg gigabytes of physical RAM. 1437506f1d07SSam Ravnborg 1438506f1d07SSam Ravnborgconfig HIGHMEM64G 1439506f1d07SSam Ravnborg bool "64GB" 144088a2b4edSArnd Bergmann depends on X86_HAVE_PAE 1441506f1d07SSam Ravnborg select X86_PAE 1442a7f7f624SMasahiro Yamada help 1443506f1d07SSam Ravnborg Select this if you have a 32-bit processor and more than 4 1444506f1d07SSam Ravnborg gigabytes of physical RAM. 1445506f1d07SSam Ravnborg 1446506f1d07SSam Ravnborgendchoice 1447506f1d07SSam Ravnborg 1448506f1d07SSam Ravnborgchoice 14496a108a14SDavid Rientjes prompt "Memory split" if EXPERT 1450506f1d07SSam Ravnborg default VMSPLIT_3G 1451506f1d07SSam Ravnborg depends on X86_32 1452a7f7f624SMasahiro Yamada help 1453506f1d07SSam Ravnborg Select the desired split between kernel and user memory. 1454506f1d07SSam Ravnborg 1455506f1d07SSam Ravnborg If the address range available to the kernel is less than the 1456506f1d07SSam Ravnborg physical memory installed, the remaining memory will be available 1457506f1d07SSam Ravnborg as "high memory". Accessing high memory is a little more costly 1458506f1d07SSam Ravnborg than low memory, as it needs to be mapped into the kernel first. 1459506f1d07SSam Ravnborg Note that increasing the kernel address space limits the range 1460506f1d07SSam Ravnborg available to user programs, making the address space there 1461506f1d07SSam Ravnborg tighter. Selecting anything other than the default 3G/1G split 1462506f1d07SSam Ravnborg will also likely make your kernel incompatible with binary-only 1463506f1d07SSam Ravnborg kernel modules. 1464506f1d07SSam Ravnborg 1465506f1d07SSam Ravnborg If you are not absolutely sure what you are doing, leave this 1466506f1d07SSam Ravnborg option alone! 1467506f1d07SSam Ravnborg 1468506f1d07SSam Ravnborg config VMSPLIT_3G 1469506f1d07SSam Ravnborg bool "3G/1G user/kernel split" 1470506f1d07SSam Ravnborg config VMSPLIT_3G_OPT 1471506f1d07SSam Ravnborg depends on !X86_PAE 1472506f1d07SSam Ravnborg bool "3G/1G user/kernel split (for full 1G low memory)" 1473506f1d07SSam Ravnborg config VMSPLIT_2G 1474506f1d07SSam Ravnborg bool "2G/2G user/kernel split" 1475506f1d07SSam Ravnborg config VMSPLIT_2G_OPT 1476506f1d07SSam Ravnborg depends on !X86_PAE 1477506f1d07SSam Ravnborg bool "2G/2G user/kernel split (for full 2G low memory)" 1478506f1d07SSam Ravnborg config VMSPLIT_1G 1479506f1d07SSam Ravnborg bool "1G/3G user/kernel split" 1480506f1d07SSam Ravnborgendchoice 1481506f1d07SSam Ravnborg 1482506f1d07SSam Ravnborgconfig PAGE_OFFSET 1483506f1d07SSam Ravnborg hex 1484506f1d07SSam Ravnborg default 0xB0000000 if VMSPLIT_3G_OPT 1485506f1d07SSam Ravnborg default 0x80000000 if VMSPLIT_2G 1486506f1d07SSam Ravnborg default 0x78000000 if VMSPLIT_2G_OPT 1487506f1d07SSam Ravnborg default 0x40000000 if VMSPLIT_1G 1488506f1d07SSam Ravnborg default 0xC0000000 1489506f1d07SSam Ravnborg depends on X86_32 1490506f1d07SSam Ravnborg 1491506f1d07SSam Ravnborgconfig HIGHMEM 14923c2362e6SHarvey Harrison def_bool y 1493506f1d07SSam Ravnborg depends on X86_32 && (HIGHMEM64G || HIGHMEM4G) 1494506f1d07SSam Ravnborg 1495506f1d07SSam Ravnborgconfig X86_PAE 14969ba16087SJan Beulich bool "PAE (Physical Address Extension) Support" 149788a2b4edSArnd Bergmann depends on X86_32 && X86_HAVE_PAE 1498d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 14999d99c712SChristian Melki select SWIOTLB 1500a7f7f624SMasahiro Yamada help 1501506f1d07SSam Ravnborg PAE is required for NX support, and furthermore enables 1502506f1d07SSam Ravnborg larger swapspace support for non-overcommit purposes. It 1503506f1d07SSam Ravnborg has the cost of more pagetable lookup overhead, and also 1504506f1d07SSam Ravnborg consumes more pagetable space per process. 1505506f1d07SSam Ravnborg 150677ef56e4SKirill A. Shutemovconfig X86_5LEVEL 150777ef56e4SKirill A. Shutemov bool "Enable 5-level page tables support" 150818ec1eafSKirill A. Shutemov default y 1509eedb92abSKirill A. Shutemov select DYNAMIC_MEMORY_LAYOUT 1510162434e7SKirill A. Shutemov select SPARSEMEM_VMEMMAP 151177ef56e4SKirill A. Shutemov depends on X86_64 1512a7f7f624SMasahiro Yamada help 151377ef56e4SKirill A. Shutemov 5-level paging enables access to larger address space: 151477ef56e4SKirill A. Shutemov up to 128 PiB of virtual address space and 4 PiB of 151577ef56e4SKirill A. Shutemov physical address space. 151677ef56e4SKirill A. Shutemov 151777ef56e4SKirill A. Shutemov It will be supported by future Intel CPUs. 151877ef56e4SKirill A. Shutemov 15196657fca0SKirill A. Shutemov A kernel with the option enabled can be booted on machines that 15206657fca0SKirill A. Shutemov support 4- or 5-level paging. 152177ef56e4SKirill A. Shutemov 1522ff61f079SJonathan Corbet See Documentation/arch/x86/x86_64/5level-paging.rst for more 152377ef56e4SKirill A. Shutemov information. 152477ef56e4SKirill A. Shutemov 152577ef56e4SKirill A. Shutemov Say N if unsure. 152677ef56e4SKirill A. Shutemov 152710971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES 1528e5008abeSLuis R. Rodriguez def_bool y 15292e1da13fSVlastimil Babka depends on X86_64 1530a7f7f624SMasahiro Yamada help 153110971ab2SIngo Molnar Certain kernel features effectively disable kernel 153210971ab2SIngo Molnar linear 1 GB mappings (even if the CPU otherwise 153310971ab2SIngo Molnar supports them), so don't confuse the user by printing 153410971ab2SIngo Molnar that we have them enabled. 15359e899816SNick Piggin 15365c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS 15375c280cf6SThomas Gleixner bool "Enable statistic for Change Page Attribute" 15385c280cf6SThomas Gleixner depends on DEBUG_FS 1539a7f7f624SMasahiro Yamada help 1540b75baaf3SIngo Molnar Expose statistics about the Change Page Attribute mechanism, which 1541a943245aSColin Ian King helps to determine the effectiveness of preserving large and huge 15425c280cf6SThomas Gleixner page mappings when mapping protections are changed. 15435c280cf6SThomas Gleixner 154420f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT 154520f07a04SKirill A. Shutemov select ARCH_HAS_FORCE_DMA_UNENCRYPTED 154620f07a04SKirill A. Shutemov select DYNAMIC_PHYSICAL_MASK 154720f07a04SKirill A. Shutemov def_bool n 154820f07a04SKirill A. Shutemov 15497744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT 15507744ccdbSTom Lendacky bool "AMD Secure Memory Encryption (SME) support" 15517744ccdbSTom Lendacky depends on X86_64 && CPU_SUP_AMD 15526c321179STom Lendacky depends on EFI_STUB 155382fef0adSDavid Rientjes select DMA_COHERENT_POOL 1554ce9084baSArd Biesheuvel select ARCH_USE_MEMREMAP_PROT 1555597cfe48SJoerg Roedel select INSTRUCTION_DECODER 1556aa5a4611STom Lendacky select ARCH_HAS_CC_PLATFORM 155720f07a04SKirill A. Shutemov select X86_MEM_ENCRYPT 15586c321179STom Lendacky select UNACCEPTED_MEMORY 1559c5529418SNikunj A Dadhania select CRYPTO_LIB_AESGCM 1560a7f7f624SMasahiro Yamada help 15617744ccdbSTom Lendacky Say yes to enable support for the encryption of system memory. 15627744ccdbSTom Lendacky This requires an AMD processor that supports Secure Memory 15637744ccdbSTom Lendacky Encryption (SME). 15647744ccdbSTom Lendacky 1565506f1d07SSam Ravnborg# Common NUMA Features 1566506f1d07SSam Ravnborgconfig NUMA 1567e133f6eaSRandy Dunlap bool "NUMA Memory Allocation and Scheduler Support" 1568506f1d07SSam Ravnborg depends on SMP 1569*0abf5086SArnd Bergmann depends on X86_64 15707ecd19cfSKefeng Wang select USE_PERCPU_NUMA_NODE_ID 15710c436a58SSaurabh Sengar select OF_NUMA if OF 1572a7f7f624SMasahiro Yamada help 1573e133f6eaSRandy Dunlap Enable NUMA (Non-Uniform Memory Access) support. 1574fd51b2d7SKOSAKI Motohiro 1575506f1d07SSam Ravnborg The kernel will try to allocate memory used by a CPU on the 1576506f1d07SSam Ravnborg local memory controller of the CPU and add some more 1577506f1d07SSam Ravnborg NUMA awareness to the kernel. 1578506f1d07SSam Ravnborg 1579c280ea5eSIngo Molnar For 64-bit this is recommended if the system is Intel Core i7 1580fd51b2d7SKOSAKI Motohiro (or later), AMD Opteron, or EM64T NUMA. 1581fd51b2d7SKOSAKI Motohiro 1582fd51b2d7SKOSAKI Motohiro Otherwise, you should say N. 1583506f1d07SSam Ravnborg 1584eec1d4faSHans Rosenfeldconfig AMD_NUMA 15853c2362e6SHarvey Harrison def_bool y 15863c2362e6SHarvey Harrison prompt "Old style AMD Opteron NUMA detection" 15875da0ef9aSTejun Heo depends on X86_64 && NUMA && PCI 1588a7f7f624SMasahiro Yamada help 1589eec1d4faSHans Rosenfeld Enable AMD NUMA node topology detection. You should say Y here if 1590eec1d4faSHans Rosenfeld you have a multi processor AMD system. This uses an old method to 1591eec1d4faSHans Rosenfeld read the NUMA configuration directly from the builtin Northbridge 1592eec1d4faSHans Rosenfeld of Opteron. It is recommended to use X86_64_ACPI_NUMA instead, 1593eec1d4faSHans Rosenfeld which also takes priority if both are compiled in. 1594506f1d07SSam Ravnborg 1595506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA 15963c2362e6SHarvey Harrison def_bool y 15973c2362e6SHarvey Harrison prompt "ACPI NUMA detection" 1598506f1d07SSam Ravnborg depends on X86_64 && NUMA && ACPI && PCI 1599506f1d07SSam Ravnborg select ACPI_NUMA 1600a7f7f624SMasahiro Yamada help 1601506f1d07SSam Ravnborg Enable ACPI SRAT based node topology detection. 1602506f1d07SSam Ravnborg 1603506f1d07SSam Ravnborgconfig NODES_SHIFT 1604d25e26b6SLinus Torvalds int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP 160551591e31SDavid Rientjes range 1 10 160651591e31SDavid Rientjes default "10" if MAXSMP 1607506f1d07SSam Ravnborg default "6" if X86_64 1608506f1d07SSam Ravnborg default "3" 1609a9ee6cf5SMike Rapoport depends on NUMA 1610a7f7f624SMasahiro Yamada help 16111184dc2fSMike Travis Specify the maximum number of NUMA Nodes available on the target 1612692105b8SMatt LaPlante system. Increases memory reserved to accommodate various tables. 1613506f1d07SSam Ravnborg 1614506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE 1615506f1d07SSam Ravnborg def_bool y 16163b16651fSTejun Heo depends on X86_32 && !NUMA 1617506f1d07SSam Ravnborg 1618506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE 1619506f1d07SSam Ravnborg def_bool y 16206ea30386SKees Cook depends on X86_64 || NUMA || X86_32 || X86_32_NON_STANDARD 1621506f1d07SSam Ravnborg select SPARSEMEM_STATIC if X86_32 1622506f1d07SSam Ravnborg select SPARSEMEM_VMEMMAP_ENABLE if X86_64 1623506f1d07SSam Ravnborg 16243b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT 16256ad57f7fSMike Rapoport def_bool X86_64 || (NUMA && X86_32) 16263b16651fSTejun Heo 1627506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL 1628506f1d07SSam Ravnborg def_bool y 16294eda2bc3SDavid Hildenbrand depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE 1630506f1d07SSam Ravnborg 1631506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE 1632a0842b70SToshi Kani bool "Enable sysfs memory/probe interface" 16335c11f00bSDavid Hildenbrand depends on MEMORY_HOTPLUG 1634a0842b70SToshi Kani help 1635a0842b70SToshi Kani This option enables a sysfs memory/probe interface for testing. 1636cb1aaebeSMauro Carvalho Chehab See Documentation/admin-guide/mm/memory-hotplug.rst for more information. 1637a0842b70SToshi Kani If you are unsure how to answer this question, answer N. 1638506f1d07SSam Ravnborg 16393b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT 16403b16651fSTejun Heo def_bool y 16413b16651fSTejun Heo depends on X86_64 && PROC_KCORE 16423b16651fSTejun Heo 1643a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE 1644a29815a3SAvi Kivity hex 1645a29815a3SAvi Kivity default 0 if X86_32 1646a29815a3SAvi Kivity default 0xdead000000000000 if X86_64 1647a29815a3SAvi Kivity 16487a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE 16497a67832cSDan Williams bool 16507a67832cSDan Williams 1651ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY 16527a67832cSDan Williams tristate "Support non-standard NVDIMMs and ADR protected memory" 16539f53f9faSDan Williams depends on PHYS_ADDR_T_64BIT 16549f53f9faSDan Williams depends on BLK_DEV 16557a67832cSDan Williams select X86_PMEM_LEGACY_DEVICE 16567b27a862SDan Williams select NUMA_KEEP_MEMINFO if NUMA 16579f53f9faSDan Williams select LIBNVDIMM 1658ec776ef6SChristoph Hellwig help 1659ec776ef6SChristoph Hellwig Treat memory marked using the non-standard e820 type of 12 as used 1660ec776ef6SChristoph Hellwig by the Intel Sandy Bridge-EP reference BIOS as protected memory. 1661ec776ef6SChristoph Hellwig The kernel will offer these regions to the 'pmem' driver so 1662ec776ef6SChristoph Hellwig they can be used for persistent storage. 1663ec776ef6SChristoph Hellwig 1664ec776ef6SChristoph Hellwig Say Y if unsure. 1665ec776ef6SChristoph Hellwig 1666506f1d07SSam Ravnborgconfig HIGHPTE 1667506f1d07SSam Ravnborg bool "Allocate 3rd-level pagetables from highmem" 16686fc108a0SJan Beulich depends on HIGHMEM 1669a7f7f624SMasahiro Yamada help 1670506f1d07SSam Ravnborg The VM uses one page table entry for each page of physical memory. 1671506f1d07SSam Ravnborg For systems with a lot of RAM, this can be wasteful of precious 1672506f1d07SSam Ravnborg low memory. Setting this option will put user-space page table 1673506f1d07SSam Ravnborg entries in high memory. 1674506f1d07SSam Ravnborg 16759f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION 16769f077871SJeremy Fitzhardinge bool "Check for low memory corruption" 1677a7f7f624SMasahiro Yamada help 16789f077871SJeremy Fitzhardinge Periodically check for memory corruption in low memory, which 16799f077871SJeremy Fitzhardinge is suspected to be caused by BIOS. Even when enabled in the 16809f077871SJeremy Fitzhardinge configuration, it is disabled at runtime. Enable it by 16819f077871SJeremy Fitzhardinge setting "memory_corruption_check=1" on the kernel command 16829f077871SJeremy Fitzhardinge line. By default it scans the low 64k of memory every 60 16839f077871SJeremy Fitzhardinge seconds; see the memory_corruption_check_size and 16849f077871SJeremy Fitzhardinge memory_corruption_check_period parameters in 16858c27ceffSMauro Carvalho Chehab Documentation/admin-guide/kernel-parameters.rst to adjust this. 16869f077871SJeremy Fitzhardinge 16879f077871SJeremy Fitzhardinge When enabled with the default parameters, this option has 16889f077871SJeremy Fitzhardinge almost no overhead, as it reserves a relatively small amount 16899f077871SJeremy Fitzhardinge of memory and scans it infrequently. It both detects corruption 16909f077871SJeremy Fitzhardinge and prevents it from affecting the running system. 16919f077871SJeremy Fitzhardinge 16929f077871SJeremy Fitzhardinge It is, however, intended as a diagnostic tool; if repeatable 16939f077871SJeremy Fitzhardinge BIOS-originated corruption always affects the same memory, 16949f077871SJeremy Fitzhardinge you can use memmap= to prevent the kernel from using that 16959f077871SJeremy Fitzhardinge memory. 16969f077871SJeremy Fitzhardinge 1697c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK 1698c885df50SJeremy Fitzhardinge bool "Set the default setting of memory_corruption_check" 1699c885df50SJeremy Fitzhardinge depends on X86_CHECK_BIOS_CORRUPTION 1700c885df50SJeremy Fitzhardinge default y 1701a7f7f624SMasahiro Yamada help 1702c885df50SJeremy Fitzhardinge Set whether the default state of memory_corruption_check is 1703c885df50SJeremy Fitzhardinge on or off. 1704c885df50SJeremy Fitzhardinge 1705506f1d07SSam Ravnborgconfig MATH_EMULATION 1706506f1d07SSam Ravnborg bool 1707a5b9e5a2SAndy Lutomirski depends on MODIFY_LDT_SYSCALL 170887d6021bSArnd Bergmann prompt "Math emulation" if X86_32 && (M486SX || MELAN) 1709a7f7f624SMasahiro Yamada help 1710506f1d07SSam Ravnborg Linux can emulate a math coprocessor (used for floating point 1711506f1d07SSam Ravnborg operations) if you don't have one. 486DX and Pentium processors have 1712506f1d07SSam Ravnborg a math coprocessor built in, 486SX and 386 do not, unless you added 1713506f1d07SSam Ravnborg a 487DX or 387, respectively. (The messages during boot time can 1714506f1d07SSam Ravnborg give you some hints here ["man dmesg"].) Everyone needs either a 1715506f1d07SSam Ravnborg coprocessor or this emulation. 1716506f1d07SSam Ravnborg 1717506f1d07SSam Ravnborg If you don't have a math coprocessor, you need to say Y here; if you 1718506f1d07SSam Ravnborg say Y here even though you have a coprocessor, the coprocessor will 1719506f1d07SSam Ravnborg be used nevertheless. (This behavior can be changed with the kernel 1720506f1d07SSam Ravnborg command line option "no387", which comes handy if your coprocessor 1721506f1d07SSam Ravnborg is broken. Try "man bootparam" or see the documentation of your boot 1722506f1d07SSam Ravnborg loader (lilo or loadlin) about how to pass options to the kernel at 1723506f1d07SSam Ravnborg boot time.) This means that it is a good idea to say Y here if you 1724506f1d07SSam Ravnborg intend to use this kernel on different machines. 1725506f1d07SSam Ravnborg 1726506f1d07SSam Ravnborg More information about the internals of the Linux math coprocessor 1727506f1d07SSam Ravnborg emulation can be found in <file:arch/x86/math-emu/README>. 1728506f1d07SSam Ravnborg 1729506f1d07SSam Ravnborg If you are not sure, say Y; apart from resulting in a 66 KB bigger 1730506f1d07SSam Ravnborg kernel, it won't hurt. 1731506f1d07SSam Ravnborg 1732506f1d07SSam Ravnborgconfig MTRR 17336fc108a0SJan Beulich def_bool y 17346a108a14SDavid Rientjes prompt "MTRR (Memory Type Range Register) support" if EXPERT 1735a7f7f624SMasahiro Yamada help 1736506f1d07SSam Ravnborg On Intel P6 family processors (Pentium Pro, Pentium II and later) 1737506f1d07SSam Ravnborg the Memory Type Range Registers (MTRRs) may be used to control 1738506f1d07SSam Ravnborg processor access to memory ranges. This is most useful if you have 1739506f1d07SSam Ravnborg a video (VGA) card on a PCI or AGP bus. Enabling write-combining 1740506f1d07SSam Ravnborg allows bus write transfers to be combined into a larger transfer 1741506f1d07SSam Ravnborg before bursting over the PCI/AGP bus. This can increase performance 1742506f1d07SSam Ravnborg of image write operations 2.5 times or more. Saying Y here creates a 1743506f1d07SSam Ravnborg /proc/mtrr file which may be used to manipulate your processor's 1744506f1d07SSam Ravnborg MTRRs. Typically the X server should use this. 1745506f1d07SSam Ravnborg 1746506f1d07SSam Ravnborg This code has a reasonably generic interface so that similar 1747506f1d07SSam Ravnborg control registers on other processors can be easily supported 1748506f1d07SSam Ravnborg as well: 1749506f1d07SSam Ravnborg 1750506f1d07SSam Ravnborg The Cyrix 6x86, 6x86MX and M II processors have Address Range 1751506f1d07SSam Ravnborg Registers (ARRs) which provide a similar functionality to MTRRs. For 1752506f1d07SSam Ravnborg these, the ARRs are used to emulate the MTRRs. 1753506f1d07SSam Ravnborg The AMD K6-2 (stepping 8 and above) and K6-3 processors have two 1754506f1d07SSam Ravnborg MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing 1755506f1d07SSam Ravnborg write-combining. All of these processors are supported by this code 1756506f1d07SSam Ravnborg and it makes sense to say Y here if you have one of them. 1757506f1d07SSam Ravnborg 1758506f1d07SSam Ravnborg Saying Y here also fixes a problem with buggy SMP BIOSes which only 1759506f1d07SSam Ravnborg set the MTRRs for the boot CPU and not for the secondary CPUs. This 1760506f1d07SSam Ravnborg can lead to all sorts of problems, so it's good to say Y here. 1761506f1d07SSam Ravnborg 1762506f1d07SSam Ravnborg You can safely say Y even if your machine doesn't have MTRRs, you'll 1763506f1d07SSam Ravnborg just add about 9 KB to your kernel. 1764506f1d07SSam Ravnborg 1765ff61f079SJonathan Corbet See <file:Documentation/arch/x86/mtrr.rst> for more information. 1766506f1d07SSam Ravnborg 176795ffa243SYinghai Luconfig MTRR_SANITIZER 17682ffb3501SYinghai Lu def_bool y 176995ffa243SYinghai Lu prompt "MTRR cleanup support" 177095ffa243SYinghai Lu depends on MTRR 1771a7f7f624SMasahiro Yamada help 1772aba3728cSThomas Gleixner Convert MTRR layout from continuous to discrete, so X drivers can 1773aba3728cSThomas Gleixner add writeback entries. 177495ffa243SYinghai Lu 1775aba3728cSThomas Gleixner Can be disabled with disable_mtrr_cleanup on the kernel command line. 1776692105b8SMatt LaPlante The largest mtrr entry size for a continuous block can be set with 1777aba3728cSThomas Gleixner mtrr_chunk_size. 177895ffa243SYinghai Lu 17792ffb3501SYinghai Lu If unsure, say Y. 178095ffa243SYinghai Lu 178195ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT 1782f5098d62SYinghai Lu int "MTRR cleanup enable value (0-1)" 1783f5098d62SYinghai Lu range 0 1 1784f5098d62SYinghai Lu default "0" 178595ffa243SYinghai Lu depends on MTRR_SANITIZER 1786a7f7f624SMasahiro Yamada help 1787f5098d62SYinghai Lu Enable mtrr cleanup default value 178895ffa243SYinghai Lu 178912031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT 179012031a62SYinghai Lu int "MTRR cleanup spare reg num (0-7)" 179112031a62SYinghai Lu range 0 7 179212031a62SYinghai Lu default "1" 179312031a62SYinghai Lu depends on MTRR_SANITIZER 1794a7f7f624SMasahiro Yamada help 179512031a62SYinghai Lu mtrr cleanup spare entries default, it can be changed via 1796aba3728cSThomas Gleixner mtrr_spare_reg_nr=N on the kernel command line. 179712031a62SYinghai Lu 17982e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT 17996fc108a0SJan Beulich def_bool y 18006a108a14SDavid Rientjes prompt "x86 PAT support" if EXPERT 18012a8a2719SIngo Molnar depends on MTRR 18027a87225aSMatthew Wilcox (Oracle) select ARCH_USES_PG_ARCH_2 1803a7f7f624SMasahiro Yamada help 18042e5d9c85Svenkatesh.pallipadi@intel.com Use PAT attributes to setup page level cache control. 1805042b78e4SVenki Pallipadi 18062e5d9c85Svenkatesh.pallipadi@intel.com PATs are the modern equivalents of MTRRs and are much more 18072e5d9c85Svenkatesh.pallipadi@intel.com flexible than MTRRs. 18082e5d9c85Svenkatesh.pallipadi@intel.com 18092e5d9c85Svenkatesh.pallipadi@intel.com Say N here if you see bootup problems (boot crash, boot hang, 1810042b78e4SVenki Pallipadi spontaneous reboots) or a non-working video driver. 18112e5d9c85Svenkatesh.pallipadi@intel.com 18122e5d9c85Svenkatesh.pallipadi@intel.com If unsure, say Y. 18132e5d9c85Svenkatesh.pallipadi@intel.com 1814b971880fSBabu Mogerconfig X86_UMIP 1815796ebc81SRicardo Neri def_bool y 1816b971880fSBabu Moger prompt "User Mode Instruction Prevention" if EXPERT 1817a7f7f624SMasahiro Yamada help 1818b971880fSBabu Moger User Mode Instruction Prevention (UMIP) is a security feature in 1819b971880fSBabu Moger some x86 processors. If enabled, a general protection fault is 1820b971880fSBabu Moger issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are 1821b971880fSBabu Moger executed in user mode. These instructions unnecessarily expose 1822b971880fSBabu Moger information about the hardware state. 1823796ebc81SRicardo Neri 1824796ebc81SRicardo Neri The vast majority of applications do not use these instructions. 1825796ebc81SRicardo Neri For the very few that do, software emulation is provided in 1826796ebc81SRicardo Neri specific cases in protected and virtual-8086 modes. Emulated 1827796ebc81SRicardo Neri results are dummy. 1828aa35f896SRicardo Neri 1829156ff4a5SPeter Zijlstraconfig CC_HAS_IBT 1830156ff4a5SPeter Zijlstra # GCC >= 9 and binutils >= 2.29 1831156ff4a5SPeter Zijlstra # Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654 1832156ff4a5SPeter Zijlstra # Clang/LLVM >= 14 1833262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f 1834262448f3SNathan Chancellor # https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332 1835156ff4a5SPeter Zijlstra def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \ 1836262448f3SNathan Chancellor (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \ 1837156ff4a5SPeter Zijlstra $(as-instr,endbr64) 1838156ff4a5SPeter Zijlstra 183918e66b69SRick Edgecombeconfig X86_CET 184018e66b69SRick Edgecombe def_bool n 184118e66b69SRick Edgecombe help 184218e66b69SRick Edgecombe CET features configured (Shadow stack or IBT) 184318e66b69SRick Edgecombe 1844156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT 1845156ff4a5SPeter Zijlstra prompt "Indirect Branch Tracking" 18464fd5f70cSKees Cook def_bool y 184703f16cd0SJosh Poimboeuf depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL 1848f6a2c2b2SNathan Chancellor # https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f 1849f6a2c2b2SNathan Chancellor depends on !LD_IS_LLD || LLD_VERSION >= 140000 185003f16cd0SJosh Poimboeuf select OBJTOOL 185118e66b69SRick Edgecombe select X86_CET 1852156ff4a5SPeter Zijlstra help 1853156ff4a5SPeter Zijlstra Build the kernel with support for Indirect Branch Tracking, a 1854156ff4a5SPeter Zijlstra hardware support course-grain forward-edge Control Flow Integrity 1855156ff4a5SPeter Zijlstra protection. It enforces that all indirect calls must land on 1856156ff4a5SPeter Zijlstra an ENDBR instruction, as such, the compiler will instrument the 1857156ff4a5SPeter Zijlstra code with them to make this happen. 1858156ff4a5SPeter Zijlstra 1859ed53a0d9SPeter Zijlstra In addition to building the kernel with IBT, seal all functions that 18604cdfc11bSNur Hussein are not indirect call targets, avoiding them ever becoming one. 1861ed53a0d9SPeter Zijlstra 1862ed53a0d9SPeter Zijlstra This requires LTO like objtool runs and will slow down the build. It 1863ed53a0d9SPeter Zijlstra does significantly reduce the number of ENDBR instructions in the 1864ed53a0d9SPeter Zijlstra kernel image. 1865ed53a0d9SPeter Zijlstra 186635e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS 186738f3e775SBabu Moger prompt "Memory Protection Keys" 186835e97790SDave Hansen def_bool y 1869284244a9SDave Hansen # Note: only available in 64-bit mode 187038f3e775SBabu Moger depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD) 187152c8e601SIngo Molnar select ARCH_USES_HIGH_VMA_FLAGS 187252c8e601SIngo Molnar select ARCH_HAS_PKEYS 1873a7f7f624SMasahiro Yamada help 1874284244a9SDave Hansen Memory Protection Keys provides a mechanism for enforcing 1875284244a9SDave Hansen page-based protections, but without requiring modification of the 1876284244a9SDave Hansen page tables when an application changes protection domains. 1877284244a9SDave Hansen 18781eecbcdcSMauro Carvalho Chehab For details, see Documentation/core-api/protection-keys.rst 1879284244a9SDave Hansen 1880284244a9SDave Hansen If unsure, say y. 188135e97790SDave Hansen 18825626f8d4SJoey Goulyconfig ARCH_PKEY_BITS 18835626f8d4SJoey Gouly int 18845626f8d4SJoey Gouly default 4 18855626f8d4SJoey Gouly 1886db616173SMichal Hockochoice 1887db616173SMichal Hocko prompt "TSX enable mode" 1888db616173SMichal Hocko depends on CPU_SUP_INTEL 1889db616173SMichal Hocko default X86_INTEL_TSX_MODE_OFF 1890db616173SMichal Hocko help 1891db616173SMichal Hocko Intel's TSX (Transactional Synchronization Extensions) feature 1892db616173SMichal Hocko allows to optimize locking protocols through lock elision which 1893db616173SMichal Hocko can lead to a noticeable performance boost. 1894db616173SMichal Hocko 1895db616173SMichal Hocko On the other hand it has been shown that TSX can be exploited 1896db616173SMichal Hocko to form side channel attacks (e.g. TAA) and chances are there 1897db616173SMichal Hocko will be more of those attacks discovered in the future. 1898db616173SMichal Hocko 1899db616173SMichal Hocko Therefore TSX is not enabled by default (aka tsx=off). An admin 1900db616173SMichal Hocko might override this decision by tsx=on the command line parameter. 1901db616173SMichal Hocko Even with TSX enabled, the kernel will attempt to enable the best 1902db616173SMichal Hocko possible TAA mitigation setting depending on the microcode available 1903db616173SMichal Hocko for the particular machine. 1904db616173SMichal Hocko 1905db616173SMichal Hocko This option allows to set the default tsx mode between tsx=on, =off 1906db616173SMichal Hocko and =auto. See Documentation/admin-guide/kernel-parameters.txt for more 1907db616173SMichal Hocko details. 1908db616173SMichal Hocko 1909db616173SMichal Hocko Say off if not sure, auto if TSX is in use but it should be used on safe 1910db616173SMichal Hocko platforms or on if TSX is in use and the security aspect of tsx is not 1911db616173SMichal Hocko relevant. 1912db616173SMichal Hocko 1913db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF 1914db616173SMichal Hocko bool "off" 1915db616173SMichal Hocko help 1916db616173SMichal Hocko TSX is disabled if possible - equals to tsx=off command line parameter. 1917db616173SMichal Hocko 1918db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON 1919db616173SMichal Hocko bool "on" 1920db616173SMichal Hocko help 1921db616173SMichal Hocko TSX is always enabled on TSX capable HW - equals the tsx=on command 1922db616173SMichal Hocko line parameter. 1923db616173SMichal Hocko 1924db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO 1925db616173SMichal Hocko bool "auto" 1926db616173SMichal Hocko help 1927db616173SMichal Hocko TSX is enabled on TSX capable HW that is believed to be safe against 1928db616173SMichal Hocko side channel attacks- equals the tsx=auto command line parameter. 1929db616173SMichal Hockoendchoice 1930db616173SMichal Hocko 1931e7e05452SSean Christophersonconfig X86_SGX 1932e7e05452SSean Christopherson bool "Software Guard eXtensions (SGX)" 1933b8d1d163SDaniel Sneddon depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC 1934e7e05452SSean Christopherson depends on CRYPTO=y 1935e7e05452SSean Christopherson depends on CRYPTO_SHA256=y 1936e7e05452SSean Christopherson select MMU_NOTIFIER 1937901ddbb9SJarkko Sakkinen select NUMA_KEEP_MEMINFO if NUMA 193840e0e784STony Luck select XARRAY_MULTI 1939e7e05452SSean Christopherson help 1940e7e05452SSean Christopherson Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions 1941e7e05452SSean Christopherson that can be used by applications to set aside private regions of code 1942e7e05452SSean Christopherson and data, referred to as enclaves. An enclave's private memory can 1943e7e05452SSean Christopherson only be accessed by code running within the enclave. Accesses from 1944e7e05452SSean Christopherson outside the enclave, including other enclaves, are disallowed by 1945e7e05452SSean Christopherson hardware. 1946e7e05452SSean Christopherson 1947e7e05452SSean Christopherson If unsure, say N. 1948e7e05452SSean Christopherson 194918e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK 195018e66b69SRick Edgecombe bool "X86 userspace shadow stack" 195118e66b69SRick Edgecombe depends on AS_WRUSS 195218e66b69SRick Edgecombe depends on X86_64 195318e66b69SRick Edgecombe select ARCH_USES_HIGH_VMA_FLAGS 1954bcc9d04eSMark Brown select ARCH_HAS_USER_SHADOW_STACK 195518e66b69SRick Edgecombe select X86_CET 195618e66b69SRick Edgecombe help 195718e66b69SRick Edgecombe Shadow stack protection is a hardware feature that detects function 195818e66b69SRick Edgecombe return address corruption. This helps mitigate ROP attacks. 195918e66b69SRick Edgecombe Applications must be enabled to use it, and old userspace does not 196018e66b69SRick Edgecombe get protection "for free". 196118e66b69SRick Edgecombe 196218e66b69SRick Edgecombe CPUs supporting shadow stacks were first released in 2020. 196318e66b69SRick Edgecombe 196454acee60SDave Hansen See Documentation/arch/x86/shstk.rst for more information. 196518e66b69SRick Edgecombe 196618e66b69SRick Edgecombe If unsure, say N. 196718e66b69SRick Edgecombe 1968c33621b4SKai Huangconfig INTEL_TDX_HOST 1969c33621b4SKai Huang bool "Intel Trust Domain Extensions (TDX) host support" 1970c33621b4SKai Huang depends on CPU_SUP_INTEL 1971c33621b4SKai Huang depends on X86_64 1972c33621b4SKai Huang depends on KVM_INTEL 19733115cabdSKai Huang depends on X86_X2APIC 1974abe8dbabSKai Huang select ARCH_KEEP_MEMBLOCK 1975ac3a2208SKai Huang depends on CONTIG_ALLOC 1976cb8eb06dSDave Hansen depends on !KEXEC_CORE 197783e1bdc9SKai Huang depends on X86_MCE 1978c33621b4SKai Huang help 1979c33621b4SKai Huang Intel Trust Domain Extensions (TDX) protects guest VMs from malicious 1980c33621b4SKai Huang host and certain physical attacks. This option enables necessary TDX 1981c33621b4SKai Huang support in the host kernel to run confidential VMs. 1982c33621b4SKai Huang 1983c33621b4SKai Huang If unsure, say N. 1984c33621b4SKai Huang 1985506f1d07SSam Ravnborgconfig EFI 19869ba16087SJan Beulich bool "EFI runtime service support" 19875b83683fSHuang, Ying depends on ACPI 1988f6ce5002SSergey Vlasov select UCS2_STRING 1989022ee6c5SArd Biesheuvel select EFI_RUNTIME_WRAPPERS 19901ff2fc02STom Lendacky select ARCH_USE_MEMREMAP_PROT 1991aba7e066SArd Biesheuvel select EFI_RUNTIME_MAP if KEXEC_CORE 1992a7f7f624SMasahiro Yamada help 19938b2cb7a8SHuang, Ying This enables the kernel to use EFI runtime services that are 1994506f1d07SSam Ravnborg available (such as the EFI variable services). 1995506f1d07SSam Ravnborg 19968b2cb7a8SHuang, Ying This option is only useful on systems that have EFI firmware. 19978b2cb7a8SHuang, Ying In addition, you should use the latest ELILO loader available 19988b2cb7a8SHuang, Ying at <http://elilo.sourceforge.net> in order to take advantage 19998b2cb7a8SHuang, Ying of EFI runtime services. However, even with this option, the 20008b2cb7a8SHuang, Ying resultant kernel should continue to boot on existing non-EFI 20018b2cb7a8SHuang, Ying platforms. 2002506f1d07SSam Ravnborg 2003291f3632SMatt Flemingconfig EFI_STUB 2004291f3632SMatt Fleming bool "EFI stub support" 2005c6dbd3e5SPeter Zijlstra depends on EFI 20067b2a583aSMatt Fleming select RELOCATABLE 2007a7f7f624SMasahiro Yamada help 2008291f3632SMatt Fleming This kernel feature allows a bzImage to be loaded directly 2009291f3632SMatt Fleming by EFI firmware without the use of a bootloader. 2010291f3632SMatt Fleming 20114f4cfa6cSMauro Carvalho Chehab See Documentation/admin-guide/efi-stub.rst for more information. 20120c759662SMatt Fleming 2013cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL 2014cc3fdda2SArd Biesheuvel bool "EFI handover protocol (DEPRECATED)" 2015cc3fdda2SArd Biesheuvel depends on EFI_STUB 2016cc3fdda2SArd Biesheuvel default y 2017cc3fdda2SArd Biesheuvel help 2018cc3fdda2SArd Biesheuvel Select this in order to include support for the deprecated EFI 2019cc3fdda2SArd Biesheuvel handover protocol, which defines alternative entry points into the 2020cc3fdda2SArd Biesheuvel EFI stub. This is a practice that has no basis in the UEFI 2021cc3fdda2SArd Biesheuvel specification, and requires a priori knowledge on the part of the 2022cc3fdda2SArd Biesheuvel bootloader about Linux/x86 specific ways of passing the command line 2023cc3fdda2SArd Biesheuvel and initrd, and where in memory those assets may be loaded. 2024cc3fdda2SArd Biesheuvel 2025cc3fdda2SArd Biesheuvel If in doubt, say Y. Even though the corresponding support is not 2026cc3fdda2SArd Biesheuvel present in upstream GRUB or other bootloaders, most distros build 2027cc3fdda2SArd Biesheuvel GRUB with numerous downstream patches applied, and may rely on the 2028cc3fdda2SArd Biesheuvel handover protocol as as result. 2029cc3fdda2SArd Biesheuvel 20307d453eeeSMatt Flemingconfig EFI_MIXED 20317d453eeeSMatt Fleming bool "EFI mixed-mode support" 20327d453eeeSMatt Fleming depends on EFI_STUB && X86_64 2033a7f7f624SMasahiro Yamada help 20347d453eeeSMatt Fleming Enabling this feature allows a 64-bit kernel to be booted 20357d453eeeSMatt Fleming on a 32-bit firmware, provided that your CPU supports 64-bit 20367d453eeeSMatt Fleming mode. 20377d453eeeSMatt Fleming 20387d453eeeSMatt Fleming Note that it is not possible to boot a mixed-mode enabled 20397d453eeeSMatt Fleming kernel via the EFI boot stub - a bootloader that supports 20407d453eeeSMatt Fleming the EFI handover protocol must be used. 20417d453eeeSMatt Fleming 20427d453eeeSMatt Fleming If unsure, say N. 20437d453eeeSMatt Fleming 20441fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP 20451fff234dSArd Biesheuvel bool "Export EFI runtime maps to sysfs" if EXPERT 20461fff234dSArd Biesheuvel depends on EFI 20471fff234dSArd Biesheuvel help 20481fff234dSArd Biesheuvel Export EFI runtime memory regions to /sys/firmware/efi/runtime-map. 20491fff234dSArd Biesheuvel That memory map is required by the 2nd kernel to set up EFI virtual 20501fff234dSArd Biesheuvel mappings after kexec, but can also be used for debugging purposes. 20511fff234dSArd Biesheuvel 20521fff234dSArd Biesheuvel See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map. 20531fff234dSArd Biesheuvel 20548636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz" 2055506f1d07SSam Ravnborg 20566af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC 20576af51380SEric DeVolder def_bool y 2058506f1d07SSam Ravnborg 20596af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE 2060c1ad12eeSArnd Bergmann def_bool X86_64 2061506f1d07SSam Ravnborg 20626af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE 20636af51380SEric DeVolder def_bool y 20646af51380SEric DeVolder depends on KEXEC_FILE 2065b69a2afdSJonathan McDowell select HAVE_IMA_KEXEC if IMA 206674ca317cSVivek Goyal 2067e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY 2068c1ad12eeSArnd Bergmann def_bool y 2069b799a09fSAKASHI Takahiro 20706af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG 20716af51380SEric DeVolder def_bool y 207299d5cadfSJiri Bohac 20736af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE 20746af51380SEric DeVolder def_bool y 207599d5cadfSJiri Bohac 20766af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG 20776af51380SEric DeVolder def_bool y 207899d5cadfSJiri Bohac 20796af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP 20806af51380SEric DeVolder def_bool y 20818e7d8381SVivek Goyal 20826af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP 20836af51380SEric DeVolder def_bool X86_64 || (X86_32 && HIGHMEM) 20848e7d8381SVivek Goyal 208531daa343SDave Vasilevskyconfig ARCH_DEFAULT_CRASH_DUMP 208631daa343SDave Vasilevsky def_bool y 208731daa343SDave Vasilevsky 2088ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG 2089ea53ad9cSEric DeVolder def_bool y 20903ab83521SHuang Ying 20919c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 209285fcde40SBaoquan He def_bool CRASH_RESERVE 20939c08a2a1SBaoquan He 2094506f1d07SSam Ravnborgconfig PHYSICAL_START 20956a108a14SDavid Rientjes hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 2096ceefccc9SH. Peter Anvin default "0x1000000" 2097a7f7f624SMasahiro Yamada help 2098506f1d07SSam Ravnborg This gives the physical address where the kernel is loaded. 2099506f1d07SSam Ravnborg 210043b1d3e6SChris Koch If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage 210143b1d3e6SChris Koch will decompress itself to above physical address and run from there. 210243b1d3e6SChris Koch Otherwise, bzImage will run from the address where it has been loaded 210343b1d3e6SChris Koch by the boot loader. The only exception is if it is loaded below the 210443b1d3e6SChris Koch above physical address, in which case it will relocate itself there. 2105506f1d07SSam Ravnborg 2106506f1d07SSam Ravnborg In normal kdump cases one does not have to set/change this option 2107506f1d07SSam Ravnborg as now bzImage can be compiled as a completely relocatable image 2108506f1d07SSam Ravnborg (CONFIG_RELOCATABLE=y) and be used to load and run from a different 2109506f1d07SSam Ravnborg address. This option is mainly useful for the folks who don't want 2110506f1d07SSam Ravnborg to use a bzImage for capturing the crash dump and want to use a 2111506f1d07SSam Ravnborg vmlinux instead. vmlinux is not relocatable hence a kernel needs 2112506f1d07SSam Ravnborg to be specifically compiled to run from a specific memory area 2113506f1d07SSam Ravnborg (normally a reserved region) and this option comes handy. 2114506f1d07SSam Ravnborg 2115ceefccc9SH. Peter Anvin So if you are using bzImage for capturing the crash dump, 2116ceefccc9SH. Peter Anvin leave the value here unchanged to 0x1000000 and set 2117ceefccc9SH. Peter Anvin CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux 2118ceefccc9SH. Peter Anvin for capturing the crash dump change this value to start of 2119ceefccc9SH. Peter Anvin the reserved region. In other words, it can be set based on 2120ceefccc9SH. Peter Anvin the "X" value as specified in the "crashkernel=YM@XM" 2121ceefccc9SH. Peter Anvin command line boot parameter passed to the panic-ed 2122330d4810SMauro Carvalho Chehab kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst 2123ceefccc9SH. Peter Anvin for more details about crash dumps. 2124506f1d07SSam Ravnborg 2125506f1d07SSam Ravnborg Usage of bzImage for capturing the crash dump is recommended as 2126506f1d07SSam Ravnborg one does not have to build two kernels. Same kernel can be used 2127506f1d07SSam Ravnborg as production kernel and capture kernel. Above option should have 2128506f1d07SSam Ravnborg gone away after relocatable bzImage support is introduced. But it 2129506f1d07SSam Ravnborg is present because there are users out there who continue to use 2130506f1d07SSam Ravnborg vmlinux for dump capture. This option should go away down the 2131506f1d07SSam Ravnborg line. 2132506f1d07SSam Ravnborg 2133506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2134506f1d07SSam Ravnborg 2135506f1d07SSam Ravnborgconfig RELOCATABLE 213626717808SH. Peter Anvin bool "Build a relocatable kernel" 213726717808SH. Peter Anvin default y 2138a7f7f624SMasahiro Yamada help 2139506f1d07SSam Ravnborg This builds a kernel image that retains relocation information 2140506f1d07SSam Ravnborg so it can be loaded someplace besides the default 1MB. 2141506f1d07SSam Ravnborg The relocations tend to make the kernel binary about 10% larger, 2142506f1d07SSam Ravnborg but are discarded at runtime. 2143506f1d07SSam Ravnborg 2144506f1d07SSam Ravnborg One use is for the kexec on panic case where the recovery kernel 2145506f1d07SSam Ravnborg must live at a different physical address than the primary 2146506f1d07SSam Ravnborg kernel. 2147506f1d07SSam Ravnborg 2148506f1d07SSam Ravnborg Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address 2149506f1d07SSam Ravnborg it has been loaded at and the compile time physical address 21508ab3820fSKees Cook (CONFIG_PHYSICAL_START) is used as the minimum location. 2151506f1d07SSam Ravnborg 21528ab3820fSKees Cookconfig RANDOMIZE_BASE 2153e8581e3dSBaoquan He bool "Randomize the address of the kernel image (KASLR)" 21548ab3820fSKees Cook depends on RELOCATABLE 21556807c846SIngo Molnar default y 2156a7f7f624SMasahiro Yamada help 2157e8581e3dSBaoquan He In support of Kernel Address Space Layout Randomization (KASLR), 2158e8581e3dSBaoquan He this randomizes the physical address at which the kernel image 2159e8581e3dSBaoquan He is decompressed and the virtual address where the kernel 2160e8581e3dSBaoquan He image is mapped, as a security feature that deters exploit 2161e8581e3dSBaoquan He attempts relying on knowledge of the location of kernel 2162e8581e3dSBaoquan He code internals. 2163e8581e3dSBaoquan He 2164ed9f007eSKees Cook On 64-bit, the kernel physical and virtual addresses are 2165ed9f007eSKees Cook randomized separately. The physical address will be anywhere 2166ed9f007eSKees Cook between 16MB and the top of physical memory (up to 64TB). The 2167ed9f007eSKees Cook virtual address will be randomized from 16MB up to 1GB (9 bits 2168ed9f007eSKees Cook of entropy). Note that this also reduces the memory space 2169ed9f007eSKees Cook available to kernel modules from 1.5GB to 1GB. 2170ed9f007eSKees Cook 2171ed9f007eSKees Cook On 32-bit, the kernel physical and virtual addresses are 2172ed9f007eSKees Cook randomized together. They will be randomized from 16MB up to 2173ed9f007eSKees Cook 512MB (8 bits of entropy). 21748ab3820fSKees Cook 2175a653f356SKees Cook Entropy is generated using the RDRAND instruction if it is 2176e8581e3dSBaoquan He supported. If RDTSC is supported, its value is mixed into 2177e8581e3dSBaoquan He the entropy pool as well. If neither RDRAND nor RDTSC are 2178ed9f007eSKees Cook supported, then entropy is read from the i8254 timer. The 2179ed9f007eSKees Cook usable entropy is limited by the kernel being built using 2180ed9f007eSKees Cook 2GB addressing, and that PHYSICAL_ALIGN must be at a 2181ed9f007eSKees Cook minimum of 2MB. As a result, only 10 bits of entropy are 2182ed9f007eSKees Cook theoretically possible, but the implementations are further 2183ed9f007eSKees Cook limited due to memory layouts. 2184e8581e3dSBaoquan He 21856807c846SIngo Molnar If unsure, say Y. 2186da2b6fb9SKees Cook 21878ab3820fSKees Cook# Relocation on x86 needs some additional build support 2188845adf72SH. Peter Anvinconfig X86_NEED_RELOCS 2189845adf72SH. Peter Anvin def_bool y 21908ab3820fSKees Cook depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE) 2191845adf72SH. Peter Anvin 2192506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN 2193a0215061SKees Cook hex "Alignment value to which kernel should be aligned" 21948ab3820fSKees Cook default "0x200000" 2195a0215061SKees Cook range 0x2000 0x1000000 if X86_32 2196a0215061SKees Cook range 0x200000 0x1000000 if X86_64 2197a7f7f624SMasahiro Yamada help 2198506f1d07SSam Ravnborg This value puts the alignment restrictions on physical address 2199506f1d07SSam Ravnborg where kernel is loaded and run from. Kernel is compiled for an 2200506f1d07SSam Ravnborg address which meets above alignment restriction. 2201506f1d07SSam Ravnborg 2202506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2203506f1d07SSam Ravnborg CONFIG_RELOCATABLE is set, kernel will move itself to nearest 2204506f1d07SSam Ravnborg address aligned to above value and run from there. 2205506f1d07SSam Ravnborg 2206506f1d07SSam Ravnborg If bootloader loads the kernel at a non-aligned address and 2207506f1d07SSam Ravnborg CONFIG_RELOCATABLE is not set, kernel will ignore the run time 2208506f1d07SSam Ravnborg load address and decompress itself to the address it has been 2209506f1d07SSam Ravnborg compiled for and run from there. The address for which kernel is 2210506f1d07SSam Ravnborg compiled already meets above alignment restrictions. Hence the 2211506f1d07SSam Ravnborg end result is that kernel runs from a physical address meeting 2212506f1d07SSam Ravnborg above alignment restrictions. 2213506f1d07SSam Ravnborg 2214a0215061SKees Cook On 32-bit this value must be a multiple of 0x2000. On 64-bit 2215a0215061SKees Cook this value must be a multiple of 0x200000. 2216a0215061SKees Cook 2217506f1d07SSam Ravnborg Don't change this unless you know what you are doing. 2218506f1d07SSam Ravnborg 2219eedb92abSKirill A. Shutemovconfig DYNAMIC_MEMORY_LAYOUT 2220eedb92abSKirill A. Shutemov bool 2221a7f7f624SMasahiro Yamada help 2222eedb92abSKirill A. Shutemov This option makes base addresses of vmalloc and vmemmap as well as 2223eedb92abSKirill A. Shutemov __PAGE_OFFSET movable during boot. 2224eedb92abSKirill A. Shutemov 22250483e1faSThomas Garnierconfig RANDOMIZE_MEMORY 22260483e1faSThomas Garnier bool "Randomize the kernel memory sections" 22270483e1faSThomas Garnier depends on X86_64 22280483e1faSThomas Garnier depends on RANDOMIZE_BASE 2229eedb92abSKirill A. Shutemov select DYNAMIC_MEMORY_LAYOUT 22300483e1faSThomas Garnier default RANDOMIZE_BASE 2231a7f7f624SMasahiro Yamada help 22320483e1faSThomas Garnier Randomizes the base virtual address of kernel memory sections 22330483e1faSThomas Garnier (physical memory mapping, vmalloc & vmemmap). This security feature 22340483e1faSThomas Garnier makes exploits relying on predictable memory locations less reliable. 22350483e1faSThomas Garnier 22360483e1faSThomas Garnier The order of allocations remains unchanged. Entropy is generated in 22370483e1faSThomas Garnier the same way as RANDOMIZE_BASE. Current implementation in the optimal 22380483e1faSThomas Garnier configuration have in average 30,000 different possible virtual 22390483e1faSThomas Garnier addresses for each memory section. 22400483e1faSThomas Garnier 22416807c846SIngo Molnar If unsure, say Y. 22420483e1faSThomas Garnier 224390397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING 224490397a41SThomas Garnier hex "Physical memory mapping padding" if EXPERT 224590397a41SThomas Garnier depends on RANDOMIZE_MEMORY 224690397a41SThomas Garnier default "0xa" if MEMORY_HOTPLUG 224790397a41SThomas Garnier default "0x0" 224890397a41SThomas Garnier range 0x1 0x40 if MEMORY_HOTPLUG 224990397a41SThomas Garnier range 0x0 0x40 2250a7f7f624SMasahiro Yamada help 225190397a41SThomas Garnier Define the padding in terabytes added to the existing physical 225290397a41SThomas Garnier memory size during kernel memory randomization. It is useful 225390397a41SThomas Garnier for memory hotplug support but reduces the entropy available for 225490397a41SThomas Garnier address randomization. 225590397a41SThomas Garnier 225690397a41SThomas Garnier If unsure, leave at the default value. 225790397a41SThomas Garnier 22586449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING 22596449dcb0SKirill A. Shutemov bool "Linear Address Masking support" 22606449dcb0SKirill A. Shutemov depends on X86_64 22613267cb6dSPawan Gupta depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS 22626449dcb0SKirill A. Shutemov help 22636449dcb0SKirill A. Shutemov Linear Address Masking (LAM) modifies the checking that is applied 22646449dcb0SKirill A. Shutemov to 64-bit linear addresses, allowing software to use of the 22656449dcb0SKirill A. Shutemov untranslated address bits for metadata. 22666449dcb0SKirill A. Shutemov 22676449dcb0SKirill A. Shutemov The capability can be used for efficient address sanitizers (ASAN) 22686449dcb0SKirill A. Shutemov implementation and for optimizations in JITs. 22696449dcb0SKirill A. Shutemov 2270506f1d07SSam Ravnborgconfig HOTPLUG_CPU 2271bebd024eSThomas Gleixner def_bool y 227240b31360SStephen Rothwell depends on SMP 2273506f1d07SSam Ravnborg 2274506f1d07SSam Ravnborgconfig COMPAT_VDSO 2275b0b49f26SAndy Lutomirski def_bool n 2276b0b49f26SAndy Lutomirski prompt "Disable the 32-bit vDSO (needed for glibc 2.3.3)" 2277953fee1dSIngo Molnar depends on COMPAT_32 2278a7f7f624SMasahiro Yamada help 2279b0b49f26SAndy Lutomirski Certain buggy versions of glibc will crash if they are 2280b0b49f26SAndy Lutomirski presented with a 32-bit vDSO that is not mapped at the address 2281b0b49f26SAndy Lutomirski indicated in its segment table. 2282e84446deSRandy Dunlap 2283b0b49f26SAndy Lutomirski The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a 2284b0b49f26SAndy Lutomirski and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and 2285b0b49f26SAndy Lutomirski 49ad572a70b8aeb91e57483a11dd1b77e31c4468. Glibc 2.3.3 is 2286b0b49f26SAndy Lutomirski the only released version with the bug, but OpenSUSE 9 2287b0b49f26SAndy Lutomirski contains a buggy "glibc 2.3.2". 2288506f1d07SSam Ravnborg 2289b0b49f26SAndy Lutomirski The symptom of the bug is that everything crashes on startup, saying: 2290b0b49f26SAndy Lutomirski dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed! 2291b0b49f26SAndy Lutomirski 2292b0b49f26SAndy Lutomirski Saying Y here changes the default value of the vdso32 boot 2293b0b49f26SAndy Lutomirski option from 1 to 0, which turns off the 32-bit vDSO entirely. 2294b0b49f26SAndy Lutomirski This works around the glibc bug but hurts performance. 2295b0b49f26SAndy Lutomirski 2296b0b49f26SAndy Lutomirski If unsure, say N: if you are compiling your own kernel, you 2297b0b49f26SAndy Lutomirski are unlikely to be using a buggy version of glibc. 2298506f1d07SSam Ravnborg 22993dc33bd3SKees Cookchoice 23003dc33bd3SKees Cook prompt "vsyscall table for legacy applications" 23013dc33bd3SKees Cook depends on X86_64 2302625b7b7fSAndy Lutomirski default LEGACY_VSYSCALL_XONLY 23033dc33bd3SKees Cook help 23043dc33bd3SKees Cook Legacy user code that does not know how to find the vDSO expects 23053dc33bd3SKees Cook to be able to issue three syscalls by calling fixed addresses in 23063dc33bd3SKees Cook kernel space. Since this location is not randomized with ASLR, 23073dc33bd3SKees Cook it can be used to assist security vulnerability exploitation. 23083dc33bd3SKees Cook 23093dc33bd3SKees Cook This setting can be changed at boot time via the kernel command 2310bf00745eSAndy Lutomirski line parameter vsyscall=[emulate|xonly|none]. Emulate mode 2311bf00745eSAndy Lutomirski is deprecated and can only be enabled using the kernel command 2312bf00745eSAndy Lutomirski line. 23133dc33bd3SKees Cook 23143dc33bd3SKees Cook On a system with recent enough glibc (2.14 or newer) and no 23153dc33bd3SKees Cook static binaries, you can say None without a performance penalty 23163dc33bd3SKees Cook to improve security. 23173dc33bd3SKees Cook 2318bd49e16eSAndy Lutomirski If unsure, select "Emulate execution only". 23193dc33bd3SKees Cook 2320bd49e16eSAndy Lutomirski config LEGACY_VSYSCALL_XONLY 2321bd49e16eSAndy Lutomirski bool "Emulate execution only" 2322bd49e16eSAndy Lutomirski help 2323bd49e16eSAndy Lutomirski The kernel traps and emulates calls into the fixed vsyscall 2324bd49e16eSAndy Lutomirski address mapping and does not allow reads. This 2325bd49e16eSAndy Lutomirski configuration is recommended when userspace might use the 2326bd49e16eSAndy Lutomirski legacy vsyscall area but support for legacy binary 2327bd49e16eSAndy Lutomirski instrumentation of legacy code is not needed. It mitigates 2328bd49e16eSAndy Lutomirski certain uses of the vsyscall area as an ASLR-bypassing 2329bd49e16eSAndy Lutomirski buffer. 23303dc33bd3SKees Cook 23313dc33bd3SKees Cook config LEGACY_VSYSCALL_NONE 23323dc33bd3SKees Cook bool "None" 23333dc33bd3SKees Cook help 23343dc33bd3SKees Cook There will be no vsyscall mapping at all. This will 23353dc33bd3SKees Cook eliminate any risk of ASLR bypass due to the vsyscall 23363dc33bd3SKees Cook fixed address mapping. Attempts to use the vsyscalls 23373dc33bd3SKees Cook will be reported to dmesg, so that either old or 23383dc33bd3SKees Cook malicious userspace programs can be identified. 23393dc33bd3SKees Cook 23403dc33bd3SKees Cookendchoice 23413dc33bd3SKees Cook 2342516cbf37STim Birdconfig CMDLINE_BOOL 2343516cbf37STim Bird bool "Built-in kernel command line" 2344a7f7f624SMasahiro Yamada help 2345516cbf37STim Bird Allow for specifying boot arguments to the kernel at 2346516cbf37STim Bird build time. On some systems (e.g. embedded ones), it is 2347516cbf37STim Bird necessary or convenient to provide some or all of the 2348516cbf37STim Bird kernel boot arguments with the kernel itself (that is, 2349516cbf37STim Bird to not rely on the boot loader to provide them.) 2350516cbf37STim Bird 2351516cbf37STim Bird To compile command line arguments into the kernel, 2352516cbf37STim Bird set this option to 'Y', then fill in the 235369711ca1SSébastien Hinderer boot arguments in CONFIG_CMDLINE. 2354516cbf37STim Bird 2355516cbf37STim Bird Systems with fully functional boot loaders (i.e. non-embedded) 2356516cbf37STim Bird should leave this option set to 'N'. 2357516cbf37STim Bird 2358516cbf37STim Birdconfig CMDLINE 2359516cbf37STim Bird string "Built-in kernel command string" 2360516cbf37STim Bird depends on CMDLINE_BOOL 2361516cbf37STim Bird default "" 2362a7f7f624SMasahiro Yamada help 2363516cbf37STim Bird Enter arguments here that should be compiled into the kernel 2364516cbf37STim Bird image and used at boot time. If the boot loader provides a 2365516cbf37STim Bird command line at boot time, it is appended to this string to 2366516cbf37STim Bird form the full kernel command line, when the system boots. 2367516cbf37STim Bird 2368516cbf37STim Bird However, you can use the CONFIG_CMDLINE_OVERRIDE option to 2369516cbf37STim Bird change this behavior. 2370516cbf37STim Bird 2371516cbf37STim Bird In most cases, the command line (whether built-in or provided 2372516cbf37STim Bird by the boot loader) should specify the device for the root 2373516cbf37STim Bird file system. 2374516cbf37STim Bird 2375516cbf37STim Birdconfig CMDLINE_OVERRIDE 2376516cbf37STim Bird bool "Built-in command line overrides boot loader arguments" 2377645e6466SAnders Roxell depends on CMDLINE_BOOL && CMDLINE != "" 2378a7f7f624SMasahiro Yamada help 2379516cbf37STim Bird Set this option to 'Y' to have the kernel ignore the boot loader 2380516cbf37STim Bird command line, and use ONLY the built-in command line. 2381516cbf37STim Bird 2382516cbf37STim Bird This is used to work around broken boot loaders. This should 2383516cbf37STim Bird be set to 'N' under normal conditions. 2384516cbf37STim Bird 2385a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL 2386a5b9e5a2SAndy Lutomirski bool "Enable the LDT (local descriptor table)" if EXPERT 2387a5b9e5a2SAndy Lutomirski default y 2388a7f7f624SMasahiro Yamada help 2389a5b9e5a2SAndy Lutomirski Linux can allow user programs to install a per-process x86 2390a5b9e5a2SAndy Lutomirski Local Descriptor Table (LDT) using the modify_ldt(2) system 2391a5b9e5a2SAndy Lutomirski call. This is required to run 16-bit or segmented code such as 2392a5b9e5a2SAndy Lutomirski DOSEMU or some Wine programs. It is also used by some very old 2393a5b9e5a2SAndy Lutomirski threading libraries. 2394a5b9e5a2SAndy Lutomirski 2395a5b9e5a2SAndy Lutomirski Enabling this feature adds a small amount of overhead to 2396a5b9e5a2SAndy Lutomirski context switches and increases the low-level kernel attack 2397a5b9e5a2SAndy Lutomirski surface. Disabling it removes the modify_ldt(2) system call. 2398a5b9e5a2SAndy Lutomirski 2399a5b9e5a2SAndy Lutomirski Saying 'N' here may make sense for embedded or server kernels. 2400a5b9e5a2SAndy Lutomirski 24013aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE 24023aac3ebeSThomas Gleixner bool "Enforce strict size checking for sigaltstack" 24033aac3ebeSThomas Gleixner depends on DYNAMIC_SIGFRAME 24043aac3ebeSThomas Gleixner help 24053aac3ebeSThomas Gleixner For historical reasons MINSIGSTKSZ is a constant which became 24063aac3ebeSThomas Gleixner already too small with AVX512 support. Add a mechanism to 24073aac3ebeSThomas Gleixner enforce strict checking of the sigaltstack size against the 24083aac3ebeSThomas Gleixner real size of the FPU frame. This option enables the check 24093aac3ebeSThomas Gleixner by default. It can also be controlled via the kernel command 24103aac3ebeSThomas Gleixner line option 'strict_sas_size' independent of this config 24113aac3ebeSThomas Gleixner switch. Enabling it might break existing applications which 24123aac3ebeSThomas Gleixner allocate a too small sigaltstack but 'work' because they 24133aac3ebeSThomas Gleixner never get a signal delivered. 24143aac3ebeSThomas Gleixner 24153aac3ebeSThomas Gleixner Say 'N' unless you want to really enforce this check. 24163aac3ebeSThomas Gleixner 2417d6f635bcSKees Cookconfig CFI_AUTO_DEFAULT 2418d6f635bcSKees Cook bool "Attempt to use FineIBT by default at boot time" 2419d6f635bcSKees Cook depends on FINEIBT 2420d6f635bcSKees Cook default y 2421d6f635bcSKees Cook help 2422d6f635bcSKees Cook Attempt to use FineIBT by default at boot time. If enabled, 2423d6f635bcSKees Cook this is the same as booting with "cfi=auto". If disabled, 2424d6f635bcSKees Cook this is the same as booting with "cfi=kcfi". 2425d6f635bcSKees Cook 2426b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig" 2427b700e7f0SSeth Jennings 2428350afa8aSRavi Bangoriaconfig X86_BUS_LOCK_DETECT 2429350afa8aSRavi Bangoria bool "Split Lock Detect and Bus Lock Detect support" 2430408eb741SRavi Bangoria depends on CPU_SUP_INTEL || CPU_SUP_AMD 2431350afa8aSRavi Bangoria default y 2432350afa8aSRavi Bangoria help 2433350afa8aSRavi Bangoria Enable Split Lock Detect and Bus Lock Detect functionalities. 2434350afa8aSRavi Bangoria See <file:Documentation/arch/x86/buslock.rst> for more information. 2435350afa8aSRavi Bangoria 2436506f1d07SSam Ravnborgendmenu 2437506f1d07SSam Ravnborg 24381ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS 243947ff30ccSUros Bizjak def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null) 244047ff30ccSUros Bizjak depends on CC_IS_GCC 24411ca3683cSUros Bizjak 24429ebe5500SUros Bizjakconfig CC_HAS_NAMED_AS_FIXED_SANITIZERS 2443f61f02d1SUros Bizjak def_bool CC_IS_GCC && GCC_VERSION >= 130300 24441ca3683cSUros Bizjak 24451ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT 24461ca3683cSUros Bizjak def_bool y 2447e29aad08SUros Bizjak depends on CC_HAS_NAMED_AS 2448e29aad08SUros Bizjak # 24499ebe5500SUros Bizjak # -fsanitize=kernel-address (KASAN) and -fsanitize=thread 24509ebe5500SUros Bizjak # (KCSAN) are incompatible with named address spaces with 24519ebe5500SUros Bizjak # GCC < 13.3 - see GCC PR sanitizer/111736. 2452e29aad08SUros Bizjak # 24539ebe5500SUros Bizjak depends on !(KASAN || KCSAN) || CC_HAS_NAMED_AS_FIXED_SANITIZERS 24541ca3683cSUros Bizjak 2455f43b9876SPeter Zijlstraconfig CC_HAS_SLS 2456f43b9876SPeter Zijlstra def_bool $(cc-option,-mharden-sls=all) 2457f43b9876SPeter Zijlstra 2458f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK 2459f43b9876SPeter Zijlstra def_bool $(cc-option,-mfunction-return=thunk-extern) 2460f43b9876SPeter Zijlstra 2461bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING 2462bea75b33SThomas Gleixner def_bool $(cc-option,-fpatchable-function-entry=16,16) 2463bea75b33SThomas Gleixner 2464bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI 2465bea75b33SThomas Gleixner int 2466bea75b33SThomas Gleixner default 59 if FUNCTION_ALIGNMENT_64B 2467bea75b33SThomas Gleixner default 27 if FUNCTION_ALIGNMENT_32B 2468bea75b33SThomas Gleixner default 11 if FUNCTION_ALIGNMENT_16B 2469bea75b33SThomas Gleixner default 3 if FUNCTION_ALIGNMENT_8B 2470bea75b33SThomas Gleixner default 0 2471bea75b33SThomas Gleixner 2472bea75b33SThomas Gleixner# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG 2473bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/ 2474bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES 2475bea75b33SThomas Gleixner int 2476bea75b33SThomas Gleixner default FUNCTION_PADDING_CFI if CFI_CLANG 2477bea75b33SThomas Gleixner default FUNCTION_ALIGNMENT 2478bea75b33SThomas Gleixner 2479931ab636SPeter Zijlstraconfig CALL_PADDING 2480931ab636SPeter Zijlstra def_bool n 2481931ab636SPeter Zijlstra depends on CC_HAS_ENTRY_PADDING && OBJTOOL 2482931ab636SPeter Zijlstra select FUNCTION_ALIGNMENT_16B 2483931ab636SPeter Zijlstra 2484931ab636SPeter Zijlstraconfig FINEIBT 2485931ab636SPeter Zijlstra def_bool y 2486aefb2f2eSBreno Leitao depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE 2487931ab636SPeter Zijlstra select CALL_PADDING 2488931ab636SPeter Zijlstra 24898f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS 24908f7c0d8bSThomas Gleixner def_bool y 24910911b8c5SBreno Leitao depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL 24928f7c0d8bSThomas Gleixner 24938f7c0d8bSThomas Gleixnerconfig CALL_THUNKS 24948f7c0d8bSThomas Gleixner def_bool n 2495931ab636SPeter Zijlstra select CALL_PADDING 24968f7c0d8bSThomas Gleixner 2497b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS 2498b341b20dSPeter Zijlstra def_bool y 2499931ab636SPeter Zijlstra depends on CALL_PADDING && !CFI_CLANG 2500b341b20dSPeter Zijlstra 2501fe42754bSSean Christophersonmenuconfig CPU_MITIGATIONS 2502fe42754bSSean Christopherson bool "Mitigations for CPU vulnerabilities" 2503f43b9876SPeter Zijlstra default y 2504f43b9876SPeter Zijlstra help 2505fe42754bSSean Christopherson Say Y here to enable options which enable mitigations for hardware 2506fe42754bSSean Christopherson vulnerabilities (usually related to speculative execution). 2507ce0abef6SSean Christopherson Mitigations can be disabled or restricted to SMT systems at runtime 2508ce0abef6SSean Christopherson via the "mitigations" kernel parameter. 2509f43b9876SPeter Zijlstra 2510ce0abef6SSean Christopherson If you say N, all mitigations will be disabled. This CANNOT be 2511ce0abef6SSean Christopherson overridden at runtime. 2512ce0abef6SSean Christopherson 2513ce0abef6SSean Christopherson Say 'Y', unless you really know what you are doing. 2514f43b9876SPeter Zijlstra 2515fe42754bSSean Christophersonif CPU_MITIGATIONS 2516f43b9876SPeter Zijlstra 2517ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION 2518f43b9876SPeter Zijlstra bool "Remove the kernel mapping in user mode" 2519f43b9876SPeter Zijlstra default y 2520f43b9876SPeter Zijlstra depends on (X86_64 || X86_PAE) 2521f43b9876SPeter Zijlstra help 2522f43b9876SPeter Zijlstra This feature reduces the number of hardware side channels by 2523f43b9876SPeter Zijlstra ensuring that the majority of kernel addresses are not mapped 2524f43b9876SPeter Zijlstra into userspace. 2525f43b9876SPeter Zijlstra 2526ff61f079SJonathan Corbet See Documentation/arch/x86/pti.rst for more details. 2527f43b9876SPeter Zijlstra 2528aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE 2529f43b9876SPeter Zijlstra bool "Avoid speculative indirect branches in kernel" 2530f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2531f43b9876SPeter Zijlstra default y 2532f43b9876SPeter Zijlstra help 2533f43b9876SPeter Zijlstra Compile kernel with the retpoline compiler options to guard against 2534f43b9876SPeter Zijlstra kernel-to-user data leaks by avoiding speculative indirect 2535f43b9876SPeter Zijlstra branches. Requires a compiler with -mindirect-branch=thunk-extern 2536f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2537f43b9876SPeter Zijlstra 25380911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK 2539f43b9876SPeter Zijlstra bool "Enable return-thunks" 2540aefb2f2eSBreno Leitao depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK 2541f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2542b648ab48SBen Hutchings default y if X86_64 2543f43b9876SPeter Zijlstra help 2544f43b9876SPeter Zijlstra Compile the kernel with the return-thunks compiler option to guard 2545f43b9876SPeter Zijlstra against kernel-to-user data leaks by avoiding return speculation. 2546f43b9876SPeter Zijlstra Requires a compiler with -mfunction-return=thunk-extern 2547f43b9876SPeter Zijlstra support for full protection. The kernel may run slower. 2548f43b9876SPeter Zijlstra 2549ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY 2550f43b9876SPeter Zijlstra bool "Enable UNRET on kernel entry" 25510911b8c5SBreno Leitao depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64 2552f43b9876SPeter Zijlstra default y 2553f43b9876SPeter Zijlstra help 2554f43b9876SPeter Zijlstra Compile the kernel with support for the retbleed=unret mitigation. 2555f43b9876SPeter Zijlstra 25565fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING 255780e4c1cdSThomas Gleixner bool "Mitigate RSB underflow with call depth tracking" 255880e4c1cdSThomas Gleixner depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS 255980e4c1cdSThomas Gleixner select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE 256080e4c1cdSThomas Gleixner select CALL_THUNKS 256180e4c1cdSThomas Gleixner default y 256280e4c1cdSThomas Gleixner help 256380e4c1cdSThomas Gleixner Compile the kernel with call depth tracking to mitigate the Intel 256486e39b94SBreno Leitao SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off 256586e39b94SBreno Leitao by default and needs to be enabled on the kernel command line via the 256686e39b94SBreno Leitao retbleed=stuff option. For non-affected systems the overhead of this 256786e39b94SBreno Leitao option is marginal as the call depth tracking is using run-time 256886e39b94SBreno Leitao generated call thunks in a compiler generated padding area and call 256986e39b94SBreno Leitao patching. This increases text size by ~5%. For non affected systems 257086e39b94SBreno Leitao this space is unused. On affected SKL systems this results in a 257186e39b94SBreno Leitao significant performance gain over the IBRS mitigation. 257280e4c1cdSThomas Gleixner 2573e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG 2574e81dc127SThomas Gleixner bool "Enable call thunks and call depth tracking debugging" 25755fa31af3SBreno Leitao depends on MITIGATION_CALL_DEPTH_TRACKING 2576e81dc127SThomas Gleixner select FUNCTION_ALIGNMENT_32B 2577e81dc127SThomas Gleixner default n 2578e81dc127SThomas Gleixner help 2579e81dc127SThomas Gleixner Enable call/ret counters for imbalance detection and build in 2580e81dc127SThomas Gleixner a noisy dmesg about callthunks generation and call patching for 2581e81dc127SThomas Gleixner trouble shooting. The debug prints need to be enabled on the 2582e81dc127SThomas Gleixner kernel command line with 'debug-callthunks'. 258354628de6SRandy Dunlap Only enable this when you are debugging call thunks as this 258454628de6SRandy Dunlap creates a noticeable runtime overhead. If unsure say N. 258580e4c1cdSThomas Gleixner 2586e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY 2587f43b9876SPeter Zijlstra bool "Enable IBPB on kernel entry" 2588b648ab48SBen Hutchings depends on CPU_SUP_AMD && X86_64 2589f43b9876SPeter Zijlstra default y 2590f43b9876SPeter Zijlstra help 2591318e8c33SPatrick Bellasi Compile the kernel with support for the retbleed=ibpb and 2592318e8c33SPatrick Bellasi spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations. 2593f43b9876SPeter Zijlstra 25941da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY 2595f43b9876SPeter Zijlstra bool "Enable IBRS on kernel entry" 2596b648ab48SBen Hutchings depends on CPU_SUP_INTEL && X86_64 2597f43b9876SPeter Zijlstra default y 2598f43b9876SPeter Zijlstra help 2599f43b9876SPeter Zijlstra Compile the kernel with support for the spectre_v2=ibrs mitigation. 2600f43b9876SPeter Zijlstra This mitigates both spectre_v2 and retbleed at great cost to 2601f43b9876SPeter Zijlstra performance. 2602f43b9876SPeter Zijlstra 2603a033eec9SBreno Leitaoconfig MITIGATION_SRSO 2604fb3bd914SBorislav Petkov (AMD) bool "Mitigate speculative RAS overflow on AMD" 26050911b8c5SBreno Leitao depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK 2606fb3bd914SBorislav Petkov (AMD) default y 2607fb3bd914SBorislav Petkov (AMD) help 2608fb3bd914SBorislav Petkov (AMD) Enable the SRSO mitigation needed on AMD Zen1-4 machines. 2609fb3bd914SBorislav Petkov (AMD) 26107b75782fSBreno Leitaoconfig MITIGATION_SLS 2611f43b9876SPeter Zijlstra bool "Mitigate Straight-Line-Speculation" 2612f43b9876SPeter Zijlstra depends on CC_HAS_SLS && X86_64 2613f43b9876SPeter Zijlstra select OBJTOOL if HAVE_OBJTOOL 2614f43b9876SPeter Zijlstra default n 2615f43b9876SPeter Zijlstra help 2616f43b9876SPeter Zijlstra Compile the kernel with straight-line-speculation options to guard 2617f43b9876SPeter Zijlstra against straight line speculation. The kernel image might be slightly 2618f43b9876SPeter Zijlstra larger. 2619f43b9876SPeter Zijlstra 2620225f2bd0SBreno Leitaoconfig MITIGATION_GDS 2621225f2bd0SBreno Leitao bool "Mitigate Gather Data Sampling" 2622225f2bd0SBreno Leitao depends on CPU_SUP_INTEL 2623225f2bd0SBreno Leitao default y 2624225f2bd0SBreno Leitao help 2625225f2bd0SBreno Leitao Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware 2626225f2bd0SBreno Leitao vulnerability which allows unprivileged speculative access to data 2627225f2bd0SBreno Leitao which was previously stored in vector registers. The attacker uses gather 2628225f2bd0SBreno Leitao instructions to infer the stale vector register data. 2629225f2bd0SBreno Leitao 26308076fcdeSPawan Guptaconfig MITIGATION_RFDS 26318076fcdeSPawan Gupta bool "RFDS Mitigation" 26328076fcdeSPawan Gupta depends on CPU_SUP_INTEL 26338076fcdeSPawan Gupta default y 26348076fcdeSPawan Gupta help 26358076fcdeSPawan Gupta Enable mitigation for Register File Data Sampling (RFDS) by default. 26368076fcdeSPawan Gupta RFDS is a hardware vulnerability which affects Intel Atom CPUs. It 26378076fcdeSPawan Gupta allows unprivileged speculative access to stale data previously 26388076fcdeSPawan Gupta stored in floating point, vector and integer registers. 26398076fcdeSPawan Gupta See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst> 26408076fcdeSPawan Gupta 26414f511739SJosh Poimboeufconfig MITIGATION_SPECTRE_BHI 26424f511739SJosh Poimboeuf bool "Mitigate Spectre-BHB (Branch History Injection)" 2643ec9404e4SPawan Gupta depends on CPU_SUP_INTEL 26444f511739SJosh Poimboeuf default y 2645ec9404e4SPawan Gupta help 2646ec9404e4SPawan Gupta Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks 2647ec9404e4SPawan Gupta where the branch history buffer is poisoned to speculatively steer 2648ec9404e4SPawan Gupta indirect branches. 2649ec9404e4SPawan Gupta See <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2650ec9404e4SPawan Gupta 265194045568SBreno Leitaoconfig MITIGATION_MDS 265294045568SBreno Leitao bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug" 265394045568SBreno Leitao depends on CPU_SUP_INTEL 265494045568SBreno Leitao default y 265594045568SBreno Leitao help 265694045568SBreno Leitao Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is 265794045568SBreno Leitao a hardware vulnerability which allows unprivileged speculative access 265894045568SBreno Leitao to data which is available in various CPU internal buffers. 265994045568SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/mds.rst> 2660b8da0b33SBreno Leitao 2661b8da0b33SBreno Leitaoconfig MITIGATION_TAA 2662b8da0b33SBreno Leitao bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug" 2663b8da0b33SBreno Leitao depends on CPU_SUP_INTEL 2664b8da0b33SBreno Leitao default y 2665b8da0b33SBreno Leitao help 2666b8da0b33SBreno Leitao Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware 2667b8da0b33SBreno Leitao vulnerability that allows unprivileged speculative access to data 2668b8da0b33SBreno Leitao which is available in various CPU internal buffers by using 2669b8da0b33SBreno Leitao asynchronous aborts within an Intel TSX transactional region. 2670b8da0b33SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst> 2671163f9fe6SBreno Leitao 2672163f9fe6SBreno Leitaoconfig MITIGATION_MMIO_STALE_DATA 2673163f9fe6SBreno Leitao bool "Mitigate MMIO Stale Data hardware bug" 2674163f9fe6SBreno Leitao depends on CPU_SUP_INTEL 2675163f9fe6SBreno Leitao default y 2676163f9fe6SBreno Leitao help 2677163f9fe6SBreno Leitao Enable mitigation for MMIO Stale Data hardware bugs. Processor MMIO 2678163f9fe6SBreno Leitao Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO) 2679163f9fe6SBreno Leitao vulnerabilities that can expose data. The vulnerabilities require the 2680163f9fe6SBreno Leitao attacker to have access to MMIO. 2681163f9fe6SBreno Leitao See also 2682163f9fe6SBreno Leitao <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst> 26833a4ee4ffSBreno Leitao 26843a4ee4ffSBreno Leitaoconfig MITIGATION_L1TF 26853a4ee4ffSBreno Leitao bool "Mitigate L1 Terminal Fault (L1TF) hardware bug" 26863a4ee4ffSBreno Leitao depends on CPU_SUP_INTEL 26873a4ee4ffSBreno Leitao default y 26883a4ee4ffSBreno Leitao help 26893a4ee4ffSBreno Leitao Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a 26903a4ee4ffSBreno Leitao hardware vulnerability which allows unprivileged speculative access to data 26913a4ee4ffSBreno Leitao available in the Level 1 Data Cache. 26923a4ee4ffSBreno Leitao See <file:Documentation/admin-guide/hw-vuln/l1tf.rst 2693894e2885SBreno Leitao 2694894e2885SBreno Leitaoconfig MITIGATION_RETBLEED 2695894e2885SBreno Leitao bool "Mitigate RETBleed hardware bug" 2696894e2885SBreno Leitao depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY 2697894e2885SBreno Leitao default y 2698894e2885SBreno Leitao help 2699894e2885SBreno Leitao Enable mitigation for RETBleed (Arbitrary Speculative Code Execution 2700894e2885SBreno Leitao with Return Instructions) vulnerability. RETBleed is a speculative 2701894e2885SBreno Leitao execution attack which takes advantage of microarchitectural behavior 2702894e2885SBreno Leitao in many modern microprocessors, similar to Spectre v2. An 2703894e2885SBreno Leitao unprivileged attacker can use these flaws to bypass conventional 2704894e2885SBreno Leitao memory security restrictions to gain read access to privileged memory 2705894e2885SBreno Leitao that would otherwise be inaccessible. 2706ca01c0d8SBreno Leitao 2707ca01c0d8SBreno Leitaoconfig MITIGATION_SPECTRE_V1 2708ca01c0d8SBreno Leitao bool "Mitigate SPECTRE V1 hardware bug" 2709ca01c0d8SBreno Leitao default y 2710ca01c0d8SBreno Leitao help 2711ca01c0d8SBreno Leitao Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a 2712ca01c0d8SBreno Leitao class of side channel attacks that takes advantage of speculative 2713ca01c0d8SBreno Leitao execution that bypasses conditional branch instructions used for 2714ca01c0d8SBreno Leitao memory access bounds check. 2715ca01c0d8SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 2716a0b02e3fSBreno Leitao 271772c70f48SBreno Leitaoconfig MITIGATION_SPECTRE_V2 271872c70f48SBreno Leitao bool "Mitigate SPECTRE V2 hardware bug" 271972c70f48SBreno Leitao default y 272072c70f48SBreno Leitao help 272172c70f48SBreno Leitao Enable mitigation for Spectre V2 (Branch Target Injection). Spectre 272272c70f48SBreno Leitao V2 is a class of side channel attacks that takes advantage of 272372c70f48SBreno Leitao indirect branch predictors inside the processor. In Spectre variant 2 272472c70f48SBreno Leitao attacks, the attacker can steer speculative indirect branches in the 272572c70f48SBreno Leitao victim to gadget code by poisoning the branch target buffer of a CPU 272672c70f48SBreno Leitao used for predicting indirect branch addresses. 272772c70f48SBreno Leitao See also <file:Documentation/admin-guide/hw-vuln/spectre.rst> 272872c70f48SBreno Leitao 2729a0b02e3fSBreno Leitaoconfig MITIGATION_SRBDS 2730a0b02e3fSBreno Leitao bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug" 2731a0b02e3fSBreno Leitao depends on CPU_SUP_INTEL 2732a0b02e3fSBreno Leitao default y 2733a0b02e3fSBreno Leitao help 2734a0b02e3fSBreno Leitao Enable mitigation for Special Register Buffer Data Sampling (SRBDS). 2735a0b02e3fSBreno Leitao SRBDS is a hardware vulnerability that allows Microarchitectural Data 2736a0b02e3fSBreno Leitao Sampling (MDS) techniques to infer values returned from special 2737a0b02e3fSBreno Leitao register accesses. An unprivileged user can extract values returned 2738a0b02e3fSBreno Leitao from RDRAND and RDSEED executed on another core or sibling thread 2739a0b02e3fSBreno Leitao using MDS techniques. 2740a0b02e3fSBreno Leitao See also 2741a0b02e3fSBreno Leitao <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst> 2742b908cdabSBreno Leitao 2743b908cdabSBreno Leitaoconfig MITIGATION_SSB 2744b908cdabSBreno Leitao bool "Mitigate Speculative Store Bypass (SSB) hardware bug" 2745b908cdabSBreno Leitao default y 2746b908cdabSBreno Leitao help 2747b908cdabSBreno Leitao Enable mitigation for Speculative Store Bypass (SSB). SSB is a 2748b908cdabSBreno Leitao hardware security vulnerability and its exploitation takes advantage 2749b908cdabSBreno Leitao of speculative execution in a similar way to the Meltdown and Spectre 2750b908cdabSBreno Leitao security vulnerabilities. 2751b908cdabSBreno Leitao 2752f43b9876SPeter Zijlstraendif 2753f43b9876SPeter Zijlstra 27543072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES 27553072e413SMichal Hocko def_bool y 27565c11f00bSDavid Hildenbrand depends on ARCH_ENABLE_MEMORY_HOTPLUG 27573072e413SMichal Hocko 2758da85f865SBjorn Helgaasmenu "Power management and ACPI options" 2759e279b6c1SSam Ravnborg 2760e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER 27613c2362e6SHarvey Harrison def_bool y 276244556530SZhimin Gu depends on HIBERNATION 2763e279b6c1SSam Ravnborg 2764e279b6c1SSam Ravnborgsource "kernel/power/Kconfig" 2765e279b6c1SSam Ravnborg 2766e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig" 2767e279b6c1SSam Ravnborg 2768a6b68076SAndi Kleenconfig X86_APM_BOOT 27696fc108a0SJan Beulich def_bool y 2770282e5aabSPaul Bolle depends on APM 2771a6b68076SAndi Kleen 2772e279b6c1SSam Ravnborgmenuconfig APM 2773e279b6c1SSam Ravnborg tristate "APM (Advanced Power Management) BIOS support" 2774efefa6f6SIngo Molnar depends on X86_32 && PM_SLEEP 2775a7f7f624SMasahiro Yamada help 2776e279b6c1SSam Ravnborg APM is a BIOS specification for saving power using several different 2777e279b6c1SSam Ravnborg techniques. This is mostly useful for battery powered laptops with 2778e279b6c1SSam Ravnborg APM compliant BIOSes. If you say Y here, the system time will be 2779e279b6c1SSam Ravnborg reset after a RESUME operation, the /proc/apm device will provide 2780e279b6c1SSam Ravnborg battery status information, and user-space programs will receive 2781e279b6c1SSam Ravnborg notification of APM "events" (e.g. battery status change). 2782e279b6c1SSam Ravnborg 2783e279b6c1SSam Ravnborg If you select "Y" here, you can disable actual use of the APM 2784e279b6c1SSam Ravnborg BIOS by passing the "apm=off" option to the kernel at boot time. 2785e279b6c1SSam Ravnborg 2786e279b6c1SSam Ravnborg Note that the APM support is almost completely disabled for 2787e279b6c1SSam Ravnborg machines with more than one CPU. 2788e279b6c1SSam Ravnborg 2789e279b6c1SSam Ravnborg In order to use APM, you will need supporting software. For location 2790151f4e2bSMauro Carvalho Chehab and more information, read <file:Documentation/power/apm-acpi.rst> 27912dc98fd3SMichael Witten and the Battery Powered Linux mini-HOWTO, available from 2792e279b6c1SSam Ravnborg <http://www.tldp.org/docs.html#howto>. 2793e279b6c1SSam Ravnborg 2794e279b6c1SSam Ravnborg This driver does not spin down disk drives (see the hdparm(8) 2795e279b6c1SSam Ravnborg manpage ("man 8 hdparm") for that), and it doesn't turn off 2796e279b6c1SSam Ravnborg VESA-compliant "green" monitors. 2797e279b6c1SSam Ravnborg 2798e279b6c1SSam Ravnborg This driver does not support the TI 4000M TravelMate and the ACER 2799e279b6c1SSam Ravnborg 486/DX4/75 because they don't have compliant BIOSes. Many "green" 2800e279b6c1SSam Ravnborg desktop machines also don't have compliant BIOSes, and this driver 2801e279b6c1SSam Ravnborg may cause those machines to panic during the boot phase. 2802e279b6c1SSam Ravnborg 2803e279b6c1SSam Ravnborg Generally, if you don't have a battery in your machine, there isn't 2804e279b6c1SSam Ravnborg much point in using this driver and you should say N. If you get 2805e279b6c1SSam Ravnborg random kernel OOPSes or reboots that don't seem to be related to 2806e279b6c1SSam Ravnborg anything, try disabling/enabling this option (or disabling/enabling 2807e279b6c1SSam Ravnborg APM in your BIOS). 2808e279b6c1SSam Ravnborg 2809e279b6c1SSam Ravnborg Some other things you should try when experiencing seemingly random, 2810e279b6c1SSam Ravnborg "weird" problems: 2811e279b6c1SSam Ravnborg 2812e279b6c1SSam Ravnborg 1) make sure that you have enough swap space and that it is 2813e279b6c1SSam Ravnborg enabled. 28147987448fSStephen Kitt 2) pass the "idle=poll" option to the kernel 2815e279b6c1SSam Ravnborg 3) switch on floating point emulation in the kernel and pass 2816e279b6c1SSam Ravnborg the "no387" option to the kernel 2817e279b6c1SSam Ravnborg 4) pass the "floppy=nodma" option to the kernel 2818e279b6c1SSam Ravnborg 5) pass the "mem=4M" option to the kernel (thereby disabling 2819e279b6c1SSam Ravnborg all but the first 4 MB of RAM) 2820e279b6c1SSam Ravnborg 6) make sure that the CPU is not over clocked. 2821e279b6c1SSam Ravnborg 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/> 2822e279b6c1SSam Ravnborg 8) disable the cache from your BIOS settings 2823e279b6c1SSam Ravnborg 9) install a fan for the video card or exchange video RAM 2824e279b6c1SSam Ravnborg 10) install a better fan for the CPU 2825e279b6c1SSam Ravnborg 11) exchange RAM chips 2826e279b6c1SSam Ravnborg 12) exchange the motherboard. 2827e279b6c1SSam Ravnborg 2828e279b6c1SSam Ravnborg To compile this driver as a module, choose M here: the 2829e279b6c1SSam Ravnborg module will be called apm. 2830e279b6c1SSam Ravnborg 2831e279b6c1SSam Ravnborgif APM 2832e279b6c1SSam Ravnborg 2833e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND 2834e279b6c1SSam Ravnborg bool "Ignore USER SUSPEND" 2835a7f7f624SMasahiro Yamada help 2836e279b6c1SSam Ravnborg This option will ignore USER SUSPEND requests. On machines with a 2837e279b6c1SSam Ravnborg compliant APM BIOS, you want to say N. However, on the NEC Versa M 2838e279b6c1SSam Ravnborg series notebooks, it is necessary to say Y because of a BIOS bug. 2839e279b6c1SSam Ravnborg 2840e279b6c1SSam Ravnborgconfig APM_DO_ENABLE 2841e279b6c1SSam Ravnborg bool "Enable PM at boot time" 2842a7f7f624SMasahiro Yamada help 2843e279b6c1SSam Ravnborg Enable APM features at boot time. From page 36 of the APM BIOS 2844e279b6c1SSam Ravnborg specification: "When disabled, the APM BIOS does not automatically 2845e279b6c1SSam Ravnborg power manage devices, enter the Standby State, enter the Suspend 2846e279b6c1SSam Ravnborg State, or take power saving steps in response to CPU Idle calls." 2847e279b6c1SSam Ravnborg This driver will make CPU Idle calls when Linux is idle (unless this 2848e279b6c1SSam Ravnborg feature is turned off -- see "Do CPU IDLE calls", below). This 2849e279b6c1SSam Ravnborg should always save battery power, but more complicated APM features 2850e279b6c1SSam Ravnborg will be dependent on your BIOS implementation. You may need to turn 2851e279b6c1SSam Ravnborg this option off if your computer hangs at boot time when using APM 2852e279b6c1SSam Ravnborg support, or if it beeps continuously instead of suspending. Turn 2853e279b6c1SSam Ravnborg this off if you have a NEC UltraLite Versa 33/C or a Toshiba 2854e279b6c1SSam Ravnborg T400CDT. This is off by default since most machines do fine without 2855e279b6c1SSam Ravnborg this feature. 2856e279b6c1SSam Ravnborg 2857e279b6c1SSam Ravnborgconfig APM_CPU_IDLE 2858dd8af076SLen Brown depends on CPU_IDLE 2859e279b6c1SSam Ravnborg bool "Make CPU Idle calls when idle" 2860a7f7f624SMasahiro Yamada help 2861e279b6c1SSam Ravnborg Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. 2862e279b6c1SSam Ravnborg On some machines, this can activate improved power savings, such as 2863e279b6c1SSam Ravnborg a slowed CPU clock rate, when the machine is idle. These idle calls 2864e279b6c1SSam Ravnborg are made after the idle loop has run for some length of time (e.g., 2865e279b6c1SSam Ravnborg 333 mS). On some machines, this will cause a hang at boot time or 2866e279b6c1SSam Ravnborg whenever the CPU becomes idle. (On machines with more than one CPU, 2867e279b6c1SSam Ravnborg this option does nothing.) 2868e279b6c1SSam Ravnborg 2869e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK 2870e279b6c1SSam Ravnborg bool "Enable console blanking using APM" 2871a7f7f624SMasahiro Yamada help 2872e279b6c1SSam Ravnborg Enable console blanking using the APM. Some laptops can use this to 2873e279b6c1SSam Ravnborg turn off the LCD backlight when the screen blanker of the Linux 2874e279b6c1SSam Ravnborg virtual console blanks the screen. Note that this is only used by 2875e279b6c1SSam Ravnborg the virtual console screen blanker, and won't turn off the backlight 2876e279b6c1SSam Ravnborg when using the X Window system. This also doesn't have anything to 2877e279b6c1SSam Ravnborg do with your VESA-compliant power-saving monitor. Further, this 2878e279b6c1SSam Ravnborg option doesn't work for all laptops -- it might not turn off your 2879e279b6c1SSam Ravnborg backlight at all, or it might print a lot of errors to the console, 2880e279b6c1SSam Ravnborg especially if you are using gpm. 2881e279b6c1SSam Ravnborg 2882e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS 2883e279b6c1SSam Ravnborg bool "Allow interrupts during APM BIOS calls" 2884a7f7f624SMasahiro Yamada help 2885e279b6c1SSam Ravnborg Normally we disable external interrupts while we are making calls to 2886e279b6c1SSam Ravnborg the APM BIOS as a measure to lessen the effects of a badly behaving 2887e279b6c1SSam Ravnborg BIOS implementation. The BIOS should reenable interrupts if it 2888e279b6c1SSam Ravnborg needs to. Unfortunately, some BIOSes do not -- especially those in 2889e279b6c1SSam Ravnborg many of the newer IBM Thinkpads. If you experience hangs when you 2890e279b6c1SSam Ravnborg suspend, try setting this to Y. Otherwise, say N. 2891e279b6c1SSam Ravnborg 2892e279b6c1SSam Ravnborgendif # APM 2893e279b6c1SSam Ravnborg 2894bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig" 2895e279b6c1SSam Ravnborg 2896e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig" 2897e279b6c1SSam Ravnborg 289827471fdbSAndy Henroidsource "drivers/idle/Kconfig" 289927471fdbSAndy Henroid 2900e279b6c1SSam Ravnborgendmenu 2901e279b6c1SSam Ravnborg 2902e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)" 2903e279b6c1SSam Ravnborg 2904e279b6c1SSam Ravnborgchoice 2905e279b6c1SSam Ravnborg prompt "PCI access mode" 2906efefa6f6SIngo Molnar depends on X86_32 && PCI 2907e279b6c1SSam Ravnborg default PCI_GOANY 2908a7f7f624SMasahiro Yamada help 2909e279b6c1SSam Ravnborg On PCI systems, the BIOS can be used to detect the PCI devices and 2910e279b6c1SSam Ravnborg determine their configuration. However, some old PCI motherboards 2911e279b6c1SSam Ravnborg have BIOS bugs and may crash if this is done. Also, some embedded 2912e279b6c1SSam Ravnborg PCI-based systems don't have any BIOS at all. Linux can also try to 2913e279b6c1SSam Ravnborg detect the PCI hardware directly without using the BIOS. 2914e279b6c1SSam Ravnborg 2915e279b6c1SSam Ravnborg With this option, you can specify how Linux should detect the 2916e279b6c1SSam Ravnborg PCI devices. If you choose "BIOS", the BIOS will be used, 2917e279b6c1SSam Ravnborg if you choose "Direct", the BIOS won't be used, and if you 2918e279b6c1SSam Ravnborg choose "MMConfig", then PCI Express MMCONFIG will be used. 2919e279b6c1SSam Ravnborg If you choose "Any", the kernel will try MMCONFIG, then the 2920e279b6c1SSam Ravnborg direct access method and falls back to the BIOS if that doesn't 2921e279b6c1SSam Ravnborg work. If unsure, go with the default, which is "Any". 2922e279b6c1SSam Ravnborg 2923e279b6c1SSam Ravnborgconfig PCI_GOBIOS 2924e279b6c1SSam Ravnborg bool "BIOS" 2925e279b6c1SSam Ravnborg 2926e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG 2927e279b6c1SSam Ravnborg bool "MMConfig" 2928e279b6c1SSam Ravnborg 2929e279b6c1SSam Ravnborgconfig PCI_GODIRECT 2930e279b6c1SSam Ravnborg bool "Direct" 2931e279b6c1SSam Ravnborg 29323ef0e1f8SAndres Salomonconfig PCI_GOOLPC 293376fb6570SDaniel Drake bool "OLPC XO-1" 29343ef0e1f8SAndres Salomon depends on OLPC 29353ef0e1f8SAndres Salomon 29362bdd1b03SAndres Salomonconfig PCI_GOANY 29372bdd1b03SAndres Salomon bool "Any" 29382bdd1b03SAndres Salomon 2939e279b6c1SSam Ravnborgendchoice 2940e279b6c1SSam Ravnborg 2941e279b6c1SSam Ravnborgconfig PCI_BIOS 29423c2362e6SHarvey Harrison def_bool y 2943efefa6f6SIngo Molnar depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY) 2944e279b6c1SSam Ravnborg 2945e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct. 2946e279b6c1SSam Ravnborgconfig PCI_DIRECT 29473c2362e6SHarvey Harrison def_bool y 29480aba496fSShaohua Li depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG)) 2949e279b6c1SSam Ravnborg 2950e279b6c1SSam Ravnborgconfig PCI_MMCONFIG 2951b45c9f36SJan Kiszka bool "Support mmconfig PCI config space access" if X86_64 2952b45c9f36SJan Kiszka default y 29534590d98fSAndy Shevchenko depends on PCI && (ACPI || JAILHOUSE_GUEST) 2954b45c9f36SJan Kiszka depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG) 2955e279b6c1SSam Ravnborg 29563ef0e1f8SAndres Salomonconfig PCI_OLPC 29572bdd1b03SAndres Salomon def_bool y 29582bdd1b03SAndres Salomon depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY) 29593ef0e1f8SAndres Salomon 2960b5401a96SAlex Nixonconfig PCI_XEN 2961b5401a96SAlex Nixon def_bool y 2962b5401a96SAlex Nixon depends on PCI && XEN 2963b5401a96SAlex Nixon 29648364e1f8SJan Kiszkaconfig MMCONF_FAM10H 29658364e1f8SJan Kiszka def_bool y 29668364e1f8SJan Kiszka depends on X86_64 && PCI_MMCONFIG && ACPI 2967e279b6c1SSam Ravnborg 29683f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK 29696a108a14SDavid Rientjes bool "Read CNB20LE Host Bridge Windows" if EXPERT 29706ea30386SKees Cook depends on PCI 29713f6ea84aSIra W. Snyder help 29723f6ea84aSIra W. Snyder Read the PCI windows out of the CNB20LE host bridge. This allows 29733f6ea84aSIra W. Snyder PCI hotplug to work on systems with the CNB20LE chipset which do 29743f6ea84aSIra W. Snyder not have ACPI. 29753f6ea84aSIra W. Snyder 297664a5fed6SBjorn Helgaas There's no public spec for this chipset, and this functionality 297764a5fed6SBjorn Helgaas is known to be incomplete. 297864a5fed6SBjorn Helgaas 297964a5fed6SBjorn Helgaas You should say N unless you know you need this. 298064a5fed6SBjorn Helgaas 29813a495511SWilliam Breathitt Grayconfig ISA_BUS 298217a2a129SWilliam Breathitt Gray bool "ISA bus support on modern systems" if EXPERT 29833a495511SWilliam Breathitt Gray help 298417a2a129SWilliam Breathitt Gray Expose ISA bus device drivers and options available for selection and 298517a2a129SWilliam Breathitt Gray configuration. Enable this option if your target machine has an ISA 298617a2a129SWilliam Breathitt Gray bus. ISA is an older system, displaced by PCI and newer bus 298717a2a129SWilliam Breathitt Gray architectures -- if your target machine is modern, it probably does 298817a2a129SWilliam Breathitt Gray not have an ISA bus. 29893a495511SWilliam Breathitt Gray 29903a495511SWilliam Breathitt Gray If unsure, say N. 29913a495511SWilliam Breathitt Gray 29921c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA. 2993e279b6c1SSam Ravnborgconfig ISA_DMA_API 29941c00f016SDavid Rientjes bool "ISA-style DMA support" if (X86_64 && EXPERT) 29951c00f016SDavid Rientjes default y 29961c00f016SDavid Rientjes help 29971c00f016SDavid Rientjes Enables ISA-style DMA support for devices requiring such controllers. 29981c00f016SDavid Rientjes If unsure, say Y. 2999e279b6c1SSam Ravnborg 300051e68d05SLinus Torvaldsif X86_32 300151e68d05SLinus Torvalds 3002e279b6c1SSam Ravnborgconfig ISA 3003e279b6c1SSam Ravnborg bool "ISA support" 3004a7f7f624SMasahiro Yamada help 3005e279b6c1SSam Ravnborg Find out whether you have ISA slots on your motherboard. ISA is the 3006e279b6c1SSam Ravnborg name of a bus system, i.e. the way the CPU talks to the other stuff 3007e279b6c1SSam Ravnborg inside your box. Other bus systems are PCI, EISA, MicroChannel 3008e279b6c1SSam Ravnborg (MCA) or VESA. ISA is an older system, now being displaced by PCI; 3009e279b6c1SSam Ravnborg newer boards don't support it. If you have ISA, say Y, otherwise N. 3010e279b6c1SSam Ravnborg 3011e279b6c1SSam Ravnborgconfig SCx200 3012e279b6c1SSam Ravnborg tristate "NatSemi SCx200 support" 3013a7f7f624SMasahiro Yamada help 3014e279b6c1SSam Ravnborg This provides basic support for National Semiconductor's 3015e279b6c1SSam Ravnborg (now AMD's) Geode processors. The driver probes for the 3016e279b6c1SSam Ravnborg PCI-IDs of several on-chip devices, so its a good dependency 3017e279b6c1SSam Ravnborg for other scx200_* drivers. 3018e279b6c1SSam Ravnborg 3019e279b6c1SSam Ravnborg If compiled as a module, the driver is named scx200. 3020e279b6c1SSam Ravnborg 3021e279b6c1SSam Ravnborgconfig SCx200HR_TIMER 3022e279b6c1SSam Ravnborg tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" 3023592913ecSJohn Stultz depends on SCx200 3024e279b6c1SSam Ravnborg default y 3025a7f7f624SMasahiro Yamada help 3026e279b6c1SSam Ravnborg This driver provides a clocksource built upon the on-chip 3027e279b6c1SSam Ravnborg 27MHz high-resolution timer. Its also a workaround for 3028e279b6c1SSam Ravnborg NSC Geode SC-1100's buggy TSC, which loses time when the 3029e279b6c1SSam Ravnborg processor goes idle (as is done by the scheduler). The 3030e279b6c1SSam Ravnborg other workaround is idle=poll boot option. 3031e279b6c1SSam Ravnborg 30323ef0e1f8SAndres Salomonconfig OLPC 30333ef0e1f8SAndres Salomon bool "One Laptop Per Child support" 303454008979SThomas Gleixner depends on !X86_PAE 30353c554946SAndres Salomon select GPIOLIB 3036dc3119e7SThomas Gleixner select OF 303745bb1674SDaniel Drake select OF_PROMTREE 3038b4e51854SGrant Likely select IRQ_DOMAIN 30390c3d931bSLubomir Rintel select OLPC_EC 3040a7f7f624SMasahiro Yamada help 30413ef0e1f8SAndres Salomon Add support for detecting the unique features of the OLPC 30423ef0e1f8SAndres Salomon XO hardware. 30433ef0e1f8SAndres Salomon 3044a3128588SDaniel Drakeconfig OLPC_XO1_PM 3045a3128588SDaniel Drake bool "OLPC XO-1 Power Management" 3046fa112cf1SBorislav Petkov depends on OLPC && MFD_CS5535=y && PM_SLEEP 3047a7f7f624SMasahiro Yamada help 304897c4cb71SDaniel Drake Add support for poweroff and suspend of the OLPC XO-1 laptop. 3049bf1ebf00SDaniel Drake 3050cfee9597SDaniel Drakeconfig OLPC_XO1_RTC 3051cfee9597SDaniel Drake bool "OLPC XO-1 Real Time Clock" 3052cfee9597SDaniel Drake depends on OLPC_XO1_PM && RTC_DRV_CMOS 3053a7f7f624SMasahiro Yamada help 3054cfee9597SDaniel Drake Add support for the XO-1 real time clock, which can be used as a 3055cfee9597SDaniel Drake programmable wakeup source. 3056cfee9597SDaniel Drake 30577feda8e9SDaniel Drakeconfig OLPC_XO1_SCI 30587feda8e9SDaniel Drake bool "OLPC XO-1 SCI extras" 305992e830f2SArnd Bergmann depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y 3060ed8e47feSRandy Dunlap depends on INPUT=y 3061d8d01a63SDaniel Drake select POWER_SUPPLY 3062a7f7f624SMasahiro Yamada help 30637feda8e9SDaniel Drake Add support for SCI-based features of the OLPC XO-1 laptop: 30647bc74b3dSDaniel Drake - EC-driven system wakeups 30657feda8e9SDaniel Drake - Power button 30667bc74b3dSDaniel Drake - Ebook switch 30672cf2baeaSDaniel Drake - Lid switch 3068e1040ac6SDaniel Drake - AC adapter status updates 3069e1040ac6SDaniel Drake - Battery status updates 30707feda8e9SDaniel Drake 3071a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI 3072a0f30f59SDaniel Drake bool "OLPC XO-1.5 SCI extras" 3073d8d01a63SDaniel Drake depends on OLPC && ACPI 3074d8d01a63SDaniel Drake select POWER_SUPPLY 3075a7f7f624SMasahiro Yamada help 3076a0f30f59SDaniel Drake Add support for SCI-based features of the OLPC XO-1.5 laptop: 3077a0f30f59SDaniel Drake - EC-driven system wakeups 3078a0f30f59SDaniel Drake - AC adapter status updates 3079a0f30f59SDaniel Drake - Battery status updates 3080e279b6c1SSam Ravnborg 3081298c9babSDmitry Torokhovconfig GEODE_COMMON 3082298c9babSDmitry Torokhov bool 3083298c9babSDmitry Torokhov 3084d4f3e350SEd Wildgooseconfig ALIX 3085d4f3e350SEd Wildgoose bool "PCEngines ALIX System Support (LED setup)" 3086d4f3e350SEd Wildgoose select GPIOLIB 3087298c9babSDmitry Torokhov select GEODE_COMMON 3088a7f7f624SMasahiro Yamada help 3089d4f3e350SEd Wildgoose This option enables system support for the PCEngines ALIX. 3090d4f3e350SEd Wildgoose At present this just sets up LEDs for GPIO control on 3091d4f3e350SEd Wildgoose ALIX2/3/6 boards. However, other system specific setup should 3092d4f3e350SEd Wildgoose get added here. 3093d4f3e350SEd Wildgoose 3094d4f3e350SEd Wildgoose Note: You must still enable the drivers for GPIO and LED support 3095d4f3e350SEd Wildgoose (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs 3096d4f3e350SEd Wildgoose 3097d4f3e350SEd Wildgoose Note: You have to set alix.force=1 for boards with Award BIOS. 3098d4f3e350SEd Wildgoose 3099da4e3302SPhilip Prindevilleconfig NET5501 3100da4e3302SPhilip Prindeville bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)" 3101da4e3302SPhilip Prindeville select GPIOLIB 3102298c9babSDmitry Torokhov select GEODE_COMMON 3103a7f7f624SMasahiro Yamada help 3104da4e3302SPhilip Prindeville This option enables system support for the Soekris Engineering net5501. 3105da4e3302SPhilip Prindeville 31063197059aSPhilip A. Prindevilleconfig GEOS 31073197059aSPhilip A. Prindeville bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)" 31083197059aSPhilip A. Prindeville select GPIOLIB 3109298c9babSDmitry Torokhov select GEODE_COMMON 31103197059aSPhilip A. Prindeville depends on DMI 3111a7f7f624SMasahiro Yamada help 31123197059aSPhilip A. Prindeville This option enables system support for the Traverse Technologies GEOS. 31133197059aSPhilip A. Prindeville 31147d029125SVivien Didelotconfig TS5500 31157d029125SVivien Didelot bool "Technologic Systems TS-5500 platform support" 31167d029125SVivien Didelot depends on MELAN 31177d029125SVivien Didelot select CHECK_SIGNATURE 31187d029125SVivien Didelot select NEW_LEDS 31197d029125SVivien Didelot select LEDS_CLASS 3120a7f7f624SMasahiro Yamada help 31217d029125SVivien Didelot This option enables system support for the Technologic Systems TS-5500. 31227d029125SVivien Didelot 3123e279b6c1SSam Ravnborgendif # X86_32 3124e279b6c1SSam Ravnborg 312523ac4ae8SAndreas Herrmannconfig AMD_NB 3126e279b6c1SSam Ravnborg def_bool y 3127e6e6e5e8SYazen Ghannam depends on AMD_NODE 3128e6e6e5e8SYazen Ghannam 3129e6e6e5e8SYazen Ghannamconfig AMD_NODE 3130e6e6e5e8SYazen Ghannam def_bool y 31310e152cd7SBorislav Petkov depends on CPU_SUP_AMD && PCI 3132e279b6c1SSam Ravnborg 3133e279b6c1SSam Ravnborgendmenu 3134e279b6c1SSam Ravnborg 31351572497cSChristoph Hellwigmenu "Binary Emulations" 3136e279b6c1SSam Ravnborg 3137e279b6c1SSam Ravnborgconfig IA32_EMULATION 3138e279b6c1SSam Ravnborg bool "IA32 Emulation" 3139e279b6c1SSam Ravnborg depends on X86_64 314039f88911SIngo Molnar select ARCH_WANT_OLD_COMPAT_IPC 3141d1603990SRandy Dunlap select BINFMT_ELF 314239f88911SIngo Molnar select COMPAT_OLD_SIGACTION 3143a7f7f624SMasahiro Yamada help 31445fd92e65SH. J. Lu Include code to run legacy 32-bit programs under a 31455fd92e65SH. J. Lu 64-bit kernel. You should likely turn this on, unless you're 31465fd92e65SH. J. Lu 100% sure that you don't have any 32-bit programs left. 3147e279b6c1SSam Ravnborg 3148a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED 3149a11e0975SNikolay Borisov bool "IA32 emulation disabled by default" 3150a11e0975SNikolay Borisov default n 3151a11e0975SNikolay Borisov depends on IA32_EMULATION 3152a11e0975SNikolay Borisov help 3153a11e0975SNikolay Borisov Make IA32 emulation disabled by default. This prevents loading 32-bit 3154a11e0975SNikolay Borisov processes and access to 32-bit syscalls. If unsure, leave it to its 3155a11e0975SNikolay Borisov default value. 3156a11e0975SNikolay Borisov 315783a44a4fSMasahiro Yamadaconfig X86_X32_ABI 31586ea30386SKees Cook bool "x32 ABI for 64-bit mode" 31599b54050bSBrian Gerst depends on X86_64 3160aaeed6ecSNathan Chancellor # llvm-objcopy does not convert x86_64 .note.gnu.property or 3161aaeed6ecSNathan Chancellor # compressed debug sections to x86_x32 properly: 3162aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/514 3163aaeed6ecSNathan Chancellor # https://github.com/ClangBuiltLinux/linux/issues/1141 3164aaeed6ecSNathan Chancellor depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm) 3165a7f7f624SMasahiro Yamada help 31665fd92e65SH. J. Lu Include code to run binaries for the x32 native 32-bit ABI 31675fd92e65SH. J. Lu for 64-bit processors. An x32 process gets access to the 31685fd92e65SH. J. Lu full 64-bit register file and wide data path while leaving 31695fd92e65SH. J. Lu pointers at 32 bits for smaller memory footprint. 31705fd92e65SH. J. Lu 3171953fee1dSIngo Molnarconfig COMPAT_32 3172953fee1dSIngo Molnar def_bool y 3173953fee1dSIngo Molnar depends on IA32_EMULATION || X86_32 3174953fee1dSIngo Molnar select HAVE_UID16 3175953fee1dSIngo Molnar select OLD_SIGSUSPEND3 3176953fee1dSIngo Molnar 3177e279b6c1SSam Ravnborgconfig COMPAT 31783c2362e6SHarvey Harrison def_bool y 317983a44a4fSMasahiro Yamada depends on IA32_EMULATION || X86_X32_ABI 3180e279b6c1SSam Ravnborg 3181e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT 31823120e25eSJan Beulich def_bool y 3183a9251280SLinus Torvalds depends on COMPAT 3184ee009e4aSDavid Howells 3185e279b6c1SSam Ravnborgendmenu 3186e279b6c1SSam Ravnborg 3187e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP 3188e5beae16SKeith Packard def_bool y 3189e5beae16SKeith Packard depends on X86_32 3190e5beae16SKeith Packard 3191edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig" 31925e8ebd84SJason A. Donenfeld 31935e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler" 3194