1# SPDX-License-Identifier: GPL-2.0 2config SUPERH 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_CPU_CACHE_ALIASING 6 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU 7 select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU 8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) 9 select ARCH_HAS_BINFMT_FLAT if !MMU 10 select ARCH_HAS_CPU_FINALIZE_INIT 11 select ARCH_HAS_CURRENT_STACK_POINTER 12 select ARCH_HAS_GIGANTIC_PAGE 13 select ARCH_HAS_GCOV_PROFILE_ALL 14 select ARCH_HAS_PTE_SPECIAL 15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 16 select ARCH_HIBERNATION_POSSIBLE if MMU 17 select ARCH_MIGHT_HAVE_PC_PARPORT 18 select ARCH_WANT_IPC_PARSE_VERSION 19 select CPU_NO_EFFICIENT_FFS 20 select DMA_DECLARE_COHERENT 21 select GENERIC_ATOMIC64 22 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST 23 select GENERIC_IDLE_POLL_SETUP 24 select GENERIC_IRQ_SHOW 25 select GENERIC_LIB_ASHLDI3 26 select GENERIC_LIB_ASHRDI3 27 select GENERIC_LIB_LSHRDI3 28 select GENERIC_PCI_IOMAP if PCI 29 select GENERIC_SCHED_CLOCK 30 select GENERIC_SMP_IDLE_THREAD 31 select GUP_GET_PXX_LOW_HIGH if X2TLB 32 select HAS_IOPORT if HAS_IOPORT_MAP 33 select GENERIC_IOREMAP if MMU 34 select HAVE_ARCH_AUDITSYSCALL 35 select HAVE_ARCH_KGDB 36 select HAVE_ARCH_SECCOMP_FILTER 37 select HAVE_ARCH_TRACEHOOK 38 select HAVE_DEBUG_BUGVERBOSE 39 select HAVE_DEBUG_KMEMLEAK 40 select HAVE_DYNAMIC_FTRACE 41 select HAVE_FAST_GUP if MMU 42 select HAVE_FUNCTION_GRAPH_TRACER 43 select HAVE_FUNCTION_TRACER 44 select HAVE_FTRACE_MCOUNT_RECORD 45 select HAVE_HW_BREAKPOINT 46 select HAVE_IOREMAP_PROT if MMU && !X2TLB 47 select HAVE_KERNEL_BZIP2 48 select HAVE_KERNEL_GZIP 49 select HAVE_KERNEL_LZMA 50 select HAVE_KERNEL_LZO 51 select HAVE_KERNEL_XZ 52 select HAVE_KPROBES 53 select HAVE_KRETPROBES 54 select HAVE_MIXED_BREAKPOINTS_REGS 55 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER 56 select HAVE_NMI 57 select HAVE_PATA_PLATFORM 58 select HAVE_PERF_EVENTS 59 select HAVE_REGS_AND_STACK_ACCESS_API 60 select HAVE_UID16 61 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS 62 select HAVE_STACKPROTECTOR 63 select HAVE_SYSCALL_TRACEPOINTS 64 select IRQ_FORCED_THREADING 65 select LOCK_MM_AND_FIND_VMA 66 select MODULES_USE_ELF_RELA 67 select NEED_SG_DMA_LENGTH 68 select NO_DMA if !MMU && !DMA_COHERENT 69 select NO_GENERIC_PCI_IOPORT_MAP if PCI 70 select OLD_SIGACTION 71 select OLD_SIGSUSPEND 72 select PCI_DOMAINS if PCI 73 select PERF_EVENTS 74 select PERF_USE_VMALLOC 75 select RTC_LIB 76 select SPARSE_IRQ 77 select TRACE_IRQFLAGS_SUPPORT 78 help 79 The SuperH is a RISC processor targeted for use in embedded systems 80 and consumer electronics; it was also used in the Sega Dreamcast 81 gaming console. The SuperH port has a home page at 82 <http://www.linux-sh.org/>. 83 84config GENERIC_BUG 85 def_bool y 86 depends on BUG 87 88config GENERIC_HWEIGHT 89 def_bool y 90 91config GENERIC_CALIBRATE_DELAY 92 bool 93 94config GENERIC_LOCKBREAK 95 def_bool y 96 depends on SMP && PREEMPTION 97 98config ARCH_SUSPEND_POSSIBLE 99 def_bool n 100 101config ARCH_HIBERNATION_POSSIBLE 102 def_bool n 103 104config SYS_SUPPORTS_APM_EMULATION 105 bool 106 select ARCH_SUSPEND_POSSIBLE 107 108config SYS_SUPPORTS_SMP 109 bool 110 111config SYS_SUPPORTS_NUMA 112 bool 113 114config STACKTRACE_SUPPORT 115 def_bool y 116 117config LOCKDEP_SUPPORT 118 def_bool y 119 120config ARCH_HAS_ILOG2_U32 121 def_bool n 122 123config ARCH_HAS_ILOG2_U64 124 def_bool n 125 126config NO_IOPORT_MAP 127 def_bool !PCI 128 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE 129 130config IO_TRAPPED 131 bool 132 133config SWAP_IO_SPACE 134 bool 135 136config DMA_COHERENT 137 bool 138 139config DMA_NONCOHERENT 140 def_bool !NO_DMA && !DMA_COHERENT 141 select ARCH_HAS_DMA_PREP_COHERENT 142 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 143 select DMA_DIRECT_REMAP 144 145config PGTABLE_LEVELS 146 default 3 if X2TLB 147 default 2 148 149menu "System type" 150 151# 152# Processor families 153# 154config CPU_SH2 155 bool 156 select SH_INTC 157 158config CPU_SH2A 159 bool 160 select CPU_SH2 161 select UNCACHED_MAPPING 162 163config CPU_J2 164 bool 165 select CPU_SH2 166 select OF 167 select OF_EARLY_FLATTREE 168 169config CPU_SH3 170 bool 171 select CPU_HAS_INTEVT 172 select CPU_HAS_SR_RB 173 select SH_INTC 174 select SYS_SUPPORTS_SH_TMU 175 176config CPU_SH4 177 bool 178 select ARCH_SUPPORTS_HUGETLBFS if MMU 179 select CPU_HAS_INTEVT 180 select CPU_HAS_SR_RB 181 select CPU_HAS_FPU if !CPU_SH4AL_DSP 182 select SH_INTC 183 select SYS_SUPPORTS_SH_TMU 184 185config CPU_SH4A 186 bool 187 select CPU_SH4 188 189config CPU_SH4AL_DSP 190 bool 191 select CPU_SH4A 192 select CPU_HAS_DSP 193 194config CPU_SHX2 195 bool 196 197config CPU_SHX3 198 bool 199 select DMA_COHERENT 200 select SYS_SUPPORTS_SMP 201 select SYS_SUPPORTS_NUMA 202 203config ARCH_SHMOBILE 204 bool 205 select ARCH_SUSPEND_POSSIBLE 206 select PM 207 208config CPU_HAS_PMU 209 depends on CPU_SH4 || CPU_SH4A 210 default y 211 bool 212 213choice 214 prompt "Processor sub-type selection" 215 216# 217# Processor subtypes 218# 219 220# SH-2 Processor Support 221 222config CPU_SUBTYPE_SH7619 223 bool "Support SH7619 processor" 224 select CPU_SH2 225 select SYS_SUPPORTS_SH_CMT 226 227config CPU_SUBTYPE_J2 228 bool "Support J2 processor" 229 select CPU_J2 230 select SYS_SUPPORTS_SMP 231 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 232 233# SH-2A Processor Support 234 235config CPU_SUBTYPE_SH7201 236 bool "Support SH7201 processor" 237 select CPU_SH2A 238 select CPU_HAS_FPU 239 select SYS_SUPPORTS_SH_MTU2 240 241config CPU_SUBTYPE_SH7203 242 bool "Support SH7203 processor" 243 select CPU_SH2A 244 select CPU_HAS_FPU 245 select SYS_SUPPORTS_SH_CMT 246 select SYS_SUPPORTS_SH_MTU2 247 select PINCTRL 248 249config CPU_SUBTYPE_SH7206 250 bool "Support SH7206 processor" 251 select CPU_SH2A 252 select SYS_SUPPORTS_SH_CMT 253 select SYS_SUPPORTS_SH_MTU2 254 255config CPU_SUBTYPE_SH7263 256 bool "Support SH7263 processor" 257 select CPU_SH2A 258 select CPU_HAS_FPU 259 select SYS_SUPPORTS_SH_CMT 260 select SYS_SUPPORTS_SH_MTU2 261 262config CPU_SUBTYPE_SH7264 263 bool "Support SH7264 processor" 264 select CPU_SH2A 265 select CPU_HAS_FPU 266 select SYS_SUPPORTS_SH_CMT 267 select SYS_SUPPORTS_SH_MTU2 268 select PINCTRL 269 270config CPU_SUBTYPE_SH7269 271 bool "Support SH7269 processor" 272 select CPU_SH2A 273 select CPU_HAS_FPU 274 select SYS_SUPPORTS_SH_CMT 275 select SYS_SUPPORTS_SH_MTU2 276 select PINCTRL 277 278config CPU_SUBTYPE_MXG 279 bool "Support MX-G processor" 280 select CPU_SH2A 281 select SYS_SUPPORTS_SH_MTU2 282 help 283 Select MX-G if running on an R8A03022BG part. 284 285# SH-3 Processor Support 286 287config CPU_SUBTYPE_SH7705 288 bool "Support SH7705 processor" 289 select CPU_SH3 290 291config CPU_SUBTYPE_SH7706 292 bool "Support SH7706 processor" 293 select CPU_SH3 294 help 295 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 296 297config CPU_SUBTYPE_SH7707 298 bool "Support SH7707 processor" 299 select CPU_SH3 300 help 301 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 302 303config CPU_SUBTYPE_SH7708 304 bool "Support SH7708 processor" 305 select CPU_SH3 306 help 307 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 308 if you have a 100 Mhz SH-3 HD6417708R CPU. 309 310config CPU_SUBTYPE_SH7709 311 bool "Support SH7709 processor" 312 select CPU_SH3 313 help 314 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 315 316config CPU_SUBTYPE_SH7710 317 bool "Support SH7710 processor" 318 select CPU_SH3 319 select CPU_HAS_DSP 320 help 321 Select SH7710 if you have a SH3-DSP SH7710 CPU. 322 323config CPU_SUBTYPE_SH7712 324 bool "Support SH7712 processor" 325 select CPU_SH3 326 select CPU_HAS_DSP 327 help 328 Select SH7712 if you have a SH3-DSP SH7712 CPU. 329 330config CPU_SUBTYPE_SH7720 331 bool "Support SH7720 processor" 332 select CPU_SH3 333 select CPU_HAS_DSP 334 select SYS_SUPPORTS_SH_CMT 335 select USB_OHCI_SH if USB_OHCI_HCD 336 select PINCTRL 337 help 338 Select SH7720 if you have a SH3-DSP SH7720 CPU. 339 340config CPU_SUBTYPE_SH7721 341 bool "Support SH7721 processor" 342 select CPU_SH3 343 select CPU_HAS_DSP 344 select SYS_SUPPORTS_SH_CMT 345 select USB_OHCI_SH if USB_OHCI_HCD 346 help 347 Select SH7721 if you have a SH3-DSP SH7721 CPU. 348 349# SH-4 Processor Support 350 351config CPU_SUBTYPE_SH7750 352 bool "Support SH7750 processor" 353 select CPU_SH4 354 help 355 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 356 357config CPU_SUBTYPE_SH7091 358 bool "Support SH7091 processor" 359 select CPU_SH4 360 help 361 Select SH7091 if you have an SH-4 based Sega device (such as 362 the Dreamcast, Naomi, and Naomi 2). 363 364config CPU_SUBTYPE_SH7750R 365 bool "Support SH7750R processor" 366 select CPU_SH4 367 368config CPU_SUBTYPE_SH7750S 369 bool "Support SH7750S processor" 370 select CPU_SH4 371 372config CPU_SUBTYPE_SH7751 373 bool "Support SH7751 processor" 374 select CPU_SH4 375 help 376 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 377 or if you have a HD6417751R CPU. 378 379config CPU_SUBTYPE_SH7751R 380 bool "Support SH7751R processor" 381 select CPU_SH4 382 383config CPU_SUBTYPE_SH7760 384 bool "Support SH7760 processor" 385 select CPU_SH4 386 387# SH-4A Processor Support 388 389config CPU_SUBTYPE_SH7723 390 bool "Support SH7723 processor" 391 select CPU_SH4A 392 select CPU_SHX2 393 select ARCH_SHMOBILE 394 select ARCH_SPARSEMEM_ENABLE 395 select SYS_SUPPORTS_SH_CMT 396 select PINCTRL 397 help 398 Select SH7723 if you have an SH-MobileR2 CPU. 399 400config CPU_SUBTYPE_SH7724 401 bool "Support SH7724 processor" 402 select CPU_SH4A 403 select CPU_SHX2 404 select ARCH_SHMOBILE 405 select ARCH_SPARSEMEM_ENABLE 406 select SYS_SUPPORTS_SH_CMT 407 select PINCTRL 408 help 409 Select SH7724 if you have an SH-MobileR2R CPU. 410 411config CPU_SUBTYPE_SH7734 412 bool "Support SH7734 processor" 413 select CPU_SH4A 414 select CPU_SHX2 415 select PINCTRL 416 help 417 Select SH7734 if you have a SH4A SH7734 CPU. 418 419config CPU_SUBTYPE_SH7757 420 bool "Support SH7757 processor" 421 select CPU_SH4A 422 select CPU_SHX2 423 select PINCTRL 424 help 425 Select SH7757 if you have a SH4A SH7757 CPU. 426 427config CPU_SUBTYPE_SH7763 428 bool "Support SH7763 processor" 429 select CPU_SH4A 430 select USB_OHCI_SH if USB_OHCI_HCD 431 help 432 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 433 434config CPU_SUBTYPE_SH7770 435 bool "Support SH7770 processor" 436 select CPU_SH4A 437 438config CPU_SUBTYPE_SH7780 439 bool "Support SH7780 processor" 440 select CPU_SH4A 441 442config CPU_SUBTYPE_SH7785 443 bool "Support SH7785 processor" 444 select CPU_SH4A 445 select CPU_SHX2 446 select ARCH_SPARSEMEM_ENABLE 447 select SYS_SUPPORTS_NUMA 448 select PINCTRL 449 450config CPU_SUBTYPE_SH7786 451 bool "Support SH7786 processor" 452 select CPU_SH4A 453 select CPU_SHX3 454 select CPU_HAS_PTEAEX 455 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 456 select USB_OHCI_SH if USB_OHCI_HCD 457 select USB_EHCI_SH if USB_EHCI_HCD 458 select PINCTRL 459 460config CPU_SUBTYPE_SHX3 461 bool "Support SH-X3 processor" 462 select CPU_SH4A 463 select CPU_SHX3 464 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 465 select GPIOLIB 466 select PINCTRL 467 468# SH4AL-DSP Processor Support 469 470config CPU_SUBTYPE_SH7343 471 bool "Support SH7343 processor" 472 select CPU_SH4AL_DSP 473 select ARCH_SHMOBILE 474 select SYS_SUPPORTS_SH_CMT 475 476config CPU_SUBTYPE_SH7722 477 bool "Support SH7722 processor" 478 select CPU_SH4AL_DSP 479 select CPU_SHX2 480 select ARCH_SHMOBILE 481 select ARCH_SPARSEMEM_ENABLE 482 select SYS_SUPPORTS_NUMA 483 select SYS_SUPPORTS_SH_CMT 484 select PINCTRL 485 486config CPU_SUBTYPE_SH7366 487 bool "Support SH7366 processor" 488 select CPU_SH4AL_DSP 489 select CPU_SHX2 490 select ARCH_SHMOBILE 491 select ARCH_SPARSEMEM_ENABLE 492 select SYS_SUPPORTS_NUMA 493 select SYS_SUPPORTS_SH_CMT 494 495endchoice 496 497source "arch/sh/mm/Kconfig" 498 499source "arch/sh/Kconfig.cpu" 500 501source "arch/sh/boards/Kconfig" 502 503menu "Timer and clock configuration" 504 505config SH_PCLK_FREQ 506 int "Peripheral clock frequency (in Hz)" 507 depends on SH_CLK_CPG_LEGACY 508 default "31250000" if CPU_SUBTYPE_SH7619 509 default "33333333" if CPU_SUBTYPE_SH7770 || \ 510 CPU_SUBTYPE_SH7760 || \ 511 CPU_SUBTYPE_SH7705 || \ 512 CPU_SUBTYPE_SH7203 || \ 513 CPU_SUBTYPE_SH7206 || \ 514 CPU_SUBTYPE_SH7263 || \ 515 CPU_SUBTYPE_MXG 516 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 517 default "50000000" 518 help 519 This option is used to specify the peripheral clock frequency. 520 This is necessary for determining the reference clock value on 521 platforms lacking an RTC. 522 523config SH_CLK_CPG 524 def_bool y 525 526config SH_CLK_CPG_LEGACY 527 depends on SH_CLK_CPG 528 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ 529 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ 530 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ 531 !CPU_SUBTYPE_SH7269 532 533endmenu 534 535menu "CPU Frequency scaling" 536source "drivers/cpufreq/Kconfig" 537endmenu 538 539source "arch/sh/drivers/Kconfig" 540 541endmenu 542 543menu "Kernel features" 544 545source "kernel/Kconfig.hz" 546 547config ARCH_SUPPORTS_KEXEC 548 def_bool MMU 549 550config ARCH_SUPPORTS_CRASH_DUMP 551 def_bool BROKEN_ON_SMP 552 553config ARCH_SUPPORTS_KEXEC_JUMP 554 def_bool y 555 556config PHYSICAL_START 557 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 558 default MEMORY_START 559 help 560 This gives the physical address where the kernel is loaded 561 and is ordinarily the same as MEMORY_START. 562 563 Different values are primarily used in the case of kexec on panic 564 where the fail safe kernel needs to run at a different address 565 than the panic-ed kernel. 566 567config SMP 568 bool "Symmetric multi-processing support" 569 depends on SYS_SUPPORTS_SMP 570 help 571 This enables support for systems with more than one CPU. If you have 572 a system with only one CPU, say N. If you have a system with more 573 than one CPU, say Y. 574 575 If you say N here, the kernel will run on uni- and multiprocessor 576 machines, but will use only one CPU of a multiprocessor machine. If 577 you say Y here, the kernel will run on many, but not all, 578 uniprocessor machines. On a uniprocessor machine, the kernel 579 will run faster if you say N here. 580 581 People using multiprocessor machines who say Y here should also say 582 Y to "Enhanced Real Time Clock Support", below. 583 584 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 585 available at <https://www.tldp.org/docs.html#howto>. 586 587 If you don't know what to do here, say N. 588 589config NR_CPUS 590 int "Maximum number of CPUs (2-32)" 591 range 2 32 592 depends on SMP 593 default "4" if CPU_SUBTYPE_SHX3 594 default "2" 595 help 596 This allows you to specify the maximum number of CPUs which this 597 kernel will support. The maximum supported value is 32 and the 598 minimum value which makes sense is 2. 599 600 This is purely to save memory - each supported CPU adds 601 approximately eight kilobytes to the kernel image. 602 603config HOTPLUG_CPU 604 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 605 depends on SMP 606 help 607 Say Y here to experiment with turning CPUs off and on. CPUs 608 can be controlled through /sys/devices/system/cpu. 609 610config GUSA 611 def_bool y 612 depends on !SMP 613 help 614 This enables support for gUSA (general UserSpace Atomicity). 615 This is the default implementation for both UP and non-ll/sc 616 CPUs, and is used by the libc, amongst others. 617 618 For additional information, design information can be found 619 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. 620 621 This should only be disabled for special cases where alternate 622 atomicity implementations exist. 623 624config GUSA_RB 625 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" 626 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) 627 help 628 Enabling this option will allow the kernel to implement some 629 atomic operations using a software implementation of load-locked/ 630 store-conditional (LLSC). On machines which do not have hardware 631 LLSC, this should be more efficient than the other alternative of 632 disabling interrupts around the atomic sequence. 633 634config HW_PERF_EVENTS 635 bool "Enable hardware performance counter support for perf events" 636 depends on PERF_EVENTS && CPU_HAS_PMU 637 default y 638 help 639 Enable hardware performance counter support for perf events. If 640 disabled, perf events will use software events only. 641 642source "drivers/sh/Kconfig" 643 644endmenu 645 646menu "Boot options" 647 648config USE_BUILTIN_DTB 649 bool "Use builtin DTB" 650 default n 651 depends on SH_DEVICE_TREE 652 help 653 Link a device tree blob for particular hardware into the kernel, 654 suppressing use of the DTB pointer provided by the bootloader. 655 This option should only be used with legacy bootloaders that are 656 not capable of providing a DTB to the kernel, or for experimental 657 hardware without stable device tree bindings. 658 659config BUILTIN_DTB_SOURCE 660 string "Source file for builtin DTB" 661 default "" 662 depends on USE_BUILTIN_DTB 663 help 664 Base name (without suffix, relative to arch/sh/boot/dts) for the 665 a DTS file that will be used to produce the DTB linked into the 666 kernel. 667 668config ZERO_PAGE_OFFSET 669 hex 670 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ 671 SH_7751_SOLUTION_ENGINE 672 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 673 default "0x00002000" if PAGE_SIZE_8KB 674 default "0x00001000" 675 help 676 This sets the default offset of zero page. 677 678config BOOT_LINK_OFFSET 679 hex 680 default "0x00210000" if SH_SHMIN 681 default "0x00810000" if SH_7780_SOLUTION_ENGINE 682 default "0x009e0000" if SH_TITAN 683 default "0x01800000" if SH_SDK7780 684 default "0x02000000" if SH_EDOSK7760 685 default "0x00800000" 686 help 687 This option allows you to set the link address offset of the zImage. 688 This can be useful if you are on a board which has a small amount of 689 memory. 690 691config ENTRY_OFFSET 692 hex 693 default "0x00001000" if PAGE_SIZE_4KB 694 default "0x00002000" if PAGE_SIZE_8KB 695 default "0x00004000" if PAGE_SIZE_16KB 696 default "0x00010000" if PAGE_SIZE_64KB 697 default "0x00000000" 698 699config ROMIMAGE_MMCIF 700 bool "Include MMCIF loader in romImage (EXPERIMENTAL)" 701 depends on CPU_SUBTYPE_SH7724 702 help 703 Say Y here to include experimental MMCIF loading code in 704 romImage. With this enabled it is possible to write the romImage 705 kernel image to an MMC card and boot the kernel straight from 706 the reset vector. At reset the processor Mask ROM will load the 707 first part of the romImage which in turn loads the rest the kernel 708 image to RAM using the MMCIF hardware block. 709 710choice 711 prompt "Kernel command line" 712 default CMDLINE_OVERWRITE 713 help 714 Setting this option allows the kernel command line arguments 715 to be set. 716 717config CMDLINE_OVERWRITE 718 bool "Overwrite bootloader kernel arguments" 719 help 720 Given string will overwrite any arguments passed in by 721 a bootloader. 722 723config CMDLINE_EXTEND 724 bool "Extend bootloader kernel arguments" 725 help 726 Given string will be concatenated with arguments passed in 727 by a bootloader. 728 729config CMDLINE_FROM_BOOTLOADER 730 bool "Use bootloader kernel arguments" 731 help 732 Uses the command-line options passed by the boot loader. 733 734endchoice 735 736config CMDLINE 737 string "Kernel command line arguments string" 738 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND 739 default "console=ttySC1,115200" 740 741endmenu 742 743menu "Bus options" 744 745config MAPLE 746 bool "Maple Bus support" 747 depends on SH_DREAMCAST 748 help 749 The Maple Bus is SEGA's serial communication bus for peripherals 750 on the Dreamcast. Without this bus support you won't be able to 751 get your Dreamcast keyboard etc to work, so most users 752 probably want to say 'Y' here, unless you are only using the 753 Dreamcast with a serial line terminal or a remote network 754 connection. 755 756endmenu 757 758menu "Power management options (EXPERIMENTAL)" 759 760source "kernel/power/Kconfig" 761 762source "drivers/cpuidle/Kconfig" 763 764endmenu 765