1# SPDX-License-Identifier: GPL-2.0 2config SUPERH 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_CPU_CACHE_ALIASING 6 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU 7 select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU 8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) 9 select ARCH_HAS_BINFMT_FLAT if !MMU 10 select ARCH_HAS_CPU_FINALIZE_INIT 11 select ARCH_HAS_CURRENT_STACK_POINTER 12 select ARCH_HAS_GIGANTIC_PAGE 13 select ARCH_HAS_GCOV_PROFILE_ALL 14 select ARCH_HAS_PTE_SPECIAL 15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 16 select ARCH_HIBERNATION_POSSIBLE if MMU 17 select ARCH_MIGHT_HAVE_PC_PARPORT 18 select ARCH_WANT_IPC_PARSE_VERSION 19 select CPU_NO_EFFICIENT_FFS 20 select DMA_DECLARE_COHERENT 21 select GENERIC_ATOMIC64 22 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST 23 select GENERIC_IDLE_POLL_SETUP 24 select GENERIC_IRQ_SHOW 25 select GENERIC_LIB_ASHLDI3 26 select GENERIC_LIB_ASHRDI3 27 select GENERIC_LIB_LSHRDI3 28 select GENERIC_PCI_IOMAP if PCI 29 select GENERIC_SCHED_CLOCK 30 select GENERIC_SMP_IDLE_THREAD 31 select GUP_GET_PXX_LOW_HIGH if X2TLB 32 select HAS_IOPORT if HAS_IOPORT_MAP 33 select GENERIC_IOREMAP if MMU 34 select HAVE_ARCH_AUDITSYSCALL 35 select HAVE_ARCH_KGDB 36 select HAVE_ARCH_SECCOMP_FILTER 37 select HAVE_ARCH_TRACEHOOK 38 select HAVE_DEBUG_BUGVERBOSE 39 select HAVE_DEBUG_KMEMLEAK 40 select HAVE_DYNAMIC_FTRACE 41 select HAVE_GUP_FAST if MMU 42 select HAVE_FUNCTION_GRAPH_TRACER 43 select HAVE_FUNCTION_TRACER 44 select HAVE_FTRACE_MCOUNT_RECORD 45 select HAVE_HW_BREAKPOINT 46 select HAVE_IOREMAP_PROT if MMU && !X2TLB 47 select HAVE_KERNEL_BZIP2 48 select HAVE_KERNEL_GZIP 49 select HAVE_KERNEL_LZMA 50 select HAVE_KERNEL_LZO 51 select HAVE_KERNEL_XZ 52 select HAVE_KPROBES 53 select HAVE_KRETPROBES 54 select HAVE_MIXED_BREAKPOINTS_REGS 55 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER 56 select HAVE_NMI 57 select HAVE_PATA_PLATFORM 58 select HAVE_PERF_EVENTS 59 select HAVE_REGS_AND_STACK_ACCESS_API 60 select HAVE_UID16 61 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS 62 select HAVE_STACKPROTECTOR 63 select HAVE_SYSCALL_TRACEPOINTS 64 select IRQ_FORCED_THREADING 65 select LOCK_MM_AND_FIND_VMA 66 select MODULES_USE_ELF_RELA 67 select NEED_SG_DMA_LENGTH 68 select NO_DMA if !MMU && !DMA_COHERENT 69 select NO_GENERIC_PCI_IOPORT_MAP if PCI 70 select OLD_SIGACTION 71 select OLD_SIGSUSPEND 72 select PCI_DOMAINS if PCI 73 select PERF_EVENTS 74 select PERF_USE_VMALLOC 75 select RTC_LIB 76 select SPARSE_IRQ 77 select TRACE_IRQFLAGS_SUPPORT 78 help 79 The SuperH is a RISC processor targeted for use in embedded systems 80 and consumer electronics; it was also used in the Sega Dreamcast 81 gaming console. The SuperH port has a home page at 82 <http://www.linux-sh.org/>. 83 84config GENERIC_BUG 85 def_bool y 86 depends on BUG 87 88config GENERIC_HWEIGHT 89 def_bool y 90 91config GENERIC_CALIBRATE_DELAY 92 bool 93 94config GENERIC_LOCKBREAK 95 def_bool y 96 depends on SMP && PREEMPTION 97 98config ARCH_SUSPEND_POSSIBLE 99 def_bool n 100 101config ARCH_HIBERNATION_POSSIBLE 102 def_bool n 103 104config SYS_SUPPORTS_APM_EMULATION 105 bool 106 select ARCH_SUSPEND_POSSIBLE 107 108config SYS_SUPPORTS_SMP 109 bool 110 111config SYS_SUPPORTS_NUMA 112 bool 113 114config STACKTRACE_SUPPORT 115 def_bool y 116 117config LOCKDEP_SUPPORT 118 def_bool y 119 120config ARCH_HAS_ILOG2_U32 121 def_bool n 122 123config ARCH_HAS_ILOG2_U64 124 def_bool n 125 126config NO_IOPORT_MAP 127 def_bool !PCI 128 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE && \ 129 !SH_DREAMCAST 130 131config IO_TRAPPED 132 bool 133 134config SWAP_IO_SPACE 135 bool 136 137config DMA_COHERENT 138 bool 139 140config DMA_NONCOHERENT 141 def_bool !NO_DMA && !DMA_COHERENT 142 select ARCH_HAS_DMA_PREP_COHERENT 143 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 144 select DMA_DIRECT_REMAP 145 146config PGTABLE_LEVELS 147 default 3 if X2TLB 148 default 2 149 150menu "System type" 151 152# 153# Processor families 154# 155config CPU_SH2 156 bool 157 select SH_INTC 158 159config CPU_SH2A 160 bool 161 select CPU_SH2 162 select UNCACHED_MAPPING 163 164config CPU_J2 165 bool 166 select CPU_SH2 167 select OF 168 select OF_EARLY_FLATTREE 169 170config CPU_SH3 171 bool 172 select CPU_HAS_INTEVT 173 select CPU_HAS_SR_RB 174 select SH_INTC 175 select SYS_SUPPORTS_SH_TMU 176 177config CPU_SH4 178 bool 179 select ARCH_SUPPORTS_HUGETLBFS if MMU 180 select CPU_HAS_INTEVT 181 select CPU_HAS_SR_RB 182 select CPU_HAS_FPU if !CPU_SH4AL_DSP 183 select SH_INTC 184 select SYS_SUPPORTS_SH_TMU 185 186config CPU_SH4A 187 bool 188 select CPU_SH4 189 190config CPU_SH4AL_DSP 191 bool 192 select CPU_SH4A 193 select CPU_HAS_DSP 194 195config CPU_SHX2 196 bool 197 198config CPU_SHX3 199 bool 200 select DMA_COHERENT 201 select SYS_SUPPORTS_SMP 202 select SYS_SUPPORTS_NUMA 203 204config ARCH_SHMOBILE 205 bool 206 select ARCH_SUSPEND_POSSIBLE 207 select PM 208 209config CPU_HAS_PMU 210 depends on CPU_SH4 || CPU_SH4A 211 default y 212 bool 213 214choice 215 prompt "Processor sub-type selection" 216 217# 218# Processor subtypes 219# 220 221# SH-2 Processor Support 222 223config CPU_SUBTYPE_SH7619 224 bool "Support SH7619 processor" 225 select CPU_SH2 226 select SYS_SUPPORTS_SH_CMT 227 228config CPU_SUBTYPE_J2 229 bool "Support J2 processor" 230 select CPU_J2 231 select SYS_SUPPORTS_SMP 232 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 233 234# SH-2A Processor Support 235 236config CPU_SUBTYPE_SH7201 237 bool "Support SH7201 processor" 238 select CPU_SH2A 239 select CPU_HAS_FPU 240 select SYS_SUPPORTS_SH_MTU2 241 242config CPU_SUBTYPE_SH7203 243 bool "Support SH7203 processor" 244 select CPU_SH2A 245 select CPU_HAS_FPU 246 select SYS_SUPPORTS_SH_CMT 247 select SYS_SUPPORTS_SH_MTU2 248 select PINCTRL 249 250config CPU_SUBTYPE_SH7206 251 bool "Support SH7206 processor" 252 select CPU_SH2A 253 select SYS_SUPPORTS_SH_CMT 254 select SYS_SUPPORTS_SH_MTU2 255 256config CPU_SUBTYPE_SH7263 257 bool "Support SH7263 processor" 258 select CPU_SH2A 259 select CPU_HAS_FPU 260 select SYS_SUPPORTS_SH_CMT 261 select SYS_SUPPORTS_SH_MTU2 262 263config CPU_SUBTYPE_SH7264 264 bool "Support SH7264 processor" 265 select CPU_SH2A 266 select CPU_HAS_FPU 267 select SYS_SUPPORTS_SH_CMT 268 select SYS_SUPPORTS_SH_MTU2 269 select PINCTRL 270 271config CPU_SUBTYPE_SH7269 272 bool "Support SH7269 processor" 273 select CPU_SH2A 274 select CPU_HAS_FPU 275 select SYS_SUPPORTS_SH_CMT 276 select SYS_SUPPORTS_SH_MTU2 277 select PINCTRL 278 279config CPU_SUBTYPE_MXG 280 bool "Support MX-G processor" 281 select CPU_SH2A 282 select SYS_SUPPORTS_SH_MTU2 283 help 284 Select MX-G if running on an R8A03022BG part. 285 286# SH-3 Processor Support 287 288config CPU_SUBTYPE_SH7705 289 bool "Support SH7705 processor" 290 select CPU_SH3 291 292config CPU_SUBTYPE_SH7706 293 bool "Support SH7706 processor" 294 select CPU_SH3 295 help 296 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 297 298config CPU_SUBTYPE_SH7707 299 bool "Support SH7707 processor" 300 select CPU_SH3 301 help 302 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 303 304config CPU_SUBTYPE_SH7708 305 bool "Support SH7708 processor" 306 select CPU_SH3 307 help 308 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 309 if you have a 100 Mhz SH-3 HD6417708R CPU. 310 311config CPU_SUBTYPE_SH7709 312 bool "Support SH7709 processor" 313 select CPU_SH3 314 help 315 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 316 317config CPU_SUBTYPE_SH7710 318 bool "Support SH7710 processor" 319 select CPU_SH3 320 select CPU_HAS_DSP 321 help 322 Select SH7710 if you have a SH3-DSP SH7710 CPU. 323 324config CPU_SUBTYPE_SH7712 325 bool "Support SH7712 processor" 326 select CPU_SH3 327 select CPU_HAS_DSP 328 help 329 Select SH7712 if you have a SH3-DSP SH7712 CPU. 330 331config CPU_SUBTYPE_SH7720 332 bool "Support SH7720 processor" 333 select CPU_SH3 334 select CPU_HAS_DSP 335 select SYS_SUPPORTS_SH_CMT 336 select USB_OHCI_SH if USB_OHCI_HCD 337 select PINCTRL 338 help 339 Select SH7720 if you have a SH3-DSP SH7720 CPU. 340 341config CPU_SUBTYPE_SH7721 342 bool "Support SH7721 processor" 343 select CPU_SH3 344 select CPU_HAS_DSP 345 select SYS_SUPPORTS_SH_CMT 346 select USB_OHCI_SH if USB_OHCI_HCD 347 help 348 Select SH7721 if you have a SH3-DSP SH7721 CPU. 349 350# SH-4 Processor Support 351 352config CPU_SUBTYPE_SH7750 353 bool "Support SH7750 processor" 354 select CPU_SH4 355 help 356 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 357 358config CPU_SUBTYPE_SH7091 359 bool "Support SH7091 processor" 360 select CPU_SH4 361 help 362 Select SH7091 if you have an SH-4 based Sega device (such as 363 the Dreamcast, Naomi, and Naomi 2). 364 365config CPU_SUBTYPE_SH7750R 366 bool "Support SH7750R processor" 367 select CPU_SH4 368 369config CPU_SUBTYPE_SH7750S 370 bool "Support SH7750S processor" 371 select CPU_SH4 372 373config CPU_SUBTYPE_SH7751 374 bool "Support SH7751 processor" 375 select CPU_SH4 376 help 377 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 378 or if you have a HD6417751R CPU. 379 380config CPU_SUBTYPE_SH7751R 381 bool "Support SH7751R processor" 382 select CPU_SH4 383 384config CPU_SUBTYPE_SH7760 385 bool "Support SH7760 processor" 386 select CPU_SH4 387 388# SH-4A Processor Support 389 390config CPU_SUBTYPE_SH7723 391 bool "Support SH7723 processor" 392 select CPU_SH4A 393 select CPU_SHX2 394 select ARCH_SHMOBILE 395 select ARCH_SPARSEMEM_ENABLE 396 select SYS_SUPPORTS_SH_CMT 397 select PINCTRL 398 help 399 Select SH7723 if you have an SH-MobileR2 CPU. 400 401config CPU_SUBTYPE_SH7724 402 bool "Support SH7724 processor" 403 select CPU_SH4A 404 select CPU_SHX2 405 select ARCH_SHMOBILE 406 select ARCH_SPARSEMEM_ENABLE 407 select SYS_SUPPORTS_SH_CMT 408 select PINCTRL 409 help 410 Select SH7724 if you have an SH-MobileR2R CPU. 411 412config CPU_SUBTYPE_SH7734 413 bool "Support SH7734 processor" 414 select CPU_SH4A 415 select CPU_SHX2 416 select PINCTRL 417 help 418 Select SH7734 if you have a SH4A SH7734 CPU. 419 420config CPU_SUBTYPE_SH7757 421 bool "Support SH7757 processor" 422 select CPU_SH4A 423 select CPU_SHX2 424 select PINCTRL 425 help 426 Select SH7757 if you have a SH4A SH7757 CPU. 427 428config CPU_SUBTYPE_SH7763 429 bool "Support SH7763 processor" 430 select CPU_SH4A 431 select USB_OHCI_SH if USB_OHCI_HCD 432 help 433 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 434 435config CPU_SUBTYPE_SH7770 436 bool "Support SH7770 processor" 437 select CPU_SH4A 438 439config CPU_SUBTYPE_SH7780 440 bool "Support SH7780 processor" 441 select CPU_SH4A 442 443config CPU_SUBTYPE_SH7785 444 bool "Support SH7785 processor" 445 select CPU_SH4A 446 select CPU_SHX2 447 select ARCH_SPARSEMEM_ENABLE 448 select SYS_SUPPORTS_NUMA 449 select PINCTRL 450 451config CPU_SUBTYPE_SH7786 452 bool "Support SH7786 processor" 453 select CPU_SH4A 454 select CPU_SHX3 455 select CPU_HAS_PTEAEX 456 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 457 select USB_OHCI_SH if USB_OHCI_HCD 458 select USB_EHCI_SH if USB_EHCI_HCD 459 select PINCTRL 460 461config CPU_SUBTYPE_SHX3 462 bool "Support SH-X3 processor" 463 select CPU_SH4A 464 select CPU_SHX3 465 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 466 select GPIOLIB 467 select PINCTRL 468 469# SH4AL-DSP Processor Support 470 471config CPU_SUBTYPE_SH7343 472 bool "Support SH7343 processor" 473 select CPU_SH4AL_DSP 474 select ARCH_SHMOBILE 475 select SYS_SUPPORTS_SH_CMT 476 477config CPU_SUBTYPE_SH7722 478 bool "Support SH7722 processor" 479 select CPU_SH4AL_DSP 480 select CPU_SHX2 481 select ARCH_SHMOBILE 482 select ARCH_SPARSEMEM_ENABLE 483 select SYS_SUPPORTS_NUMA 484 select SYS_SUPPORTS_SH_CMT 485 select PINCTRL 486 487config CPU_SUBTYPE_SH7366 488 bool "Support SH7366 processor" 489 select CPU_SH4AL_DSP 490 select CPU_SHX2 491 select ARCH_SHMOBILE 492 select ARCH_SPARSEMEM_ENABLE 493 select SYS_SUPPORTS_NUMA 494 select SYS_SUPPORTS_SH_CMT 495 496endchoice 497 498source "arch/sh/mm/Kconfig" 499 500source "arch/sh/Kconfig.cpu" 501 502source "arch/sh/boards/Kconfig" 503 504menu "Timer and clock configuration" 505 506config SH_PCLK_FREQ 507 int "Peripheral clock frequency (in Hz)" 508 depends on SH_CLK_CPG_LEGACY 509 default "31250000" if CPU_SUBTYPE_SH7619 510 default "33333333" if CPU_SUBTYPE_SH7770 || \ 511 CPU_SUBTYPE_SH7760 || \ 512 CPU_SUBTYPE_SH7705 || \ 513 CPU_SUBTYPE_SH7203 || \ 514 CPU_SUBTYPE_SH7206 || \ 515 CPU_SUBTYPE_SH7263 || \ 516 CPU_SUBTYPE_MXG 517 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 518 default "50000000" 519 help 520 This option is used to specify the peripheral clock frequency. 521 This is necessary for determining the reference clock value on 522 platforms lacking an RTC. 523 524config SH_CLK_CPG 525 def_bool y 526 527config SH_CLK_CPG_LEGACY 528 depends on SH_CLK_CPG 529 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ 530 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ 531 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ 532 !CPU_SUBTYPE_SH7269 533 534endmenu 535 536menu "CPU Frequency scaling" 537source "drivers/cpufreq/Kconfig" 538endmenu 539 540source "arch/sh/drivers/Kconfig" 541 542endmenu 543 544menu "Kernel features" 545 546source "kernel/Kconfig.hz" 547 548config ARCH_SUPPORTS_KEXEC 549 def_bool MMU 550 551config ARCH_SUPPORTS_CRASH_DUMP 552 def_bool BROKEN_ON_SMP 553 554config ARCH_SUPPORTS_KEXEC_JUMP 555 def_bool y 556 557config PHYSICAL_START 558 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 559 default MEMORY_START 560 help 561 This gives the physical address where the kernel is loaded 562 and is ordinarily the same as MEMORY_START. 563 564 Different values are primarily used in the case of kexec on panic 565 where the fail safe kernel needs to run at a different address 566 than the panic-ed kernel. 567 568config SMP 569 bool "Symmetric multi-processing support" 570 depends on SYS_SUPPORTS_SMP 571 help 572 This enables support for systems with more than one CPU. If you have 573 a system with only one CPU, say N. If you have a system with more 574 than one CPU, say Y. 575 576 If you say N here, the kernel will run on uni- and multiprocessor 577 machines, but will use only one CPU of a multiprocessor machine. If 578 you say Y here, the kernel will run on many, but not all, 579 uniprocessor machines. On a uniprocessor machine, the kernel 580 will run faster if you say N here. 581 582 People using multiprocessor machines who say Y here should also say 583 Y to "Enhanced Real Time Clock Support", below. 584 585 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 586 available at <https://www.tldp.org/docs.html#howto>. 587 588 If you don't know what to do here, say N. 589 590config NR_CPUS 591 int "Maximum number of CPUs (2-32)" 592 range 2 32 593 depends on SMP 594 default "4" if CPU_SUBTYPE_SHX3 595 default "2" 596 help 597 This allows you to specify the maximum number of CPUs which this 598 kernel will support. The maximum supported value is 32 and the 599 minimum value which makes sense is 2. 600 601 This is purely to save memory - each supported CPU adds 602 approximately eight kilobytes to the kernel image. 603 604config HOTPLUG_CPU 605 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 606 depends on SMP 607 help 608 Say Y here to experiment with turning CPUs off and on. CPUs 609 can be controlled through /sys/devices/system/cpu. 610 611config GUSA 612 def_bool y 613 depends on !SMP 614 help 615 This enables support for gUSA (general UserSpace Atomicity). 616 This is the default implementation for both UP and non-ll/sc 617 CPUs, and is used by the libc, amongst others. 618 619 For additional information, design information can be found 620 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. 621 622 This should only be disabled for special cases where alternate 623 atomicity implementations exist. 624 625config GUSA_RB 626 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" 627 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) 628 help 629 Enabling this option will allow the kernel to implement some 630 atomic operations using a software implementation of load-locked/ 631 store-conditional (LLSC). On machines which do not have hardware 632 LLSC, this should be more efficient than the other alternative of 633 disabling interrupts around the atomic sequence. 634 635config HW_PERF_EVENTS 636 bool "Enable hardware performance counter support for perf events" 637 depends on PERF_EVENTS && CPU_HAS_PMU 638 default y 639 help 640 Enable hardware performance counter support for perf events. If 641 disabled, perf events will use software events only. 642 643source "drivers/sh/Kconfig" 644 645endmenu 646 647menu "Boot options" 648 649config USE_BUILTIN_DTB 650 bool "Use builtin DTB" 651 default n 652 depends on SH_DEVICE_TREE 653 help 654 Link a device tree blob for particular hardware into the kernel, 655 suppressing use of the DTB pointer provided by the bootloader. 656 This option should only be used with legacy bootloaders that are 657 not capable of providing a DTB to the kernel, or for experimental 658 hardware without stable device tree bindings. 659 660config BUILTIN_DTB_SOURCE 661 string "Source file for builtin DTB" 662 default "" 663 depends on USE_BUILTIN_DTB 664 help 665 Base name (without suffix, relative to arch/sh/boot/dts) for the 666 a DTS file that will be used to produce the DTB linked into the 667 kernel. 668 669config ZERO_PAGE_OFFSET 670 hex 671 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ 672 SH_7751_SOLUTION_ENGINE 673 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 674 default "0x00002000" if PAGE_SIZE_8KB 675 default "0x00001000" 676 help 677 This sets the default offset of zero page. 678 679config BOOT_LINK_OFFSET 680 hex 681 default "0x00210000" if SH_SHMIN 682 default "0x00810000" if SH_7780_SOLUTION_ENGINE 683 default "0x009e0000" if SH_TITAN 684 default "0x01800000" if SH_SDK7780 685 default "0x02000000" if SH_EDOSK7760 686 default "0x00800000" 687 help 688 This option allows you to set the link address offset of the zImage. 689 This can be useful if you are on a board which has a small amount of 690 memory. 691 692config ENTRY_OFFSET 693 hex 694 default "0x00001000" if PAGE_SIZE_4KB 695 default "0x00002000" if PAGE_SIZE_8KB 696 default "0x00004000" if PAGE_SIZE_16KB 697 default "0x00010000" if PAGE_SIZE_64KB 698 default "0x00000000" 699 700config ROMIMAGE_MMCIF 701 bool "Include MMCIF loader in romImage (EXPERIMENTAL)" 702 depends on CPU_SUBTYPE_SH7724 703 help 704 Say Y here to include experimental MMCIF loading code in 705 romImage. With this enabled it is possible to write the romImage 706 kernel image to an MMC card and boot the kernel straight from 707 the reset vector. At reset the processor Mask ROM will load the 708 first part of the romImage which in turn loads the rest the kernel 709 image to RAM using the MMCIF hardware block. 710 711choice 712 prompt "Kernel command line" 713 default CMDLINE_OVERWRITE 714 help 715 Setting this option allows the kernel command line arguments 716 to be set. 717 718config CMDLINE_OVERWRITE 719 bool "Overwrite bootloader kernel arguments" 720 help 721 Given string will overwrite any arguments passed in by 722 a bootloader. 723 724config CMDLINE_EXTEND 725 bool "Extend bootloader kernel arguments" 726 help 727 Given string will be concatenated with arguments passed in 728 by a bootloader. 729 730config CMDLINE_FROM_BOOTLOADER 731 bool "Use bootloader kernel arguments" 732 help 733 Uses the command-line options passed by the boot loader. 734 735endchoice 736 737config CMDLINE 738 string "Kernel command line arguments string" 739 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND 740 default "console=ttySC1,115200" 741 742endmenu 743 744menu "Bus options" 745 746config MAPLE 747 bool "Maple Bus support" 748 depends on SH_DREAMCAST 749 help 750 The Maple Bus is SEGA's serial communication bus for peripherals 751 on the Dreamcast. Without this bus support you won't be able to 752 get your Dreamcast keyboard etc to work, so most users 753 probably want to say 'Y' here, unless you are only using the 754 Dreamcast with a serial line terminal or a remote network 755 connection. 756 757endmenu 758 759menu "Power management options (EXPERIMENTAL)" 760 761source "kernel/power/Kconfig" 762 763source "drivers/cpuidle/Kconfig" 764 765endmenu 766