1# SPDX-License-Identifier: GPL-2.0 2config SUPERH 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAVE_CUSTOM_GPIO_H 6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) 7 select ARCH_HAS_BINFMT_FLAT if !MMU 8 select ARCH_HAS_GIGANTIC_PAGE 9 select ARCH_HAS_GCOV_PROFILE_ALL 10 select ARCH_HAS_PTE_SPECIAL 11 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 12 select ARCH_HIBERNATION_POSSIBLE if MMU 13 select ARCH_MIGHT_HAVE_PC_PARPORT 14 select ARCH_WANT_IPC_PARSE_VERSION 15 select CLKDEV_LOOKUP 16 select CPU_NO_EFFICIENT_FFS 17 select DMA_DECLARE_COHERENT 18 select GENERIC_ATOMIC64 19 select GENERIC_CLOCKEVENTS 20 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST 21 select GENERIC_IDLE_POLL_SETUP 22 select GENERIC_IRQ_SHOW 23 select GENERIC_PCI_IOMAP if PCI 24 select GENERIC_SCHED_CLOCK 25 select GENERIC_STRNCPY_FROM_USER 26 select GENERIC_STRNLEN_USER 27 select GENERIC_SMP_IDLE_THREAD 28 select GUP_GET_PTE_LOW_HIGH if X2TLB 29 select HAVE_ARCH_AUDITSYSCALL 30 select HAVE_ARCH_KGDB 31 select HAVE_ARCH_SECCOMP_FILTER 32 select HAVE_ARCH_TRACEHOOK 33 select HAVE_COPY_THREAD_TLS 34 select HAVE_DEBUG_BUGVERBOSE 35 select HAVE_DEBUG_KMEMLEAK 36 select HAVE_DYNAMIC_FTRACE 37 select HAVE_FAST_GUP if MMU 38 select HAVE_FUNCTION_GRAPH_TRACER 39 select HAVE_FUNCTION_TRACER 40 select HAVE_FUTEX_CMPXCHG if FUTEX 41 select HAVE_FTRACE_MCOUNT_RECORD 42 select HAVE_HW_BREAKPOINT 43 select HAVE_IDE if HAS_IOPORT_MAP 44 select HAVE_IOREMAP_PROT if MMU && !X2TLB 45 select HAVE_KERNEL_BZIP2 46 select HAVE_KERNEL_GZIP 47 select HAVE_KERNEL_LZMA 48 select HAVE_KERNEL_LZO 49 select HAVE_KERNEL_XZ 50 select HAVE_KPROBES 51 select HAVE_KRETPROBES 52 select HAVE_MIXED_BREAKPOINTS_REGS 53 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER 54 select HAVE_NMI 55 select HAVE_OPROFILE 56 select HAVE_PATA_PLATFORM 57 select HAVE_PERF_EVENTS 58 select HAVE_REGS_AND_STACK_ACCESS_API 59 select HAVE_UID16 60 select HAVE_STACKPROTECTOR 61 select HAVE_SYSCALL_TRACEPOINTS 62 select IRQ_FORCED_THREADING 63 select MAY_HAVE_SPARSE_IRQ 64 select MODULES_USE_ELF_RELA 65 select NEED_SG_DMA_LENGTH 66 select NO_DMA if !MMU && !DMA_COHERENT 67 select NO_GENERIC_PCI_IOPORT_MAP if PCI 68 select OLD_SIGACTION 69 select OLD_SIGSUSPEND 70 select PCI_DOMAINS if PCI 71 select PERF_EVENTS 72 select PERF_USE_VMALLOC 73 select RTC_LIB 74 select SPARSE_IRQ 75 help 76 The SuperH is a RISC processor targeted for use in embedded systems 77 and consumer electronics; it was also used in the Sega Dreamcast 78 gaming console. The SuperH port has a home page at 79 <http://www.linux-sh.org/>. 80 81config GENERIC_BUG 82 def_bool y 83 depends on BUG 84 85config GENERIC_HWEIGHT 86 def_bool y 87 88config GENERIC_CALIBRATE_DELAY 89 bool 90 91config GENERIC_LOCKBREAK 92 def_bool y 93 depends on SMP && PREEMPTION 94 95config ARCH_SUSPEND_POSSIBLE 96 def_bool n 97 98config ARCH_HIBERNATION_POSSIBLE 99 def_bool n 100 101config SYS_SUPPORTS_APM_EMULATION 102 bool 103 select ARCH_SUSPEND_POSSIBLE 104 105config SYS_SUPPORTS_HUGETLBFS 106 bool 107 108config SYS_SUPPORTS_SMP 109 bool 110 111config SYS_SUPPORTS_NUMA 112 bool 113 114config STACKTRACE_SUPPORT 115 def_bool y 116 117config LOCKDEP_SUPPORT 118 def_bool y 119 120config ARCH_HAS_ILOG2_U32 121 def_bool n 122 123config ARCH_HAS_ILOG2_U64 124 def_bool n 125 126config NO_IOPORT_MAP 127 def_bool !PCI 128 depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \ 129 !SH_SOLUTION_ENGINE 130 131config IO_TRAPPED 132 bool 133 134config SWAP_IO_SPACE 135 bool 136 137config DMA_COHERENT 138 bool 139 140config DMA_NONCOHERENT 141 def_bool !NO_DMA && !DMA_COHERENT 142 select ARCH_HAS_DMA_PREP_COHERENT 143 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 144 select DMA_DIRECT_REMAP 145 146config PGTABLE_LEVELS 147 default 3 if X2TLB 148 default 2 149 150menu "System type" 151 152# 153# Processor families 154# 155config CPU_SH2 156 bool 157 select SH_INTC 158 159config CPU_SH2A 160 bool 161 select CPU_SH2 162 select UNCACHED_MAPPING 163 164config CPU_J2 165 bool 166 select CPU_SH2 167 select OF 168 select OF_EARLY_FLATTREE 169 170config CPU_SH3 171 bool 172 select CPU_HAS_INTEVT 173 select CPU_HAS_SR_RB 174 select SH_INTC 175 select SYS_SUPPORTS_SH_TMU 176 177config CPU_SH4 178 bool 179 select CPU_HAS_INTEVT 180 select CPU_HAS_SR_RB 181 select CPU_HAS_FPU if !CPU_SH4AL_DSP 182 select SH_INTC 183 select SYS_SUPPORTS_SH_TMU 184 select SYS_SUPPORTS_HUGETLBFS if MMU 185 186config CPU_SH4A 187 bool 188 select CPU_SH4 189 190config CPU_SH4AL_DSP 191 bool 192 select CPU_SH4A 193 select CPU_HAS_DSP 194 195config CPU_SHX2 196 bool 197 198config CPU_SHX3 199 bool 200 select DMA_COHERENT 201 select SYS_SUPPORTS_SMP 202 select SYS_SUPPORTS_NUMA 203 204config ARCH_SHMOBILE 205 bool 206 select ARCH_SUSPEND_POSSIBLE 207 select PM 208 209config CPU_HAS_PMU 210 depends on CPU_SH4 || CPU_SH4A 211 default y 212 bool 213 214choice 215 prompt "Processor sub-type selection" 216 217# 218# Processor subtypes 219# 220 221# SH-2 Processor Support 222 223config CPU_SUBTYPE_SH7619 224 bool "Support SH7619 processor" 225 select CPU_SH2 226 select SYS_SUPPORTS_SH_CMT 227 228config CPU_SUBTYPE_J2 229 bool "Support J2 processor" 230 select CPU_J2 231 select SYS_SUPPORTS_SMP 232 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 233 234# SH-2A Processor Support 235 236config CPU_SUBTYPE_SH7201 237 bool "Support SH7201 processor" 238 select CPU_SH2A 239 select CPU_HAS_FPU 240 select SYS_SUPPORTS_SH_MTU2 241 242config CPU_SUBTYPE_SH7203 243 bool "Support SH7203 processor" 244 select CPU_SH2A 245 select CPU_HAS_FPU 246 select SYS_SUPPORTS_SH_CMT 247 select SYS_SUPPORTS_SH_MTU2 248 select PINCTRL 249 250config CPU_SUBTYPE_SH7206 251 bool "Support SH7206 processor" 252 select CPU_SH2A 253 select SYS_SUPPORTS_SH_CMT 254 select SYS_SUPPORTS_SH_MTU2 255 256config CPU_SUBTYPE_SH7263 257 bool "Support SH7263 processor" 258 select CPU_SH2A 259 select CPU_HAS_FPU 260 select SYS_SUPPORTS_SH_CMT 261 select SYS_SUPPORTS_SH_MTU2 262 263config CPU_SUBTYPE_SH7264 264 bool "Support SH7264 processor" 265 select CPU_SH2A 266 select CPU_HAS_FPU 267 select SYS_SUPPORTS_SH_CMT 268 select SYS_SUPPORTS_SH_MTU2 269 select PINCTRL 270 271config CPU_SUBTYPE_SH7269 272 bool "Support SH7269 processor" 273 select CPU_SH2A 274 select CPU_HAS_FPU 275 select SYS_SUPPORTS_SH_CMT 276 select SYS_SUPPORTS_SH_MTU2 277 select PINCTRL 278 279config CPU_SUBTYPE_MXG 280 bool "Support MX-G processor" 281 select CPU_SH2A 282 select SYS_SUPPORTS_SH_MTU2 283 help 284 Select MX-G if running on an R8A03022BG part. 285 286# SH-3 Processor Support 287 288config CPU_SUBTYPE_SH7705 289 bool "Support SH7705 processor" 290 select CPU_SH3 291 292config CPU_SUBTYPE_SH7706 293 bool "Support SH7706 processor" 294 select CPU_SH3 295 help 296 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 297 298config CPU_SUBTYPE_SH7707 299 bool "Support SH7707 processor" 300 select CPU_SH3 301 help 302 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 303 304config CPU_SUBTYPE_SH7708 305 bool "Support SH7708 processor" 306 select CPU_SH3 307 help 308 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 309 if you have a 100 Mhz SH-3 HD6417708R CPU. 310 311config CPU_SUBTYPE_SH7709 312 bool "Support SH7709 processor" 313 select CPU_SH3 314 help 315 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 316 317config CPU_SUBTYPE_SH7710 318 bool "Support SH7710 processor" 319 select CPU_SH3 320 select CPU_HAS_DSP 321 help 322 Select SH7710 if you have a SH3-DSP SH7710 CPU. 323 324config CPU_SUBTYPE_SH7712 325 bool "Support SH7712 processor" 326 select CPU_SH3 327 select CPU_HAS_DSP 328 help 329 Select SH7712 if you have a SH3-DSP SH7712 CPU. 330 331config CPU_SUBTYPE_SH7720 332 bool "Support SH7720 processor" 333 select CPU_SH3 334 select CPU_HAS_DSP 335 select SYS_SUPPORTS_SH_CMT 336 select USB_OHCI_SH if USB_OHCI_HCD 337 select PINCTRL 338 help 339 Select SH7720 if you have a SH3-DSP SH7720 CPU. 340 341config CPU_SUBTYPE_SH7721 342 bool "Support SH7721 processor" 343 select CPU_SH3 344 select CPU_HAS_DSP 345 select SYS_SUPPORTS_SH_CMT 346 select USB_OHCI_SH if USB_OHCI_HCD 347 help 348 Select SH7721 if you have a SH3-DSP SH7721 CPU. 349 350# SH-4 Processor Support 351 352config CPU_SUBTYPE_SH7750 353 bool "Support SH7750 processor" 354 select CPU_SH4 355 help 356 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 357 358config CPU_SUBTYPE_SH7091 359 bool "Support SH7091 processor" 360 select CPU_SH4 361 help 362 Select SH7091 if you have an SH-4 based Sega device (such as 363 the Dreamcast, Naomi, and Naomi 2). 364 365config CPU_SUBTYPE_SH7750R 366 bool "Support SH7750R processor" 367 select CPU_SH4 368 369config CPU_SUBTYPE_SH7750S 370 bool "Support SH7750S processor" 371 select CPU_SH4 372 373config CPU_SUBTYPE_SH7751 374 bool "Support SH7751 processor" 375 select CPU_SH4 376 help 377 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 378 or if you have a HD6417751R CPU. 379 380config CPU_SUBTYPE_SH7751R 381 bool "Support SH7751R processor" 382 select CPU_SH4 383 384config CPU_SUBTYPE_SH7760 385 bool "Support SH7760 processor" 386 select CPU_SH4 387 388config CPU_SUBTYPE_SH4_202 389 bool "Support SH4-202 processor" 390 select CPU_SH4 391 392# SH-4A Processor Support 393 394config CPU_SUBTYPE_SH7723 395 bool "Support SH7723 processor" 396 select CPU_SH4A 397 select CPU_SHX2 398 select ARCH_SHMOBILE 399 select ARCH_SPARSEMEM_ENABLE 400 select SYS_SUPPORTS_SH_CMT 401 select PINCTRL 402 help 403 Select SH7723 if you have an SH-MobileR2 CPU. 404 405config CPU_SUBTYPE_SH7724 406 bool "Support SH7724 processor" 407 select CPU_SH4A 408 select CPU_SHX2 409 select ARCH_SHMOBILE 410 select ARCH_SPARSEMEM_ENABLE 411 select SYS_SUPPORTS_SH_CMT 412 select PINCTRL 413 help 414 Select SH7724 if you have an SH-MobileR2R CPU. 415 416config CPU_SUBTYPE_SH7734 417 bool "Support SH7734 processor" 418 select CPU_SH4A 419 select CPU_SHX2 420 select PINCTRL 421 help 422 Select SH7734 if you have a SH4A SH7734 CPU. 423 424config CPU_SUBTYPE_SH7757 425 bool "Support SH7757 processor" 426 select CPU_SH4A 427 select CPU_SHX2 428 select PINCTRL 429 help 430 Select SH7757 if you have a SH4A SH7757 CPU. 431 432config CPU_SUBTYPE_SH7763 433 bool "Support SH7763 processor" 434 select CPU_SH4A 435 select USB_OHCI_SH if USB_OHCI_HCD 436 help 437 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 438 439config CPU_SUBTYPE_SH7770 440 bool "Support SH7770 processor" 441 select CPU_SH4A 442 443config CPU_SUBTYPE_SH7780 444 bool "Support SH7780 processor" 445 select CPU_SH4A 446 447config CPU_SUBTYPE_SH7785 448 bool "Support SH7785 processor" 449 select CPU_SH4A 450 select CPU_SHX2 451 select ARCH_SPARSEMEM_ENABLE 452 select SYS_SUPPORTS_NUMA 453 select PINCTRL 454 455config CPU_SUBTYPE_SH7786 456 bool "Support SH7786 processor" 457 select CPU_SH4A 458 select CPU_SHX3 459 select CPU_HAS_PTEAEX 460 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 461 select USB_OHCI_SH if USB_OHCI_HCD 462 select USB_EHCI_SH if USB_EHCI_HCD 463 select PINCTRL 464 465config CPU_SUBTYPE_SHX3 466 bool "Support SH-X3 processor" 467 select CPU_SH4A 468 select CPU_SHX3 469 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 470 select GPIOLIB 471 select PINCTRL 472 473# SH4AL-DSP Processor Support 474 475config CPU_SUBTYPE_SH7343 476 bool "Support SH7343 processor" 477 select CPU_SH4AL_DSP 478 select ARCH_SHMOBILE 479 select SYS_SUPPORTS_SH_CMT 480 481config CPU_SUBTYPE_SH7722 482 bool "Support SH7722 processor" 483 select CPU_SH4AL_DSP 484 select CPU_SHX2 485 select ARCH_SHMOBILE 486 select ARCH_SPARSEMEM_ENABLE 487 select SYS_SUPPORTS_NUMA 488 select SYS_SUPPORTS_SH_CMT 489 select PINCTRL 490 491config CPU_SUBTYPE_SH7366 492 bool "Support SH7366 processor" 493 select CPU_SH4AL_DSP 494 select CPU_SHX2 495 select ARCH_SHMOBILE 496 select ARCH_SPARSEMEM_ENABLE 497 select SYS_SUPPORTS_NUMA 498 select SYS_SUPPORTS_SH_CMT 499 500endchoice 501 502source "arch/sh/mm/Kconfig" 503 504source "arch/sh/Kconfig.cpu" 505 506source "arch/sh/boards/Kconfig" 507 508menu "Timer and clock configuration" 509 510config SH_PCLK_FREQ 511 int "Peripheral clock frequency (in Hz)" 512 depends on SH_CLK_CPG_LEGACY 513 default "31250000" if CPU_SUBTYPE_SH7619 514 default "33333333" if CPU_SUBTYPE_SH7770 || \ 515 CPU_SUBTYPE_SH7760 || \ 516 CPU_SUBTYPE_SH7705 || \ 517 CPU_SUBTYPE_SH7203 || \ 518 CPU_SUBTYPE_SH7206 || \ 519 CPU_SUBTYPE_SH7263 || \ 520 CPU_SUBTYPE_MXG 521 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 522 default "66000000" if CPU_SUBTYPE_SH4_202 523 default "50000000" 524 help 525 This option is used to specify the peripheral clock frequency. 526 This is necessary for determining the reference clock value on 527 platforms lacking an RTC. 528 529config SH_CLK_CPG 530 def_bool y 531 532config SH_CLK_CPG_LEGACY 533 depends on SH_CLK_CPG 534 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ 535 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ 536 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ 537 !CPU_SUBTYPE_SH7269 538 539endmenu 540 541menu "CPU Frequency scaling" 542source "drivers/cpufreq/Kconfig" 543endmenu 544 545source "arch/sh/drivers/Kconfig" 546 547endmenu 548 549menu "Kernel features" 550 551source "kernel/Kconfig.hz" 552 553config KEXEC 554 bool "kexec system call (EXPERIMENTAL)" 555 depends on MMU 556 select KEXEC_CORE 557 help 558 kexec is a system call that implements the ability to shutdown your 559 current kernel, and to start another kernel. It is like a reboot 560 but it is independent of the system firmware. And like a reboot 561 you can start any kernel with it, not just Linux. 562 563 The name comes from the similarity to the exec system call. 564 565 It is an ongoing process to be certain the hardware in a machine 566 is properly shutdown, so do not be surprised if this code does not 567 initially work for you. As of this writing the exact hardware 568 interface is strongly in flux, so no good recommendation can be 569 made. 570 571config CRASH_DUMP 572 bool "kernel crash dumps (EXPERIMENTAL)" 573 depends on BROKEN_ON_SMP 574 help 575 Generate crash dump after being started by kexec. 576 This should be normally only set in special crash dump kernels 577 which are loaded in the main kernel with kexec-tools into 578 a specially reserved region and then later executed after 579 a crash by kdump/kexec. The crash dump kernel must be compiled 580 to a memory address not used by the main kernel using 581 PHYSICAL_START. 582 583 For more details see Documentation/admin-guide/kdump/kdump.rst 584 585config KEXEC_JUMP 586 bool "kexec jump (EXPERIMENTAL)" 587 depends on KEXEC && HIBERNATION 588 help 589 Jump between original kernel and kexeced kernel and invoke 590 code via KEXEC 591 592config PHYSICAL_START 593 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 594 default MEMORY_START 595 help 596 This gives the physical address where the kernel is loaded 597 and is ordinarily the same as MEMORY_START. 598 599 Different values are primarily used in the case of kexec on panic 600 where the fail safe kernel needs to run at a different address 601 than the panic-ed kernel. 602 603config SECCOMP 604 bool "Enable seccomp to safely compute untrusted bytecode" 605 depends on PROC_FS 606 help 607 This kernel feature is useful for number crunching applications 608 that may need to compute untrusted bytecode during their 609 execution. By using pipes or other transports made available to 610 the process as file descriptors supporting the read/write 611 syscalls, it's possible to isolate those applications in 612 their own address space using seccomp. Once seccomp is 613 enabled via prctl, it cannot be disabled and the task is only 614 allowed to execute a few safe syscalls defined by each seccomp 615 mode. 616 617 If unsure, say N. 618 619config SMP 620 bool "Symmetric multi-processing support" 621 depends on SYS_SUPPORTS_SMP 622 help 623 This enables support for systems with more than one CPU. If you have 624 a system with only one CPU, say N. If you have a system with more 625 than one CPU, say Y. 626 627 If you say N here, the kernel will run on uni- and multiprocessor 628 machines, but will use only one CPU of a multiprocessor machine. If 629 you say Y here, the kernel will run on many, but not all, 630 uniprocessor machines. On a uniprocessor machine, the kernel 631 will run faster if you say N here. 632 633 People using multiprocessor machines who say Y here should also say 634 Y to "Enhanced Real Time Clock Support", below. 635 636 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 637 available at <https://www.tldp.org/docs.html#howto>. 638 639 If you don't know what to do here, say N. 640 641config NR_CPUS 642 int "Maximum number of CPUs (2-32)" 643 range 2 32 644 depends on SMP 645 default "4" if CPU_SUBTYPE_SHX3 646 default "2" 647 help 648 This allows you to specify the maximum number of CPUs which this 649 kernel will support. The maximum supported value is 32 and the 650 minimum value which makes sense is 2. 651 652 This is purely to save memory - each supported CPU adds 653 approximately eight kilobytes to the kernel image. 654 655config HOTPLUG_CPU 656 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 657 depends on SMP 658 help 659 Say Y here to experiment with turning CPUs off and on. CPUs 660 can be controlled through /sys/devices/system/cpu. 661 662config GUSA 663 def_bool y 664 depends on !SMP 665 help 666 This enables support for gUSA (general UserSpace Atomicity). 667 This is the default implementation for both UP and non-ll/sc 668 CPUs, and is used by the libc, amongst others. 669 670 For additional information, design information can be found 671 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. 672 673 This should only be disabled for special cases where alternate 674 atomicity implementations exist. 675 676config GUSA_RB 677 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" 678 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) 679 help 680 Enabling this option will allow the kernel to implement some 681 atomic operations using a software implementation of load-locked/ 682 store-conditional (LLSC). On machines which do not have hardware 683 LLSC, this should be more efficient than the other alternative of 684 disabling interrupts around the atomic sequence. 685 686config HW_PERF_EVENTS 687 bool "Enable hardware performance counter support for perf events" 688 depends on PERF_EVENTS && CPU_HAS_PMU 689 default y 690 help 691 Enable hardware performance counter support for perf events. If 692 disabled, perf events will use software events only. 693 694source "drivers/sh/Kconfig" 695 696endmenu 697 698menu "Boot options" 699 700config USE_BUILTIN_DTB 701 bool "Use builtin DTB" 702 default n 703 depends on SH_DEVICE_TREE 704 help 705 Link a device tree blob for particular hardware into the kernel, 706 suppressing use of the DTB pointer provided by the bootloader. 707 This option should only be used with legacy bootloaders that are 708 not capable of providing a DTB to the kernel, or for experimental 709 hardware without stable device tree bindings. 710 711config BUILTIN_DTB_SOURCE 712 string "Source file for builtin DTB" 713 default "" 714 depends on USE_BUILTIN_DTB 715 help 716 Base name (without suffix, relative to arch/sh/boot/dts) for the 717 a DTS file that will be used to produce the DTB linked into the 718 kernel. 719 720config ZERO_PAGE_OFFSET 721 hex 722 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ 723 SH_7751_SOLUTION_ENGINE 724 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 725 default "0x00002000" if PAGE_SIZE_8KB 726 default "0x00001000" 727 help 728 This sets the default offset of zero page. 729 730config BOOT_LINK_OFFSET 731 hex 732 default "0x00210000" if SH_SHMIN 733 default "0x00810000" if SH_7780_SOLUTION_ENGINE 734 default "0x009e0000" if SH_TITAN 735 default "0x01800000" if SH_SDK7780 736 default "0x02000000" if SH_EDOSK7760 737 default "0x00800000" 738 help 739 This option allows you to set the link address offset of the zImage. 740 This can be useful if you are on a board which has a small amount of 741 memory. 742 743config ENTRY_OFFSET 744 hex 745 default "0x00001000" if PAGE_SIZE_4KB 746 default "0x00002000" if PAGE_SIZE_8KB 747 default "0x00004000" if PAGE_SIZE_16KB 748 default "0x00010000" if PAGE_SIZE_64KB 749 default "0x00000000" 750 751config ROMIMAGE_MMCIF 752 bool "Include MMCIF loader in romImage (EXPERIMENTAL)" 753 depends on CPU_SUBTYPE_SH7724 754 help 755 Say Y here to include experimental MMCIF loading code in 756 romImage. With this enabled it is possible to write the romImage 757 kernel image to an MMC card and boot the kernel straight from 758 the reset vector. At reset the processor Mask ROM will load the 759 first part of the romImage which in turn loads the rest the kernel 760 image to RAM using the MMCIF hardware block. 761 762choice 763 prompt "Kernel command line" 764 optional 765 default CMDLINE_OVERWRITE 766 help 767 Setting this option allows the kernel command line arguments 768 to be set. 769 770config CMDLINE_OVERWRITE 771 bool "Overwrite bootloader kernel arguments" 772 help 773 Given string will overwrite any arguments passed in by 774 a bootloader. 775 776config CMDLINE_EXTEND 777 bool "Extend bootloader kernel arguments" 778 help 779 Given string will be concatenated with arguments passed in 780 by a bootloader. 781 782endchoice 783 784config CMDLINE 785 string "Kernel command line arguments string" 786 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND 787 default "console=ttySC1,115200" 788 789endmenu 790 791menu "Bus options" 792 793config SUPERHYWAY 794 tristate "SuperHyway Bus support" 795 depends on CPU_SUBTYPE_SH4_202 796 797config MAPLE 798 bool "Maple Bus support" 799 depends on SH_DREAMCAST 800 help 801 The Maple Bus is SEGA's serial communication bus for peripherals 802 on the Dreamcast. Without this bus support you won't be able to 803 get your Dreamcast keyboard etc to work, so most users 804 probably want to say 'Y' here, unless you are only using the 805 Dreamcast with a serial line terminal or a remote network 806 connection. 807 808endmenu 809 810menu "Power management options (EXPERIMENTAL)" 811 812source "kernel/power/Kconfig" 813 814source "drivers/cpuidle/Kconfig" 815 816endmenu 817