1# SPDX-License-Identifier: GPL-2.0 2config SUPERH 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_CPU_CACHE_ALIASING 6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) 7 select ARCH_HAS_BINFMT_FLAT if !MMU 8 select ARCH_HAS_CPU_FINALIZE_INIT 9 select ARCH_HAS_CURRENT_STACK_POINTER 10 select ARCH_HAS_GIGANTIC_PAGE 11 select ARCH_HAS_GCOV_PROFILE_ALL 12 select ARCH_HAS_PTE_SPECIAL 13 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 14 select ARCH_HIBERNATION_POSSIBLE if MMU 15 select ARCH_MIGHT_HAVE_PC_PARPORT 16 select ARCH_WANT_IPC_PARSE_VERSION 17 select ARCH_NEED_CMPXCHG_1_EMU 18 select CPU_NO_EFFICIENT_FFS 19 select DMA_DECLARE_COHERENT 20 select GENERIC_ATOMIC64 21 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST 22 select GENERIC_IDLE_POLL_SETUP 23 select GENERIC_IRQ_SHOW 24 select GENERIC_LIB_ASHLDI3 25 select GENERIC_LIB_ASHRDI3 26 select GENERIC_LIB_LSHRDI3 27 select GENERIC_PCI_IOMAP if PCI 28 select GENERIC_SCHED_CLOCK 29 select GENERIC_SMP_IDLE_THREAD 30 select GUP_GET_PXX_LOW_HIGH if X2TLB 31 select HAS_IOPORT if HAS_IOPORT_MAP 32 select GENERIC_IOREMAP if MMU 33 select HAVE_ARCH_AUDITSYSCALL 34 select HAVE_ARCH_KGDB 35 select HAVE_ARCH_SECCOMP_FILTER 36 select HAVE_ARCH_TLB_REMOVE_TABLE if X2TLB 37 select HAVE_ARCH_TRACEHOOK 38 select HAVE_DEBUG_BUGVERBOSE 39 select HAVE_DEBUG_KMEMLEAK 40 select HAVE_DYNAMIC_FTRACE 41 select HAVE_GUP_FAST if MMU 42 select HAVE_FUNCTION_GRAPH_TRACER 43 select HAVE_FUNCTION_TRACER 44 select HAVE_HW_BREAKPOINT 45 select HAVE_IOREMAP_PROT if MMU && !X2TLB 46 select HAVE_KERNEL_BZIP2 47 select HAVE_KERNEL_GZIP 48 select HAVE_KERNEL_LZMA 49 select HAVE_KERNEL_LZO 50 select HAVE_KERNEL_XZ 51 select HAVE_KPROBES 52 select HAVE_KRETPROBES 53 select HAVE_MIXED_BREAKPOINTS_REGS 54 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER 55 select HAVE_NMI 56 select HAVE_PATA_PLATFORM 57 select HAVE_PERF_EVENTS 58 select HAVE_REGS_AND_STACK_ACCESS_API 59 select HAVE_UID16 60 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS 61 select HAVE_STACKPROTECTOR 62 select HAVE_SYSCALL_TRACEPOINTS 63 select IRQ_FORCED_THREADING 64 select LOCK_MM_AND_FIND_VMA 65 select MODULES_USE_ELF_RELA 66 select NEED_SG_DMA_LENGTH 67 select NO_DMA if !MMU && !DMA_COHERENT 68 select NO_GENERIC_PCI_IOPORT_MAP if PCI 69 select OLD_SIGACTION 70 select OLD_SIGSUSPEND 71 select PCI_DOMAINS if PCI 72 select PERF_EVENTS 73 select PERF_USE_VMALLOC 74 select RTC_LIB 75 select SPARSE_IRQ 76 select TRACE_IRQFLAGS_SUPPORT 77 help 78 The SuperH is a RISC processor targeted for use in embedded systems 79 and consumer electronics; it was also used in the Sega Dreamcast 80 gaming console. The SuperH port has a home page at 81 <http://www.linux-sh.org/>. 82 83config GENERIC_BUG 84 def_bool y 85 depends on BUG 86 87config GENERIC_HWEIGHT 88 def_bool y 89 90config GENERIC_CALIBRATE_DELAY 91 bool 92 93config GENERIC_LOCKBREAK 94 def_bool y 95 depends on SMP && PREEMPTION 96 97config ARCH_SUSPEND_POSSIBLE 98 def_bool n 99 100config ARCH_HIBERNATION_POSSIBLE 101 def_bool n 102 103config SYS_SUPPORTS_APM_EMULATION 104 bool 105 select ARCH_SUSPEND_POSSIBLE 106 107config SYS_SUPPORTS_SMP 108 bool 109 110config SYS_SUPPORTS_NUMA 111 bool 112 113config STACKTRACE_SUPPORT 114 def_bool y 115 116config LOCKDEP_SUPPORT 117 def_bool y 118 119config ARCH_HAS_ILOG2_U32 120 def_bool n 121 122config ARCH_HAS_ILOG2_U64 123 def_bool n 124 125config NO_IOPORT_MAP 126 def_bool !PCI 127 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE && \ 128 !SH_DREAMCAST 129 130config IO_TRAPPED 131 bool 132 133config SWAP_IO_SPACE 134 bool 135 136config DMA_COHERENT 137 bool 138 139config DMA_NONCOHERENT 140 def_bool !NO_DMA && !DMA_COHERENT 141 select ARCH_HAS_DMA_PREP_COHERENT 142 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 143 select DMA_DIRECT_REMAP 144 145config PGTABLE_LEVELS 146 default 3 if X2TLB 147 default 2 148 149menu "System type" 150 151# 152# Processor families 153# 154config CPU_SH2 155 bool 156 select SH_INTC 157 158config CPU_SH2A 159 bool 160 select CPU_SH2 161 select UNCACHED_MAPPING 162 163config CPU_J2 164 bool 165 select CPU_SH2 166 select OF 167 select OF_EARLY_FLATTREE 168 169config CPU_SH3 170 bool 171 select CPU_HAS_INTEVT 172 select CPU_HAS_SR_RB 173 select SH_INTC 174 select SYS_SUPPORTS_SH_TMU 175 176config CPU_SH4 177 bool 178 select ARCH_SUPPORTS_HUGETLBFS if MMU 179 select CPU_HAS_INTEVT 180 select CPU_HAS_SR_RB 181 select CPU_HAS_FPU if !CPU_SH4AL_DSP 182 select SH_INTC 183 select SYS_SUPPORTS_SH_TMU 184 185config CPU_SH4A 186 bool 187 select CPU_SH4 188 189config CPU_SH4AL_DSP 190 bool 191 select CPU_SH4A 192 select CPU_HAS_DSP 193 194config CPU_SHX2 195 bool 196 197config CPU_SHX3 198 bool 199 select DMA_COHERENT 200 select SYS_SUPPORTS_SMP 201 select SYS_SUPPORTS_NUMA 202 203config ARCH_SHMOBILE 204 bool 205 select ARCH_SUSPEND_POSSIBLE 206 select PM 207 208config CPU_HAS_PMU 209 depends on CPU_SH4 || CPU_SH4A 210 default y 211 bool 212 213choice 214 prompt "Processor sub-type selection" 215 216# 217# Processor subtypes 218# 219 220# SH-2 Processor Support 221 222config CPU_SUBTYPE_SH7619 223 bool "Support SH7619 processor" 224 select CPU_SH2 225 select SYS_SUPPORTS_SH_CMT 226 227config CPU_SUBTYPE_J2 228 bool "Support J2 processor" 229 select CPU_J2 230 select SYS_SUPPORTS_SMP 231 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 232 233# SH-2A Processor Support 234 235config CPU_SUBTYPE_SH7201 236 bool "Support SH7201 processor" 237 select CPU_SH2A 238 select CPU_HAS_FPU 239 select SYS_SUPPORTS_SH_MTU2 240 241config CPU_SUBTYPE_SH7203 242 bool "Support SH7203 processor" 243 select CPU_SH2A 244 select CPU_HAS_FPU 245 select SYS_SUPPORTS_SH_CMT 246 select SYS_SUPPORTS_SH_MTU2 247 select PINCTRL 248 249config CPU_SUBTYPE_SH7206 250 bool "Support SH7206 processor" 251 select CPU_SH2A 252 select SYS_SUPPORTS_SH_CMT 253 select SYS_SUPPORTS_SH_MTU2 254 255config CPU_SUBTYPE_SH7263 256 bool "Support SH7263 processor" 257 select CPU_SH2A 258 select CPU_HAS_FPU 259 select SYS_SUPPORTS_SH_CMT 260 select SYS_SUPPORTS_SH_MTU2 261 262config CPU_SUBTYPE_SH7264 263 bool "Support SH7264 processor" 264 select CPU_SH2A 265 select CPU_HAS_FPU 266 select SYS_SUPPORTS_SH_CMT 267 select SYS_SUPPORTS_SH_MTU2 268 select PINCTRL 269 270config CPU_SUBTYPE_SH7269 271 bool "Support SH7269 processor" 272 select CPU_SH2A 273 select CPU_HAS_FPU 274 select SYS_SUPPORTS_SH_CMT 275 select SYS_SUPPORTS_SH_MTU2 276 select PINCTRL 277 278config CPU_SUBTYPE_MXG 279 bool "Support MX-G processor" 280 select CPU_SH2A 281 select SYS_SUPPORTS_SH_MTU2 282 help 283 Select MX-G if running on an R8A03022BG part. 284 285# SH-3 Processor Support 286 287config CPU_SUBTYPE_SH7705 288 bool "Support SH7705 processor" 289 select CPU_SH3 290 291config CPU_SUBTYPE_SH7706 292 bool "Support SH7706 processor" 293 select CPU_SH3 294 help 295 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 296 297config CPU_SUBTYPE_SH7707 298 bool "Support SH7707 processor" 299 select CPU_SH3 300 help 301 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 302 303config CPU_SUBTYPE_SH7708 304 bool "Support SH7708 processor" 305 select CPU_SH3 306 help 307 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 308 if you have a 100 Mhz SH-3 HD6417708R CPU. 309 310config CPU_SUBTYPE_SH7709 311 bool "Support SH7709 processor" 312 select CPU_SH3 313 help 314 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 315 316config CPU_SUBTYPE_SH7710 317 bool "Support SH7710 processor" 318 select CPU_SH3 319 select CPU_HAS_DSP 320 help 321 Select SH7710 if you have a SH3-DSP SH7710 CPU. 322 323config CPU_SUBTYPE_SH7712 324 bool "Support SH7712 processor" 325 select CPU_SH3 326 select CPU_HAS_DSP 327 help 328 Select SH7712 if you have a SH3-DSP SH7712 CPU. 329 330config CPU_SUBTYPE_SH7720 331 bool "Support SH7720 processor" 332 select CPU_SH3 333 select CPU_HAS_DSP 334 select SYS_SUPPORTS_SH_CMT 335 select USB_OHCI_SH if USB_OHCI_HCD 336 select PINCTRL 337 help 338 Select SH7720 if you have a SH3-DSP SH7720 CPU. 339 340config CPU_SUBTYPE_SH7721 341 bool "Support SH7721 processor" 342 select CPU_SH3 343 select CPU_HAS_DSP 344 select SYS_SUPPORTS_SH_CMT 345 select USB_OHCI_SH if USB_OHCI_HCD 346 help 347 Select SH7721 if you have a SH3-DSP SH7721 CPU. 348 349# SH-4 Processor Support 350 351config CPU_SUBTYPE_SH7750 352 bool "Support SH7750 processor" 353 select CPU_SH4 354 help 355 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 356 357config CPU_SUBTYPE_SH7091 358 bool "Support SH7091 processor" 359 select CPU_SH4 360 help 361 Select SH7091 if you have an SH-4 based Sega device (such as 362 the Dreamcast, Naomi, and Naomi 2). 363 364config CPU_SUBTYPE_SH7750R 365 bool "Support SH7750R processor" 366 select CPU_SH4 367 368config CPU_SUBTYPE_SH7750S 369 bool "Support SH7750S processor" 370 select CPU_SH4 371 372config CPU_SUBTYPE_SH7751 373 bool "Support SH7751 processor" 374 select CPU_SH4 375 help 376 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 377 or if you have a HD6417751R CPU. 378 379config CPU_SUBTYPE_SH7751R 380 bool "Support SH7751R processor" 381 select CPU_SH4 382 383config CPU_SUBTYPE_SH7760 384 bool "Support SH7760 processor" 385 select CPU_SH4 386 387# SH-4A Processor Support 388 389config CPU_SUBTYPE_SH7723 390 bool "Support SH7723 processor" 391 select CPU_SH4A 392 select CPU_SHX2 393 select ARCH_SHMOBILE 394 select ARCH_SPARSEMEM_ENABLE 395 select SYS_SUPPORTS_SH_CMT 396 select PINCTRL 397 help 398 Select SH7723 if you have an SH-MobileR2 CPU. 399 400config CPU_SUBTYPE_SH7724 401 bool "Support SH7724 processor" 402 select CPU_SH4A 403 select CPU_SHX2 404 select ARCH_SHMOBILE 405 select ARCH_SPARSEMEM_ENABLE 406 select SYS_SUPPORTS_SH_CMT 407 select PINCTRL 408 help 409 Select SH7724 if you have an SH-MobileR2R CPU. 410 411config CPU_SUBTYPE_SH7734 412 bool "Support SH7734 processor" 413 select CPU_SH4A 414 select CPU_SHX2 415 select PINCTRL 416 help 417 Select SH7734 if you have a SH4A SH7734 CPU. 418 419config CPU_SUBTYPE_SH7757 420 bool "Support SH7757 processor" 421 select CPU_SH4A 422 select CPU_SHX2 423 select PINCTRL 424 help 425 Select SH7757 if you have a SH4A SH7757 CPU. 426 427config CPU_SUBTYPE_SH7763 428 bool "Support SH7763 processor" 429 select CPU_SH4A 430 select USB_OHCI_SH if USB_OHCI_HCD 431 help 432 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 433 434config CPU_SUBTYPE_SH7770 435 bool "Support SH7770 processor" 436 select CPU_SH4A 437 438config CPU_SUBTYPE_SH7780 439 bool "Support SH7780 processor" 440 select CPU_SH4A 441 442config CPU_SUBTYPE_SH7785 443 bool "Support SH7785 processor" 444 select CPU_SH4A 445 select CPU_SHX2 446 select ARCH_SPARSEMEM_ENABLE 447 select SYS_SUPPORTS_NUMA 448 select PINCTRL 449 450config CPU_SUBTYPE_SH7786 451 bool "Support SH7786 processor" 452 select CPU_SH4A 453 select CPU_SHX3 454 select CPU_HAS_PTEAEX 455 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 456 select USB_OHCI_SH if USB_OHCI_HCD 457 select USB_EHCI_SH if USB_EHCI_HCD 458 select PINCTRL 459 460config CPU_SUBTYPE_SHX3 461 bool "Support SH-X3 processor" 462 select CPU_SH4A 463 select CPU_SHX3 464 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 465 select GPIOLIB 466 select GPIOLIB_LEGACY 467 select PINCTRL 468 469# SH4AL-DSP Processor Support 470 471config CPU_SUBTYPE_SH7343 472 bool "Support SH7343 processor" 473 select CPU_SH4AL_DSP 474 select ARCH_SHMOBILE 475 select SYS_SUPPORTS_SH_CMT 476 477config CPU_SUBTYPE_SH7722 478 bool "Support SH7722 processor" 479 select CPU_SH4AL_DSP 480 select CPU_SHX2 481 select ARCH_SHMOBILE 482 select ARCH_SPARSEMEM_ENABLE 483 select SYS_SUPPORTS_NUMA 484 select SYS_SUPPORTS_SH_CMT 485 select PINCTRL 486 487config CPU_SUBTYPE_SH7366 488 bool "Support SH7366 processor" 489 select CPU_SH4AL_DSP 490 select CPU_SHX2 491 select ARCH_SHMOBILE 492 select ARCH_SPARSEMEM_ENABLE 493 select SYS_SUPPORTS_NUMA 494 select SYS_SUPPORTS_SH_CMT 495 496endchoice 497 498source "arch/sh/mm/Kconfig" 499 500source "arch/sh/Kconfig.cpu" 501 502source "arch/sh/boards/Kconfig" 503 504menu "Timer and clock configuration" 505 506config SH_PCLK_FREQ 507 int "Peripheral clock frequency (in Hz)" 508 depends on SH_CLK_CPG_LEGACY 509 default "31250000" if CPU_SUBTYPE_SH7619 510 default "33333333" if CPU_SUBTYPE_SH7770 || \ 511 CPU_SUBTYPE_SH7760 || \ 512 CPU_SUBTYPE_SH7705 || \ 513 CPU_SUBTYPE_SH7203 || \ 514 CPU_SUBTYPE_SH7206 || \ 515 CPU_SUBTYPE_SH7263 || \ 516 CPU_SUBTYPE_MXG 517 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 518 default "50000000" 519 help 520 This option is used to specify the peripheral clock frequency. 521 This is necessary for determining the reference clock value on 522 platforms lacking an RTC. 523 524config SH_CLK_CPG 525 def_bool y 526 527config SH_CLK_CPG_LEGACY 528 depends on SH_CLK_CPG 529 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ 530 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ 531 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ 532 !CPU_SUBTYPE_SH7269 533 534endmenu 535 536menu "CPU Frequency scaling" 537source "drivers/cpufreq/Kconfig" 538endmenu 539 540source "arch/sh/drivers/Kconfig" 541 542endmenu 543 544menu "Kernel features" 545 546source "kernel/Kconfig.hz" 547 548config ARCH_SUPPORTS_KEXEC 549 def_bool MMU 550 551config ARCH_SUPPORTS_CRASH_DUMP 552 def_bool BROKEN_ON_SMP 553 554config ARCH_DEFAULT_CRASH_DUMP 555 def_bool y 556 557config ARCH_SUPPORTS_KEXEC_JUMP 558 def_bool y 559 560config PHYSICAL_START 561 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 562 default MEMORY_START 563 help 564 This gives the physical address where the kernel is loaded 565 and is ordinarily the same as MEMORY_START. 566 567 Different values are primarily used in the case of kexec on panic 568 where the fail safe kernel needs to run at a different address 569 than the panic-ed kernel. 570 571config SMP 572 bool "Symmetric multi-processing support" 573 depends on SYS_SUPPORTS_SMP 574 help 575 This enables support for systems with more than one CPU. If you have 576 a system with only one CPU, say N. If you have a system with more 577 than one CPU, say Y. 578 579 If you say N here, the kernel will run on uni- and multiprocessor 580 machines, but will use only one CPU of a multiprocessor machine. If 581 you say Y here, the kernel will run on many, but not all, 582 uniprocessor machines. On a uniprocessor machine, the kernel 583 will run faster if you say N here. 584 585 People using multiprocessor machines who say Y here should also say 586 Y to "Enhanced Real Time Clock Support", below. 587 588 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 589 available at <https://www.tldp.org/docs.html#howto>. 590 591 If you don't know what to do here, say N. 592 593config NR_CPUS 594 int "Maximum number of CPUs (2-32)" 595 range 2 32 596 depends on SMP 597 default "4" if CPU_SUBTYPE_SHX3 598 default "2" 599 help 600 This allows you to specify the maximum number of CPUs which this 601 kernel will support. The maximum supported value is 32 and the 602 minimum value which makes sense is 2. 603 604 This is purely to save memory - each supported CPU adds 605 approximately eight kilobytes to the kernel image. 606 607config HOTPLUG_CPU 608 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 609 depends on SMP 610 help 611 Say Y here to experiment with turning CPUs off and on. CPUs 612 can be controlled through /sys/devices/system/cpu. 613 614config GUSA 615 def_bool y 616 depends on !SMP 617 help 618 This enables support for gUSA (general UserSpace Atomicity). 619 This is the default implementation for both UP and non-ll/sc 620 CPUs, and is used by the libc, amongst others. 621 622 For additional information, design information can be found 623 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. 624 625 This should only be disabled for special cases where alternate 626 atomicity implementations exist. 627 628config GUSA_RB 629 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" 630 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) 631 help 632 Enabling this option will allow the kernel to implement some 633 atomic operations using a software implementation of load-locked/ 634 store-conditional (LLSC). On machines which do not have hardware 635 LLSC, this should be more efficient than the other alternative of 636 disabling interrupts around the atomic sequence. 637 638config HW_PERF_EVENTS 639 bool "Enable hardware performance counter support for perf events" 640 depends on PERF_EVENTS && CPU_HAS_PMU 641 default y 642 help 643 Enable hardware performance counter support for perf events. If 644 disabled, perf events will use software events only. 645 646source "drivers/sh/Kconfig" 647 648endmenu 649 650menu "Boot options" 651 652config BUILTIN_DTB 653 bool "Use builtin DTB" 654 default n 655 depends on SH_DEVICE_TREE 656 select GENERIC_BUILTIN_DTB 657 help 658 Link a device tree blob for particular hardware into the kernel, 659 suppressing use of the DTB pointer provided by the bootloader. 660 This option should only be used with legacy bootloaders that are 661 not capable of providing a DTB to the kernel, or for experimental 662 hardware without stable device tree bindings. 663 664config BUILTIN_DTB_NAME 665 string "Source file for builtin DTB" 666 default "" 667 depends on BUILTIN_DTB 668 help 669 Base name (without suffix, relative to arch/sh/boot/dts) for the 670 a DTS file that will be used to produce the DTB linked into the 671 kernel. 672 673config ZERO_PAGE_OFFSET 674 hex 675 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ 676 SH_7751_SOLUTION_ENGINE 677 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 678 default "0x00002000" if PAGE_SIZE_8KB 679 default "0x00001000" 680 help 681 This sets the default offset of zero page. 682 683config BOOT_LINK_OFFSET 684 hex 685 default "0x00210000" if SH_SHMIN 686 default "0x00810000" if SH_7780_SOLUTION_ENGINE 687 default "0x009e0000" if SH_TITAN 688 default "0x01800000" if SH_SDK7780 689 default "0x02000000" if SH_EDOSK7760 690 default "0x00800000" 691 help 692 This option allows you to set the link address offset of the zImage. 693 This can be useful if you are on a board which has a small amount of 694 memory. 695 696config ENTRY_OFFSET 697 hex 698 default "0x00001000" if PAGE_SIZE_4KB 699 default "0x00002000" if PAGE_SIZE_8KB 700 default "0x00004000" if PAGE_SIZE_16KB 701 default "0x00010000" if PAGE_SIZE_64KB 702 default "0x00000000" 703 704config ROMIMAGE_MMCIF 705 bool "Include MMCIF loader in romImage (EXPERIMENTAL)" 706 depends on CPU_SUBTYPE_SH7724 707 help 708 Say Y here to include experimental MMCIF loading code in 709 romImage. With this enabled it is possible to write the romImage 710 kernel image to an MMC card and boot the kernel straight from 711 the reset vector. At reset the processor Mask ROM will load the 712 first part of the romImage which in turn loads the rest the kernel 713 image to RAM using the MMCIF hardware block. 714 715choice 716 prompt "Kernel command line" 717 default CMDLINE_OVERWRITE 718 help 719 Setting this option allows the kernel command line arguments 720 to be set. 721 722config CMDLINE_OVERWRITE 723 bool "Overwrite bootloader kernel arguments" 724 help 725 Given string will overwrite any arguments passed in by 726 a bootloader. 727 728config CMDLINE_EXTEND 729 bool "Extend bootloader kernel arguments" 730 help 731 Given string will be concatenated with arguments passed in 732 by a bootloader. 733 734config CMDLINE_FROM_BOOTLOADER 735 bool "Use bootloader kernel arguments" 736 help 737 Uses the command-line options passed by the boot loader. 738 739endchoice 740 741config CMDLINE 742 string "Kernel command line arguments string" 743 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND 744 default "console=ttySC1,115200" 745 746endmenu 747 748menu "Bus options" 749 750config MAPLE 751 bool "Maple Bus support" 752 depends on SH_DREAMCAST 753 help 754 The Maple Bus is SEGA's serial communication bus for peripherals 755 on the Dreamcast. Without this bus support you won't be able to 756 get your Dreamcast keyboard etc to work, so most users 757 probably want to say 'Y' here, unless you are only using the 758 Dreamcast with a serial line terminal or a remote network 759 connection. 760 761endmenu 762 763menu "Power management options (EXPERIMENTAL)" 764 765source "kernel/power/Kconfig" 766 767source "drivers/cpuidle/Kconfig" 768 769endmenu 770