xref: /linux/arch/riscv/include/asm/vendor_extensions/thead.h (revision 1b5f3c51fbb8042efb314484b47b2092cdd40bf6)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_RISCV_VENDOR_EXTENSIONS_THEAD_H
3 #define _ASM_RISCV_VENDOR_EXTENSIONS_THEAD_H
4 
5 #include <asm/vendor_extensions.h>
6 
7 #include <linux/types.h>
8 
9 /*
10  * Extension keys must be strictly less than RISCV_ISA_VENDOR_EXT_MAX.
11  */
12 #define RISCV_ISA_VENDOR_EXT_XTHEADVECTOR		0
13 
14 extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_thead;
15 
16 #ifdef CONFIG_RISCV_ISA_VENDOR_EXT_THEAD
17 void disable_xtheadvector(void);
18 #else
19 static inline void disable_xtheadvector(void) { }
20 #endif
21 
22 /* Extension specific helpers */
23 
24 /*
25  * Vector 0.7.1 as used for example on T-Head Xuantie cores, uses an older
26  * encoding for vsetvli (ta, ma vs. d1), so provide an instruction for
27  * vsetvli	t4, x0, e8, m8, d1
28  */
29 #define THEAD_VSETVLI_T4X0E8M8D1	".long	0x00307ed7\n\t"
30 
31 /*
32  * While in theory, the vector-0.7.1 vsb.v and vlb.v result in the same
33  * encoding as the standard vse8.v and vle8.v, compilers seem to optimize
34  * the call resulting in a different encoding and then using a value for
35  * the "mop" field that is not part of vector-0.7.1
36  * So encode specific variants for vstate_save and _restore.
37  */
38 #define THEAD_VSB_V_V0T0		".long	0x02028027\n\t"
39 #define THEAD_VSB_V_V8T0		".long	0x02028427\n\t"
40 #define THEAD_VSB_V_V16T0		".long	0x02028827\n\t"
41 #define THEAD_VSB_V_V24T0		".long	0x02028c27\n\t"
42 #define THEAD_VLB_V_V0T0		".long	0x012028007\n\t"
43 #define THEAD_VLB_V_V8T0		".long	0x012028407\n\t"
44 #define THEAD_VLB_V_V16T0		".long	0x012028807\n\t"
45 #define THEAD_VLB_V_V24T0		".long	0x012028c07\n\t"
46 
47 #endif
48