1// SPDX-License-Identifier: GPL-2.0 OR MIT 2/* 3 * Copyright (c) 2026 Yixun Lan <dlan@kernel.org> 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7 8#define K3_PADCONF(pin, func) (((pin) << 16) | (func)) 9 10/* Map GPIO pin to each bank's <index, offset> */ 11#define K3_GPIO(x) (x / 32) (x % 32) 12 13&pinctrl { 14 gmac0_rgmii_0_cfg: gmac0-rgmii-0-cfg { 15 gmac0-rgmii-0-pins { 16 pinmux = <K3_PADCONF(0, 1)>, /* gmac0_rxdv */ 17 <K3_PADCONF(1, 1)>, /* gmac0_rx_d0 */ 18 <K3_PADCONF(2, 1)>, /* gmac0_rx_d1 */ 19 <K3_PADCONF(3, 1)>, /* gmac0_rx_clk */ 20 <K3_PADCONF(4, 1)>, /* gmac0_rx_d2 */ 21 <K3_PADCONF(5, 1)>, /* gmac0_rx_d3 */ 22 <K3_PADCONF(6, 1)>, /* gmac0_tx_d0 */ 23 <K3_PADCONF(7, 1)>, /* gmac0_tx_d1 */ 24 <K3_PADCONF(8, 1)>, /* gmac0_tx_clk */ 25 <K3_PADCONF(9, 1)>, /* gmac0_tx_d2 */ 26 <K3_PADCONF(10, 1)>, /* gmac0_tx_d3 */ 27 <K3_PADCONF(11, 1)>, /* gmac0_tx_en */ 28 <K3_PADCONF(12, 1)>, /* gmac0_mdc */ 29 <K3_PADCONF(13, 1)>; /* gmac0_mdio */ 30 31 bias-disable; 32 drive-strength = <25>; 33 power-source = <1800>; 34 }; 35 36 }; 37 38 gmac0_phy_0_cfg: gmac0-phy-0-cfg { 39 gmac0-phy-0-pins { 40 pinmux = <K3_PADCONF(14, 1)>; /* gmac0_int */ 41 42 bias-disable; 43 drive-strength = <25>; 44 power-source = <1800>; 45 }; 46 }; 47 48 /omit-if-no-ref/ 49 i2c8_cfg: i2c8-cfg { 50 i2c8-pins { 51 pinmux = <K3_PADCONF(128, 0)>, /* i2c8 scl */ 52 <K3_PADCONF(129, 0)>; /* i2c8 sda */ 53 54 bias-pull-up = <0>; 55 drive-strength = <25>; 56 }; 57 }; 58 59 /omit-if-no-ref/ 60 uart0_0_cfg: uart0-0-cfg { 61 uart0-0-pins { 62 pinmux = <K3_PADCONF(149, 2)>, /* uart0 tx */ 63 <K3_PADCONF(150, 2)>; /* uart0 rx */ 64 65 bias-pull-up = <0>; 66 drive-strength = <25>; 67 }; 68 }; 69}; 70