xref: /linux/arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts (revision 0cac5ce06e524755b3dac1e0a060b05992076d93) 
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2025 Michael Opdenacker <michael.opdenacker@rootcommit.com>
4 */
5
6/dts-v1/;
7
8#include "k1.dtsi"
9#include "k1-pinctrl.dtsi"
10
11/ {
12	model = "OrangePi R2S";
13	compatible = "xunlong,orangepi-r2s", "spacemit,k1";
14
15	aliases {
16		serial0 = &uart0;
17		ethernet0 = &eth0;
18		ethernet1 = &eth1;
19	};
20
21	chosen {
22		stdout-path = "serial0";
23	};
24};
25
26&emmc {
27	bus-width = <8>;
28	mmc-hs400-1_8v;
29	mmc-hs400-enhanced-strobe;
30	non-removable;
31	no-sd;
32	no-sdio;
33	status = "okay";
34};
35
36&eth0 {
37	phy-handle = <&rgmii0>;
38	phy-mode = "rgmii-id";
39	pinctrl-names = "default";
40	pinctrl-0 = <&gmac0_cfg>;
41	rx-internal-delay-ps = <0>;
42	tx-internal-delay-ps = <0>;
43	status = "okay";
44
45	mdio-bus {
46		#address-cells = <0x1>;
47		#size-cells = <0x0>;
48
49		reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
50		reset-delay-us = <10000>;
51		reset-post-delay-us = <100000>;
52
53		rgmii0: phy@1 {
54			reg = <0x1>;
55		};
56	};
57};
58
59&eth1 {
60	phy-handle = <&rgmii1>;
61	phy-mode = "rgmii-id";
62	pinctrl-names = "default";
63	pinctrl-0 = <&gmac1_cfg>;
64	rx-internal-delay-ps = <0>;
65	tx-internal-delay-ps = <250>;
66	status = "okay";
67
68	mdio-bus {
69		#address-cells = <0x1>;
70		#size-cells = <0x0>;
71
72		reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
73		reset-delay-us = <10000>;
74		reset-post-delay-us = <100000>;
75
76		rgmii1: phy@1 {
77			reg = <0x1>;
78		};
79	};
80};
81
82&pdma {
83	status = "okay";
84};
85
86&uart0 {
87	pinctrl-names = "default";
88	pinctrl-0 = <&uart0_2_cfg>;
89	status = "okay";
90};
91