1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 3#define SOC_PERIPHERAL_IRQ(nr) ((nr) + 16) 4 5#include <dt-bindings/interrupt-controller/irq.h> 6#include <dt-bindings/pinctrl/pinctrl-sg2000.h> 7#include "cv180x-cpus.dtsi" 8#include "cv180x.dtsi" 9#include "cv181x.dtsi" 10 11/ { 12 compatible = "sophgo,sg2000"; 13 14 memory@80000000 { 15 device_type = "memory"; 16 reg = <0x80000000 0x20000000>; 17 }; 18 19 soc { 20 interrupt-parent = <&plic>; 21 dma-noncoherent; 22 23 pinctrl: pinctrl@3001000 { 24 compatible = "sophgo,sg2000-pinctrl"; 25 reg = <0x03001000 0x1000>, 26 <0x05027000 0x1000>; 27 reg-names = "sys", "rtc"; 28 }; 29 30 clk: clock-controller@3002000 { 31 compatible = "sophgo,sg2000-clk"; 32 reg = <0x03002000 0x1000>; 33 clocks = <&osc>; 34 #clock-cells = <1>; 35 }; 36 37 plic: interrupt-controller@70000000 { 38 compatible = "sophgo,sg2000-plic", "thead,c900-plic"; 39 reg = <0x70000000 0x4000000>; 40 interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; 41 interrupt-controller; 42 #address-cells = <0>; 43 #interrupt-cells = <2>; 44 riscv,ndev = <101>; 45 }; 46 47 clint: timer@74000000 { 48 compatible = "sophgo,sg2000-clint", "thead,c900-clint"; 49 reg = <0x74000000 0x10000>; 50 interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; 51 }; 52 }; 53}; 54