1# SPDX-License-Identifier: GPL-2.0-only 2# 3# For a description of the syntax of this configuration file, 4# see Documentation/kbuild/kconfig-language.rst. 5# 6 7config 64BIT 8 bool 9 10config 32BIT 11 bool 12 13config RISCV 14 def_bool y 15 select ACPI_GENERIC_GSI if ACPI 16 select ACPI_MCFG if (ACPI && PCI) 17 select ACPI_PPTT if ACPI 18 select ACPI_REDUCED_HARDWARE_ONLY if ACPI 19 select ACPI_SPCR_TABLE if ACPI 20 select ARCH_DMA_DEFAULT_COHERENT 21 select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION 22 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM_VMEMMAP 23 select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 25 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE 26 select ARCH_HAS_BINFMT_FLAT 27 select ARCH_HAS_CURRENT_STACK_POINTER 28 select ARCH_HAS_DEBUG_VIRTUAL if MMU 29 select ARCH_HAS_DEBUG_VM_PGTABLE 30 select ARCH_HAS_DEBUG_WX 31 select ARCH_HAS_ELF_CORE_EFLAGS 32 select ARCH_HAS_FAST_MULTIPLIER 33 select ARCH_HAS_FORTIFY_SOURCE 34 select ARCH_HAS_GCOV_PROFILE_ALL 35 select ARCH_HAS_GIGANTIC_PAGE 36 select ARCH_HAS_HW_PTE_YOUNG 37 select ARCH_HAS_KCOV 38 select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && FPU 39 select ARCH_HAS_MEMBARRIER_CALLBACKS 40 select ARCH_HAS_MEMBARRIER_SYNC_CORE 41 select ARCH_HAS_MMIOWB 42 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 43 select ARCH_HAS_PMEM_API 44 select ARCH_HAS_PREEMPT_LAZY 45 select ARCH_HAS_PREPARE_SYNC_CORE_CMD 46 select ARCH_HAS_PTDUMP if MMU 47 select ARCH_HAS_PTE_SPECIAL 48 select ARCH_HAS_SET_DIRECT_MAP if MMU 49 select ARCH_HAS_SET_MEMORY if MMU 50 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL 51 select ARCH_HAS_STRICT_MODULE_RWX if MMU && !XIP_KERNEL 52 select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 53 select ARCH_HAS_SYSCALL_WRAPPER 54 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 55 select ARCH_HAS_UBSAN 56 select ARCH_HAS_VDSO_ARCH_DATA if HAVE_GENERIC_VDSO 57 select ARCH_HAVE_NMI_SAFE_CMPXCHG 58 select ARCH_KEEP_MEMBLOCK if ACPI 59 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE if 64BIT && MMU 60 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX 61 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT 62 select ARCH_STACKWALK 63 select ARCH_SUPPORTS_ATOMIC_RMW 64 # clang >= 17: https://github.com/llvm/llvm-project/commit/62fa708ceb027713b386c7e0efda994f8bdc27e2 65 select ARCH_SUPPORTS_CFI if (!CC_IS_CLANG || CLANG_VERSION >= 170000) 66 select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU 67 select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 68 select ARCH_SUPPORTS_HUGETLBFS if MMU 69 # LLD >= 14: https://github.com/llvm/llvm-project/issues/50505 70 select ARCH_SUPPORTS_LTO_CLANG if LLD_VERSION >= 140000 && CMODEL_MEDANY 71 select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000 72 select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT && MMU 73 select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU 74 select ARCH_SUPPORTS_PER_VMA_LOCK if MMU 75 select ARCH_SUPPORTS_RT 76 select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK 77 select ARCH_SUPPORTS_SCHED_MC if SMP 78 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 79 select ARCH_USE_MEMTEST 80 select ARCH_USE_QUEUED_RWLOCKS 81 select ARCH_USE_SYM_ANNOTATIONS 82 select ARCH_USES_CFI_TRAPS if CFI 83 select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if MMU 84 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 85 select ARCH_WANT_FRAME_POINTERS 86 select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT 87 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT 88 select ARCH_WANT_LD_ORPHAN_WARN if !XIP_KERNEL 89 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP 90 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 91 select ARCH_WANTS_NO_INSTR 92 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE 93 select ARCH_WEAK_RELEASE_ACQUIRE if ARCH_USE_QUEUED_SPINLOCKS 94 select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU 95 select BUILDTIME_TABLE_SORT if MMU 96 select CLINT_TIMER if RISCV_M_MODE 97 select CLONE_BACKWARDS 98 select COMMON_CLK 99 select CPU_NO_EFFICIENT_FFS if !RISCV_ISA_ZBB 100 select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND 101 select DYNAMIC_FTRACE if FUNCTION_TRACER 102 select EDAC_SUPPORT 103 select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER && !DYNAMIC_FTRACE) 104 select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY if DYNAMIC_FTRACE 105 select FUNCTION_ALIGNMENT_8B if DYNAMIC_FTRACE_WITH_CALL_OPS 106 select GENERIC_ARCH_TOPOLOGY 107 select GENERIC_ATOMIC64 if !64BIT 108 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 109 select GENERIC_CPU_DEVICES 110 select GENERIC_CPU_VULNERABILITIES 111 select GENERIC_EARLY_IOREMAP 112 select GENERIC_ENTRY 113 select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO && 64BIT 114 select GENERIC_IDLE_POLL_SETUP 115 select GENERIC_IOREMAP if MMU 116 select GENERIC_IRQ_IPI if SMP 117 select GENERIC_IRQ_IPI_MUX if SMP 118 select GENERIC_IRQ_MULTI_HANDLER 119 select GENERIC_IRQ_SHOW 120 select GENERIC_IRQ_SHOW_LEVEL 121 select GENERIC_LIB_DEVMEM_IS_ALLOWED 122 select GENERIC_PENDING_IRQ if SMP 123 select GENERIC_PCI_IOMAP 124 select GENERIC_SCHED_CLOCK 125 select GENERIC_SMP_IDLE_THREAD 126 select GENERIC_TIME_VSYSCALL if GENERIC_GETTIMEOFDAY 127 select HARDIRQS_SW_RESEND 128 select HAS_IOPORT if MMU 129 select HAVE_ALIGNED_STRUCT_PAGE 130 select HAVE_ARCH_AUDITSYSCALL 131 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP 132 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT 133 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 134 select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL 135 select HAVE_ARCH_KASAN if MMU && 64BIT 136 select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT 137 select HAVE_ARCH_KFENCE if MMU && 64BIT 138 select HAVE_ARCH_KSTACK_ERASE 139 select HAVE_ARCH_KGDB if !XIP_KERNEL 140 select HAVE_ARCH_KGDB_QXFER_PKT 141 select HAVE_ARCH_MMAP_RND_BITS if MMU 142 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT 143 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 144 select HAVE_ARCH_SECCOMP_FILTER 145 select HAVE_ARCH_THREAD_STRUCT_WHITELIST 146 select HAVE_ARCH_TRACEHOOK 147 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU 148 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if 64BIT && MMU 149 select HAVE_ARCH_USERFAULTFD_MINOR if 64BIT && USERFAULTFD 150 select HAVE_ARCH_VMAP_STACK if MMU && 64BIT 151 select HAVE_ASM_MODVERSIONS 152 select HAVE_CONTEXT_TRACKING_USER 153 select HAVE_DEBUG_KMEMLEAK 154 select HAVE_DMA_CONTIGUOUS if MMU 155 select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE) 156 select FUNCTION_ALIGNMENT_4B if HAVE_DYNAMIC_FTRACE && RISCV_ISA_C 157 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS if HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS 158 select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS if (DYNAMIC_FTRACE_WITH_ARGS && !CFI) 159 select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE 160 select HAVE_FTRACE_GRAPH_FUNC 161 select HAVE_FUNCTION_GRAPH_TRACER if HAVE_DYNAMIC_FTRACE_WITH_ARGS 162 select HAVE_FUNCTION_GRAPH_FREGS 163 select HAVE_FUNCTION_TRACER if !XIP_KERNEL && HAVE_DYNAMIC_FTRACE 164 select HAVE_EBPF_JIT if MMU 165 select HAVE_GENERIC_TIF_BITS 166 select HAVE_GUP_FAST if MMU 167 select HAVE_FUNCTION_ARG_ACCESS_API 168 select HAVE_FUNCTION_ERROR_INJECTION 169 select HAVE_GCC_PLUGINS 170 select HAVE_GENERIC_VDSO if MMU 171 select HAVE_IRQ_TIME_ACCOUNTING 172 select HAVE_KERNEL_BZIP2 if !XIP_KERNEL && !EFI_ZBOOT 173 select HAVE_KERNEL_GZIP if !XIP_KERNEL && !EFI_ZBOOT 174 select HAVE_KERNEL_LZ4 if !XIP_KERNEL && !EFI_ZBOOT 175 select HAVE_KERNEL_LZMA if !XIP_KERNEL && !EFI_ZBOOT 176 select HAVE_KERNEL_LZO if !XIP_KERNEL && !EFI_ZBOOT 177 select HAVE_KERNEL_UNCOMPRESSED if !XIP_KERNEL && !EFI_ZBOOT 178 select HAVE_KERNEL_ZSTD if !XIP_KERNEL && !EFI_ZBOOT 179 select HAVE_KERNEL_XZ if !XIP_KERNEL && !EFI_ZBOOT 180 select HAVE_KPROBES if !XIP_KERNEL 181 select HAVE_KRETPROBES if !XIP_KERNEL 182 # https://github.com/ClangBuiltLinux/linux/issues/1881 183 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if !LD_IS_LLD 184 select HAVE_MOVE_PMD 185 select HAVE_MOVE_PUD 186 select HAVE_PAGE_SIZE_4KB 187 select HAVE_PCI 188 select HAVE_PERF_EVENTS 189 select HAVE_PERF_REGS 190 select HAVE_PERF_USER_STACK_DUMP 191 select HAVE_POSIX_CPU_TIMERS_TASK_WORK 192 select HAVE_PREEMPT_DYNAMIC_KEY if !XIP_KERNEL 193 select HAVE_REGS_AND_STACK_ACCESS_API 194 select HAVE_RETHOOK if !XIP_KERNEL 195 select HAVE_RSEQ 196 select HAVE_RUST if RUSTC_SUPPORTS_RISCV && CC_IS_CLANG 197 select HAVE_SAMPLE_FTRACE_DIRECT 198 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 199 select HAVE_STACKPROTECTOR 200 select HAVE_SYSCALL_TRACEPOINTS 201 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU 202 select IRQ_DOMAIN 203 select IRQ_FORCED_THREADING 204 select KASAN_VMALLOC if KASAN 205 select LOCK_MM_AND_FIND_VMA 206 select MMU_GATHER_RCU_TABLE_FREE if SMP && MMU 207 select MODULES_USE_ELF_RELA if MODULES 208 select OF 209 select OF_EARLY_FLATTREE 210 select OF_IRQ 211 select PCI_DOMAINS_GENERIC if PCI 212 select PCI_ECAM if (ACPI && PCI) 213 select PCI_MSI if PCI 214 select RELOCATABLE if !MMU && !PHYS_RAM_BASE_FIXED 215 select RISCV_ALTERNATIVE if !XIP_KERNEL 216 select RISCV_APLIC 217 select RISCV_IMSIC 218 select RISCV_INTC 219 select RISCV_TIMER if RISCV_SBI 220 select SIFIVE_PLIC 221 select SPARSE_IRQ 222 select SYSCTL_EXCEPTION_TRACE 223 select THREAD_INFO_IN_TASK 224 select TRACE_IRQFLAGS_SUPPORT 225 select UACCESS_MEMCPY if !MMU 226 select VDSO_GETRANDOM if HAVE_GENERIC_VDSO && 64BIT 227 select USER_STACKTRACE_SUPPORT 228 select ZONE_DMA32 if 64BIT 229 230config RUSTC_SUPPORTS_RISCV 231 def_bool y 232 depends on 64BIT 233 # Shadow call stack requires rustc version 1.82+ due to use of the 234 # -Zsanitizer=shadow-call-stack flag. 235 depends on !SHADOW_CALL_STACK || RUSTC_VERSION >= 108200 236 237config CLANG_SUPPORTS_DYNAMIC_FTRACE 238 def_bool CC_IS_CLANG 239 # https://github.com/ClangBuiltLinux/linux/issues/1817 240 depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600)) 241 242config GCC_SUPPORTS_DYNAMIC_FTRACE 243 def_bool CC_IS_GCC 244 depends on $(cc-option,-fpatchable-function-entry=8) 245 depends on CC_HAS_MIN_FUNCTION_ALIGNMENT || !RISCV_ISA_C 246 247config HAVE_SHADOW_CALL_STACK 248 def_bool $(cc-option,-fsanitize=shadow-call-stack) 249 # https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769 250 depends on $(ld-option,--no-relax-gp) 251 252config RISCV_USE_LINKER_RELAXATION 253 def_bool y 254 # https://github.com/llvm/llvm-project/commit/6611d58f5bbcbec77262d392e2923e1d680f6985 255 depends on !LD_IS_LLD || LLD_VERSION >= 150000 256 257# https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6 258config ARCH_HAS_BROKEN_DWARF5 259 def_bool y 260 depends on RISCV_USE_LINKER_RELAXATION 261 # https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a 262 depends on AS_IS_LLVM && AS_VERSION < 180000 263 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77 264 depends on LD_IS_LLD && LLD_VERSION < 180000 265 266config ARCH_MMAP_RND_BITS_MIN 267 default 18 if 64BIT 268 default 8 269 270config ARCH_MMAP_RND_COMPAT_BITS_MIN 271 default 8 272 273# max bits determined by the following formula: 274# VA_BITS - PAGE_SHIFT - 3 275config ARCH_MMAP_RND_BITS_MAX 276 default 24 if 64BIT # SV39 based 277 default 17 278 279config ARCH_MMAP_RND_COMPAT_BITS_MAX 280 default 17 281 282# set if we run in machine mode, cleared if we run in supervisor mode 283config RISCV_M_MODE 284 bool "Build a kernel that runs in machine mode" 285 depends on !MMU 286 default y 287 help 288 Select this option if you want to run the kernel in M-mode, 289 without the assistance of any other firmware. 290 291# set if we are running in S-mode and can use SBI calls 292config RISCV_SBI 293 bool 294 depends on !RISCV_M_MODE 295 default y 296 297config MMU 298 bool "MMU-based Paged Memory Management Support" 299 default y 300 help 301 Select if you want MMU-based virtualised addressing space 302 support by paged memory management. If unsure, say 'Y'. 303 304config KASAN_SHADOW_OFFSET 305 hex 306 depends on KASAN_GENERIC 307 default 0xdfffffff00000000 if 64BIT 308 default 0xffffffff if 32BIT 309 310config ARCH_FLATMEM_ENABLE 311 def_bool !NUMA 312 313config ARCH_SPARSEMEM_ENABLE 314 def_bool y 315 depends on MMU 316 select SPARSEMEM_STATIC if 32BIT && SPARSEMEM 317 select SPARSEMEM_VMEMMAP_ENABLE if 64BIT 318 319config ARCH_SELECT_MEMORY_MODEL 320 def_bool ARCH_SPARSEMEM_ENABLE 321 322config ARCH_SUPPORTS_UPROBES 323 def_bool y 324 325config STACKTRACE_SUPPORT 326 def_bool y 327 328config GENERIC_BUG 329 def_bool y 330 depends on BUG 331 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT 332 333config GENERIC_BUG_RELATIVE_POINTERS 334 bool 335 336config GENERIC_CALIBRATE_DELAY 337 def_bool y 338 339config GENERIC_CSUM 340 def_bool y 341 342config GENERIC_HWEIGHT 343 def_bool y 344 345config FIX_EARLYCON_MEM 346 def_bool MMU 347 348config ILLEGAL_POINTER_VALUE 349 hex 350 default 0 if 32BIT 351 default 0xdead000000000000 if 64BIT 352 353config PGTABLE_LEVELS 354 int 355 default 5 if 64BIT 356 default 2 357 358config LOCKDEP_SUPPORT 359 def_bool y 360 361config RISCV_DMA_NONCOHERENT 362 bool 363 select ARCH_HAS_DMA_PREP_COHERENT 364 select ARCH_HAS_SETUP_DMA_OPS 365 select ARCH_HAS_SYNC_DMA_FOR_CPU 366 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 367 select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB 368 369config RISCV_NONSTANDARD_CACHE_OPS 370 bool 371 help 372 This enables function pointer support for non-standard noncoherent 373 systems to handle cache management. 374 375config AS_HAS_INSN 376 def_bool $(as-instr,.insn r 51$(comma) 0$(comma) 0$(comma) t0$(comma) t0$(comma) zero) 377 378config AS_HAS_OPTION_ARCH 379 # https://github.com/llvm/llvm-project/commit/9e8ed3403c191ab9c4903e8eeb8f732ff8a43cb4 380 def_bool y 381 depends on $(as-instr, .option arch$(comma) +m) 382 383source "arch/riscv/Kconfig.socs" 384source "arch/riscv/Kconfig.errata" 385 386menu "Platform type" 387 388config NONPORTABLE 389 bool "Allow configurations that result in non-portable kernels" 390 help 391 RISC-V kernel binaries are compatible between all known systems 392 whenever possible, but there are some use cases that can only be 393 satisfied by configurations that result in kernel binaries that are 394 not portable between systems. 395 396 Selecting N does not guarantee kernels will be portable to all known 397 systems. Selecting any of the options guarded by NONPORTABLE will 398 result in kernel binaries that are unlikely to be portable between 399 systems. 400 401 If unsure, say N. 402 403choice 404 prompt "Base ISA" 405 default ARCH_RV64I 406 help 407 This selects the base ISA that this kernel will target and must match 408 the target platform. 409 410config ARCH_RV32I 411 bool "RV32I" 412 depends on NONPORTABLE 413 select 32BIT 414 select GENERIC_LIB_ASHLDI3 415 select GENERIC_LIB_ASHRDI3 416 select GENERIC_LIB_LSHRDI3 417 select GENERIC_LIB_UCMPDI2 418 419config ARCH_RV64I 420 bool "RV64I" 421 select 64BIT 422 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 423 select SWIOTLB if MMU 424 425endchoice 426 427# We must be able to map all physical memory into the kernel, but the compiler 428# is still a bit more efficient when generating code if it's setup in a manner 429# such that it can only map 2GiB of memory. 430choice 431 prompt "Kernel Code Model" 432 default CMODEL_MEDLOW if 32BIT 433 default CMODEL_MEDANY if 64BIT 434 435 config CMODEL_MEDLOW 436 bool "medium low code model" 437 config CMODEL_MEDANY 438 bool "medium any code model" 439endchoice 440 441config MODULE_SECTIONS 442 bool 443 select HAVE_MOD_ARCH_SPECIFIC 444 445config SMP 446 bool "Symmetric Multi-Processing" 447 help 448 This enables support for systems with more than one CPU. If 449 you say N here, the kernel will run on single and 450 multiprocessor machines, but will use only one CPU of a 451 multiprocessor machine. If you say Y here, the kernel will run 452 on many, but not all, single processor machines. On a single 453 processor machine, the kernel will run faster if you say N 454 here. 455 456 If you don't know what to do here, say N. 457 458config NR_CPUS 459 int "Maximum number of CPUs (2-512)" 460 depends on SMP 461 range 2 512 if !RISCV_SBI_V01 462 range 2 32 if RISCV_SBI_V01 && 32BIT 463 range 2 64 if RISCV_SBI_V01 && 64BIT 464 default "32" if 32BIT 465 default "64" if 64BIT 466 467config HOTPLUG_CPU 468 bool "Support for hot-pluggable CPUs" 469 depends on SMP 470 select GENERIC_IRQ_MIGRATION 471 help 472 473 Say Y here to experiment with turning CPUs off and on. CPUs 474 can be controlled through /sys/devices/system/cpu. 475 476 Say N if you want to disable CPU hotplug. 477 478choice 479 prompt "CPU Tuning" 480 default TUNE_GENERIC 481 482config TUNE_GENERIC 483 bool "generic" 484 485endchoice 486 487# Common NUMA Features 488config NUMA 489 bool "NUMA Memory Allocation and Scheduler Support" 490 depends on SMP && MMU 491 select ARCH_SUPPORTS_NUMA_BALANCING 492 select GENERIC_ARCH_NUMA 493 select HAVE_SETUP_PER_CPU_AREA 494 select NEED_PER_CPU_EMBED_FIRST_CHUNK 495 select NEED_PER_CPU_PAGE_FIRST_CHUNK 496 select OF_NUMA 497 select USE_PERCPU_NUMA_NODE_ID 498 help 499 Enable NUMA (Non-Uniform Memory Access) support. 500 501 The kernel will try to allocate memory used by a CPU on the 502 local memory of the CPU and add some more NUMA awareness to the kernel. 503 504config NODES_SHIFT 505 int "Maximum NUMA Nodes (as a power of 2)" 506 range 1 10 507 default "2" 508 depends on NUMA 509 help 510 Specify the maximum number of NUMA Nodes available on the target 511 system. Increases memory reserved to accommodate various tables. 512 513choice 514 prompt "RISC-V spinlock type" 515 default RISCV_COMBO_SPINLOCKS 516 517config RISCV_TICKET_SPINLOCKS 518 bool "Using ticket spinlock" 519 520config RISCV_QUEUED_SPINLOCKS 521 bool "Using queued spinlock" 522 depends on SMP && MMU && NONPORTABLE 523 select ARCH_USE_QUEUED_SPINLOCKS 524 help 525 The queued spinlock implementation requires the forward progress 526 guarantee of cmpxchg()/xchg() atomic operations: CAS with Zabha or 527 LR/SC with Ziccrse provide such guarantee. 528 529 Select this if and only if Zabha or Ziccrse is available on your 530 platform, RISCV_QUEUED_SPINLOCKS must not be selected for platforms 531 without one of those extensions. 532 533 If unsure, select RISCV_COMBO_SPINLOCKS, which will use qspinlocks 534 when supported and otherwise ticket spinlocks. 535 536config RISCV_COMBO_SPINLOCKS 537 bool "Using combo spinlock" 538 depends on SMP && MMU 539 select ARCH_USE_QUEUED_SPINLOCKS 540 help 541 Embed both queued spinlock and ticket lock so that the spinlock 542 implementation can be chosen at runtime. 543 544endchoice 545 546config RISCV_ALTERNATIVE 547 bool 548 depends on !XIP_KERNEL 549 help 550 This Kconfig allows the kernel to automatically patch the 551 erratum or cpufeature required by the execution platform at run 552 time. The code patching overhead is minimal, as it's only done 553 once at boot and once on each module load. 554 555config RISCV_ALTERNATIVE_EARLY 556 bool 557 depends on RISCV_ALTERNATIVE 558 help 559 Allows early patching of the kernel for special errata 560 561config RISCV_ISA_C 562 bool "Emit compressed instructions when building Linux" 563 default y 564 help 565 Adds "C" to the ISA subsets that the toolchain is allowed to emit 566 when building Linux, which results in compressed instructions in the 567 Linux binary. This option produces a kernel that will not run on 568 systems that do not support compressed instructions. 569 570 If you don't know what to do here, say Y. 571 572config RISCV_ISA_SUPM 573 bool "Supm extension for userspace pointer masking" 574 depends on 64BIT 575 default y 576 help 577 Add support for pointer masking in userspace (Supm) when the 578 underlying hardware extension (Smnpm or Ssnpm) is detected at boot. 579 580 If this option is disabled, userspace will be unable to use 581 the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API. 582 583config RISCV_ISA_SVNAPOT 584 bool "Svnapot extension support for supervisor mode NAPOT pages" 585 depends on 64BIT && MMU 586 depends on RISCV_ALTERNATIVE 587 default y 588 help 589 Enable support for the Svnapot ISA-extension when it is detected 590 at boot. 591 592 The Svnapot extension is used to mark contiguous PTEs as a range 593 of contiguous virtual-to-physical translations for a naturally 594 aligned power-of-2 (NAPOT) granularity larger than the base 4KB page 595 size. When HUGETLBFS is also selected this option unconditionally 596 allocates some memory for each NAPOT page size supported by the kernel. 597 When optimizing for low memory consumption and for platforms without 598 the Svnapot extension, it may be better to say N here. 599 600 If you don't know what to do here, say Y. 601 602config RISCV_ISA_SVPBMT 603 bool "Svpbmt extension support for supervisor mode page-based memory types" 604 depends on 64BIT && MMU 605 depends on RISCV_ALTERNATIVE 606 default y 607 help 608 Add support for the Svpbmt ISA-extension (Supervisor-mode: 609 page-based memory types) in the kernel when it is detected at boot. 610 611 The memory type for a page contains a combination of attributes 612 that indicate the cacheability, idempotency, and ordering 613 properties for access to that page. 614 615 The Svpbmt extension is only available on 64-bit cpus. 616 617 If you don't know what to do here, say Y. 618 619config TOOLCHAIN_HAS_V 620 bool 621 default y 622 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv) 623 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv) 624 depends on LLD_VERSION >= 140000 || LD_VERSION >= 23800 625 depends on AS_HAS_OPTION_ARCH 626 627config RISCV_ISA_V 628 bool "Vector extension support" 629 depends on TOOLCHAIN_HAS_V 630 depends on FPU 631 select DYNAMIC_SIGFRAME 632 default y 633 help 634 Add support for the Vector extension when it is detected at boot. 635 When this option is disabled, neither the kernel nor userspace may 636 use vector procedures. 637 638 If you don't know what to do here, say Y. 639 640config RISCV_ISA_V_DEFAULT_ENABLE 641 bool "Enable userspace Vector by default" 642 depends on RISCV_ISA_V 643 default y 644 help 645 Say Y here if you want to enable Vector in userspace by default. 646 Otherwise, userspace has to make explicit prctl() call to enable 647 Vector, or enable it via the sysctl interface. 648 649 If you don't know what to do here, say Y. 650 651config RISCV_ISA_V_UCOPY_THRESHOLD 652 int "Threshold size for vectorized user copies" 653 depends on RISCV_ISA_V 654 default 768 655 help 656 Prefer using vectorized copy_to_user()/copy_from_user() when the 657 workload size exceeds this value. 658 659config RISCV_ISA_V_PREEMPTIVE 660 bool "Run kernel-mode Vector with kernel preemption" 661 depends on PREEMPTION 662 depends on RISCV_ISA_V 663 default y 664 help 665 Usually, in-kernel SIMD routines are run with preemption disabled. 666 Functions which invoke long running SIMD thus must yield the core's 667 vector unit to prevent blocking other tasks for too long. 668 669 This config allows the kernel to run SIMD without explicitly disabling 670 preemption. Enabling this config will result in higher memory consumption 671 due to the allocation of per-task's kernel Vector context. 672 673config RISCV_ISA_ZAWRS 674 bool "Zawrs extension support for more efficient busy waiting" 675 depends on RISCV_ALTERNATIVE 676 default y 677 help 678 The Zawrs extension defines instructions to be used in polling loops 679 which allow a hart to enter a low-power state or to trap to the 680 hypervisor while waiting on a store to a memory location. Enable the 681 use of these instructions in the kernel when the Zawrs extension is 682 detected at boot. 683 684config TOOLCHAIN_HAS_ZABHA 685 bool 686 default y 687 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zabha) 688 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zabha) 689 depends on AS_HAS_OPTION_ARCH 690 691config RISCV_ISA_ZABHA 692 bool "Zabha extension support for atomic byte/halfword operations" 693 depends on TOOLCHAIN_HAS_ZABHA 694 depends on RISCV_ALTERNATIVE 695 default y 696 help 697 Enable the use of the Zabha ISA-extension to implement kernel 698 byte/halfword atomic memory operations when it is detected at boot. 699 700 If you don't know what to do here, say Y. 701 702config TOOLCHAIN_HAS_ZACAS 703 bool 704 default y 705 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas) 706 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas) 707 depends on AS_HAS_OPTION_ARCH 708 709config RISCV_ISA_ZACAS 710 bool "Zacas extension support for atomic CAS" 711 depends on RISCV_ALTERNATIVE 712 default y 713 help 714 Enable the use of the Zacas ISA-extension to implement kernel atomic 715 cmpxchg operations when it is detected at boot. 716 717 If you don't know what to do here, say Y. 718 719config TOOLCHAIN_HAS_ZBB 720 bool 721 default y 722 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbb) 723 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbb) 724 depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900 725 depends on AS_HAS_OPTION_ARCH 726 727# This symbol indicates that the toolchain supports all v1.0 vector crypto 728# extensions, including Zvk*, Zvbb, and Zvbc. LLVM added all of these at once. 729# binutils added all except Zvkb, then added Zvkb. So we just check for Zvkb. 730config TOOLCHAIN_HAS_VECTOR_CRYPTO 731 def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb) 732 depends on AS_HAS_OPTION_ARCH 733 734config TOOLCHAIN_HAS_ZBA 735 bool 736 default y 737 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba) 738 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba) 739 depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900 740 depends on AS_HAS_OPTION_ARCH 741 742config RISCV_ISA_ZBA 743 bool "Zba extension support for bit manipulation instructions" 744 default y 745 help 746 Add support for enabling optimisations in the kernel when the Zba 747 extension is detected at boot. 748 749 The Zba extension provides instructions to accelerate the generation 750 of addresses that index into arrays of basic data types. 751 752 If you don't know what to do here, say Y. 753 754config RISCV_ISA_ZBB 755 bool "Zbb extension support for bit manipulation instructions" 756 depends on RISCV_ALTERNATIVE 757 default y 758 help 759 Add support for enabling optimisations in the kernel when the 760 Zbb extension is detected at boot. Some optimisations may 761 additionally depend on toolchain support for Zbb. 762 763 The Zbb extension provides instructions to accelerate a number 764 of bit-specific operations (count bit population, sign extending, 765 bitrotation, etc). 766 767 If you don't know what to do here, say Y. 768 769config TOOLCHAIN_HAS_ZBC 770 bool 771 default y 772 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc) 773 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc) 774 depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900 775 depends on AS_HAS_OPTION_ARCH 776 777config RISCV_ISA_ZBC 778 bool "Zbc extension support for carry-less multiplication instructions" 779 depends on TOOLCHAIN_HAS_ZBC 780 depends on MMU 781 depends on RISCV_ALTERNATIVE 782 default y 783 help 784 Adds support to dynamically detect the presence of the Zbc 785 extension (carry-less multiplication) and enable its usage. 786 787 The Zbc extension could accelerate CRC (cyclic redundancy check) 788 calculations. 789 790 If you don't know what to do here, say Y. 791 792config TOOLCHAIN_HAS_ZBKB 793 bool 794 default y 795 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbkb) 796 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbkb) 797 depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900 798 depends on AS_HAS_OPTION_ARCH 799 800config RISCV_ISA_ZBKB 801 bool "Zbkb extension support for bit manipulation instructions" 802 depends on TOOLCHAIN_HAS_ZBKB 803 depends on RISCV_ALTERNATIVE 804 default y 805 help 806 Adds support to dynamically detect the presence of the ZBKB 807 extension (bit manipulation for cryptography) and enable its usage. 808 809 The Zbkb extension provides instructions to accelerate a number 810 of common cryptography operations (pack, zip, etc). 811 812 If you don't know what to do here, say Y. 813 814config RISCV_ISA_ZICBOM 815 bool "Zicbom extension support for non-coherent DMA operation" 816 depends on MMU 817 depends on RISCV_ALTERNATIVE 818 default y 819 select RISCV_DMA_NONCOHERENT 820 select DMA_DIRECT_REMAP 821 help 822 Add support for the Zicbom extension (Cache Block Management 823 Operations) and enable its use in the kernel when it is detected 824 at boot. 825 826 The Zicbom extension can be used to handle for example 827 non-coherent DMA support on devices that need it. 828 829 If you don't know what to do here, say Y. 830 831config RISCV_ISA_ZICBOZ 832 bool "Zicboz extension support for faster zeroing of memory" 833 depends on RISCV_ALTERNATIVE 834 default y 835 help 836 Enable the use of the Zicboz extension (cbo.zero instruction) 837 in the kernel when it is detected at boot. 838 839 The Zicboz extension is used for faster zeroing of memory. 840 841 If you don't know what to do here, say Y. 842 843config RISCV_ISA_ZICBOP 844 bool "Zicbop extension support for cache block prefetch" 845 depends on MMU 846 depends on RISCV_ALTERNATIVE 847 default y 848 help 849 Adds support to dynamically detect the presence of the ZICBOP 850 extension (Cache Block Prefetch Operations) and enable its 851 usage. 852 853 The Zicbop extension can be used to prefetch cache blocks for 854 read/write fetch. 855 856 If you don't know what to do here, say Y. 857 858config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 859 def_bool y 860 # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc 861 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=98416dbb0a62579d4a7a4a76bab51b5b52fec2cd 862 depends on AS_IS_GNU && AS_VERSION >= 23600 863 help 864 Binutils-2.38 and GCC-12.1.0 bumped the default ISA spec to the newer 865 20191213 version, which moves some instructions from the I extension to 866 the Zicsr and Zifencei extensions. This requires explicitly specifying 867 Zicsr and Zifencei when binutils >= 2.38 or GCC >= 12.1.0. Zicsr 868 and Zifencei are supported in binutils from version 2.36 onwards. 869 To make life easier, and avoid forcing toolchains that default to a 870 newer ISA spec to version 2.2, relax the check to binutils >= 2.36. 871 For clang < 17 or GCC < 11.3.0, for which this is not possible or need 872 special treatment, this is dealt with in TOOLCHAIN_NEEDS_OLD_ISA_SPEC. 873 874config TOOLCHAIN_NEEDS_OLD_ISA_SPEC 875 def_bool y 876 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 877 # https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16 878 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d29f5d6ab513c52fd872f532c492e35ae9fd6671 879 depends on (CC_IS_CLANG && CLANG_VERSION < 170000) || (CC_IS_GCC && GCC_VERSION < 110300) 880 help 881 Certain versions of clang and GCC do not support zicsr and zifencei via 882 -march. This option causes an older ISA spec compatible with these older 883 versions of clang and GCC to be passed to GAS, which has the same result 884 as passing zicsr and zifencei to -march. 885 886config FPU 887 bool "FPU support" 888 default y 889 help 890 Add support for floating point operations when an FPU is detected at 891 boot. When this option is disabled, neither the kernel nor userspace 892 may use the floating point unit. 893 894 If you don't know what to do here, say Y. 895 896config IRQ_STACKS 897 bool "Independent irq & softirq stacks" if EXPERT 898 default y 899 select HAVE_IRQ_EXIT_ON_IRQ_STACK 900 select HAVE_SOFTIRQ_ON_OWN_STACK 901 help 902 Add independent irq & softirq stacks for percpu to prevent kernel stack 903 overflows. We may save some memory footprint by disabling IRQ_STACKS. 904 905config THREAD_SIZE_ORDER 906 int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT 907 range 0 4 908 default 1 if 32BIT 909 default 2 910 help 911 Specify the Pages of thread stack size (from 4KB to 64KB), which also 912 affects irq stack size, which is equal to thread stack size. 913 914config RISCV_MISALIGNED 915 bool 916 help 917 Embed support for detecting and emulating misaligned 918 scalar or vector loads and stores. 919 920config RISCV_SCALAR_MISALIGNED 921 bool 922 select RISCV_MISALIGNED 923 select SYSCTL_ARCH_UNALIGN_ALLOW 924 help 925 Embed support for emulating misaligned loads and stores. 926 927config RISCV_VECTOR_MISALIGNED 928 bool 929 select RISCV_MISALIGNED 930 depends on RISCV_ISA_V 931 help 932 Enable detecting support for vector misaligned loads and stores. 933 934choice 935 prompt "Unaligned Accesses Support" 936 default RISCV_PROBE_UNALIGNED_ACCESS 937 help 938 This determines the level of support for unaligned accesses. This 939 information is used by the kernel to perform optimizations. It is also 940 exposed to user space via the hwprobe syscall. The hardware will be 941 probed at boot by default. 942 943config RISCV_PROBE_UNALIGNED_ACCESS 944 bool "Probe for hardware unaligned access support" 945 select RISCV_SCALAR_MISALIGNED 946 help 947 During boot, the kernel will run a series of tests to determine the 948 speed of unaligned accesses. This probing will dynamically determine 949 the speed of unaligned accesses on the underlying system. If unaligned 950 memory accesses trap into the kernel as they are not supported by the 951 system, the kernel will emulate the unaligned accesses to preserve the 952 UABI. 953 954config RISCV_EMULATED_UNALIGNED_ACCESS 955 bool "Emulate unaligned access where system support is missing" 956 select RISCV_SCALAR_MISALIGNED 957 help 958 If unaligned memory accesses trap into the kernel as they are not 959 supported by the system, the kernel will emulate the unaligned 960 accesses to preserve the UABI. When the underlying system does support 961 unaligned accesses, the unaligned accesses are assumed to be slow. 962 963config RISCV_SLOW_UNALIGNED_ACCESS 964 bool "Assume the system supports slow unaligned memory accesses" 965 depends on NONPORTABLE 966 help 967 Assume that the system supports slow unaligned memory accesses. The 968 kernel and userspace programs may not be able to run at all on systems 969 that do not support unaligned memory accesses. 970 971config RISCV_EFFICIENT_UNALIGNED_ACCESS 972 bool "Assume the system supports fast unaligned memory accesses" 973 depends on NONPORTABLE 974 select DCACHE_WORD_ACCESS if MMU 975 select HAVE_EFFICIENT_UNALIGNED_ACCESS 976 help 977 Assume that the system supports fast unaligned memory accesses. When 978 enabled, this option improves the performance of the kernel on such 979 systems. However, the kernel and userspace programs will run much more 980 slowly, or will not be able to run at all, on systems that do not 981 support efficient unaligned memory accesses. 982 983endchoice 984 985choice 986 prompt "Vector unaligned Accesses Support" 987 depends on RISCV_ISA_V 988 default RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 989 help 990 This determines the level of support for vector unaligned accesses. This 991 information is used by the kernel to perform optimizations. It is also 992 exposed to user space via the hwprobe syscall. The hardware will be 993 probed at boot by default. 994 995config RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 996 bool "Probe speed of vector unaligned accesses" 997 select RISCV_VECTOR_MISALIGNED 998 depends on RISCV_ISA_V 999 help 1000 During boot, the kernel will run a series of tests to determine the 1001 speed of vector unaligned accesses if they are supported. This probing 1002 will dynamically determine the speed of vector unaligned accesses on 1003 the underlying system if they are supported. 1004 1005config RISCV_SLOW_VECTOR_UNALIGNED_ACCESS 1006 bool "Assume the system supports slow vector unaligned memory accesses" 1007 depends on NONPORTABLE 1008 help 1009 Assume that the system supports slow vector unaligned memory accesses. The 1010 kernel and userspace programs may not be able to run at all on systems 1011 that do not support unaligned memory accesses. 1012 1013config RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS 1014 bool "Assume the system supports fast vector unaligned memory accesses" 1015 depends on NONPORTABLE 1016 help 1017 Assume that the system supports fast vector unaligned memory accesses. When 1018 enabled, this option improves the performance of the kernel on such 1019 systems. However, the kernel and userspace programs will run much more 1020 slowly, or will not be able to run at all, on systems that do not 1021 support efficient unaligned memory accesses. 1022 1023endchoice 1024 1025source "arch/riscv/Kconfig.vendor" 1026 1027endmenu # "Platform type" 1028 1029menu "Kernel features" 1030 1031source "kernel/Kconfig.hz" 1032 1033config RISCV_SBI_V01 1034 bool "SBI v0.1 support" 1035 depends on RISCV_SBI 1036 help 1037 This config allows kernel to use SBI v0.1 APIs. This will be 1038 deprecated in future once legacy M-mode software are no longer in use. 1039 1040config RISCV_BOOT_SPINWAIT 1041 bool "Spinwait booting method" 1042 depends on SMP 1043 default y if RISCV_SBI_V01 || RISCV_M_MODE 1044 help 1045 This enables support for booting Linux via spinwait method. In the 1046 spinwait method, all cores randomly jump to Linux. One of the cores 1047 gets chosen via lottery and all other keep spinning on a percpu 1048 variable. This method cannot support CPU hotplug and sparse hartid 1049 scheme. It should be only enabled for M-mode Linux or platforms relying 1050 on older firmware without SBI HSM extension. All other platforms should 1051 rely on ordered booting via SBI HSM extension which gets chosen 1052 dynamically at runtime if the firmware supports it. 1053 1054 Since spinwait is incompatible with sparse hart IDs, it requires 1055 NR_CPUS be large enough to contain the physical hart ID of the first 1056 hart to enter Linux. 1057 1058 If unsure what to do here, say N. 1059 1060config ARCH_SUPPORTS_KEXEC 1061 def_bool y 1062 1063config ARCH_SELECTS_KEXEC 1064 def_bool y 1065 depends on KEXEC 1066 select HOTPLUG_CPU if SMP 1067 1068config ARCH_SUPPORTS_KEXEC_FILE 1069 def_bool 64BIT 1070 1071config ARCH_SELECTS_KEXEC_FILE 1072 def_bool y 1073 depends on KEXEC_FILE 1074 select HAVE_IMA_KEXEC if IMA 1075 select KEXEC_ELF 1076 1077config ARCH_SUPPORTS_KEXEC_PURGATORY 1078 def_bool ARCH_SUPPORTS_KEXEC_FILE 1079 1080config ARCH_SUPPORTS_CRASH_DUMP 1081 def_bool y 1082 1083config ARCH_DEFAULT_CRASH_DUMP 1084 def_bool y 1085 1086config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 1087 def_bool CRASH_RESERVE 1088 1089config COMPAT 1090 bool "Kernel support for 32-bit U-mode" 1091 default 64BIT 1092 depends on 64BIT && MMU 1093 help 1094 This option enables support for a 32-bit U-mode running under a 64-bit 1095 kernel at S-mode. riscv32-specific components such as system calls, 1096 the user helper functions (vdso), signal rt_frame functions and the 1097 ptrace interface are handled appropriately by the kernel. 1098 1099 If you want to execute 32-bit userspace applications, say Y. 1100 1101config PARAVIRT 1102 bool "Enable paravirtualization code" 1103 depends on RISCV_SBI 1104 help 1105 This changes the kernel so it can modify itself when it is run 1106 under a hypervisor, potentially improving performance significantly 1107 over full virtualization. 1108 1109config PARAVIRT_TIME_ACCOUNTING 1110 bool "Paravirtual steal time accounting" 1111 depends on PARAVIRT 1112 help 1113 Select this option to enable fine granularity task steal time 1114 accounting. Time spent executing other tasks in parallel with 1115 the current vCPU is discounted from the vCPU power. To account for 1116 that, there can be a small performance impact. 1117 1118 If in doubt, say N here. 1119 1120config RELOCATABLE 1121 bool "Build a relocatable kernel" 1122 depends on !XIP_KERNEL 1123 select MODULE_SECTIONS if MODULES 1124 select ARCH_VMLINUX_NEEDS_RELOCS 1125 help 1126 This builds a kernel as a Position Independent Executable (PIE), 1127 which retains all relocation metadata required to relocate the 1128 kernel binary at runtime to a different virtual address than the 1129 address it was linked at. 1130 Since RISCV uses the RELA relocation format, this requires a 1131 relocation pass at runtime even if the kernel is loaded at the 1132 same address it was linked at. 1133 1134 If unsure, say N. 1135 1136config RANDOMIZE_BASE 1137 bool "Randomize the address of the kernel image" 1138 select RELOCATABLE 1139 depends on MMU && 64BIT && !XIP_KERNEL 1140 help 1141 Randomizes the virtual address at which the kernel image is 1142 loaded, as a security feature that deters exploit attempts 1143 relying on knowledge of the location of kernel internals. 1144 1145 It is the bootloader's job to provide entropy, by passing a 1146 random u64 value in /chosen/kaslr-seed at kernel entry. 1147 1148 When booting via the UEFI stub, it will invoke the firmware's 1149 EFI_RNG_PROTOCOL implementation (if available) to supply entropy 1150 to the kernel proper. In addition, it will randomise the physical 1151 location of the kernel Image as well. 1152 1153 If unsure, say N. 1154 1155endmenu # "Kernel features" 1156 1157menu "Boot options" 1158 1159config CMDLINE 1160 string "Built-in kernel command line" 1161 help 1162 For most platforms, the arguments for the kernel's command line 1163 are provided at run-time, during boot. However, there are cases 1164 where either no arguments are being provided or the provided 1165 arguments are insufficient or even invalid. 1166 1167 When that occurs, it is possible to define a built-in command 1168 line here and choose how the kernel should use it later on. 1169 1170choice 1171 prompt "Built-in command line usage" 1172 depends on CMDLINE != "" 1173 default CMDLINE_FALLBACK 1174 help 1175 Choose how the kernel will handle the provided built-in command 1176 line. 1177 1178config CMDLINE_FALLBACK 1179 bool "Use bootloader kernel arguments if available" 1180 help 1181 Use the built-in command line as fallback in case we get nothing 1182 during boot. This is the default behaviour. 1183 1184config CMDLINE_EXTEND 1185 bool "Extend bootloader kernel arguments" 1186 help 1187 The built-in command line will be appended to the command- 1188 line arguments provided during boot. This is useful in 1189 cases where the provided arguments are insufficient and 1190 you don't want to or cannot modify them. 1191 1192config CMDLINE_FORCE 1193 bool "Always use the default kernel command string" 1194 help 1195 Always use the built-in command line, even if we get one during 1196 boot. This is useful in case you need to override the provided 1197 command line on systems where you don't have or want control 1198 over it. 1199 1200endchoice 1201 1202config EFI_STUB 1203 bool 1204 1205config EFI 1206 bool "UEFI runtime support" 1207 depends on OF && !XIP_KERNEL 1208 depends on MMU 1209 default y 1210 select ARCH_SUPPORTS_ACPI if 64BIT 1211 select EFI_GENERIC_STUB 1212 select EFI_PARAMS_FROM_FDT 1213 select EFI_RUNTIME_WRAPPERS 1214 select EFI_STUB 1215 select LIBFDT 1216 select RISCV_ISA_C 1217 select UCS2_STRING 1218 help 1219 This option provides support for runtime services provided 1220 by UEFI firmware (such as non-volatile variables, realtime 1221 clock, and platform reset). A UEFI stub is also provided to 1222 allow the kernel to be booted as an EFI application. This 1223 is only useful on systems that have UEFI firmware. 1224 1225config DMI 1226 bool "Enable support for SMBIOS (DMI) tables" 1227 depends on EFI 1228 default y 1229 help 1230 This enables SMBIOS/DMI feature for systems. 1231 1232 This option is only useful on systems that have UEFI firmware. 1233 However, even with this option, the resultant kernel should 1234 continue to boot on existing non-UEFI platforms. 1235 1236config CC_HAVE_STACKPROTECTOR_TLS 1237 def_bool $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=0) 1238 1239config STACKPROTECTOR_PER_TASK 1240 def_bool y 1241 depends on !RANDSTRUCT 1242 depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS 1243 1244config PHYS_RAM_BASE_FIXED 1245 bool "Explicitly specified physical RAM address" 1246 depends on NONPORTABLE 1247 default n 1248 1249config PHYS_RAM_BASE 1250 hex "Platform Physical RAM address" 1251 depends on PHYS_RAM_BASE_FIXED 1252 default "0x80000000" 1253 help 1254 This is the physical address of RAM in the system. It has to be 1255 explicitly specified to run early relocations of read-write data 1256 from flash to RAM. 1257 1258config XIP_KERNEL 1259 bool "Kernel Execute-In-Place from ROM" 1260 depends on MMU && SPARSEMEM && NONPORTABLE 1261 # This prevents XIP from being enabled by all{yes,mod}config, which 1262 # fail to build since XIP doesn't support large kernels. 1263 depends on !COMPILE_TEST 1264 select PHYS_RAM_BASE_FIXED 1265 help 1266 Execute-In-Place allows the kernel to run from non-volatile storage 1267 directly addressable by the CPU, such as NOR flash. This saves RAM 1268 space since the text section of the kernel is not loaded from flash 1269 to RAM. Read-write sections, such as the data section and stack, 1270 are still copied to RAM. The XIP kernel is not compressed since 1271 it has to run directly from flash, so it will take more space to 1272 store it. The flash address used to link the kernel object files, 1273 and for storing it, is configuration dependent. Therefore, if you 1274 say Y here, you must know the proper physical address where to 1275 store the kernel image depending on your own flash memory usage. 1276 1277 Also note that the make target becomes "make xipImage" rather than 1278 "make zImage" or "make Image". The final kernel binary to put in 1279 ROM memory will be arch/riscv/boot/xipImage. 1280 1281 SPARSEMEM is required because the kernel text and rodata that are 1282 flash resident are not backed by memmap, then any attempt to get 1283 a struct page on those regions will trigger a fault. 1284 1285 If unsure, say N. 1286 1287config XIP_PHYS_ADDR 1288 hex "XIP Kernel Physical Location" 1289 depends on XIP_KERNEL 1290 default "0x21000000" 1291 help 1292 This is the physical address in your flash memory the kernel will 1293 be linked for and stored to. This address is dependent on your 1294 own flash usage. 1295 1296config RISCV_ISA_FALLBACK 1297 bool "Permit falling back to parsing riscv,isa for extension support by default" 1298 default y 1299 help 1300 Parsing the "riscv,isa" devicetree property has been deprecated and 1301 replaced by a list of explicitly defined strings. For compatibility 1302 with existing platforms, the kernel will fall back to parsing the 1303 "riscv,isa" property if the replacements are not found. 1304 1305 Selecting N here will result in a kernel that does not use the 1306 fallback, unless the commandline "riscv_isa_fallback" parameter is 1307 present. 1308 1309 Please see the dt-binding, located at 1310 Documentation/devicetree/bindings/riscv/extensions.yaml for details 1311 on the replacement properties, "riscv,isa-base" and 1312 "riscv,isa-extensions". 1313 1314config BUILTIN_DTB 1315 bool "Built-in device tree" 1316 depends on OF && NONPORTABLE 1317 select GENERIC_BUILTIN_DTB 1318 help 1319 Build a device tree into the Linux image. 1320 This option should be selected if no bootloader is being used. 1321 If unsure, say N. 1322 1323 1324config BUILTIN_DTB_NAME 1325 string "Built-in device tree source" 1326 depends on BUILTIN_DTB 1327 help 1328 DTS file path (without suffix, relative to arch/riscv/boot/dts) 1329 for the DTS file that will be used to produce the DTB linked into the 1330 kernel. 1331 1332endmenu # "Boot options" 1333 1334config PORTABLE 1335 bool 1336 default !NONPORTABLE 1337 select EFI 1338 select MMU 1339 select OF 1340 1341config ARCH_PROC_KCORE_TEXT 1342 def_bool y 1343 1344menu "Power management options" 1345 1346source "kernel/power/Kconfig" 1347 1348config ARCH_HIBERNATION_POSSIBLE 1349 def_bool y 1350 1351config ARCH_HIBERNATION_HEADER 1352 def_bool HIBERNATION 1353 1354config ARCH_SUSPEND_POSSIBLE 1355 def_bool y 1356 1357endmenu # "Power management options" 1358 1359menu "CPU Power Management" 1360 1361source "drivers/cpuidle/Kconfig" 1362 1363source "drivers/cpufreq/Kconfig" 1364 1365endmenu # "CPU Power Management" 1366 1367source "arch/riscv/kvm/Kconfig" 1368 1369source "drivers/acpi/Kconfig" 1370