1 #ifndef _ASM_POWERPC_EXCEPTION_H 2 #define _ASM_POWERPC_EXCEPTION_H 3 /* 4 * Extracted from head_64.S 5 * 6 * PowerPC version 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> 11 * Adapted for Power Macintosh by Paul Mackerras. 12 * Low-level exception handlers and MMU support 13 * rewritten by Paul Mackerras. 14 * Copyright (C) 1996 Paul Mackerras. 15 * 16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and 17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com 18 * 19 * This file contains the low-level support and setup for the 20 * PowerPC-64 platform, including trap and interrupt dispatch. 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 */ 27 /* 28 * The following macros define the code that appears as 29 * the prologue to each of the exception handlers. They 30 * are split into two parts to allow a single kernel binary 31 * to be used for pSeries and iSeries. 32 * 33 * We make as much of the exception code common between native 34 * exception handlers (including pSeries LPAR) and iSeries LPAR 35 * implementations as possible. 36 */ 37 #include <asm/feature-fixups.h> 38 39 /* PACA save area size in u64 units (exgen, exmc, etc) */ 40 #if defined(CONFIG_RELOCATABLE) 41 #define EX_SIZE 10 42 #else 43 #define EX_SIZE 9 44 #endif 45 46 /* 47 * maximum recursive depth of MCE exceptions 48 */ 49 #define MAX_MCE_DEPTH 4 50 51 #ifdef __ASSEMBLY__ 52 53 #define STF_ENTRY_BARRIER_SLOT \ 54 STF_ENTRY_BARRIER_FIXUP_SECTION; \ 55 nop; \ 56 nop; \ 57 nop 58 59 #define STF_EXIT_BARRIER_SLOT \ 60 STF_EXIT_BARRIER_FIXUP_SECTION; \ 61 nop; \ 62 nop; \ 63 nop; \ 64 nop; \ 65 nop; \ 66 nop 67 68 /* 69 * r10 must be free to use, r13 must be paca 70 */ 71 #define INTERRUPT_TO_KERNEL \ 72 STF_ENTRY_BARRIER_SLOT 73 74 /* 75 * Macros for annotating the expected destination of (h)rfid 76 * 77 * The nop instructions allow us to insert one or more instructions to flush the 78 * L1-D cache when returning to userspace or a guest. 79 */ 80 #define RFI_FLUSH_SLOT \ 81 RFI_FLUSH_FIXUP_SECTION; \ 82 nop; \ 83 nop; \ 84 nop 85 86 #define RFI_TO_KERNEL \ 87 rfid 88 89 #define RFI_TO_USER \ 90 STF_EXIT_BARRIER_SLOT; \ 91 RFI_FLUSH_SLOT; \ 92 rfid; \ 93 b rfi_flush_fallback 94 95 #define RFI_TO_USER_OR_KERNEL \ 96 STF_EXIT_BARRIER_SLOT; \ 97 RFI_FLUSH_SLOT; \ 98 rfid; \ 99 b rfi_flush_fallback 100 101 #define RFI_TO_GUEST \ 102 STF_EXIT_BARRIER_SLOT; \ 103 RFI_FLUSH_SLOT; \ 104 rfid; \ 105 b rfi_flush_fallback 106 107 #define HRFI_TO_KERNEL \ 108 hrfid 109 110 #define HRFI_TO_USER \ 111 STF_EXIT_BARRIER_SLOT; \ 112 RFI_FLUSH_SLOT; \ 113 hrfid; \ 114 b hrfi_flush_fallback 115 116 #define HRFI_TO_USER_OR_KERNEL \ 117 STF_EXIT_BARRIER_SLOT; \ 118 RFI_FLUSH_SLOT; \ 119 hrfid; \ 120 b hrfi_flush_fallback 121 122 #define HRFI_TO_GUEST \ 123 STF_EXIT_BARRIER_SLOT; \ 124 RFI_FLUSH_SLOT; \ 125 hrfid; \ 126 b hrfi_flush_fallback 127 128 #define HRFI_TO_UNKNOWN \ 129 STF_EXIT_BARRIER_SLOT; \ 130 RFI_FLUSH_SLOT; \ 131 hrfid; \ 132 b hrfi_flush_fallback 133 134 #endif /* __ASSEMBLY__ */ 135 136 #endif /* _ASM_POWERPC_EXCEPTION_H */ 137